1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright IBM Corp. 2007 16 * Copyright 2010-2011 Freescale Semiconductor, Inc. 17 * 18 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20 * Scott Wood <scottwood@freescale.com> 21 * Varun Sethi <varun.sethi@freescale.com> 22 */ 23 24 #include <linux/errno.h> 25 #include <linux/err.h> 26 #include <linux/kvm_host.h> 27 #include <linux/gfp.h> 28 #include <linux/module.h> 29 #include <linux/vmalloc.h> 30 #include <linux/fs.h> 31 32 #include <asm/cputable.h> 33 #include <asm/uaccess.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/cacheflush.h> 36 #include <asm/dbell.h> 37 #include <asm/hw_irq.h> 38 #include <asm/irq.h> 39 #include <asm/time.h> 40 41 #include "timing.h" 42 #include "booke.h" 43 #include "trace.h" 44 45 unsigned long kvmppc_booke_handlers; 46 47 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 48 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 49 50 struct kvm_stats_debugfs_item debugfs_entries[] = { 51 { "mmio", VCPU_STAT(mmio_exits) }, 52 { "dcr", VCPU_STAT(dcr_exits) }, 53 { "sig", VCPU_STAT(signal_exits) }, 54 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 55 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 56 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 57 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 58 { "sysc", VCPU_STAT(syscall_exits) }, 59 { "isi", VCPU_STAT(isi_exits) }, 60 { "dsi", VCPU_STAT(dsi_exits) }, 61 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 62 { "dec", VCPU_STAT(dec_exits) }, 63 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 64 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 65 { "doorbell", VCPU_STAT(dbell_exits) }, 66 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 67 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 68 { NULL } 69 }; 70 71 /* TODO: use vcpu_printf() */ 72 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 73 { 74 int i; 75 76 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 77 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 78 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 79 vcpu->arch.shared->srr1); 80 81 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 82 83 for (i = 0; i < 32; i += 4) { 84 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 85 kvmppc_get_gpr(vcpu, i), 86 kvmppc_get_gpr(vcpu, i+1), 87 kvmppc_get_gpr(vcpu, i+2), 88 kvmppc_get_gpr(vcpu, i+3)); 89 } 90 } 91 92 #ifdef CONFIG_SPE 93 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 94 { 95 preempt_disable(); 96 enable_kernel_spe(); 97 kvmppc_save_guest_spe(vcpu); 98 vcpu->arch.shadow_msr &= ~MSR_SPE; 99 preempt_enable(); 100 } 101 102 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 103 { 104 preempt_disable(); 105 enable_kernel_spe(); 106 kvmppc_load_guest_spe(vcpu); 107 vcpu->arch.shadow_msr |= MSR_SPE; 108 preempt_enable(); 109 } 110 111 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 112 { 113 if (vcpu->arch.shared->msr & MSR_SPE) { 114 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 115 kvmppc_vcpu_enable_spe(vcpu); 116 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 117 kvmppc_vcpu_disable_spe(vcpu); 118 } 119 } 120 #else 121 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 122 { 123 } 124 #endif 125 126 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 127 { 128 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 129 /* We always treat the FP bit as enabled from the host 130 perspective, so only need to adjust the shadow MSR */ 131 vcpu->arch.shadow_msr &= ~MSR_FP; 132 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 133 #endif 134 } 135 136 /* 137 * Helper function for "full" MSR writes. No need to call this if only 138 * EE/CE/ME/DE/RI are changing. 139 */ 140 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 141 { 142 u32 old_msr = vcpu->arch.shared->msr; 143 144 #ifdef CONFIG_KVM_BOOKE_HV 145 new_msr |= MSR_GS; 146 #endif 147 148 vcpu->arch.shared->msr = new_msr; 149 150 kvmppc_mmu_msr_notify(vcpu, old_msr); 151 kvmppc_vcpu_sync_spe(vcpu); 152 kvmppc_vcpu_sync_fpu(vcpu); 153 } 154 155 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 156 unsigned int priority) 157 { 158 trace_kvm_booke_queue_irqprio(vcpu, priority); 159 set_bit(priority, &vcpu->arch.pending_exceptions); 160 } 161 162 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 163 ulong dear_flags, ulong esr_flags) 164 { 165 vcpu->arch.queued_dear = dear_flags; 166 vcpu->arch.queued_esr = esr_flags; 167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 168 } 169 170 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 171 ulong dear_flags, ulong esr_flags) 172 { 173 vcpu->arch.queued_dear = dear_flags; 174 vcpu->arch.queued_esr = esr_flags; 175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 176 } 177 178 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 179 ulong esr_flags) 180 { 181 vcpu->arch.queued_esr = esr_flags; 182 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 183 } 184 185 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 186 ulong esr_flags) 187 { 188 vcpu->arch.queued_dear = dear_flags; 189 vcpu->arch.queued_esr = esr_flags; 190 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 191 } 192 193 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 194 { 195 vcpu->arch.queued_esr = esr_flags; 196 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 197 } 198 199 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 200 { 201 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 202 } 203 204 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 205 { 206 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 207 } 208 209 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 210 { 211 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 212 } 213 214 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 215 struct kvm_interrupt *irq) 216 { 217 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 218 219 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 220 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 221 222 kvmppc_booke_queue_irqprio(vcpu, prio); 223 } 224 225 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 226 { 227 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 228 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 229 } 230 231 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 232 { 233 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 234 } 235 236 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 237 { 238 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 239 } 240 241 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 242 { 243 #ifdef CONFIG_KVM_BOOKE_HV 244 mtspr(SPRN_GSRR0, srr0); 245 mtspr(SPRN_GSRR1, srr1); 246 #else 247 vcpu->arch.shared->srr0 = srr0; 248 vcpu->arch.shared->srr1 = srr1; 249 #endif 250 } 251 252 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 253 { 254 vcpu->arch.csrr0 = srr0; 255 vcpu->arch.csrr1 = srr1; 256 } 257 258 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 259 { 260 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 261 vcpu->arch.dsrr0 = srr0; 262 vcpu->arch.dsrr1 = srr1; 263 } else { 264 set_guest_csrr(vcpu, srr0, srr1); 265 } 266 } 267 268 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 269 { 270 vcpu->arch.mcsrr0 = srr0; 271 vcpu->arch.mcsrr1 = srr1; 272 } 273 274 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu) 275 { 276 #ifdef CONFIG_KVM_BOOKE_HV 277 return mfspr(SPRN_GDEAR); 278 #else 279 return vcpu->arch.shared->dar; 280 #endif 281 } 282 283 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear) 284 { 285 #ifdef CONFIG_KVM_BOOKE_HV 286 mtspr(SPRN_GDEAR, dear); 287 #else 288 vcpu->arch.shared->dar = dear; 289 #endif 290 } 291 292 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu) 293 { 294 #ifdef CONFIG_KVM_BOOKE_HV 295 return mfspr(SPRN_GESR); 296 #else 297 return vcpu->arch.shared->esr; 298 #endif 299 } 300 301 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr) 302 { 303 #ifdef CONFIG_KVM_BOOKE_HV 304 mtspr(SPRN_GESR, esr); 305 #else 306 vcpu->arch.shared->esr = esr; 307 #endif 308 } 309 310 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu) 311 { 312 #ifdef CONFIG_KVM_BOOKE_HV 313 return mfspr(SPRN_GEPR); 314 #else 315 return vcpu->arch.epr; 316 #endif 317 } 318 319 /* Deliver the interrupt of the corresponding priority, if possible. */ 320 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 321 unsigned int priority) 322 { 323 int allowed = 0; 324 ulong msr_mask = 0; 325 bool update_esr = false, update_dear = false, update_epr = false; 326 ulong crit_raw = vcpu->arch.shared->critical; 327 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 328 bool crit; 329 bool keep_irq = false; 330 enum int_class int_class; 331 ulong new_msr = vcpu->arch.shared->msr; 332 333 /* Truncate crit indicators in 32 bit mode */ 334 if (!(vcpu->arch.shared->msr & MSR_SF)) { 335 crit_raw &= 0xffffffff; 336 crit_r1 &= 0xffffffff; 337 } 338 339 /* Critical section when crit == r1 */ 340 crit = (crit_raw == crit_r1); 341 /* ... and we're in supervisor mode */ 342 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 343 344 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 345 priority = BOOKE_IRQPRIO_EXTERNAL; 346 keep_irq = true; 347 } 348 349 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 350 update_epr = true; 351 352 switch (priority) { 353 case BOOKE_IRQPRIO_DTLB_MISS: 354 case BOOKE_IRQPRIO_DATA_STORAGE: 355 case BOOKE_IRQPRIO_ALIGNMENT: 356 update_dear = true; 357 /* fall through */ 358 case BOOKE_IRQPRIO_INST_STORAGE: 359 case BOOKE_IRQPRIO_PROGRAM: 360 update_esr = true; 361 /* fall through */ 362 case BOOKE_IRQPRIO_ITLB_MISS: 363 case BOOKE_IRQPRIO_SYSCALL: 364 case BOOKE_IRQPRIO_FP_UNAVAIL: 365 case BOOKE_IRQPRIO_SPE_UNAVAIL: 366 case BOOKE_IRQPRIO_SPE_FP_DATA: 367 case BOOKE_IRQPRIO_SPE_FP_ROUND: 368 case BOOKE_IRQPRIO_AP_UNAVAIL: 369 allowed = 1; 370 msr_mask = MSR_CE | MSR_ME | MSR_DE; 371 int_class = INT_CLASS_NONCRIT; 372 break; 373 case BOOKE_IRQPRIO_WATCHDOG: 374 case BOOKE_IRQPRIO_CRITICAL: 375 case BOOKE_IRQPRIO_DBELL_CRIT: 376 allowed = vcpu->arch.shared->msr & MSR_CE; 377 allowed = allowed && !crit; 378 msr_mask = MSR_ME; 379 int_class = INT_CLASS_CRIT; 380 break; 381 case BOOKE_IRQPRIO_MACHINE_CHECK: 382 allowed = vcpu->arch.shared->msr & MSR_ME; 383 allowed = allowed && !crit; 384 int_class = INT_CLASS_MC; 385 break; 386 case BOOKE_IRQPRIO_DECREMENTER: 387 case BOOKE_IRQPRIO_FIT: 388 keep_irq = true; 389 /* fall through */ 390 case BOOKE_IRQPRIO_EXTERNAL: 391 case BOOKE_IRQPRIO_DBELL: 392 allowed = vcpu->arch.shared->msr & MSR_EE; 393 allowed = allowed && !crit; 394 msr_mask = MSR_CE | MSR_ME | MSR_DE; 395 int_class = INT_CLASS_NONCRIT; 396 break; 397 case BOOKE_IRQPRIO_DEBUG: 398 allowed = vcpu->arch.shared->msr & MSR_DE; 399 allowed = allowed && !crit; 400 msr_mask = MSR_ME; 401 int_class = INT_CLASS_CRIT; 402 break; 403 } 404 405 if (allowed) { 406 switch (int_class) { 407 case INT_CLASS_NONCRIT: 408 set_guest_srr(vcpu, vcpu->arch.pc, 409 vcpu->arch.shared->msr); 410 break; 411 case INT_CLASS_CRIT: 412 set_guest_csrr(vcpu, vcpu->arch.pc, 413 vcpu->arch.shared->msr); 414 break; 415 case INT_CLASS_DBG: 416 set_guest_dsrr(vcpu, vcpu->arch.pc, 417 vcpu->arch.shared->msr); 418 break; 419 case INT_CLASS_MC: 420 set_guest_mcsrr(vcpu, vcpu->arch.pc, 421 vcpu->arch.shared->msr); 422 break; 423 } 424 425 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 426 if (update_esr == true) 427 set_guest_esr(vcpu, vcpu->arch.queued_esr); 428 if (update_dear == true) 429 set_guest_dear(vcpu, vcpu->arch.queued_dear); 430 if (update_epr == true) { 431 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 432 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 433 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 434 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 435 kvmppc_mpic_set_epr(vcpu); 436 } 437 } 438 439 new_msr &= msr_mask; 440 #if defined(CONFIG_64BIT) 441 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 442 new_msr |= MSR_CM; 443 #endif 444 kvmppc_set_msr(vcpu, new_msr); 445 446 if (!keep_irq) 447 clear_bit(priority, &vcpu->arch.pending_exceptions); 448 } 449 450 #ifdef CONFIG_KVM_BOOKE_HV 451 /* 452 * If an interrupt is pending but masked, raise a guest doorbell 453 * so that we are notified when the guest enables the relevant 454 * MSR bit. 455 */ 456 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 457 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 458 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 459 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 460 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 461 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 462 #endif 463 464 return allowed; 465 } 466 467 /* 468 * Return the number of jiffies until the next timeout. If the timeout is 469 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 470 * because the larger value can break the timer APIs. 471 */ 472 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 473 { 474 u64 tb, wdt_tb, wdt_ticks = 0; 475 u64 nr_jiffies = 0; 476 u32 period = TCR_GET_WP(vcpu->arch.tcr); 477 478 wdt_tb = 1ULL << (63 - period); 479 tb = get_tb(); 480 /* 481 * The watchdog timeout will hapeen when TB bit corresponding 482 * to watchdog will toggle from 0 to 1. 483 */ 484 if (tb & wdt_tb) 485 wdt_ticks = wdt_tb; 486 487 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 488 489 /* Convert timebase ticks to jiffies */ 490 nr_jiffies = wdt_ticks; 491 492 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 493 nr_jiffies++; 494 495 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 496 } 497 498 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 499 { 500 unsigned long nr_jiffies; 501 unsigned long flags; 502 503 /* 504 * If TSR_ENW and TSR_WIS are not set then no need to exit to 505 * userspace, so clear the KVM_REQ_WATCHDOG request. 506 */ 507 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 508 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 509 510 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 511 nr_jiffies = watchdog_next_timeout(vcpu); 512 /* 513 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 514 * then do not run the watchdog timer as this can break timer APIs. 515 */ 516 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 517 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 518 else 519 del_timer(&vcpu->arch.wdt_timer); 520 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 521 } 522 523 void kvmppc_watchdog_func(unsigned long data) 524 { 525 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 526 u32 tsr, new_tsr; 527 int final; 528 529 do { 530 new_tsr = tsr = vcpu->arch.tsr; 531 final = 0; 532 533 /* Time out event */ 534 if (tsr & TSR_ENW) { 535 if (tsr & TSR_WIS) 536 final = 1; 537 else 538 new_tsr = tsr | TSR_WIS; 539 } else { 540 new_tsr = tsr | TSR_ENW; 541 } 542 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 543 544 if (new_tsr & TSR_WIS) { 545 smp_wmb(); 546 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 547 kvm_vcpu_kick(vcpu); 548 } 549 550 /* 551 * If this is final watchdog expiry and some action is required 552 * then exit to userspace. 553 */ 554 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 555 vcpu->arch.watchdog_enabled) { 556 smp_wmb(); 557 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 558 kvm_vcpu_kick(vcpu); 559 } 560 561 /* 562 * Stop running the watchdog timer after final expiration to 563 * prevent the host from being flooded with timers if the 564 * guest sets a short period. 565 * Timers will resume when TSR/TCR is updated next time. 566 */ 567 if (!final) 568 arm_next_watchdog(vcpu); 569 } 570 571 static void update_timer_ints(struct kvm_vcpu *vcpu) 572 { 573 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 574 kvmppc_core_queue_dec(vcpu); 575 else 576 kvmppc_core_dequeue_dec(vcpu); 577 578 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 579 kvmppc_core_queue_watchdog(vcpu); 580 else 581 kvmppc_core_dequeue_watchdog(vcpu); 582 } 583 584 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 585 { 586 unsigned long *pending = &vcpu->arch.pending_exceptions; 587 unsigned int priority; 588 589 priority = __ffs(*pending); 590 while (priority < BOOKE_IRQPRIO_MAX) { 591 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 592 break; 593 594 priority = find_next_bit(pending, 595 BITS_PER_BYTE * sizeof(*pending), 596 priority + 1); 597 } 598 599 /* Tell the guest about our interrupt status */ 600 vcpu->arch.shared->int_pending = !!*pending; 601 } 602 603 /* Check pending exceptions and deliver one, if possible. */ 604 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 605 { 606 int r = 0; 607 WARN_ON_ONCE(!irqs_disabled()); 608 609 kvmppc_core_check_exceptions(vcpu); 610 611 if (vcpu->requests) { 612 /* Exception delivery raised request; start over */ 613 return 1; 614 } 615 616 if (vcpu->arch.shared->msr & MSR_WE) { 617 local_irq_enable(); 618 kvm_vcpu_block(vcpu); 619 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 620 local_irq_disable(); 621 622 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 623 r = 1; 624 }; 625 626 return r; 627 } 628 629 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 630 { 631 int r = 1; /* Indicate we want to get back into the guest */ 632 633 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 634 update_timer_ints(vcpu); 635 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 636 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 637 kvmppc_core_flush_tlb(vcpu); 638 #endif 639 640 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 641 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 642 r = 0; 643 } 644 645 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 646 vcpu->run->epr.epr = 0; 647 vcpu->arch.epr_needed = true; 648 vcpu->run->exit_reason = KVM_EXIT_EPR; 649 r = 0; 650 } 651 652 return r; 653 } 654 655 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 656 { 657 int ret, s; 658 #ifdef CONFIG_PPC_FPU 659 unsigned int fpscr; 660 int fpexc_mode; 661 u64 fpr[32]; 662 #endif 663 664 if (!vcpu->arch.sane) { 665 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 666 return -EINVAL; 667 } 668 669 local_irq_disable(); 670 s = kvmppc_prepare_to_enter(vcpu); 671 if (s <= 0) { 672 local_irq_enable(); 673 ret = s; 674 goto out; 675 } 676 kvmppc_lazy_ee_enable(); 677 678 kvm_guest_enter(); 679 680 #ifdef CONFIG_PPC_FPU 681 /* Save userspace FPU state in stack */ 682 enable_kernel_fp(); 683 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 684 fpscr = current->thread.fpscr.val; 685 fpexc_mode = current->thread.fpexc_mode; 686 687 /* Restore guest FPU state to thread */ 688 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 689 current->thread.fpscr.val = vcpu->arch.fpscr; 690 691 /* 692 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 693 * as always using the FPU. Kernel usage of FP (via 694 * enable_kernel_fp()) in this thread must not occur while 695 * vcpu->fpu_active is set. 696 */ 697 vcpu->fpu_active = 1; 698 699 kvmppc_load_guest_fp(vcpu); 700 #endif 701 702 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 703 704 /* No need for kvm_guest_exit. It's done in handle_exit. 705 We also get here with interrupts enabled. */ 706 707 #ifdef CONFIG_PPC_FPU 708 kvmppc_save_guest_fp(vcpu); 709 710 vcpu->fpu_active = 0; 711 712 /* Save guest FPU state from thread */ 713 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 714 vcpu->arch.fpscr = current->thread.fpscr.val; 715 716 /* Restore userspace FPU state from stack */ 717 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 718 current->thread.fpscr.val = fpscr; 719 current->thread.fpexc_mode = fpexc_mode; 720 #endif 721 722 out: 723 vcpu->mode = OUTSIDE_GUEST_MODE; 724 return ret; 725 } 726 727 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 728 { 729 enum emulation_result er; 730 731 er = kvmppc_emulate_instruction(run, vcpu); 732 switch (er) { 733 case EMULATE_DONE: 734 /* don't overwrite subtypes, just account kvm_stats */ 735 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 736 /* Future optimization: only reload non-volatiles if 737 * they were actually modified by emulation. */ 738 return RESUME_GUEST_NV; 739 740 case EMULATE_DO_DCR: 741 run->exit_reason = KVM_EXIT_DCR; 742 return RESUME_HOST; 743 744 case EMULATE_FAIL: 745 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 746 __func__, vcpu->arch.pc, vcpu->arch.last_inst); 747 /* For debugging, encode the failing instruction and 748 * report it to userspace. */ 749 run->hw.hardware_exit_reason = ~0ULL << 32; 750 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 751 kvmppc_core_queue_program(vcpu, ESR_PIL); 752 return RESUME_HOST; 753 754 case EMULATE_EXIT_USER: 755 return RESUME_HOST; 756 757 default: 758 BUG(); 759 } 760 } 761 762 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 763 { 764 ulong r1, ip, msr, lr; 765 766 asm("mr %0, 1" : "=r"(r1)); 767 asm("mflr %0" : "=r"(lr)); 768 asm("mfmsr %0" : "=r"(msr)); 769 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 770 771 memset(regs, 0, sizeof(*regs)); 772 regs->gpr[1] = r1; 773 regs->nip = ip; 774 regs->msr = msr; 775 regs->link = lr; 776 } 777 778 /* 779 * For interrupts needed to be handled by host interrupt handlers, 780 * corresponding host handler are called from here in similar way 781 * (but not exact) as they are called from low level handler 782 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 783 */ 784 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 785 unsigned int exit_nr) 786 { 787 struct pt_regs regs; 788 789 switch (exit_nr) { 790 case BOOKE_INTERRUPT_EXTERNAL: 791 kvmppc_fill_pt_regs(®s); 792 do_IRQ(®s); 793 break; 794 case BOOKE_INTERRUPT_DECREMENTER: 795 kvmppc_fill_pt_regs(®s); 796 timer_interrupt(®s); 797 break; 798 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64) 799 case BOOKE_INTERRUPT_DOORBELL: 800 kvmppc_fill_pt_regs(®s); 801 doorbell_exception(®s); 802 break; 803 #endif 804 case BOOKE_INTERRUPT_MACHINE_CHECK: 805 /* FIXME */ 806 break; 807 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 808 kvmppc_fill_pt_regs(®s); 809 performance_monitor_exception(®s); 810 break; 811 case BOOKE_INTERRUPT_WATCHDOG: 812 kvmppc_fill_pt_regs(®s); 813 #ifdef CONFIG_BOOKE_WDT 814 WatchdogException(®s); 815 #else 816 unknown_exception(®s); 817 #endif 818 break; 819 case BOOKE_INTERRUPT_CRITICAL: 820 unknown_exception(®s); 821 break; 822 } 823 } 824 825 /** 826 * kvmppc_handle_exit 827 * 828 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 829 */ 830 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 831 unsigned int exit_nr) 832 { 833 int r = RESUME_HOST; 834 int s; 835 int idx; 836 837 /* update before a new last_exit_type is rewritten */ 838 kvmppc_update_timing_stats(vcpu); 839 840 /* restart interrupts if they were meant for the host */ 841 kvmppc_restart_interrupt(vcpu, exit_nr); 842 843 local_irq_enable(); 844 845 trace_kvm_exit(exit_nr, vcpu); 846 kvm_guest_exit(); 847 848 run->exit_reason = KVM_EXIT_UNKNOWN; 849 run->ready_for_interrupt_injection = 1; 850 851 switch (exit_nr) { 852 case BOOKE_INTERRUPT_MACHINE_CHECK: 853 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 854 kvmppc_dump_vcpu(vcpu); 855 /* For debugging, send invalid exit reason to user space */ 856 run->hw.hardware_exit_reason = ~1ULL << 32; 857 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 858 r = RESUME_HOST; 859 break; 860 861 case BOOKE_INTERRUPT_EXTERNAL: 862 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 863 r = RESUME_GUEST; 864 break; 865 866 case BOOKE_INTERRUPT_DECREMENTER: 867 kvmppc_account_exit(vcpu, DEC_EXITS); 868 r = RESUME_GUEST; 869 break; 870 871 case BOOKE_INTERRUPT_WATCHDOG: 872 r = RESUME_GUEST; 873 break; 874 875 case BOOKE_INTERRUPT_DOORBELL: 876 kvmppc_account_exit(vcpu, DBELL_EXITS); 877 r = RESUME_GUEST; 878 break; 879 880 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 881 kvmppc_account_exit(vcpu, GDBELL_EXITS); 882 883 /* 884 * We are here because there is a pending guest interrupt 885 * which could not be delivered as MSR_CE or MSR_ME was not 886 * set. Once we break from here we will retry delivery. 887 */ 888 r = RESUME_GUEST; 889 break; 890 891 case BOOKE_INTERRUPT_GUEST_DBELL: 892 kvmppc_account_exit(vcpu, GDBELL_EXITS); 893 894 /* 895 * We are here because there is a pending guest interrupt 896 * which could not be delivered as MSR_EE was not set. Once 897 * we break from here we will retry delivery. 898 */ 899 r = RESUME_GUEST; 900 break; 901 902 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 903 r = RESUME_GUEST; 904 break; 905 906 case BOOKE_INTERRUPT_HV_PRIV: 907 r = emulation_exit(run, vcpu); 908 break; 909 910 case BOOKE_INTERRUPT_PROGRAM: 911 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 912 /* 913 * Program traps generated by user-level software must 914 * be handled by the guest kernel. 915 * 916 * In GS mode, hypervisor privileged instructions trap 917 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 918 * actual program interrupts, handled by the guest. 919 */ 920 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 921 r = RESUME_GUEST; 922 kvmppc_account_exit(vcpu, USR_PR_INST); 923 break; 924 } 925 926 r = emulation_exit(run, vcpu); 927 break; 928 929 case BOOKE_INTERRUPT_FP_UNAVAIL: 930 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 931 kvmppc_account_exit(vcpu, FP_UNAVAIL); 932 r = RESUME_GUEST; 933 break; 934 935 #ifdef CONFIG_SPE 936 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 937 if (vcpu->arch.shared->msr & MSR_SPE) 938 kvmppc_vcpu_enable_spe(vcpu); 939 else 940 kvmppc_booke_queue_irqprio(vcpu, 941 BOOKE_IRQPRIO_SPE_UNAVAIL); 942 r = RESUME_GUEST; 943 break; 944 } 945 946 case BOOKE_INTERRUPT_SPE_FP_DATA: 947 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 948 r = RESUME_GUEST; 949 break; 950 951 case BOOKE_INTERRUPT_SPE_FP_ROUND: 952 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 953 r = RESUME_GUEST; 954 break; 955 #else 956 case BOOKE_INTERRUPT_SPE_UNAVAIL: 957 /* 958 * Guest wants SPE, but host kernel doesn't support it. Send 959 * an "unimplemented operation" program check to the guest. 960 */ 961 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 962 r = RESUME_GUEST; 963 break; 964 965 /* 966 * These really should never happen without CONFIG_SPE, 967 * as we should never enable the real MSR[SPE] in the guest. 968 */ 969 case BOOKE_INTERRUPT_SPE_FP_DATA: 970 case BOOKE_INTERRUPT_SPE_FP_ROUND: 971 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 972 __func__, exit_nr, vcpu->arch.pc); 973 run->hw.hardware_exit_reason = exit_nr; 974 r = RESUME_HOST; 975 break; 976 #endif 977 978 case BOOKE_INTERRUPT_DATA_STORAGE: 979 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 980 vcpu->arch.fault_esr); 981 kvmppc_account_exit(vcpu, DSI_EXITS); 982 r = RESUME_GUEST; 983 break; 984 985 case BOOKE_INTERRUPT_INST_STORAGE: 986 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 987 kvmppc_account_exit(vcpu, ISI_EXITS); 988 r = RESUME_GUEST; 989 break; 990 991 case BOOKE_INTERRUPT_ALIGNMENT: 992 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 993 vcpu->arch.fault_esr); 994 r = RESUME_GUEST; 995 break; 996 997 #ifdef CONFIG_KVM_BOOKE_HV 998 case BOOKE_INTERRUPT_HV_SYSCALL: 999 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1000 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1001 } else { 1002 /* 1003 * hcall from guest userspace -- send privileged 1004 * instruction program check. 1005 */ 1006 kvmppc_core_queue_program(vcpu, ESR_PPR); 1007 } 1008 1009 r = RESUME_GUEST; 1010 break; 1011 #else 1012 case BOOKE_INTERRUPT_SYSCALL: 1013 if (!(vcpu->arch.shared->msr & MSR_PR) && 1014 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1015 /* KVM PV hypercalls */ 1016 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1017 r = RESUME_GUEST; 1018 } else { 1019 /* Guest syscalls */ 1020 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1021 } 1022 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1023 r = RESUME_GUEST; 1024 break; 1025 #endif 1026 1027 case BOOKE_INTERRUPT_DTLB_MISS: { 1028 unsigned long eaddr = vcpu->arch.fault_dear; 1029 int gtlb_index; 1030 gpa_t gpaddr; 1031 gfn_t gfn; 1032 1033 #ifdef CONFIG_KVM_E500V2 1034 if (!(vcpu->arch.shared->msr & MSR_PR) && 1035 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1036 kvmppc_map_magic(vcpu); 1037 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1038 r = RESUME_GUEST; 1039 1040 break; 1041 } 1042 #endif 1043 1044 /* Check the guest TLB. */ 1045 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1046 if (gtlb_index < 0) { 1047 /* The guest didn't have a mapping for it. */ 1048 kvmppc_core_queue_dtlb_miss(vcpu, 1049 vcpu->arch.fault_dear, 1050 vcpu->arch.fault_esr); 1051 kvmppc_mmu_dtlb_miss(vcpu); 1052 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1053 r = RESUME_GUEST; 1054 break; 1055 } 1056 1057 idx = srcu_read_lock(&vcpu->kvm->srcu); 1058 1059 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1060 gfn = gpaddr >> PAGE_SHIFT; 1061 1062 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1063 /* The guest TLB had a mapping, but the shadow TLB 1064 * didn't, and it is RAM. This could be because: 1065 * a) the entry is mapping the host kernel, or 1066 * b) the guest used a large mapping which we're faking 1067 * Either way, we need to satisfy the fault without 1068 * invoking the guest. */ 1069 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1070 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1071 r = RESUME_GUEST; 1072 } else { 1073 /* Guest has mapped and accessed a page which is not 1074 * actually RAM. */ 1075 vcpu->arch.paddr_accessed = gpaddr; 1076 vcpu->arch.vaddr_accessed = eaddr; 1077 r = kvmppc_emulate_mmio(run, vcpu); 1078 kvmppc_account_exit(vcpu, MMIO_EXITS); 1079 } 1080 1081 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1082 break; 1083 } 1084 1085 case BOOKE_INTERRUPT_ITLB_MISS: { 1086 unsigned long eaddr = vcpu->arch.pc; 1087 gpa_t gpaddr; 1088 gfn_t gfn; 1089 int gtlb_index; 1090 1091 r = RESUME_GUEST; 1092 1093 /* Check the guest TLB. */ 1094 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1095 if (gtlb_index < 0) { 1096 /* The guest didn't have a mapping for it. */ 1097 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1098 kvmppc_mmu_itlb_miss(vcpu); 1099 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1100 break; 1101 } 1102 1103 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1104 1105 idx = srcu_read_lock(&vcpu->kvm->srcu); 1106 1107 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1108 gfn = gpaddr >> PAGE_SHIFT; 1109 1110 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1111 /* The guest TLB had a mapping, but the shadow TLB 1112 * didn't. This could be because: 1113 * a) the entry is mapping the host kernel, or 1114 * b) the guest used a large mapping which we're faking 1115 * Either way, we need to satisfy the fault without 1116 * invoking the guest. */ 1117 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1118 } else { 1119 /* Guest mapped and leaped at non-RAM! */ 1120 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1121 } 1122 1123 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1124 break; 1125 } 1126 1127 case BOOKE_INTERRUPT_DEBUG: { 1128 u32 dbsr; 1129 1130 vcpu->arch.pc = mfspr(SPRN_CSRR0); 1131 1132 /* clear IAC events in DBSR register */ 1133 dbsr = mfspr(SPRN_DBSR); 1134 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 1135 mtspr(SPRN_DBSR, dbsr); 1136 1137 run->exit_reason = KVM_EXIT_DEBUG; 1138 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1139 r = RESUME_HOST; 1140 break; 1141 } 1142 1143 default: 1144 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1145 BUG(); 1146 } 1147 1148 /* 1149 * To avoid clobbering exit_reason, only check for signals if we 1150 * aren't already exiting to userspace for some other reason. 1151 */ 1152 if (!(r & RESUME_HOST)) { 1153 local_irq_disable(); 1154 s = kvmppc_prepare_to_enter(vcpu); 1155 if (s <= 0) { 1156 local_irq_enable(); 1157 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1158 } else { 1159 kvmppc_lazy_ee_enable(); 1160 } 1161 } 1162 1163 return r; 1164 } 1165 1166 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1167 { 1168 u32 old_tsr = vcpu->arch.tsr; 1169 1170 vcpu->arch.tsr = new_tsr; 1171 1172 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1173 arm_next_watchdog(vcpu); 1174 1175 update_timer_ints(vcpu); 1176 } 1177 1178 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1179 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1180 { 1181 int i; 1182 int r; 1183 1184 vcpu->arch.pc = 0; 1185 vcpu->arch.shared->pir = vcpu->vcpu_id; 1186 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1187 kvmppc_set_msr(vcpu, 0); 1188 1189 #ifndef CONFIG_KVM_BOOKE_HV 1190 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 1191 vcpu->arch.shadow_pid = 1; 1192 vcpu->arch.shared->msr = 0; 1193 #endif 1194 1195 /* Eye-catching numbers so we know if the guest takes an interrupt 1196 * before it's programmed its own IVPR/IVORs. */ 1197 vcpu->arch.ivpr = 0x55550000; 1198 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1199 vcpu->arch.ivor[i] = 0x7700 | i * 4; 1200 1201 kvmppc_init_timing_stats(vcpu); 1202 1203 r = kvmppc_core_vcpu_setup(vcpu); 1204 kvmppc_sanity_check(vcpu); 1205 return r; 1206 } 1207 1208 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1209 { 1210 /* setup watchdog timer once */ 1211 spin_lock_init(&vcpu->arch.wdt_lock); 1212 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1213 (unsigned long)vcpu); 1214 1215 return 0; 1216 } 1217 1218 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1219 { 1220 del_timer_sync(&vcpu->arch.wdt_timer); 1221 } 1222 1223 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1224 { 1225 int i; 1226 1227 regs->pc = vcpu->arch.pc; 1228 regs->cr = kvmppc_get_cr(vcpu); 1229 regs->ctr = vcpu->arch.ctr; 1230 regs->lr = vcpu->arch.lr; 1231 regs->xer = kvmppc_get_xer(vcpu); 1232 regs->msr = vcpu->arch.shared->msr; 1233 regs->srr0 = vcpu->arch.shared->srr0; 1234 regs->srr1 = vcpu->arch.shared->srr1; 1235 regs->pid = vcpu->arch.pid; 1236 regs->sprg0 = vcpu->arch.shared->sprg0; 1237 regs->sprg1 = vcpu->arch.shared->sprg1; 1238 regs->sprg2 = vcpu->arch.shared->sprg2; 1239 regs->sprg3 = vcpu->arch.shared->sprg3; 1240 regs->sprg4 = vcpu->arch.shared->sprg4; 1241 regs->sprg5 = vcpu->arch.shared->sprg5; 1242 regs->sprg6 = vcpu->arch.shared->sprg6; 1243 regs->sprg7 = vcpu->arch.shared->sprg7; 1244 1245 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1246 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1247 1248 return 0; 1249 } 1250 1251 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1252 { 1253 int i; 1254 1255 vcpu->arch.pc = regs->pc; 1256 kvmppc_set_cr(vcpu, regs->cr); 1257 vcpu->arch.ctr = regs->ctr; 1258 vcpu->arch.lr = regs->lr; 1259 kvmppc_set_xer(vcpu, regs->xer); 1260 kvmppc_set_msr(vcpu, regs->msr); 1261 vcpu->arch.shared->srr0 = regs->srr0; 1262 vcpu->arch.shared->srr1 = regs->srr1; 1263 kvmppc_set_pid(vcpu, regs->pid); 1264 vcpu->arch.shared->sprg0 = regs->sprg0; 1265 vcpu->arch.shared->sprg1 = regs->sprg1; 1266 vcpu->arch.shared->sprg2 = regs->sprg2; 1267 vcpu->arch.shared->sprg3 = regs->sprg3; 1268 vcpu->arch.shared->sprg4 = regs->sprg4; 1269 vcpu->arch.shared->sprg5 = regs->sprg5; 1270 vcpu->arch.shared->sprg6 = regs->sprg6; 1271 vcpu->arch.shared->sprg7 = regs->sprg7; 1272 1273 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1274 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1275 1276 return 0; 1277 } 1278 1279 static void get_sregs_base(struct kvm_vcpu *vcpu, 1280 struct kvm_sregs *sregs) 1281 { 1282 u64 tb = get_tb(); 1283 1284 sregs->u.e.features |= KVM_SREGS_E_BASE; 1285 1286 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1287 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1288 sregs->u.e.mcsr = vcpu->arch.mcsr; 1289 sregs->u.e.esr = get_guest_esr(vcpu); 1290 sregs->u.e.dear = get_guest_dear(vcpu); 1291 sregs->u.e.tsr = vcpu->arch.tsr; 1292 sregs->u.e.tcr = vcpu->arch.tcr; 1293 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1294 sregs->u.e.tb = tb; 1295 sregs->u.e.vrsave = vcpu->arch.vrsave; 1296 } 1297 1298 static int set_sregs_base(struct kvm_vcpu *vcpu, 1299 struct kvm_sregs *sregs) 1300 { 1301 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1302 return 0; 1303 1304 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1305 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1306 vcpu->arch.mcsr = sregs->u.e.mcsr; 1307 set_guest_esr(vcpu, sregs->u.e.esr); 1308 set_guest_dear(vcpu, sregs->u.e.dear); 1309 vcpu->arch.vrsave = sregs->u.e.vrsave; 1310 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1311 1312 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1313 vcpu->arch.dec = sregs->u.e.dec; 1314 kvmppc_emulate_dec(vcpu); 1315 } 1316 1317 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1318 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1319 1320 return 0; 1321 } 1322 1323 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1324 struct kvm_sregs *sregs) 1325 { 1326 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1327 1328 sregs->u.e.pir = vcpu->vcpu_id; 1329 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1330 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1331 sregs->u.e.decar = vcpu->arch.decar; 1332 sregs->u.e.ivpr = vcpu->arch.ivpr; 1333 } 1334 1335 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1336 struct kvm_sregs *sregs) 1337 { 1338 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1339 return 0; 1340 1341 if (sregs->u.e.pir != vcpu->vcpu_id) 1342 return -EINVAL; 1343 1344 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1345 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1346 vcpu->arch.decar = sregs->u.e.decar; 1347 vcpu->arch.ivpr = sregs->u.e.ivpr; 1348 1349 return 0; 1350 } 1351 1352 void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1353 { 1354 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1355 1356 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1357 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1358 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1359 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1360 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1361 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1362 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1363 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1364 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1365 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1366 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1367 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1368 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1369 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1370 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1371 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1372 } 1373 1374 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1375 { 1376 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1377 return 0; 1378 1379 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1380 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1381 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1382 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1383 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1384 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1385 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1386 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1387 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1388 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1389 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1390 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1391 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1392 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1393 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1394 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1395 1396 return 0; 1397 } 1398 1399 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1400 struct kvm_sregs *sregs) 1401 { 1402 sregs->pvr = vcpu->arch.pvr; 1403 1404 get_sregs_base(vcpu, sregs); 1405 get_sregs_arch206(vcpu, sregs); 1406 kvmppc_core_get_sregs(vcpu, sregs); 1407 return 0; 1408 } 1409 1410 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1411 struct kvm_sregs *sregs) 1412 { 1413 int ret; 1414 1415 if (vcpu->arch.pvr != sregs->pvr) 1416 return -EINVAL; 1417 1418 ret = set_sregs_base(vcpu, sregs); 1419 if (ret < 0) 1420 return ret; 1421 1422 ret = set_sregs_arch206(vcpu, sregs); 1423 if (ret < 0) 1424 return ret; 1425 1426 return kvmppc_core_set_sregs(vcpu, sregs); 1427 } 1428 1429 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1430 { 1431 int r = 0; 1432 union kvmppc_one_reg val; 1433 int size; 1434 long int i; 1435 1436 size = one_reg_size(reg->id); 1437 if (size > sizeof(val)) 1438 return -EINVAL; 1439 1440 switch (reg->id) { 1441 case KVM_REG_PPC_IAC1: 1442 case KVM_REG_PPC_IAC2: 1443 case KVM_REG_PPC_IAC3: 1444 case KVM_REG_PPC_IAC4: 1445 i = reg->id - KVM_REG_PPC_IAC1; 1446 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]); 1447 break; 1448 case KVM_REG_PPC_DAC1: 1449 case KVM_REG_PPC_DAC2: 1450 i = reg->id - KVM_REG_PPC_DAC1; 1451 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]); 1452 break; 1453 case KVM_REG_PPC_EPR: { 1454 u32 epr = get_guest_epr(vcpu); 1455 val = get_reg_val(reg->id, epr); 1456 break; 1457 } 1458 #if defined(CONFIG_64BIT) 1459 case KVM_REG_PPC_EPCR: 1460 val = get_reg_val(reg->id, vcpu->arch.epcr); 1461 break; 1462 #endif 1463 case KVM_REG_PPC_TCR: 1464 val = get_reg_val(reg->id, vcpu->arch.tcr); 1465 break; 1466 case KVM_REG_PPC_TSR: 1467 val = get_reg_val(reg->id, vcpu->arch.tsr); 1468 break; 1469 case KVM_REG_PPC_DEBUG_INST: 1470 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV); 1471 break; 1472 default: 1473 r = kvmppc_get_one_reg(vcpu, reg->id, &val); 1474 break; 1475 } 1476 1477 if (r) 1478 return r; 1479 1480 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 1481 r = -EFAULT; 1482 1483 return r; 1484 } 1485 1486 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1487 { 1488 int r = 0; 1489 union kvmppc_one_reg val; 1490 int size; 1491 long int i; 1492 1493 size = one_reg_size(reg->id); 1494 if (size > sizeof(val)) 1495 return -EINVAL; 1496 1497 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 1498 return -EFAULT; 1499 1500 switch (reg->id) { 1501 case KVM_REG_PPC_IAC1: 1502 case KVM_REG_PPC_IAC2: 1503 case KVM_REG_PPC_IAC3: 1504 case KVM_REG_PPC_IAC4: 1505 i = reg->id - KVM_REG_PPC_IAC1; 1506 vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val); 1507 break; 1508 case KVM_REG_PPC_DAC1: 1509 case KVM_REG_PPC_DAC2: 1510 i = reg->id - KVM_REG_PPC_DAC1; 1511 vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val); 1512 break; 1513 case KVM_REG_PPC_EPR: { 1514 u32 new_epr = set_reg_val(reg->id, val); 1515 kvmppc_set_epr(vcpu, new_epr); 1516 break; 1517 } 1518 #if defined(CONFIG_64BIT) 1519 case KVM_REG_PPC_EPCR: { 1520 u32 new_epcr = set_reg_val(reg->id, val); 1521 kvmppc_set_epcr(vcpu, new_epcr); 1522 break; 1523 } 1524 #endif 1525 case KVM_REG_PPC_OR_TSR: { 1526 u32 tsr_bits = set_reg_val(reg->id, val); 1527 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1528 break; 1529 } 1530 case KVM_REG_PPC_CLEAR_TSR: { 1531 u32 tsr_bits = set_reg_val(reg->id, val); 1532 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1533 break; 1534 } 1535 case KVM_REG_PPC_TSR: { 1536 u32 tsr = set_reg_val(reg->id, val); 1537 kvmppc_set_tsr(vcpu, tsr); 1538 break; 1539 } 1540 case KVM_REG_PPC_TCR: { 1541 u32 tcr = set_reg_val(reg->id, val); 1542 kvmppc_set_tcr(vcpu, tcr); 1543 break; 1544 } 1545 default: 1546 r = kvmppc_set_one_reg(vcpu, reg->id, &val); 1547 break; 1548 } 1549 1550 return r; 1551 } 1552 1553 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1554 struct kvm_guest_debug *dbg) 1555 { 1556 return -EINVAL; 1557 } 1558 1559 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1560 { 1561 return -ENOTSUPP; 1562 } 1563 1564 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1565 { 1566 return -ENOTSUPP; 1567 } 1568 1569 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1570 struct kvm_translation *tr) 1571 { 1572 int r; 1573 1574 r = kvmppc_core_vcpu_translate(vcpu, tr); 1575 return r; 1576 } 1577 1578 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1579 { 1580 return -ENOTSUPP; 1581 } 1582 1583 void kvmppc_core_free_memslot(struct kvm_memory_slot *free, 1584 struct kvm_memory_slot *dont) 1585 { 1586 } 1587 1588 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, 1589 unsigned long npages) 1590 { 1591 return 0; 1592 } 1593 1594 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1595 struct kvm_memory_slot *memslot, 1596 struct kvm_userspace_memory_region *mem) 1597 { 1598 return 0; 1599 } 1600 1601 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1602 struct kvm_userspace_memory_region *mem, 1603 const struct kvm_memory_slot *old) 1604 { 1605 } 1606 1607 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1608 { 1609 } 1610 1611 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1612 { 1613 #if defined(CONFIG_64BIT) 1614 vcpu->arch.epcr = new_epcr; 1615 #ifdef CONFIG_KVM_BOOKE_HV 1616 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1617 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1618 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1619 #endif 1620 #endif 1621 } 1622 1623 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1624 { 1625 vcpu->arch.tcr = new_tcr; 1626 arm_next_watchdog(vcpu); 1627 update_timer_ints(vcpu); 1628 } 1629 1630 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1631 { 1632 set_bits(tsr_bits, &vcpu->arch.tsr); 1633 smp_wmb(); 1634 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1635 kvm_vcpu_kick(vcpu); 1636 } 1637 1638 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1639 { 1640 clear_bits(tsr_bits, &vcpu->arch.tsr); 1641 1642 /* 1643 * We may have stopped the watchdog due to 1644 * being stuck on final expiration. 1645 */ 1646 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1647 arm_next_watchdog(vcpu); 1648 1649 update_timer_ints(vcpu); 1650 } 1651 1652 void kvmppc_decrementer_func(unsigned long data) 1653 { 1654 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1655 1656 if (vcpu->arch.tcr & TCR_ARE) { 1657 vcpu->arch.dec = vcpu->arch.decar; 1658 kvmppc_emulate_dec(vcpu); 1659 } 1660 1661 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1662 } 1663 1664 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 1665 { 1666 vcpu->cpu = smp_processor_id(); 1667 current->thread.kvm_vcpu = vcpu; 1668 } 1669 1670 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 1671 { 1672 current->thread.kvm_vcpu = NULL; 1673 vcpu->cpu = -1; 1674 } 1675 1676 int __init kvmppc_booke_init(void) 1677 { 1678 #ifndef CONFIG_KVM_BOOKE_HV 1679 unsigned long ivor[16]; 1680 unsigned long *handler = kvmppc_booke_handler_addr; 1681 unsigned long max_ivor = 0; 1682 unsigned long handler_len; 1683 int i; 1684 1685 /* We install our own exception handlers by hijacking IVPR. IVPR must 1686 * be 16-bit aligned, so we need a 64KB allocation. */ 1687 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1688 VCPU_SIZE_ORDER); 1689 if (!kvmppc_booke_handlers) 1690 return -ENOMEM; 1691 1692 /* XXX make sure our handlers are smaller than Linux's */ 1693 1694 /* Copy our interrupt handlers to match host IVORs. That way we don't 1695 * have to swap the IVORs on every guest/host transition. */ 1696 ivor[0] = mfspr(SPRN_IVOR0); 1697 ivor[1] = mfspr(SPRN_IVOR1); 1698 ivor[2] = mfspr(SPRN_IVOR2); 1699 ivor[3] = mfspr(SPRN_IVOR3); 1700 ivor[4] = mfspr(SPRN_IVOR4); 1701 ivor[5] = mfspr(SPRN_IVOR5); 1702 ivor[6] = mfspr(SPRN_IVOR6); 1703 ivor[7] = mfspr(SPRN_IVOR7); 1704 ivor[8] = mfspr(SPRN_IVOR8); 1705 ivor[9] = mfspr(SPRN_IVOR9); 1706 ivor[10] = mfspr(SPRN_IVOR10); 1707 ivor[11] = mfspr(SPRN_IVOR11); 1708 ivor[12] = mfspr(SPRN_IVOR12); 1709 ivor[13] = mfspr(SPRN_IVOR13); 1710 ivor[14] = mfspr(SPRN_IVOR14); 1711 ivor[15] = mfspr(SPRN_IVOR15); 1712 1713 for (i = 0; i < 16; i++) { 1714 if (ivor[i] > max_ivor) 1715 max_ivor = i; 1716 1717 handler_len = handler[i + 1] - handler[i]; 1718 memcpy((void *)kvmppc_booke_handlers + ivor[i], 1719 (void *)handler[i], handler_len); 1720 } 1721 1722 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 1723 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 1724 ivor[max_ivor] + handler_len); 1725 #endif /* !BOOKE_HV */ 1726 return 0; 1727 } 1728 1729 void __exit kvmppc_booke_exit(void) 1730 { 1731 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1732 kvm_exit(); 1733 } 1734