1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright IBM Corp. 2007 16 * Copyright 2010-2011 Freescale Semiconductor, Inc. 17 * 18 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20 * Scott Wood <scottwood@freescale.com> 21 * Varun Sethi <varun.sethi@freescale.com> 22 */ 23 24 #include <linux/errno.h> 25 #include <linux/err.h> 26 #include <linux/kvm_host.h> 27 #include <linux/gfp.h> 28 #include <linux/module.h> 29 #include <linux/vmalloc.h> 30 #include <linux/fs.h> 31 32 #include <asm/cputable.h> 33 #include <asm/uaccess.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/cacheflush.h> 36 #include <asm/dbell.h> 37 #include <asm/hw_irq.h> 38 #include <asm/irq.h> 39 #include <asm/time.h> 40 41 #include "timing.h" 42 #include "booke.h" 43 #include "trace.h" 44 45 unsigned long kvmppc_booke_handlers; 46 47 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 48 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 49 50 struct kvm_stats_debugfs_item debugfs_entries[] = { 51 { "mmio", VCPU_STAT(mmio_exits) }, 52 { "dcr", VCPU_STAT(dcr_exits) }, 53 { "sig", VCPU_STAT(signal_exits) }, 54 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 55 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 56 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 57 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 58 { "sysc", VCPU_STAT(syscall_exits) }, 59 { "isi", VCPU_STAT(isi_exits) }, 60 { "dsi", VCPU_STAT(dsi_exits) }, 61 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 62 { "dec", VCPU_STAT(dec_exits) }, 63 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 64 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 65 { "doorbell", VCPU_STAT(dbell_exits) }, 66 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 67 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 68 { NULL } 69 }; 70 71 /* TODO: use vcpu_printf() */ 72 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 73 { 74 int i; 75 76 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 77 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 78 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 79 vcpu->arch.shared->srr1); 80 81 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 82 83 for (i = 0; i < 32; i += 4) { 84 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 85 kvmppc_get_gpr(vcpu, i), 86 kvmppc_get_gpr(vcpu, i+1), 87 kvmppc_get_gpr(vcpu, i+2), 88 kvmppc_get_gpr(vcpu, i+3)); 89 } 90 } 91 92 #ifdef CONFIG_SPE 93 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 94 { 95 preempt_disable(); 96 enable_kernel_spe(); 97 kvmppc_save_guest_spe(vcpu); 98 vcpu->arch.shadow_msr &= ~MSR_SPE; 99 preempt_enable(); 100 } 101 102 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 103 { 104 preempt_disable(); 105 enable_kernel_spe(); 106 kvmppc_load_guest_spe(vcpu); 107 vcpu->arch.shadow_msr |= MSR_SPE; 108 preempt_enable(); 109 } 110 111 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 112 { 113 if (vcpu->arch.shared->msr & MSR_SPE) { 114 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 115 kvmppc_vcpu_enable_spe(vcpu); 116 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 117 kvmppc_vcpu_disable_spe(vcpu); 118 } 119 } 120 #else 121 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 122 { 123 } 124 #endif 125 126 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 127 { 128 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 129 /* We always treat the FP bit as enabled from the host 130 perspective, so only need to adjust the shadow MSR */ 131 vcpu->arch.shadow_msr &= ~MSR_FP; 132 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 133 #endif 134 } 135 136 /* 137 * Helper function for "full" MSR writes. No need to call this if only 138 * EE/CE/ME/DE/RI are changing. 139 */ 140 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 141 { 142 u32 old_msr = vcpu->arch.shared->msr; 143 144 #ifdef CONFIG_KVM_BOOKE_HV 145 new_msr |= MSR_GS; 146 #endif 147 148 vcpu->arch.shared->msr = new_msr; 149 150 kvmppc_mmu_msr_notify(vcpu, old_msr); 151 kvmppc_vcpu_sync_spe(vcpu); 152 kvmppc_vcpu_sync_fpu(vcpu); 153 } 154 155 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 156 unsigned int priority) 157 { 158 trace_kvm_booke_queue_irqprio(vcpu, priority); 159 set_bit(priority, &vcpu->arch.pending_exceptions); 160 } 161 162 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 163 ulong dear_flags, ulong esr_flags) 164 { 165 vcpu->arch.queued_dear = dear_flags; 166 vcpu->arch.queued_esr = esr_flags; 167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 168 } 169 170 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 171 ulong dear_flags, ulong esr_flags) 172 { 173 vcpu->arch.queued_dear = dear_flags; 174 vcpu->arch.queued_esr = esr_flags; 175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 176 } 177 178 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 179 ulong esr_flags) 180 { 181 vcpu->arch.queued_esr = esr_flags; 182 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 183 } 184 185 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 186 ulong esr_flags) 187 { 188 vcpu->arch.queued_dear = dear_flags; 189 vcpu->arch.queued_esr = esr_flags; 190 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 191 } 192 193 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 194 { 195 vcpu->arch.queued_esr = esr_flags; 196 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 197 } 198 199 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 200 { 201 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 202 } 203 204 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 205 { 206 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 207 } 208 209 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 210 { 211 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 212 } 213 214 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 215 struct kvm_interrupt *irq) 216 { 217 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 218 219 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 220 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 221 222 kvmppc_booke_queue_irqprio(vcpu, prio); 223 } 224 225 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 226 { 227 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 228 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 229 } 230 231 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 232 { 233 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 234 } 235 236 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 237 { 238 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 239 } 240 241 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 242 { 243 #ifdef CONFIG_KVM_BOOKE_HV 244 mtspr(SPRN_GSRR0, srr0); 245 mtspr(SPRN_GSRR1, srr1); 246 #else 247 vcpu->arch.shared->srr0 = srr0; 248 vcpu->arch.shared->srr1 = srr1; 249 #endif 250 } 251 252 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 253 { 254 vcpu->arch.csrr0 = srr0; 255 vcpu->arch.csrr1 = srr1; 256 } 257 258 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 259 { 260 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 261 vcpu->arch.dsrr0 = srr0; 262 vcpu->arch.dsrr1 = srr1; 263 } else { 264 set_guest_csrr(vcpu, srr0, srr1); 265 } 266 } 267 268 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 269 { 270 vcpu->arch.mcsrr0 = srr0; 271 vcpu->arch.mcsrr1 = srr1; 272 } 273 274 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu) 275 { 276 #ifdef CONFIG_KVM_BOOKE_HV 277 return mfspr(SPRN_GDEAR); 278 #else 279 return vcpu->arch.shared->dar; 280 #endif 281 } 282 283 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear) 284 { 285 #ifdef CONFIG_KVM_BOOKE_HV 286 mtspr(SPRN_GDEAR, dear); 287 #else 288 vcpu->arch.shared->dar = dear; 289 #endif 290 } 291 292 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu) 293 { 294 #ifdef CONFIG_KVM_BOOKE_HV 295 return mfspr(SPRN_GESR); 296 #else 297 return vcpu->arch.shared->esr; 298 #endif 299 } 300 301 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr) 302 { 303 #ifdef CONFIG_KVM_BOOKE_HV 304 mtspr(SPRN_GESR, esr); 305 #else 306 vcpu->arch.shared->esr = esr; 307 #endif 308 } 309 310 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu) 311 { 312 #ifdef CONFIG_KVM_BOOKE_HV 313 return mfspr(SPRN_GEPR); 314 #else 315 return vcpu->arch.epr; 316 #endif 317 } 318 319 /* Deliver the interrupt of the corresponding priority, if possible. */ 320 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 321 unsigned int priority) 322 { 323 int allowed = 0; 324 ulong msr_mask = 0; 325 bool update_esr = false, update_dear = false, update_epr = false; 326 ulong crit_raw = vcpu->arch.shared->critical; 327 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 328 bool crit; 329 bool keep_irq = false; 330 enum int_class int_class; 331 ulong new_msr = vcpu->arch.shared->msr; 332 333 /* Truncate crit indicators in 32 bit mode */ 334 if (!(vcpu->arch.shared->msr & MSR_SF)) { 335 crit_raw &= 0xffffffff; 336 crit_r1 &= 0xffffffff; 337 } 338 339 /* Critical section when crit == r1 */ 340 crit = (crit_raw == crit_r1); 341 /* ... and we're in supervisor mode */ 342 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 343 344 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 345 priority = BOOKE_IRQPRIO_EXTERNAL; 346 keep_irq = true; 347 } 348 349 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 350 update_epr = true; 351 352 switch (priority) { 353 case BOOKE_IRQPRIO_DTLB_MISS: 354 case BOOKE_IRQPRIO_DATA_STORAGE: 355 case BOOKE_IRQPRIO_ALIGNMENT: 356 update_dear = true; 357 /* fall through */ 358 case BOOKE_IRQPRIO_INST_STORAGE: 359 case BOOKE_IRQPRIO_PROGRAM: 360 update_esr = true; 361 /* fall through */ 362 case BOOKE_IRQPRIO_ITLB_MISS: 363 case BOOKE_IRQPRIO_SYSCALL: 364 case BOOKE_IRQPRIO_FP_UNAVAIL: 365 case BOOKE_IRQPRIO_SPE_UNAVAIL: 366 case BOOKE_IRQPRIO_SPE_FP_DATA: 367 case BOOKE_IRQPRIO_SPE_FP_ROUND: 368 case BOOKE_IRQPRIO_AP_UNAVAIL: 369 allowed = 1; 370 msr_mask = MSR_CE | MSR_ME | MSR_DE; 371 int_class = INT_CLASS_NONCRIT; 372 break; 373 case BOOKE_IRQPRIO_WATCHDOG: 374 case BOOKE_IRQPRIO_CRITICAL: 375 case BOOKE_IRQPRIO_DBELL_CRIT: 376 allowed = vcpu->arch.shared->msr & MSR_CE; 377 allowed = allowed && !crit; 378 msr_mask = MSR_ME; 379 int_class = INT_CLASS_CRIT; 380 break; 381 case BOOKE_IRQPRIO_MACHINE_CHECK: 382 allowed = vcpu->arch.shared->msr & MSR_ME; 383 allowed = allowed && !crit; 384 int_class = INT_CLASS_MC; 385 break; 386 case BOOKE_IRQPRIO_DECREMENTER: 387 case BOOKE_IRQPRIO_FIT: 388 keep_irq = true; 389 /* fall through */ 390 case BOOKE_IRQPRIO_EXTERNAL: 391 case BOOKE_IRQPRIO_DBELL: 392 allowed = vcpu->arch.shared->msr & MSR_EE; 393 allowed = allowed && !crit; 394 msr_mask = MSR_CE | MSR_ME | MSR_DE; 395 int_class = INT_CLASS_NONCRIT; 396 break; 397 case BOOKE_IRQPRIO_DEBUG: 398 allowed = vcpu->arch.shared->msr & MSR_DE; 399 allowed = allowed && !crit; 400 msr_mask = MSR_ME; 401 int_class = INT_CLASS_CRIT; 402 break; 403 } 404 405 if (allowed) { 406 switch (int_class) { 407 case INT_CLASS_NONCRIT: 408 set_guest_srr(vcpu, vcpu->arch.pc, 409 vcpu->arch.shared->msr); 410 break; 411 case INT_CLASS_CRIT: 412 set_guest_csrr(vcpu, vcpu->arch.pc, 413 vcpu->arch.shared->msr); 414 break; 415 case INT_CLASS_DBG: 416 set_guest_dsrr(vcpu, vcpu->arch.pc, 417 vcpu->arch.shared->msr); 418 break; 419 case INT_CLASS_MC: 420 set_guest_mcsrr(vcpu, vcpu->arch.pc, 421 vcpu->arch.shared->msr); 422 break; 423 } 424 425 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 426 if (update_esr == true) 427 set_guest_esr(vcpu, vcpu->arch.queued_esr); 428 if (update_dear == true) 429 set_guest_dear(vcpu, vcpu->arch.queued_dear); 430 if (update_epr == true) { 431 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 432 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 433 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 434 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 435 kvmppc_mpic_set_epr(vcpu); 436 } 437 } 438 439 new_msr &= msr_mask; 440 #if defined(CONFIG_64BIT) 441 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 442 new_msr |= MSR_CM; 443 #endif 444 kvmppc_set_msr(vcpu, new_msr); 445 446 if (!keep_irq) 447 clear_bit(priority, &vcpu->arch.pending_exceptions); 448 } 449 450 #ifdef CONFIG_KVM_BOOKE_HV 451 /* 452 * If an interrupt is pending but masked, raise a guest doorbell 453 * so that we are notified when the guest enables the relevant 454 * MSR bit. 455 */ 456 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 457 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 458 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 459 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 460 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 461 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 462 #endif 463 464 return allowed; 465 } 466 467 /* 468 * Return the number of jiffies until the next timeout. If the timeout is 469 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 470 * because the larger value can break the timer APIs. 471 */ 472 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 473 { 474 u64 tb, wdt_tb, wdt_ticks = 0; 475 u64 nr_jiffies = 0; 476 u32 period = TCR_GET_WP(vcpu->arch.tcr); 477 478 wdt_tb = 1ULL << (63 - period); 479 tb = get_tb(); 480 /* 481 * The watchdog timeout will hapeen when TB bit corresponding 482 * to watchdog will toggle from 0 to 1. 483 */ 484 if (tb & wdt_tb) 485 wdt_ticks = wdt_tb; 486 487 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 488 489 /* Convert timebase ticks to jiffies */ 490 nr_jiffies = wdt_ticks; 491 492 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 493 nr_jiffies++; 494 495 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 496 } 497 498 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 499 { 500 unsigned long nr_jiffies; 501 unsigned long flags; 502 503 /* 504 * If TSR_ENW and TSR_WIS are not set then no need to exit to 505 * userspace, so clear the KVM_REQ_WATCHDOG request. 506 */ 507 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 508 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 509 510 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 511 nr_jiffies = watchdog_next_timeout(vcpu); 512 /* 513 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 514 * then do not run the watchdog timer as this can break timer APIs. 515 */ 516 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 517 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 518 else 519 del_timer(&vcpu->arch.wdt_timer); 520 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 521 } 522 523 void kvmppc_watchdog_func(unsigned long data) 524 { 525 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 526 u32 tsr, new_tsr; 527 int final; 528 529 do { 530 new_tsr = tsr = vcpu->arch.tsr; 531 final = 0; 532 533 /* Time out event */ 534 if (tsr & TSR_ENW) { 535 if (tsr & TSR_WIS) 536 final = 1; 537 else 538 new_tsr = tsr | TSR_WIS; 539 } else { 540 new_tsr = tsr | TSR_ENW; 541 } 542 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 543 544 if (new_tsr & TSR_WIS) { 545 smp_wmb(); 546 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 547 kvm_vcpu_kick(vcpu); 548 } 549 550 /* 551 * If this is final watchdog expiry and some action is required 552 * then exit to userspace. 553 */ 554 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 555 vcpu->arch.watchdog_enabled) { 556 smp_wmb(); 557 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 558 kvm_vcpu_kick(vcpu); 559 } 560 561 /* 562 * Stop running the watchdog timer after final expiration to 563 * prevent the host from being flooded with timers if the 564 * guest sets a short period. 565 * Timers will resume when TSR/TCR is updated next time. 566 */ 567 if (!final) 568 arm_next_watchdog(vcpu); 569 } 570 571 static void update_timer_ints(struct kvm_vcpu *vcpu) 572 { 573 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 574 kvmppc_core_queue_dec(vcpu); 575 else 576 kvmppc_core_dequeue_dec(vcpu); 577 578 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 579 kvmppc_core_queue_watchdog(vcpu); 580 else 581 kvmppc_core_dequeue_watchdog(vcpu); 582 } 583 584 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 585 { 586 unsigned long *pending = &vcpu->arch.pending_exceptions; 587 unsigned int priority; 588 589 priority = __ffs(*pending); 590 while (priority < BOOKE_IRQPRIO_MAX) { 591 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 592 break; 593 594 priority = find_next_bit(pending, 595 BITS_PER_BYTE * sizeof(*pending), 596 priority + 1); 597 } 598 599 /* Tell the guest about our interrupt status */ 600 vcpu->arch.shared->int_pending = !!*pending; 601 } 602 603 /* Check pending exceptions and deliver one, if possible. */ 604 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 605 { 606 int r = 0; 607 WARN_ON_ONCE(!irqs_disabled()); 608 609 kvmppc_core_check_exceptions(vcpu); 610 611 if (vcpu->requests) { 612 /* Exception delivery raised request; start over */ 613 return 1; 614 } 615 616 if (vcpu->arch.shared->msr & MSR_WE) { 617 local_irq_enable(); 618 kvm_vcpu_block(vcpu); 619 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 620 local_irq_disable(); 621 622 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 623 r = 1; 624 }; 625 626 return r; 627 } 628 629 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 630 { 631 int r = 1; /* Indicate we want to get back into the guest */ 632 633 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 634 update_timer_ints(vcpu); 635 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 636 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 637 kvmppc_core_flush_tlb(vcpu); 638 #endif 639 640 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 641 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 642 r = 0; 643 } 644 645 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 646 vcpu->run->epr.epr = 0; 647 vcpu->arch.epr_needed = true; 648 vcpu->run->exit_reason = KVM_EXIT_EPR; 649 r = 0; 650 } 651 652 return r; 653 } 654 655 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 656 { 657 int ret, s; 658 #ifdef CONFIG_PPC_FPU 659 unsigned int fpscr; 660 int fpexc_mode; 661 u64 fpr[32]; 662 #endif 663 664 if (!vcpu->arch.sane) { 665 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 666 return -EINVAL; 667 } 668 669 local_irq_disable(); 670 s = kvmppc_prepare_to_enter(vcpu); 671 if (s <= 0) { 672 local_irq_enable(); 673 ret = s; 674 goto out; 675 } 676 kvmppc_lazy_ee_enable(); 677 678 kvm_guest_enter(); 679 680 #ifdef CONFIG_PPC_FPU 681 /* Save userspace FPU state in stack */ 682 enable_kernel_fp(); 683 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 684 fpscr = current->thread.fpscr.val; 685 fpexc_mode = current->thread.fpexc_mode; 686 687 /* Restore guest FPU state to thread */ 688 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 689 current->thread.fpscr.val = vcpu->arch.fpscr; 690 691 /* 692 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 693 * as always using the FPU. Kernel usage of FP (via 694 * enable_kernel_fp()) in this thread must not occur while 695 * vcpu->fpu_active is set. 696 */ 697 vcpu->fpu_active = 1; 698 699 kvmppc_load_guest_fp(vcpu); 700 #endif 701 702 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 703 704 /* No need for kvm_guest_exit. It's done in handle_exit. 705 We also get here with interrupts enabled. */ 706 707 #ifdef CONFIG_PPC_FPU 708 kvmppc_save_guest_fp(vcpu); 709 710 vcpu->fpu_active = 0; 711 712 /* Save guest FPU state from thread */ 713 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 714 vcpu->arch.fpscr = current->thread.fpscr.val; 715 716 /* Restore userspace FPU state from stack */ 717 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 718 current->thread.fpscr.val = fpscr; 719 current->thread.fpexc_mode = fpexc_mode; 720 #endif 721 722 out: 723 vcpu->mode = OUTSIDE_GUEST_MODE; 724 return ret; 725 } 726 727 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 728 { 729 enum emulation_result er; 730 731 er = kvmppc_emulate_instruction(run, vcpu); 732 switch (er) { 733 case EMULATE_DONE: 734 /* don't overwrite subtypes, just account kvm_stats */ 735 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 736 /* Future optimization: only reload non-volatiles if 737 * they were actually modified by emulation. */ 738 return RESUME_GUEST_NV; 739 740 case EMULATE_DO_DCR: 741 run->exit_reason = KVM_EXIT_DCR; 742 return RESUME_HOST; 743 744 case EMULATE_FAIL: 745 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 746 __func__, vcpu->arch.pc, vcpu->arch.last_inst); 747 /* For debugging, encode the failing instruction and 748 * report it to userspace. */ 749 run->hw.hardware_exit_reason = ~0ULL << 32; 750 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 751 kvmppc_core_queue_program(vcpu, ESR_PIL); 752 return RESUME_HOST; 753 754 case EMULATE_EXIT_USER: 755 return RESUME_HOST; 756 757 default: 758 BUG(); 759 } 760 } 761 762 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 763 { 764 ulong r1, ip, msr, lr; 765 766 asm("mr %0, 1" : "=r"(r1)); 767 asm("mflr %0" : "=r"(lr)); 768 asm("mfmsr %0" : "=r"(msr)); 769 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 770 771 memset(regs, 0, sizeof(*regs)); 772 regs->gpr[1] = r1; 773 regs->nip = ip; 774 regs->msr = msr; 775 regs->link = lr; 776 } 777 778 /* 779 * For interrupts needed to be handled by host interrupt handlers, 780 * corresponding host handler are called from here in similar way 781 * (but not exact) as they are called from low level handler 782 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 783 */ 784 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 785 unsigned int exit_nr) 786 { 787 struct pt_regs regs; 788 789 switch (exit_nr) { 790 case BOOKE_INTERRUPT_EXTERNAL: 791 kvmppc_fill_pt_regs(®s); 792 do_IRQ(®s); 793 break; 794 case BOOKE_INTERRUPT_DECREMENTER: 795 kvmppc_fill_pt_regs(®s); 796 timer_interrupt(®s); 797 break; 798 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64) 799 case BOOKE_INTERRUPT_DOORBELL: 800 kvmppc_fill_pt_regs(®s); 801 doorbell_exception(®s); 802 break; 803 #endif 804 case BOOKE_INTERRUPT_MACHINE_CHECK: 805 /* FIXME */ 806 break; 807 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 808 kvmppc_fill_pt_regs(®s); 809 performance_monitor_exception(®s); 810 break; 811 case BOOKE_INTERRUPT_WATCHDOG: 812 kvmppc_fill_pt_regs(®s); 813 #ifdef CONFIG_BOOKE_WDT 814 WatchdogException(®s); 815 #else 816 unknown_exception(®s); 817 #endif 818 break; 819 case BOOKE_INTERRUPT_CRITICAL: 820 unknown_exception(®s); 821 break; 822 } 823 } 824 825 /** 826 * kvmppc_handle_exit 827 * 828 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 829 */ 830 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 831 unsigned int exit_nr) 832 { 833 int r = RESUME_HOST; 834 int s; 835 int idx; 836 837 #ifdef CONFIG_PPC64 838 WARN_ON(local_paca->irq_happened != 0); 839 #endif 840 841 /* 842 * We enter with interrupts disabled in hardware, but 843 * we need to call hard_irq_disable anyway to ensure that 844 * the software state is kept in sync. 845 */ 846 hard_irq_disable(); 847 848 /* update before a new last_exit_type is rewritten */ 849 kvmppc_update_timing_stats(vcpu); 850 851 /* restart interrupts if they were meant for the host */ 852 kvmppc_restart_interrupt(vcpu, exit_nr); 853 854 local_irq_enable(); 855 856 trace_kvm_exit(exit_nr, vcpu); 857 kvm_guest_exit(); 858 859 run->exit_reason = KVM_EXIT_UNKNOWN; 860 run->ready_for_interrupt_injection = 1; 861 862 switch (exit_nr) { 863 case BOOKE_INTERRUPT_MACHINE_CHECK: 864 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 865 kvmppc_dump_vcpu(vcpu); 866 /* For debugging, send invalid exit reason to user space */ 867 run->hw.hardware_exit_reason = ~1ULL << 32; 868 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 869 r = RESUME_HOST; 870 break; 871 872 case BOOKE_INTERRUPT_EXTERNAL: 873 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 874 r = RESUME_GUEST; 875 break; 876 877 case BOOKE_INTERRUPT_DECREMENTER: 878 kvmppc_account_exit(vcpu, DEC_EXITS); 879 r = RESUME_GUEST; 880 break; 881 882 case BOOKE_INTERRUPT_WATCHDOG: 883 r = RESUME_GUEST; 884 break; 885 886 case BOOKE_INTERRUPT_DOORBELL: 887 kvmppc_account_exit(vcpu, DBELL_EXITS); 888 r = RESUME_GUEST; 889 break; 890 891 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 892 kvmppc_account_exit(vcpu, GDBELL_EXITS); 893 894 /* 895 * We are here because there is a pending guest interrupt 896 * which could not be delivered as MSR_CE or MSR_ME was not 897 * set. Once we break from here we will retry delivery. 898 */ 899 r = RESUME_GUEST; 900 break; 901 902 case BOOKE_INTERRUPT_GUEST_DBELL: 903 kvmppc_account_exit(vcpu, GDBELL_EXITS); 904 905 /* 906 * We are here because there is a pending guest interrupt 907 * which could not be delivered as MSR_EE was not set. Once 908 * we break from here we will retry delivery. 909 */ 910 r = RESUME_GUEST; 911 break; 912 913 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 914 r = RESUME_GUEST; 915 break; 916 917 case BOOKE_INTERRUPT_HV_PRIV: 918 r = emulation_exit(run, vcpu); 919 break; 920 921 case BOOKE_INTERRUPT_PROGRAM: 922 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 923 /* 924 * Program traps generated by user-level software must 925 * be handled by the guest kernel. 926 * 927 * In GS mode, hypervisor privileged instructions trap 928 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 929 * actual program interrupts, handled by the guest. 930 */ 931 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 932 r = RESUME_GUEST; 933 kvmppc_account_exit(vcpu, USR_PR_INST); 934 break; 935 } 936 937 r = emulation_exit(run, vcpu); 938 break; 939 940 case BOOKE_INTERRUPT_FP_UNAVAIL: 941 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 942 kvmppc_account_exit(vcpu, FP_UNAVAIL); 943 r = RESUME_GUEST; 944 break; 945 946 #ifdef CONFIG_SPE 947 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 948 if (vcpu->arch.shared->msr & MSR_SPE) 949 kvmppc_vcpu_enable_spe(vcpu); 950 else 951 kvmppc_booke_queue_irqprio(vcpu, 952 BOOKE_IRQPRIO_SPE_UNAVAIL); 953 r = RESUME_GUEST; 954 break; 955 } 956 957 case BOOKE_INTERRUPT_SPE_FP_DATA: 958 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 959 r = RESUME_GUEST; 960 break; 961 962 case BOOKE_INTERRUPT_SPE_FP_ROUND: 963 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 964 r = RESUME_GUEST; 965 break; 966 #else 967 case BOOKE_INTERRUPT_SPE_UNAVAIL: 968 /* 969 * Guest wants SPE, but host kernel doesn't support it. Send 970 * an "unimplemented operation" program check to the guest. 971 */ 972 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 973 r = RESUME_GUEST; 974 break; 975 976 /* 977 * These really should never happen without CONFIG_SPE, 978 * as we should never enable the real MSR[SPE] in the guest. 979 */ 980 case BOOKE_INTERRUPT_SPE_FP_DATA: 981 case BOOKE_INTERRUPT_SPE_FP_ROUND: 982 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 983 __func__, exit_nr, vcpu->arch.pc); 984 run->hw.hardware_exit_reason = exit_nr; 985 r = RESUME_HOST; 986 break; 987 #endif 988 989 case BOOKE_INTERRUPT_DATA_STORAGE: 990 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 991 vcpu->arch.fault_esr); 992 kvmppc_account_exit(vcpu, DSI_EXITS); 993 r = RESUME_GUEST; 994 break; 995 996 case BOOKE_INTERRUPT_INST_STORAGE: 997 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 998 kvmppc_account_exit(vcpu, ISI_EXITS); 999 r = RESUME_GUEST; 1000 break; 1001 1002 case BOOKE_INTERRUPT_ALIGNMENT: 1003 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1004 vcpu->arch.fault_esr); 1005 r = RESUME_GUEST; 1006 break; 1007 1008 #ifdef CONFIG_KVM_BOOKE_HV 1009 case BOOKE_INTERRUPT_HV_SYSCALL: 1010 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1011 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1012 } else { 1013 /* 1014 * hcall from guest userspace -- send privileged 1015 * instruction program check. 1016 */ 1017 kvmppc_core_queue_program(vcpu, ESR_PPR); 1018 } 1019 1020 r = RESUME_GUEST; 1021 break; 1022 #else 1023 case BOOKE_INTERRUPT_SYSCALL: 1024 if (!(vcpu->arch.shared->msr & MSR_PR) && 1025 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1026 /* KVM PV hypercalls */ 1027 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1028 r = RESUME_GUEST; 1029 } else { 1030 /* Guest syscalls */ 1031 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1032 } 1033 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1034 r = RESUME_GUEST; 1035 break; 1036 #endif 1037 1038 case BOOKE_INTERRUPT_DTLB_MISS: { 1039 unsigned long eaddr = vcpu->arch.fault_dear; 1040 int gtlb_index; 1041 gpa_t gpaddr; 1042 gfn_t gfn; 1043 1044 #ifdef CONFIG_KVM_E500V2 1045 if (!(vcpu->arch.shared->msr & MSR_PR) && 1046 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1047 kvmppc_map_magic(vcpu); 1048 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1049 r = RESUME_GUEST; 1050 1051 break; 1052 } 1053 #endif 1054 1055 /* Check the guest TLB. */ 1056 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1057 if (gtlb_index < 0) { 1058 /* The guest didn't have a mapping for it. */ 1059 kvmppc_core_queue_dtlb_miss(vcpu, 1060 vcpu->arch.fault_dear, 1061 vcpu->arch.fault_esr); 1062 kvmppc_mmu_dtlb_miss(vcpu); 1063 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1064 r = RESUME_GUEST; 1065 break; 1066 } 1067 1068 idx = srcu_read_lock(&vcpu->kvm->srcu); 1069 1070 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1071 gfn = gpaddr >> PAGE_SHIFT; 1072 1073 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1074 /* The guest TLB had a mapping, but the shadow TLB 1075 * didn't, and it is RAM. This could be because: 1076 * a) the entry is mapping the host kernel, or 1077 * b) the guest used a large mapping which we're faking 1078 * Either way, we need to satisfy the fault without 1079 * invoking the guest. */ 1080 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1081 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1082 r = RESUME_GUEST; 1083 } else { 1084 /* Guest has mapped and accessed a page which is not 1085 * actually RAM. */ 1086 vcpu->arch.paddr_accessed = gpaddr; 1087 vcpu->arch.vaddr_accessed = eaddr; 1088 r = kvmppc_emulate_mmio(run, vcpu); 1089 kvmppc_account_exit(vcpu, MMIO_EXITS); 1090 } 1091 1092 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1093 break; 1094 } 1095 1096 case BOOKE_INTERRUPT_ITLB_MISS: { 1097 unsigned long eaddr = vcpu->arch.pc; 1098 gpa_t gpaddr; 1099 gfn_t gfn; 1100 int gtlb_index; 1101 1102 r = RESUME_GUEST; 1103 1104 /* Check the guest TLB. */ 1105 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1106 if (gtlb_index < 0) { 1107 /* The guest didn't have a mapping for it. */ 1108 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1109 kvmppc_mmu_itlb_miss(vcpu); 1110 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1111 break; 1112 } 1113 1114 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1115 1116 idx = srcu_read_lock(&vcpu->kvm->srcu); 1117 1118 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1119 gfn = gpaddr >> PAGE_SHIFT; 1120 1121 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1122 /* The guest TLB had a mapping, but the shadow TLB 1123 * didn't. This could be because: 1124 * a) the entry is mapping the host kernel, or 1125 * b) the guest used a large mapping which we're faking 1126 * Either way, we need to satisfy the fault without 1127 * invoking the guest. */ 1128 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1129 } else { 1130 /* Guest mapped and leaped at non-RAM! */ 1131 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1132 } 1133 1134 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1135 break; 1136 } 1137 1138 case BOOKE_INTERRUPT_DEBUG: { 1139 u32 dbsr; 1140 1141 vcpu->arch.pc = mfspr(SPRN_CSRR0); 1142 1143 /* clear IAC events in DBSR register */ 1144 dbsr = mfspr(SPRN_DBSR); 1145 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 1146 mtspr(SPRN_DBSR, dbsr); 1147 1148 run->exit_reason = KVM_EXIT_DEBUG; 1149 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1150 r = RESUME_HOST; 1151 break; 1152 } 1153 1154 default: 1155 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1156 BUG(); 1157 } 1158 1159 /* 1160 * To avoid clobbering exit_reason, only check for signals if we 1161 * aren't already exiting to userspace for some other reason. 1162 */ 1163 if (!(r & RESUME_HOST)) { 1164 local_irq_disable(); 1165 s = kvmppc_prepare_to_enter(vcpu); 1166 if (s <= 0) { 1167 local_irq_enable(); 1168 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1169 } else { 1170 kvmppc_lazy_ee_enable(); 1171 } 1172 } 1173 1174 return r; 1175 } 1176 1177 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1178 { 1179 u32 old_tsr = vcpu->arch.tsr; 1180 1181 vcpu->arch.tsr = new_tsr; 1182 1183 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1184 arm_next_watchdog(vcpu); 1185 1186 update_timer_ints(vcpu); 1187 } 1188 1189 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1190 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1191 { 1192 int i; 1193 int r; 1194 1195 vcpu->arch.pc = 0; 1196 vcpu->arch.shared->pir = vcpu->vcpu_id; 1197 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1198 kvmppc_set_msr(vcpu, 0); 1199 1200 #ifndef CONFIG_KVM_BOOKE_HV 1201 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 1202 vcpu->arch.shadow_pid = 1; 1203 vcpu->arch.shared->msr = 0; 1204 #endif 1205 1206 /* Eye-catching numbers so we know if the guest takes an interrupt 1207 * before it's programmed its own IVPR/IVORs. */ 1208 vcpu->arch.ivpr = 0x55550000; 1209 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1210 vcpu->arch.ivor[i] = 0x7700 | i * 4; 1211 1212 kvmppc_init_timing_stats(vcpu); 1213 1214 r = kvmppc_core_vcpu_setup(vcpu); 1215 kvmppc_sanity_check(vcpu); 1216 return r; 1217 } 1218 1219 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1220 { 1221 /* setup watchdog timer once */ 1222 spin_lock_init(&vcpu->arch.wdt_lock); 1223 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1224 (unsigned long)vcpu); 1225 1226 return 0; 1227 } 1228 1229 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1230 { 1231 del_timer_sync(&vcpu->arch.wdt_timer); 1232 } 1233 1234 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1235 { 1236 int i; 1237 1238 regs->pc = vcpu->arch.pc; 1239 regs->cr = kvmppc_get_cr(vcpu); 1240 regs->ctr = vcpu->arch.ctr; 1241 regs->lr = vcpu->arch.lr; 1242 regs->xer = kvmppc_get_xer(vcpu); 1243 regs->msr = vcpu->arch.shared->msr; 1244 regs->srr0 = vcpu->arch.shared->srr0; 1245 regs->srr1 = vcpu->arch.shared->srr1; 1246 regs->pid = vcpu->arch.pid; 1247 regs->sprg0 = vcpu->arch.shared->sprg0; 1248 regs->sprg1 = vcpu->arch.shared->sprg1; 1249 regs->sprg2 = vcpu->arch.shared->sprg2; 1250 regs->sprg3 = vcpu->arch.shared->sprg3; 1251 regs->sprg4 = vcpu->arch.shared->sprg4; 1252 regs->sprg5 = vcpu->arch.shared->sprg5; 1253 regs->sprg6 = vcpu->arch.shared->sprg6; 1254 regs->sprg7 = vcpu->arch.shared->sprg7; 1255 1256 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1257 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1258 1259 return 0; 1260 } 1261 1262 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1263 { 1264 int i; 1265 1266 vcpu->arch.pc = regs->pc; 1267 kvmppc_set_cr(vcpu, regs->cr); 1268 vcpu->arch.ctr = regs->ctr; 1269 vcpu->arch.lr = regs->lr; 1270 kvmppc_set_xer(vcpu, regs->xer); 1271 kvmppc_set_msr(vcpu, regs->msr); 1272 vcpu->arch.shared->srr0 = regs->srr0; 1273 vcpu->arch.shared->srr1 = regs->srr1; 1274 kvmppc_set_pid(vcpu, regs->pid); 1275 vcpu->arch.shared->sprg0 = regs->sprg0; 1276 vcpu->arch.shared->sprg1 = regs->sprg1; 1277 vcpu->arch.shared->sprg2 = regs->sprg2; 1278 vcpu->arch.shared->sprg3 = regs->sprg3; 1279 vcpu->arch.shared->sprg4 = regs->sprg4; 1280 vcpu->arch.shared->sprg5 = regs->sprg5; 1281 vcpu->arch.shared->sprg6 = regs->sprg6; 1282 vcpu->arch.shared->sprg7 = regs->sprg7; 1283 1284 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1285 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1286 1287 return 0; 1288 } 1289 1290 static void get_sregs_base(struct kvm_vcpu *vcpu, 1291 struct kvm_sregs *sregs) 1292 { 1293 u64 tb = get_tb(); 1294 1295 sregs->u.e.features |= KVM_SREGS_E_BASE; 1296 1297 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1298 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1299 sregs->u.e.mcsr = vcpu->arch.mcsr; 1300 sregs->u.e.esr = get_guest_esr(vcpu); 1301 sregs->u.e.dear = get_guest_dear(vcpu); 1302 sregs->u.e.tsr = vcpu->arch.tsr; 1303 sregs->u.e.tcr = vcpu->arch.tcr; 1304 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1305 sregs->u.e.tb = tb; 1306 sregs->u.e.vrsave = vcpu->arch.vrsave; 1307 } 1308 1309 static int set_sregs_base(struct kvm_vcpu *vcpu, 1310 struct kvm_sregs *sregs) 1311 { 1312 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1313 return 0; 1314 1315 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1316 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1317 vcpu->arch.mcsr = sregs->u.e.mcsr; 1318 set_guest_esr(vcpu, sregs->u.e.esr); 1319 set_guest_dear(vcpu, sregs->u.e.dear); 1320 vcpu->arch.vrsave = sregs->u.e.vrsave; 1321 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1322 1323 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1324 vcpu->arch.dec = sregs->u.e.dec; 1325 kvmppc_emulate_dec(vcpu); 1326 } 1327 1328 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1329 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1330 1331 return 0; 1332 } 1333 1334 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1335 struct kvm_sregs *sregs) 1336 { 1337 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1338 1339 sregs->u.e.pir = vcpu->vcpu_id; 1340 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1341 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1342 sregs->u.e.decar = vcpu->arch.decar; 1343 sregs->u.e.ivpr = vcpu->arch.ivpr; 1344 } 1345 1346 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1347 struct kvm_sregs *sregs) 1348 { 1349 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1350 return 0; 1351 1352 if (sregs->u.e.pir != vcpu->vcpu_id) 1353 return -EINVAL; 1354 1355 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1356 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1357 vcpu->arch.decar = sregs->u.e.decar; 1358 vcpu->arch.ivpr = sregs->u.e.ivpr; 1359 1360 return 0; 1361 } 1362 1363 void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1364 { 1365 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1366 1367 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1368 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1369 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1370 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1371 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1372 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1373 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1374 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1375 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1376 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1377 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1378 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1379 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1380 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1381 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1382 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1383 } 1384 1385 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1386 { 1387 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1388 return 0; 1389 1390 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1391 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1392 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1393 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1394 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1395 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1396 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1397 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1398 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1399 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1400 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1401 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1402 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1403 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1404 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1405 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1406 1407 return 0; 1408 } 1409 1410 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1411 struct kvm_sregs *sregs) 1412 { 1413 sregs->pvr = vcpu->arch.pvr; 1414 1415 get_sregs_base(vcpu, sregs); 1416 get_sregs_arch206(vcpu, sregs); 1417 kvmppc_core_get_sregs(vcpu, sregs); 1418 return 0; 1419 } 1420 1421 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1422 struct kvm_sregs *sregs) 1423 { 1424 int ret; 1425 1426 if (vcpu->arch.pvr != sregs->pvr) 1427 return -EINVAL; 1428 1429 ret = set_sregs_base(vcpu, sregs); 1430 if (ret < 0) 1431 return ret; 1432 1433 ret = set_sregs_arch206(vcpu, sregs); 1434 if (ret < 0) 1435 return ret; 1436 1437 return kvmppc_core_set_sregs(vcpu, sregs); 1438 } 1439 1440 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1441 { 1442 int r = 0; 1443 union kvmppc_one_reg val; 1444 int size; 1445 long int i; 1446 1447 size = one_reg_size(reg->id); 1448 if (size > sizeof(val)) 1449 return -EINVAL; 1450 1451 switch (reg->id) { 1452 case KVM_REG_PPC_IAC1: 1453 case KVM_REG_PPC_IAC2: 1454 case KVM_REG_PPC_IAC3: 1455 case KVM_REG_PPC_IAC4: 1456 i = reg->id - KVM_REG_PPC_IAC1; 1457 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]); 1458 break; 1459 case KVM_REG_PPC_DAC1: 1460 case KVM_REG_PPC_DAC2: 1461 i = reg->id - KVM_REG_PPC_DAC1; 1462 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]); 1463 break; 1464 case KVM_REG_PPC_EPR: { 1465 u32 epr = get_guest_epr(vcpu); 1466 val = get_reg_val(reg->id, epr); 1467 break; 1468 } 1469 #if defined(CONFIG_64BIT) 1470 case KVM_REG_PPC_EPCR: 1471 val = get_reg_val(reg->id, vcpu->arch.epcr); 1472 break; 1473 #endif 1474 case KVM_REG_PPC_TCR: 1475 val = get_reg_val(reg->id, vcpu->arch.tcr); 1476 break; 1477 case KVM_REG_PPC_TSR: 1478 val = get_reg_val(reg->id, vcpu->arch.tsr); 1479 break; 1480 case KVM_REG_PPC_DEBUG_INST: 1481 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV); 1482 break; 1483 default: 1484 r = kvmppc_get_one_reg(vcpu, reg->id, &val); 1485 break; 1486 } 1487 1488 if (r) 1489 return r; 1490 1491 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 1492 r = -EFAULT; 1493 1494 return r; 1495 } 1496 1497 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1498 { 1499 int r = 0; 1500 union kvmppc_one_reg val; 1501 int size; 1502 long int i; 1503 1504 size = one_reg_size(reg->id); 1505 if (size > sizeof(val)) 1506 return -EINVAL; 1507 1508 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 1509 return -EFAULT; 1510 1511 switch (reg->id) { 1512 case KVM_REG_PPC_IAC1: 1513 case KVM_REG_PPC_IAC2: 1514 case KVM_REG_PPC_IAC3: 1515 case KVM_REG_PPC_IAC4: 1516 i = reg->id - KVM_REG_PPC_IAC1; 1517 vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val); 1518 break; 1519 case KVM_REG_PPC_DAC1: 1520 case KVM_REG_PPC_DAC2: 1521 i = reg->id - KVM_REG_PPC_DAC1; 1522 vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val); 1523 break; 1524 case KVM_REG_PPC_EPR: { 1525 u32 new_epr = set_reg_val(reg->id, val); 1526 kvmppc_set_epr(vcpu, new_epr); 1527 break; 1528 } 1529 #if defined(CONFIG_64BIT) 1530 case KVM_REG_PPC_EPCR: { 1531 u32 new_epcr = set_reg_val(reg->id, val); 1532 kvmppc_set_epcr(vcpu, new_epcr); 1533 break; 1534 } 1535 #endif 1536 case KVM_REG_PPC_OR_TSR: { 1537 u32 tsr_bits = set_reg_val(reg->id, val); 1538 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1539 break; 1540 } 1541 case KVM_REG_PPC_CLEAR_TSR: { 1542 u32 tsr_bits = set_reg_val(reg->id, val); 1543 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1544 break; 1545 } 1546 case KVM_REG_PPC_TSR: { 1547 u32 tsr = set_reg_val(reg->id, val); 1548 kvmppc_set_tsr(vcpu, tsr); 1549 break; 1550 } 1551 case KVM_REG_PPC_TCR: { 1552 u32 tcr = set_reg_val(reg->id, val); 1553 kvmppc_set_tcr(vcpu, tcr); 1554 break; 1555 } 1556 default: 1557 r = kvmppc_set_one_reg(vcpu, reg->id, &val); 1558 break; 1559 } 1560 1561 return r; 1562 } 1563 1564 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1565 struct kvm_guest_debug *dbg) 1566 { 1567 return -EINVAL; 1568 } 1569 1570 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1571 { 1572 return -ENOTSUPP; 1573 } 1574 1575 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1576 { 1577 return -ENOTSUPP; 1578 } 1579 1580 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1581 struct kvm_translation *tr) 1582 { 1583 int r; 1584 1585 r = kvmppc_core_vcpu_translate(vcpu, tr); 1586 return r; 1587 } 1588 1589 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1590 { 1591 return -ENOTSUPP; 1592 } 1593 1594 void kvmppc_core_free_memslot(struct kvm_memory_slot *free, 1595 struct kvm_memory_slot *dont) 1596 { 1597 } 1598 1599 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, 1600 unsigned long npages) 1601 { 1602 return 0; 1603 } 1604 1605 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1606 struct kvm_memory_slot *memslot, 1607 struct kvm_userspace_memory_region *mem) 1608 { 1609 return 0; 1610 } 1611 1612 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1613 struct kvm_userspace_memory_region *mem, 1614 const struct kvm_memory_slot *old) 1615 { 1616 } 1617 1618 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1619 { 1620 } 1621 1622 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1623 { 1624 #if defined(CONFIG_64BIT) 1625 vcpu->arch.epcr = new_epcr; 1626 #ifdef CONFIG_KVM_BOOKE_HV 1627 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1628 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1629 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1630 #endif 1631 #endif 1632 } 1633 1634 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1635 { 1636 vcpu->arch.tcr = new_tcr; 1637 arm_next_watchdog(vcpu); 1638 update_timer_ints(vcpu); 1639 } 1640 1641 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1642 { 1643 set_bits(tsr_bits, &vcpu->arch.tsr); 1644 smp_wmb(); 1645 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1646 kvm_vcpu_kick(vcpu); 1647 } 1648 1649 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1650 { 1651 clear_bits(tsr_bits, &vcpu->arch.tsr); 1652 1653 /* 1654 * We may have stopped the watchdog due to 1655 * being stuck on final expiration. 1656 */ 1657 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1658 arm_next_watchdog(vcpu); 1659 1660 update_timer_ints(vcpu); 1661 } 1662 1663 void kvmppc_decrementer_func(unsigned long data) 1664 { 1665 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1666 1667 if (vcpu->arch.tcr & TCR_ARE) { 1668 vcpu->arch.dec = vcpu->arch.decar; 1669 kvmppc_emulate_dec(vcpu); 1670 } 1671 1672 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1673 } 1674 1675 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 1676 { 1677 vcpu->cpu = smp_processor_id(); 1678 current->thread.kvm_vcpu = vcpu; 1679 } 1680 1681 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 1682 { 1683 current->thread.kvm_vcpu = NULL; 1684 vcpu->cpu = -1; 1685 } 1686 1687 int __init kvmppc_booke_init(void) 1688 { 1689 #ifndef CONFIG_KVM_BOOKE_HV 1690 unsigned long ivor[16]; 1691 unsigned long *handler = kvmppc_booke_handler_addr; 1692 unsigned long max_ivor = 0; 1693 unsigned long handler_len; 1694 int i; 1695 1696 /* We install our own exception handlers by hijacking IVPR. IVPR must 1697 * be 16-bit aligned, so we need a 64KB allocation. */ 1698 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1699 VCPU_SIZE_ORDER); 1700 if (!kvmppc_booke_handlers) 1701 return -ENOMEM; 1702 1703 /* XXX make sure our handlers are smaller than Linux's */ 1704 1705 /* Copy our interrupt handlers to match host IVORs. That way we don't 1706 * have to swap the IVORs on every guest/host transition. */ 1707 ivor[0] = mfspr(SPRN_IVOR0); 1708 ivor[1] = mfspr(SPRN_IVOR1); 1709 ivor[2] = mfspr(SPRN_IVOR2); 1710 ivor[3] = mfspr(SPRN_IVOR3); 1711 ivor[4] = mfspr(SPRN_IVOR4); 1712 ivor[5] = mfspr(SPRN_IVOR5); 1713 ivor[6] = mfspr(SPRN_IVOR6); 1714 ivor[7] = mfspr(SPRN_IVOR7); 1715 ivor[8] = mfspr(SPRN_IVOR8); 1716 ivor[9] = mfspr(SPRN_IVOR9); 1717 ivor[10] = mfspr(SPRN_IVOR10); 1718 ivor[11] = mfspr(SPRN_IVOR11); 1719 ivor[12] = mfspr(SPRN_IVOR12); 1720 ivor[13] = mfspr(SPRN_IVOR13); 1721 ivor[14] = mfspr(SPRN_IVOR14); 1722 ivor[15] = mfspr(SPRN_IVOR15); 1723 1724 for (i = 0; i < 16; i++) { 1725 if (ivor[i] > max_ivor) 1726 max_ivor = i; 1727 1728 handler_len = handler[i + 1] - handler[i]; 1729 memcpy((void *)kvmppc_booke_handlers + ivor[i], 1730 (void *)handler[i], handler_len); 1731 } 1732 1733 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 1734 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 1735 ivor[max_ivor] + handler_len); 1736 #endif /* !BOOKE_HV */ 1737 return 0; 1738 } 1739 1740 void __exit kvmppc_booke_exit(void) 1741 { 1742 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1743 kvm_exit(); 1744 } 1745