1d9fbd03dSHollis Blanchard /* 2d9fbd03dSHollis Blanchard * This program is free software; you can redistribute it and/or modify 3d9fbd03dSHollis Blanchard * it under the terms of the GNU General Public License, version 2, as 4d9fbd03dSHollis Blanchard * published by the Free Software Foundation. 5d9fbd03dSHollis Blanchard * 6d9fbd03dSHollis Blanchard * This program is distributed in the hope that it will be useful, 7d9fbd03dSHollis Blanchard * but WITHOUT ANY WARRANTY; without even the implied warranty of 8d9fbd03dSHollis Blanchard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9d9fbd03dSHollis Blanchard * GNU General Public License for more details. 10d9fbd03dSHollis Blanchard * 11d9fbd03dSHollis Blanchard * You should have received a copy of the GNU General Public License 12d9fbd03dSHollis Blanchard * along with this program; if not, write to the Free Software 13d9fbd03dSHollis Blanchard * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14d9fbd03dSHollis Blanchard * 15d9fbd03dSHollis Blanchard * Copyright IBM Corp. 2007 164cd35f67SScott Wood * Copyright 2010-2011 Freescale Semiconductor, Inc. 17d9fbd03dSHollis Blanchard * 18d9fbd03dSHollis Blanchard * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19d9fbd03dSHollis Blanchard * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20d30f6e48SScott Wood * Scott Wood <scottwood@freescale.com> 21d30f6e48SScott Wood * Varun Sethi <varun.sethi@freescale.com> 22d9fbd03dSHollis Blanchard */ 23d9fbd03dSHollis Blanchard 24d9fbd03dSHollis Blanchard #include <linux/errno.h> 25d9fbd03dSHollis Blanchard #include <linux/err.h> 26d9fbd03dSHollis Blanchard #include <linux/kvm_host.h> 275a0e3ad6STejun Heo #include <linux/gfp.h> 28d9fbd03dSHollis Blanchard #include <linux/module.h> 29d9fbd03dSHollis Blanchard #include <linux/vmalloc.h> 30d9fbd03dSHollis Blanchard #include <linux/fs.h> 317924bd41SHollis Blanchard 32d9fbd03dSHollis Blanchard #include <asm/cputable.h> 33d9fbd03dSHollis Blanchard #include <asm/uaccess.h> 34d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h> 35d9fbd03dSHollis Blanchard #include <asm/cacheflush.h> 36d30f6e48SScott Wood #include <asm/dbell.h> 37d30f6e48SScott Wood #include <asm/hw_irq.h> 38d30f6e48SScott Wood #include <asm/irq.h> 39d9fbd03dSHollis Blanchard 40d30f6e48SScott Wood #include "timing.h" 4175f74f0dSHollis Blanchard #include "booke.h" 4297c95059SAlexander Graf #include "trace.h" 43d9fbd03dSHollis Blanchard 44d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers; 45d9fbd03dSHollis Blanchard 46d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 47d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 48d9fbd03dSHollis Blanchard 49d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = { 50d9fbd03dSHollis Blanchard { "mmio", VCPU_STAT(mmio_exits) }, 51d9fbd03dSHollis Blanchard { "dcr", VCPU_STAT(dcr_exits) }, 52d9fbd03dSHollis Blanchard { "sig", VCPU_STAT(signal_exits) }, 53d9fbd03dSHollis Blanchard { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 54d9fbd03dSHollis Blanchard { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 55d9fbd03dSHollis Blanchard { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 56d9fbd03dSHollis Blanchard { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 57d9fbd03dSHollis Blanchard { "sysc", VCPU_STAT(syscall_exits) }, 58d9fbd03dSHollis Blanchard { "isi", VCPU_STAT(isi_exits) }, 59d9fbd03dSHollis Blanchard { "dsi", VCPU_STAT(dsi_exits) }, 60d9fbd03dSHollis Blanchard { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 61d9fbd03dSHollis Blanchard { "dec", VCPU_STAT(dec_exits) }, 62d9fbd03dSHollis Blanchard { "ext_intr", VCPU_STAT(ext_intr_exits) }, 63d9fbd03dSHollis Blanchard { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 64d30f6e48SScott Wood { "doorbell", VCPU_STAT(dbell_exits) }, 65d30f6e48SScott Wood { "guest doorbell", VCPU_STAT(gdbell_exits) }, 66cf1c5ca4SAlexander Graf { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 67d9fbd03dSHollis Blanchard { NULL } 68d9fbd03dSHollis Blanchard }; 69d9fbd03dSHollis Blanchard 70d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */ 71d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 72d9fbd03dSHollis Blanchard { 73d9fbd03dSHollis Blanchard int i; 74d9fbd03dSHollis Blanchard 75666e7252SAlexander Graf printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 765cf8ca22SHollis Blanchard printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 77de7906c3SAlexander Graf printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 78de7906c3SAlexander Graf vcpu->arch.shared->srr1); 79d9fbd03dSHollis Blanchard 80d9fbd03dSHollis Blanchard printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 81d9fbd03dSHollis Blanchard 82d9fbd03dSHollis Blanchard for (i = 0; i < 32; i += 4) { 835cf8ca22SHollis Blanchard printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 848e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i), 858e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+1), 868e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+2), 878e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+3)); 88d9fbd03dSHollis Blanchard } 89d9fbd03dSHollis Blanchard } 90d9fbd03dSHollis Blanchard 914cd35f67SScott Wood #ifdef CONFIG_SPE 924cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 934cd35f67SScott Wood { 944cd35f67SScott Wood preempt_disable(); 954cd35f67SScott Wood enable_kernel_spe(); 964cd35f67SScott Wood kvmppc_save_guest_spe(vcpu); 974cd35f67SScott Wood vcpu->arch.shadow_msr &= ~MSR_SPE; 984cd35f67SScott Wood preempt_enable(); 994cd35f67SScott Wood } 1004cd35f67SScott Wood 1014cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 1024cd35f67SScott Wood { 1034cd35f67SScott Wood preempt_disable(); 1044cd35f67SScott Wood enable_kernel_spe(); 1054cd35f67SScott Wood kvmppc_load_guest_spe(vcpu); 1064cd35f67SScott Wood vcpu->arch.shadow_msr |= MSR_SPE; 1074cd35f67SScott Wood preempt_enable(); 1084cd35f67SScott Wood } 1094cd35f67SScott Wood 1104cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1114cd35f67SScott Wood { 1124cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) { 1134cd35f67SScott Wood if (!(vcpu->arch.shadow_msr & MSR_SPE)) 1144cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 1154cd35f67SScott Wood } else if (vcpu->arch.shadow_msr & MSR_SPE) { 1164cd35f67SScott Wood kvmppc_vcpu_disable_spe(vcpu); 1174cd35f67SScott Wood } 1184cd35f67SScott Wood } 1194cd35f67SScott Wood #else 1204cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1214cd35f67SScott Wood { 1224cd35f67SScott Wood } 1234cd35f67SScott Wood #endif 1244cd35f67SScott Wood 125dd9ebf1fSLiu Yu /* 126dd9ebf1fSLiu Yu * Helper function for "full" MSR writes. No need to call this if only 127dd9ebf1fSLiu Yu * EE/CE/ME/DE/RI are changing. 128dd9ebf1fSLiu Yu */ 1294cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 1304cd35f67SScott Wood { 131dd9ebf1fSLiu Yu u32 old_msr = vcpu->arch.shared->msr; 1324cd35f67SScott Wood 133d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 134d30f6e48SScott Wood new_msr |= MSR_GS; 135d30f6e48SScott Wood #endif 136d30f6e48SScott Wood 1374cd35f67SScott Wood vcpu->arch.shared->msr = new_msr; 1384cd35f67SScott Wood 139dd9ebf1fSLiu Yu kvmppc_mmu_msr_notify(vcpu, old_msr); 1404cd35f67SScott Wood kvmppc_vcpu_sync_spe(vcpu); 1414cd35f67SScott Wood } 1424cd35f67SScott Wood 143d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 144d4cf3892SHollis Blanchard unsigned int priority) 1459dd921cfSHollis Blanchard { 1466346046cSAlexander Graf trace_kvm_booke_queue_irqprio(vcpu, priority); 1479dd921cfSHollis Blanchard set_bit(priority, &vcpu->arch.pending_exceptions); 1489dd921cfSHollis Blanchard } 1499dd921cfSHollis Blanchard 150daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 151daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 1529dd921cfSHollis Blanchard { 153daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 154daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 155daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 156daf5e271SLiu Yu } 157daf5e271SLiu Yu 158daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 159daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 160daf5e271SLiu Yu { 161daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 162daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 163daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 164daf5e271SLiu Yu } 165daf5e271SLiu Yu 166daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 167daf5e271SLiu Yu ulong esr_flags) 168daf5e271SLiu Yu { 169daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 170daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 171daf5e271SLiu Yu } 172daf5e271SLiu Yu 173daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 174daf5e271SLiu Yu { 175daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 176d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 1779dd921cfSHollis Blanchard } 1789dd921cfSHollis Blanchard 1799dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 1809dd921cfSHollis Blanchard { 181d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 1829dd921cfSHollis Blanchard } 1839dd921cfSHollis Blanchard 1849dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 1859dd921cfSHollis Blanchard { 186d4cf3892SHollis Blanchard return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1879dd921cfSHollis Blanchard } 1889dd921cfSHollis Blanchard 1897706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 1907706664dSAlexander Graf { 1917706664dSAlexander Graf clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1927706664dSAlexander Graf } 1937706664dSAlexander Graf 1949dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 1959dd921cfSHollis Blanchard struct kvm_interrupt *irq) 1969dd921cfSHollis Blanchard { 197c5335f17SAlexander Graf unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 198c5335f17SAlexander Graf 199c5335f17SAlexander Graf if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 200c5335f17SAlexander Graf prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 201c5335f17SAlexander Graf 202c5335f17SAlexander Graf kvmppc_booke_queue_irqprio(vcpu, prio); 2039dd921cfSHollis Blanchard } 2049dd921cfSHollis Blanchard 2054496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, 2064496f974SAlexander Graf struct kvm_interrupt *irq) 2074496f974SAlexander Graf { 2084496f974SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 209c5335f17SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 2104496f974SAlexander Graf } 2114496f974SAlexander Graf 212*f61c94bbSBharat Bhushan static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 213*f61c94bbSBharat Bhushan { 214*f61c94bbSBharat Bhushan kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 215*f61c94bbSBharat Bhushan } 216*f61c94bbSBharat Bhushan 217*f61c94bbSBharat Bhushan static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 218*f61c94bbSBharat Bhushan { 219*f61c94bbSBharat Bhushan clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 220*f61c94bbSBharat Bhushan } 221*f61c94bbSBharat Bhushan 222d30f6e48SScott Wood static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 223d30f6e48SScott Wood { 224d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 225d30f6e48SScott Wood mtspr(SPRN_GSRR0, srr0); 226d30f6e48SScott Wood mtspr(SPRN_GSRR1, srr1); 227d30f6e48SScott Wood #else 228d30f6e48SScott Wood vcpu->arch.shared->srr0 = srr0; 229d30f6e48SScott Wood vcpu->arch.shared->srr1 = srr1; 230d30f6e48SScott Wood #endif 231d30f6e48SScott Wood } 232d30f6e48SScott Wood 233d30f6e48SScott Wood static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 234d30f6e48SScott Wood { 235d30f6e48SScott Wood vcpu->arch.csrr0 = srr0; 236d30f6e48SScott Wood vcpu->arch.csrr1 = srr1; 237d30f6e48SScott Wood } 238d30f6e48SScott Wood 239d30f6e48SScott Wood static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 240d30f6e48SScott Wood { 241d30f6e48SScott Wood if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 242d30f6e48SScott Wood vcpu->arch.dsrr0 = srr0; 243d30f6e48SScott Wood vcpu->arch.dsrr1 = srr1; 244d30f6e48SScott Wood } else { 245d30f6e48SScott Wood set_guest_csrr(vcpu, srr0, srr1); 246d30f6e48SScott Wood } 247d30f6e48SScott Wood } 248d30f6e48SScott Wood 249d30f6e48SScott Wood static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 250d30f6e48SScott Wood { 251d30f6e48SScott Wood vcpu->arch.mcsrr0 = srr0; 252d30f6e48SScott Wood vcpu->arch.mcsrr1 = srr1; 253d30f6e48SScott Wood } 254d30f6e48SScott Wood 255d30f6e48SScott Wood static unsigned long get_guest_dear(struct kvm_vcpu *vcpu) 256d30f6e48SScott Wood { 257d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 258d30f6e48SScott Wood return mfspr(SPRN_GDEAR); 259d30f6e48SScott Wood #else 260d30f6e48SScott Wood return vcpu->arch.shared->dar; 261d30f6e48SScott Wood #endif 262d30f6e48SScott Wood } 263d30f6e48SScott Wood 264d30f6e48SScott Wood static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear) 265d30f6e48SScott Wood { 266d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 267d30f6e48SScott Wood mtspr(SPRN_GDEAR, dear); 268d30f6e48SScott Wood #else 269d30f6e48SScott Wood vcpu->arch.shared->dar = dear; 270d30f6e48SScott Wood #endif 271d30f6e48SScott Wood } 272d30f6e48SScott Wood 273d30f6e48SScott Wood static unsigned long get_guest_esr(struct kvm_vcpu *vcpu) 274d30f6e48SScott Wood { 275d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 276d30f6e48SScott Wood return mfspr(SPRN_GESR); 277d30f6e48SScott Wood #else 278d30f6e48SScott Wood return vcpu->arch.shared->esr; 279d30f6e48SScott Wood #endif 280d30f6e48SScott Wood } 281d30f6e48SScott Wood 282d30f6e48SScott Wood static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr) 283d30f6e48SScott Wood { 284d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 285d30f6e48SScott Wood mtspr(SPRN_GESR, esr); 286d30f6e48SScott Wood #else 287d30f6e48SScott Wood vcpu->arch.shared->esr = esr; 288d30f6e48SScott Wood #endif 289d30f6e48SScott Wood } 290d30f6e48SScott Wood 291d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */ 292d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 293d4cf3892SHollis Blanchard unsigned int priority) 294d9fbd03dSHollis Blanchard { 295d4cf3892SHollis Blanchard int allowed = 0; 29679300f8cSAlexander Graf ulong msr_mask = 0; 297daf5e271SLiu Yu bool update_esr = false, update_dear = false; 2985c6cedf4SAlexander Graf ulong crit_raw = vcpu->arch.shared->critical; 2995c6cedf4SAlexander Graf ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 3005c6cedf4SAlexander Graf bool crit; 301c5335f17SAlexander Graf bool keep_irq = false; 302d30f6e48SScott Wood enum int_class int_class; 3035c6cedf4SAlexander Graf 3045c6cedf4SAlexander Graf /* Truncate crit indicators in 32 bit mode */ 3055c6cedf4SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_SF)) { 3065c6cedf4SAlexander Graf crit_raw &= 0xffffffff; 3075c6cedf4SAlexander Graf crit_r1 &= 0xffffffff; 3085c6cedf4SAlexander Graf } 3095c6cedf4SAlexander Graf 3105c6cedf4SAlexander Graf /* Critical section when crit == r1 */ 3115c6cedf4SAlexander Graf crit = (crit_raw == crit_r1); 3125c6cedf4SAlexander Graf /* ... and we're in supervisor mode */ 3135c6cedf4SAlexander Graf crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 314d9fbd03dSHollis Blanchard 315c5335f17SAlexander Graf if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 316c5335f17SAlexander Graf priority = BOOKE_IRQPRIO_EXTERNAL; 317c5335f17SAlexander Graf keep_irq = true; 318c5335f17SAlexander Graf } 319c5335f17SAlexander Graf 320d4cf3892SHollis Blanchard switch (priority) { 321d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DTLB_MISS: 322daf5e271SLiu Yu case BOOKE_IRQPRIO_DATA_STORAGE: 323daf5e271SLiu Yu update_dear = true; 324daf5e271SLiu Yu /* fall through */ 325daf5e271SLiu Yu case BOOKE_IRQPRIO_INST_STORAGE: 326daf5e271SLiu Yu case BOOKE_IRQPRIO_PROGRAM: 327daf5e271SLiu Yu update_esr = true; 328daf5e271SLiu Yu /* fall through */ 329d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ITLB_MISS: 330d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_SYSCALL: 331d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FP_UNAVAIL: 332bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_UNAVAIL: 333bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_DATA: 334bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_ROUND: 335d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_AP_UNAVAIL: 336d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ALIGNMENT: 337d4cf3892SHollis Blanchard allowed = 1; 33879300f8cSAlexander Graf msr_mask = MSR_CE | MSR_ME | MSR_DE; 339d30f6e48SScott Wood int_class = INT_CLASS_NONCRIT; 340d9fbd03dSHollis Blanchard break; 341*f61c94bbSBharat Bhushan case BOOKE_IRQPRIO_WATCHDOG: 342d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_CRITICAL: 3434ab96919SAlexander Graf case BOOKE_IRQPRIO_DBELL_CRIT: 344666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_CE; 345d30f6e48SScott Wood allowed = allowed && !crit; 34679300f8cSAlexander Graf msr_mask = MSR_ME; 347d30f6e48SScott Wood int_class = INT_CLASS_CRIT; 348d9fbd03dSHollis Blanchard break; 349d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_MACHINE_CHECK: 350666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_ME; 351d30f6e48SScott Wood allowed = allowed && !crit; 352d30f6e48SScott Wood int_class = INT_CLASS_MC; 353d9fbd03dSHollis Blanchard break; 354d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DECREMENTER: 355d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FIT: 356dfd4d47eSScott Wood keep_irq = true; 357dfd4d47eSScott Wood /* fall through */ 358dfd4d47eSScott Wood case BOOKE_IRQPRIO_EXTERNAL: 3594ab96919SAlexander Graf case BOOKE_IRQPRIO_DBELL: 360666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_EE; 3615c6cedf4SAlexander Graf allowed = allowed && !crit; 36279300f8cSAlexander Graf msr_mask = MSR_CE | MSR_ME | MSR_DE; 363d30f6e48SScott Wood int_class = INT_CLASS_NONCRIT; 364d9fbd03dSHollis Blanchard break; 365d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DEBUG: 366666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_DE; 367d30f6e48SScott Wood allowed = allowed && !crit; 36879300f8cSAlexander Graf msr_mask = MSR_ME; 369d30f6e48SScott Wood int_class = INT_CLASS_CRIT; 370d9fbd03dSHollis Blanchard break; 371d9fbd03dSHollis Blanchard } 372d9fbd03dSHollis Blanchard 373d4cf3892SHollis Blanchard if (allowed) { 374d30f6e48SScott Wood switch (int_class) { 375d30f6e48SScott Wood case INT_CLASS_NONCRIT: 376d30f6e48SScott Wood set_guest_srr(vcpu, vcpu->arch.pc, 377d30f6e48SScott Wood vcpu->arch.shared->msr); 378d30f6e48SScott Wood break; 379d30f6e48SScott Wood case INT_CLASS_CRIT: 380d30f6e48SScott Wood set_guest_csrr(vcpu, vcpu->arch.pc, 381d30f6e48SScott Wood vcpu->arch.shared->msr); 382d30f6e48SScott Wood break; 383d30f6e48SScott Wood case INT_CLASS_DBG: 384d30f6e48SScott Wood set_guest_dsrr(vcpu, vcpu->arch.pc, 385d30f6e48SScott Wood vcpu->arch.shared->msr); 386d30f6e48SScott Wood break; 387d30f6e48SScott Wood case INT_CLASS_MC: 388d30f6e48SScott Wood set_guest_mcsrr(vcpu, vcpu->arch.pc, 389d30f6e48SScott Wood vcpu->arch.shared->msr); 390d30f6e48SScott Wood break; 391d30f6e48SScott Wood } 392d30f6e48SScott Wood 393d4cf3892SHollis Blanchard vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 394daf5e271SLiu Yu if (update_esr == true) 395d30f6e48SScott Wood set_guest_esr(vcpu, vcpu->arch.queued_esr); 396daf5e271SLiu Yu if (update_dear == true) 397d30f6e48SScott Wood set_guest_dear(vcpu, vcpu->arch.queued_dear); 398666e7252SAlexander Graf kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask); 399d4cf3892SHollis Blanchard 400c5335f17SAlexander Graf if (!keep_irq) 401d4cf3892SHollis Blanchard clear_bit(priority, &vcpu->arch.pending_exceptions); 402d4cf3892SHollis Blanchard } 403d4cf3892SHollis Blanchard 404d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 405d30f6e48SScott Wood /* 406d30f6e48SScott Wood * If an interrupt is pending but masked, raise a guest doorbell 407d30f6e48SScott Wood * so that we are notified when the guest enables the relevant 408d30f6e48SScott Wood * MSR bit. 409d30f6e48SScott Wood */ 410d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 411d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 412d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 413d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 414d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 415d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 416d30f6e48SScott Wood #endif 417d30f6e48SScott Wood 418d4cf3892SHollis Blanchard return allowed; 419d9fbd03dSHollis Blanchard } 420d9fbd03dSHollis Blanchard 421*f61c94bbSBharat Bhushan /* 422*f61c94bbSBharat Bhushan * Return the number of jiffies until the next timeout. If the timeout is 423*f61c94bbSBharat Bhushan * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 424*f61c94bbSBharat Bhushan * because the larger value can break the timer APIs. 425*f61c94bbSBharat Bhushan */ 426*f61c94bbSBharat Bhushan static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 427*f61c94bbSBharat Bhushan { 428*f61c94bbSBharat Bhushan u64 tb, wdt_tb, wdt_ticks = 0; 429*f61c94bbSBharat Bhushan u64 nr_jiffies = 0; 430*f61c94bbSBharat Bhushan u32 period = TCR_GET_WP(vcpu->arch.tcr); 431*f61c94bbSBharat Bhushan 432*f61c94bbSBharat Bhushan wdt_tb = 1ULL << (63 - period); 433*f61c94bbSBharat Bhushan tb = get_tb(); 434*f61c94bbSBharat Bhushan /* 435*f61c94bbSBharat Bhushan * The watchdog timeout will hapeen when TB bit corresponding 436*f61c94bbSBharat Bhushan * to watchdog will toggle from 0 to 1. 437*f61c94bbSBharat Bhushan */ 438*f61c94bbSBharat Bhushan if (tb & wdt_tb) 439*f61c94bbSBharat Bhushan wdt_ticks = wdt_tb; 440*f61c94bbSBharat Bhushan 441*f61c94bbSBharat Bhushan wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 442*f61c94bbSBharat Bhushan 443*f61c94bbSBharat Bhushan /* Convert timebase ticks to jiffies */ 444*f61c94bbSBharat Bhushan nr_jiffies = wdt_ticks; 445*f61c94bbSBharat Bhushan 446*f61c94bbSBharat Bhushan if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 447*f61c94bbSBharat Bhushan nr_jiffies++; 448*f61c94bbSBharat Bhushan 449*f61c94bbSBharat Bhushan return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 450*f61c94bbSBharat Bhushan } 451*f61c94bbSBharat Bhushan 452*f61c94bbSBharat Bhushan static void arm_next_watchdog(struct kvm_vcpu *vcpu) 453*f61c94bbSBharat Bhushan { 454*f61c94bbSBharat Bhushan unsigned long nr_jiffies; 455*f61c94bbSBharat Bhushan unsigned long flags; 456*f61c94bbSBharat Bhushan 457*f61c94bbSBharat Bhushan /* 458*f61c94bbSBharat Bhushan * If TSR_ENW and TSR_WIS are not set then no need to exit to 459*f61c94bbSBharat Bhushan * userspace, so clear the KVM_REQ_WATCHDOG request. 460*f61c94bbSBharat Bhushan */ 461*f61c94bbSBharat Bhushan if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 462*f61c94bbSBharat Bhushan clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 463*f61c94bbSBharat Bhushan 464*f61c94bbSBharat Bhushan spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 465*f61c94bbSBharat Bhushan nr_jiffies = watchdog_next_timeout(vcpu); 466*f61c94bbSBharat Bhushan /* 467*f61c94bbSBharat Bhushan * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 468*f61c94bbSBharat Bhushan * then do not run the watchdog timer as this can break timer APIs. 469*f61c94bbSBharat Bhushan */ 470*f61c94bbSBharat Bhushan if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 471*f61c94bbSBharat Bhushan mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 472*f61c94bbSBharat Bhushan else 473*f61c94bbSBharat Bhushan del_timer(&vcpu->arch.wdt_timer); 474*f61c94bbSBharat Bhushan spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 475*f61c94bbSBharat Bhushan } 476*f61c94bbSBharat Bhushan 477*f61c94bbSBharat Bhushan void kvmppc_watchdog_func(unsigned long data) 478*f61c94bbSBharat Bhushan { 479*f61c94bbSBharat Bhushan struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 480*f61c94bbSBharat Bhushan u32 tsr, new_tsr; 481*f61c94bbSBharat Bhushan int final; 482*f61c94bbSBharat Bhushan 483*f61c94bbSBharat Bhushan do { 484*f61c94bbSBharat Bhushan new_tsr = tsr = vcpu->arch.tsr; 485*f61c94bbSBharat Bhushan final = 0; 486*f61c94bbSBharat Bhushan 487*f61c94bbSBharat Bhushan /* Time out event */ 488*f61c94bbSBharat Bhushan if (tsr & TSR_ENW) { 489*f61c94bbSBharat Bhushan if (tsr & TSR_WIS) 490*f61c94bbSBharat Bhushan final = 1; 491*f61c94bbSBharat Bhushan else 492*f61c94bbSBharat Bhushan new_tsr = tsr | TSR_WIS; 493*f61c94bbSBharat Bhushan } else { 494*f61c94bbSBharat Bhushan new_tsr = tsr | TSR_ENW; 495*f61c94bbSBharat Bhushan } 496*f61c94bbSBharat Bhushan } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 497*f61c94bbSBharat Bhushan 498*f61c94bbSBharat Bhushan if (new_tsr & TSR_WIS) { 499*f61c94bbSBharat Bhushan smp_wmb(); 500*f61c94bbSBharat Bhushan kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 501*f61c94bbSBharat Bhushan kvm_vcpu_kick(vcpu); 502*f61c94bbSBharat Bhushan } 503*f61c94bbSBharat Bhushan 504*f61c94bbSBharat Bhushan /* 505*f61c94bbSBharat Bhushan * If this is final watchdog expiry and some action is required 506*f61c94bbSBharat Bhushan * then exit to userspace. 507*f61c94bbSBharat Bhushan */ 508*f61c94bbSBharat Bhushan if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 509*f61c94bbSBharat Bhushan vcpu->arch.watchdog_enabled) { 510*f61c94bbSBharat Bhushan smp_wmb(); 511*f61c94bbSBharat Bhushan kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 512*f61c94bbSBharat Bhushan kvm_vcpu_kick(vcpu); 513*f61c94bbSBharat Bhushan } 514*f61c94bbSBharat Bhushan 515*f61c94bbSBharat Bhushan /* 516*f61c94bbSBharat Bhushan * Stop running the watchdog timer after final expiration to 517*f61c94bbSBharat Bhushan * prevent the host from being flooded with timers if the 518*f61c94bbSBharat Bhushan * guest sets a short period. 519*f61c94bbSBharat Bhushan * Timers will resume when TSR/TCR is updated next time. 520*f61c94bbSBharat Bhushan */ 521*f61c94bbSBharat Bhushan if (!final) 522*f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 523*f61c94bbSBharat Bhushan } 524*f61c94bbSBharat Bhushan 525dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu) 526dfd4d47eSScott Wood { 527dfd4d47eSScott Wood if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 528dfd4d47eSScott Wood kvmppc_core_queue_dec(vcpu); 529dfd4d47eSScott Wood else 530dfd4d47eSScott Wood kvmppc_core_dequeue_dec(vcpu); 531*f61c94bbSBharat Bhushan 532*f61c94bbSBharat Bhushan if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 533*f61c94bbSBharat Bhushan kvmppc_core_queue_watchdog(vcpu); 534*f61c94bbSBharat Bhushan else 535*f61c94bbSBharat Bhushan kvmppc_core_dequeue_watchdog(vcpu); 536dfd4d47eSScott Wood } 537dfd4d47eSScott Wood 538c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 539d9fbd03dSHollis Blanchard { 540d9fbd03dSHollis Blanchard unsigned long *pending = &vcpu->arch.pending_exceptions; 541d9fbd03dSHollis Blanchard unsigned int priority; 542d9fbd03dSHollis Blanchard 5439ab80843SHollis Blanchard priority = __ffs(*pending); 5448b3a00fcSAlexander Graf while (priority < BOOKE_IRQPRIO_MAX) { 545d4cf3892SHollis Blanchard if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 546d9fbd03dSHollis Blanchard break; 547d9fbd03dSHollis Blanchard 548d9fbd03dSHollis Blanchard priority = find_next_bit(pending, 549d9fbd03dSHollis Blanchard BITS_PER_BYTE * sizeof(*pending), 550d9fbd03dSHollis Blanchard priority + 1); 551d9fbd03dSHollis Blanchard } 55290bba358SAlexander Graf 55390bba358SAlexander Graf /* Tell the guest about our interrupt status */ 55429ac26efSScott Wood vcpu->arch.shared->int_pending = !!*pending; 555d9fbd03dSHollis Blanchard } 556d9fbd03dSHollis Blanchard 557c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */ 558a8e4ef84SAlexander Graf int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 559c59a6a3eSScott Wood { 560a8e4ef84SAlexander Graf int r = 0; 561c59a6a3eSScott Wood WARN_ON_ONCE(!irqs_disabled()); 562c59a6a3eSScott Wood 563c59a6a3eSScott Wood kvmppc_core_check_exceptions(vcpu); 564c59a6a3eSScott Wood 565c59a6a3eSScott Wood if (vcpu->arch.shared->msr & MSR_WE) { 566c59a6a3eSScott Wood local_irq_enable(); 567c59a6a3eSScott Wood kvm_vcpu_block(vcpu); 568966cd0f3SAlexander Graf clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 569c59a6a3eSScott Wood local_irq_disable(); 570c59a6a3eSScott Wood 571c59a6a3eSScott Wood kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 572a8e4ef84SAlexander Graf r = 1; 573c59a6a3eSScott Wood }; 574a8e4ef84SAlexander Graf 575a8e4ef84SAlexander Graf return r; 576a8e4ef84SAlexander Graf } 577a8e4ef84SAlexander Graf 5787c973a2eSAlexander Graf int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 5794ffc6356SAlexander Graf { 5807c973a2eSAlexander Graf int r = 1; /* Indicate we want to get back into the guest */ 5817c973a2eSAlexander Graf 5824ffc6356SAlexander Graf if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 5834ffc6356SAlexander Graf update_timer_ints(vcpu); 584862d31f7SAlexander Graf #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 585862d31f7SAlexander Graf if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 586862d31f7SAlexander Graf kvmppc_core_flush_tlb(vcpu); 587862d31f7SAlexander Graf #endif 5887c973a2eSAlexander Graf 589*f61c94bbSBharat Bhushan if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 590*f61c94bbSBharat Bhushan vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 591*f61c94bbSBharat Bhushan r = 0; 592*f61c94bbSBharat Bhushan } 593*f61c94bbSBharat Bhushan 5947c973a2eSAlexander Graf return r; 5954ffc6356SAlexander Graf } 5964ffc6356SAlexander Graf 597df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 598df6909e5SPaul Mackerras { 5997ee78855SAlexander Graf int ret, s; 6008fae845fSScott Wood #ifdef CONFIG_PPC_FPU 6018fae845fSScott Wood unsigned int fpscr; 6028fae845fSScott Wood int fpexc_mode; 6038fae845fSScott Wood u64 fpr[32]; 6048fae845fSScott Wood #endif 605df6909e5SPaul Mackerras 606af8f38b3SAlexander Graf if (!vcpu->arch.sane) { 607af8f38b3SAlexander Graf kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 608af8f38b3SAlexander Graf return -EINVAL; 609af8f38b3SAlexander Graf } 610af8f38b3SAlexander Graf 611df6909e5SPaul Mackerras local_irq_disable(); 6127ee78855SAlexander Graf s = kvmppc_prepare_to_enter(vcpu); 6137ee78855SAlexander Graf if (s <= 0) { 61424afa37bSAlexander Graf local_irq_enable(); 6157ee78855SAlexander Graf ret = s; 6161d1ef222SScott Wood goto out; 6171d1ef222SScott Wood } 618bd2be683SAlexander Graf kvmppc_lazy_ee_enable(); 6191d1ef222SScott Wood 620df6909e5SPaul Mackerras kvm_guest_enter(); 6218fae845fSScott Wood 6228fae845fSScott Wood #ifdef CONFIG_PPC_FPU 6238fae845fSScott Wood /* Save userspace FPU state in stack */ 6248fae845fSScott Wood enable_kernel_fp(); 6258fae845fSScott Wood memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 6268fae845fSScott Wood fpscr = current->thread.fpscr.val; 6278fae845fSScott Wood fpexc_mode = current->thread.fpexc_mode; 6288fae845fSScott Wood 6298fae845fSScott Wood /* Restore guest FPU state to thread */ 6308fae845fSScott Wood memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 6318fae845fSScott Wood current->thread.fpscr.val = vcpu->arch.fpscr; 6328fae845fSScott Wood 6338fae845fSScott Wood /* 6348fae845fSScott Wood * Since we can't trap on MSR_FP in GS-mode, we consider the guest 6358fae845fSScott Wood * as always using the FPU. Kernel usage of FP (via 6368fae845fSScott Wood * enable_kernel_fp()) in this thread must not occur while 6378fae845fSScott Wood * vcpu->fpu_active is set. 6388fae845fSScott Wood */ 6398fae845fSScott Wood vcpu->fpu_active = 1; 6408fae845fSScott Wood 6418fae845fSScott Wood kvmppc_load_guest_fp(vcpu); 6428fae845fSScott Wood #endif 6438fae845fSScott Wood 644df6909e5SPaul Mackerras ret = __kvmppc_vcpu_run(kvm_run, vcpu); 6458fae845fSScott Wood 64624afa37bSAlexander Graf /* No need for kvm_guest_exit. It's done in handle_exit. 64724afa37bSAlexander Graf We also get here with interrupts enabled. */ 64824afa37bSAlexander Graf 6498fae845fSScott Wood #ifdef CONFIG_PPC_FPU 6508fae845fSScott Wood kvmppc_save_guest_fp(vcpu); 6518fae845fSScott Wood 6528fae845fSScott Wood vcpu->fpu_active = 0; 6538fae845fSScott Wood 6548fae845fSScott Wood /* Save guest FPU state from thread */ 6558fae845fSScott Wood memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 6568fae845fSScott Wood vcpu->arch.fpscr = current->thread.fpscr.val; 6578fae845fSScott Wood 6588fae845fSScott Wood /* Restore userspace FPU state from stack */ 6598fae845fSScott Wood memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 6608fae845fSScott Wood current->thread.fpscr.val = fpscr; 6618fae845fSScott Wood current->thread.fpexc_mode = fpexc_mode; 6628fae845fSScott Wood #endif 6638fae845fSScott Wood 6641d1ef222SScott Wood out: 665d69c6436SAlexander Graf vcpu->mode = OUTSIDE_GUEST_MODE; 666d69c6436SAlexander Graf smp_wmb(); 667df6909e5SPaul Mackerras return ret; 668df6909e5SPaul Mackerras } 669df6909e5SPaul Mackerras 670d30f6e48SScott Wood static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 671d9fbd03dSHollis Blanchard { 672d9fbd03dSHollis Blanchard enum emulation_result er; 673d9fbd03dSHollis Blanchard 674d9fbd03dSHollis Blanchard er = kvmppc_emulate_instruction(run, vcpu); 675d9fbd03dSHollis Blanchard switch (er) { 676d9fbd03dSHollis Blanchard case EMULATE_DONE: 67773e75b41SHollis Blanchard /* don't overwrite subtypes, just account kvm_stats */ 6787b701591SHollis Blanchard kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 679d9fbd03dSHollis Blanchard /* Future optimization: only reload non-volatiles if 680d9fbd03dSHollis Blanchard * they were actually modified by emulation. */ 681d30f6e48SScott Wood return RESUME_GUEST_NV; 682d30f6e48SScott Wood 683d9fbd03dSHollis Blanchard case EMULATE_DO_DCR: 684d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DCR; 685d30f6e48SScott Wood return RESUME_HOST; 686d30f6e48SScott Wood 687d9fbd03dSHollis Blanchard case EMULATE_FAIL: 6885cf8ca22SHollis Blanchard printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 689d9fbd03dSHollis Blanchard __func__, vcpu->arch.pc, vcpu->arch.last_inst); 690d9fbd03dSHollis Blanchard /* For debugging, encode the failing instruction and 691d9fbd03dSHollis Blanchard * report it to userspace. */ 692d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason = ~0ULL << 32; 693d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 694d1ff5499SAlexander Graf kvmppc_core_queue_program(vcpu, ESR_PIL); 695d30f6e48SScott Wood return RESUME_HOST; 696d30f6e48SScott Wood 697d9fbd03dSHollis Blanchard default: 698d9fbd03dSHollis Blanchard BUG(); 699d9fbd03dSHollis Blanchard } 700d30f6e48SScott Wood } 701d30f6e48SScott Wood 7024e642ccbSAlexander Graf static void kvmppc_fill_pt_regs(struct pt_regs *regs) 7034e642ccbSAlexander Graf { 7044e642ccbSAlexander Graf ulong r1, ip, msr, lr; 7054e642ccbSAlexander Graf 7064e642ccbSAlexander Graf asm("mr %0, 1" : "=r"(r1)); 7074e642ccbSAlexander Graf asm("mflr %0" : "=r"(lr)); 7084e642ccbSAlexander Graf asm("mfmsr %0" : "=r"(msr)); 7094e642ccbSAlexander Graf asm("bl 1f; 1: mflr %0" : "=r"(ip)); 7104e642ccbSAlexander Graf 7114e642ccbSAlexander Graf memset(regs, 0, sizeof(*regs)); 7124e642ccbSAlexander Graf regs->gpr[1] = r1; 7134e642ccbSAlexander Graf regs->nip = ip; 7144e642ccbSAlexander Graf regs->msr = msr; 7154e642ccbSAlexander Graf regs->link = lr; 7164e642ccbSAlexander Graf } 7174e642ccbSAlexander Graf 7186328e593SBharat Bhushan /* 7196328e593SBharat Bhushan * For interrupts needed to be handled by host interrupt handlers, 7206328e593SBharat Bhushan * corresponding host handler are called from here in similar way 7216328e593SBharat Bhushan * (but not exact) as they are called from low level handler 7226328e593SBharat Bhushan * (such as from arch/powerpc/kernel/head_fsl_booke.S). 7236328e593SBharat Bhushan */ 7244e642ccbSAlexander Graf static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 7254e642ccbSAlexander Graf unsigned int exit_nr) 7264e642ccbSAlexander Graf { 7274e642ccbSAlexander Graf struct pt_regs regs; 7284e642ccbSAlexander Graf 7294e642ccbSAlexander Graf switch (exit_nr) { 7304e642ccbSAlexander Graf case BOOKE_INTERRUPT_EXTERNAL: 7314e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 7324e642ccbSAlexander Graf do_IRQ(®s); 7334e642ccbSAlexander Graf break; 7344e642ccbSAlexander Graf case BOOKE_INTERRUPT_DECREMENTER: 7354e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 7364e642ccbSAlexander Graf timer_interrupt(®s); 7374e642ccbSAlexander Graf break; 7384e642ccbSAlexander Graf #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64) 7394e642ccbSAlexander Graf case BOOKE_INTERRUPT_DOORBELL: 7404e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 7414e642ccbSAlexander Graf doorbell_exception(®s); 7424e642ccbSAlexander Graf break; 7434e642ccbSAlexander Graf #endif 7444e642ccbSAlexander Graf case BOOKE_INTERRUPT_MACHINE_CHECK: 7454e642ccbSAlexander Graf /* FIXME */ 7464e642ccbSAlexander Graf break; 7477cc1e8eeSAlexander Graf case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 7487cc1e8eeSAlexander Graf kvmppc_fill_pt_regs(®s); 7497cc1e8eeSAlexander Graf performance_monitor_exception(®s); 7507cc1e8eeSAlexander Graf break; 7516328e593SBharat Bhushan case BOOKE_INTERRUPT_WATCHDOG: 7526328e593SBharat Bhushan kvmppc_fill_pt_regs(®s); 7536328e593SBharat Bhushan #ifdef CONFIG_BOOKE_WDT 7546328e593SBharat Bhushan WatchdogException(®s); 7556328e593SBharat Bhushan #else 7566328e593SBharat Bhushan unknown_exception(®s); 7576328e593SBharat Bhushan #endif 7586328e593SBharat Bhushan break; 7596328e593SBharat Bhushan case BOOKE_INTERRUPT_CRITICAL: 7606328e593SBharat Bhushan unknown_exception(®s); 7616328e593SBharat Bhushan break; 7624e642ccbSAlexander Graf } 7634e642ccbSAlexander Graf } 7644e642ccbSAlexander Graf 765d30f6e48SScott Wood /** 766d30f6e48SScott Wood * kvmppc_handle_exit 767d30f6e48SScott Wood * 768d30f6e48SScott Wood * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 769d30f6e48SScott Wood */ 770d30f6e48SScott Wood int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 771d30f6e48SScott Wood unsigned int exit_nr) 772d30f6e48SScott Wood { 773d30f6e48SScott Wood int r = RESUME_HOST; 7747ee78855SAlexander Graf int s; 775d30f6e48SScott Wood 776d30f6e48SScott Wood /* update before a new last_exit_type is rewritten */ 777d30f6e48SScott Wood kvmppc_update_timing_stats(vcpu); 778d30f6e48SScott Wood 7794e642ccbSAlexander Graf /* restart interrupts if they were meant for the host */ 7804e642ccbSAlexander Graf kvmppc_restart_interrupt(vcpu, exit_nr); 781d30f6e48SScott Wood 782d30f6e48SScott Wood local_irq_enable(); 783d30f6e48SScott Wood 78497c95059SAlexander Graf trace_kvm_exit(exit_nr, vcpu); 785706fb730SAlexander Graf kvm_guest_exit(); 78697c95059SAlexander Graf 787d30f6e48SScott Wood run->exit_reason = KVM_EXIT_UNKNOWN; 788d30f6e48SScott Wood run->ready_for_interrupt_injection = 1; 789d30f6e48SScott Wood 790d30f6e48SScott Wood switch (exit_nr) { 791d30f6e48SScott Wood case BOOKE_INTERRUPT_MACHINE_CHECK: 792c35c9d84SAlexander Graf printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 793c35c9d84SAlexander Graf kvmppc_dump_vcpu(vcpu); 794c35c9d84SAlexander Graf /* For debugging, send invalid exit reason to user space */ 795c35c9d84SAlexander Graf run->hw.hardware_exit_reason = ~1ULL << 32; 796c35c9d84SAlexander Graf run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 797c35c9d84SAlexander Graf r = RESUME_HOST; 798d30f6e48SScott Wood break; 799d30f6e48SScott Wood 800d30f6e48SScott Wood case BOOKE_INTERRUPT_EXTERNAL: 801d30f6e48SScott Wood kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 802d30f6e48SScott Wood r = RESUME_GUEST; 803d30f6e48SScott Wood break; 804d30f6e48SScott Wood 805d30f6e48SScott Wood case BOOKE_INTERRUPT_DECREMENTER: 806d30f6e48SScott Wood kvmppc_account_exit(vcpu, DEC_EXITS); 807d30f6e48SScott Wood r = RESUME_GUEST; 808d30f6e48SScott Wood break; 809d30f6e48SScott Wood 8106328e593SBharat Bhushan case BOOKE_INTERRUPT_WATCHDOG: 8116328e593SBharat Bhushan r = RESUME_GUEST; 8126328e593SBharat Bhushan break; 8136328e593SBharat Bhushan 814d30f6e48SScott Wood case BOOKE_INTERRUPT_DOORBELL: 815d30f6e48SScott Wood kvmppc_account_exit(vcpu, DBELL_EXITS); 816d30f6e48SScott Wood r = RESUME_GUEST; 817d30f6e48SScott Wood break; 818d30f6e48SScott Wood 819d30f6e48SScott Wood case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 820d30f6e48SScott Wood kvmppc_account_exit(vcpu, GDBELL_EXITS); 821d30f6e48SScott Wood 822d30f6e48SScott Wood /* 823d30f6e48SScott Wood * We are here because there is a pending guest interrupt 824d30f6e48SScott Wood * which could not be delivered as MSR_CE or MSR_ME was not 825d30f6e48SScott Wood * set. Once we break from here we will retry delivery. 826d30f6e48SScott Wood */ 827d30f6e48SScott Wood r = RESUME_GUEST; 828d30f6e48SScott Wood break; 829d30f6e48SScott Wood 830d30f6e48SScott Wood case BOOKE_INTERRUPT_GUEST_DBELL: 831d30f6e48SScott Wood kvmppc_account_exit(vcpu, GDBELL_EXITS); 832d30f6e48SScott Wood 833d30f6e48SScott Wood /* 834d30f6e48SScott Wood * We are here because there is a pending guest interrupt 835d30f6e48SScott Wood * which could not be delivered as MSR_EE was not set. Once 836d30f6e48SScott Wood * we break from here we will retry delivery. 837d30f6e48SScott Wood */ 838d30f6e48SScott Wood r = RESUME_GUEST; 839d30f6e48SScott Wood break; 840d30f6e48SScott Wood 84195f2e921SAlexander Graf case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 84295f2e921SAlexander Graf r = RESUME_GUEST; 84395f2e921SAlexander Graf break; 84495f2e921SAlexander Graf 845d30f6e48SScott Wood case BOOKE_INTERRUPT_HV_PRIV: 846d30f6e48SScott Wood r = emulation_exit(run, vcpu); 847d30f6e48SScott Wood break; 848d30f6e48SScott Wood 849d30f6e48SScott Wood case BOOKE_INTERRUPT_PROGRAM: 850d30f6e48SScott Wood if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 8510268597cSAlexander Graf /* 8520268597cSAlexander Graf * Program traps generated by user-level software must 8530268597cSAlexander Graf * be handled by the guest kernel. 8540268597cSAlexander Graf * 8550268597cSAlexander Graf * In GS mode, hypervisor privileged instructions trap 8560268597cSAlexander Graf * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 8570268597cSAlexander Graf * actual program interrupts, handled by the guest. 8580268597cSAlexander Graf */ 859d30f6e48SScott Wood kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 860d30f6e48SScott Wood r = RESUME_GUEST; 861d30f6e48SScott Wood kvmppc_account_exit(vcpu, USR_PR_INST); 862d30f6e48SScott Wood break; 863d30f6e48SScott Wood } 864d30f6e48SScott Wood 865d30f6e48SScott Wood r = emulation_exit(run, vcpu); 866d9fbd03dSHollis Blanchard break; 867d9fbd03dSHollis Blanchard 868d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_FP_UNAVAIL: 869d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 8707b701591SHollis Blanchard kvmppc_account_exit(vcpu, FP_UNAVAIL); 871d9fbd03dSHollis Blanchard r = RESUME_GUEST; 872d9fbd03dSHollis Blanchard break; 873d9fbd03dSHollis Blanchard 8744cd35f67SScott Wood #ifdef CONFIG_SPE 8754cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: { 8764cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) 8774cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 8784cd35f67SScott Wood else 8794cd35f67SScott Wood kvmppc_booke_queue_irqprio(vcpu, 8804cd35f67SScott Wood BOOKE_IRQPRIO_SPE_UNAVAIL); 881bb3a8a17SHollis Blanchard r = RESUME_GUEST; 882bb3a8a17SHollis Blanchard break; 8834cd35f67SScott Wood } 884bb3a8a17SHollis Blanchard 885bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_DATA: 886bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 887bb3a8a17SHollis Blanchard r = RESUME_GUEST; 888bb3a8a17SHollis Blanchard break; 889bb3a8a17SHollis Blanchard 890bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_ROUND: 891bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 892bb3a8a17SHollis Blanchard r = RESUME_GUEST; 893bb3a8a17SHollis Blanchard break; 8944cd35f67SScott Wood #else 8954cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: 8964cd35f67SScott Wood /* 8974cd35f67SScott Wood * Guest wants SPE, but host kernel doesn't support it. Send 8984cd35f67SScott Wood * an "unimplemented operation" program check to the guest. 8994cd35f67SScott Wood */ 9004cd35f67SScott Wood kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 9014cd35f67SScott Wood r = RESUME_GUEST; 9024cd35f67SScott Wood break; 9034cd35f67SScott Wood 9044cd35f67SScott Wood /* 9054cd35f67SScott Wood * These really should never happen without CONFIG_SPE, 9064cd35f67SScott Wood * as we should never enable the real MSR[SPE] in the guest. 9074cd35f67SScott Wood */ 9084cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_DATA: 9094cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_ROUND: 9104cd35f67SScott Wood printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 9114cd35f67SScott Wood __func__, exit_nr, vcpu->arch.pc); 9124cd35f67SScott Wood run->hw.hardware_exit_reason = exit_nr; 9134cd35f67SScott Wood r = RESUME_HOST; 9144cd35f67SScott Wood break; 9154cd35f67SScott Wood #endif 916bb3a8a17SHollis Blanchard 917d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DATA_STORAGE: 918daf5e271SLiu Yu kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 919daf5e271SLiu Yu vcpu->arch.fault_esr); 9207b701591SHollis Blanchard kvmppc_account_exit(vcpu, DSI_EXITS); 921d9fbd03dSHollis Blanchard r = RESUME_GUEST; 922d9fbd03dSHollis Blanchard break; 923d9fbd03dSHollis Blanchard 924d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_INST_STORAGE: 925daf5e271SLiu Yu kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 9267b701591SHollis Blanchard kvmppc_account_exit(vcpu, ISI_EXITS); 927d9fbd03dSHollis Blanchard r = RESUME_GUEST; 928d9fbd03dSHollis Blanchard break; 929d9fbd03dSHollis Blanchard 930d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 931d30f6e48SScott Wood case BOOKE_INTERRUPT_HV_SYSCALL: 932d30f6e48SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR)) { 933d30f6e48SScott Wood kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 934d30f6e48SScott Wood } else { 935d30f6e48SScott Wood /* 936d30f6e48SScott Wood * hcall from guest userspace -- send privileged 937d30f6e48SScott Wood * instruction program check. 938d30f6e48SScott Wood */ 939d30f6e48SScott Wood kvmppc_core_queue_program(vcpu, ESR_PPR); 940d30f6e48SScott Wood } 941d30f6e48SScott Wood 942d30f6e48SScott Wood r = RESUME_GUEST; 943d30f6e48SScott Wood break; 944d30f6e48SScott Wood #else 945d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_SYSCALL: 9462a342ed5SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_PR) && 9472a342ed5SAlexander Graf (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 9482a342ed5SAlexander Graf /* KVM PV hypercalls */ 9492a342ed5SAlexander Graf kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 9502a342ed5SAlexander Graf r = RESUME_GUEST; 9512a342ed5SAlexander Graf } else { 9522a342ed5SAlexander Graf /* Guest syscalls */ 953d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 9542a342ed5SAlexander Graf } 9557b701591SHollis Blanchard kvmppc_account_exit(vcpu, SYSCALL_EXITS); 956d9fbd03dSHollis Blanchard r = RESUME_GUEST; 957d9fbd03dSHollis Blanchard break; 958d30f6e48SScott Wood #endif 959d9fbd03dSHollis Blanchard 960d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DTLB_MISS: { 961d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.fault_dear; 9627924bd41SHollis Blanchard int gtlb_index; 963475e7cddSHollis Blanchard gpa_t gpaddr; 964d9fbd03dSHollis Blanchard gfn_t gfn; 965d9fbd03dSHollis Blanchard 966bf7ca4bdSAlexander Graf #ifdef CONFIG_KVM_E500V2 967a4cd8b23SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR) && 968a4cd8b23SScott Wood (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 969a4cd8b23SScott Wood kvmppc_map_magic(vcpu); 970a4cd8b23SScott Wood kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 971a4cd8b23SScott Wood r = RESUME_GUEST; 972a4cd8b23SScott Wood 973a4cd8b23SScott Wood break; 974a4cd8b23SScott Wood } 975a4cd8b23SScott Wood #endif 976a4cd8b23SScott Wood 977d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 978fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 9797924bd41SHollis Blanchard if (gtlb_index < 0) { 980d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 981daf5e271SLiu Yu kvmppc_core_queue_dtlb_miss(vcpu, 982daf5e271SLiu Yu vcpu->arch.fault_dear, 983daf5e271SLiu Yu vcpu->arch.fault_esr); 984b52a638cSHollis Blanchard kvmppc_mmu_dtlb_miss(vcpu); 9857b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 986d9fbd03dSHollis Blanchard r = RESUME_GUEST; 987d9fbd03dSHollis Blanchard break; 988d9fbd03dSHollis Blanchard } 989d9fbd03dSHollis Blanchard 990be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 991475e7cddSHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 992d9fbd03dSHollis Blanchard 993d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 994d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 995d9fbd03dSHollis Blanchard * didn't, and it is RAM. This could be because: 996d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 997d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 998d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 999d9fbd03dSHollis Blanchard * invoking the guest. */ 100058a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 10017b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1002d9fbd03dSHollis Blanchard r = RESUME_GUEST; 1003d9fbd03dSHollis Blanchard } else { 1004d9fbd03dSHollis Blanchard /* Guest has mapped and accessed a page which is not 1005d9fbd03dSHollis Blanchard * actually RAM. */ 1006475e7cddSHollis Blanchard vcpu->arch.paddr_accessed = gpaddr; 10076020c0f6SAlexander Graf vcpu->arch.vaddr_accessed = eaddr; 1008d9fbd03dSHollis Blanchard r = kvmppc_emulate_mmio(run, vcpu); 10097b701591SHollis Blanchard kvmppc_account_exit(vcpu, MMIO_EXITS); 1010d9fbd03dSHollis Blanchard } 1011d9fbd03dSHollis Blanchard 1012d9fbd03dSHollis Blanchard break; 1013d9fbd03dSHollis Blanchard } 1014d9fbd03dSHollis Blanchard 1015d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_ITLB_MISS: { 1016d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.pc; 101789168618SHollis Blanchard gpa_t gpaddr; 1018d9fbd03dSHollis Blanchard gfn_t gfn; 10197924bd41SHollis Blanchard int gtlb_index; 1020d9fbd03dSHollis Blanchard 1021d9fbd03dSHollis Blanchard r = RESUME_GUEST; 1022d9fbd03dSHollis Blanchard 1023d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 1024fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 10257924bd41SHollis Blanchard if (gtlb_index < 0) { 1026d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 1027d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1028b52a638cSHollis Blanchard kvmppc_mmu_itlb_miss(vcpu); 10297b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1030d9fbd03dSHollis Blanchard break; 1031d9fbd03dSHollis Blanchard } 1032d9fbd03dSHollis Blanchard 10337b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1034d9fbd03dSHollis Blanchard 1035be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 103689168618SHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 1037d9fbd03dSHollis Blanchard 1038d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1039d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 1040d9fbd03dSHollis Blanchard * didn't. This could be because: 1041d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 1042d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 1043d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 1044d9fbd03dSHollis Blanchard * invoking the guest. */ 104558a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1046d9fbd03dSHollis Blanchard } else { 1047d9fbd03dSHollis Blanchard /* Guest mapped and leaped at non-RAM! */ 1048d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1049d9fbd03dSHollis Blanchard } 1050d9fbd03dSHollis Blanchard 1051d9fbd03dSHollis Blanchard break; 1052d9fbd03dSHollis Blanchard } 1053d9fbd03dSHollis Blanchard 1054d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DEBUG: { 1055d9fbd03dSHollis Blanchard u32 dbsr; 1056d9fbd03dSHollis Blanchard 1057d9fbd03dSHollis Blanchard vcpu->arch.pc = mfspr(SPRN_CSRR0); 1058d9fbd03dSHollis Blanchard 1059d9fbd03dSHollis Blanchard /* clear IAC events in DBSR register */ 1060d9fbd03dSHollis Blanchard dbsr = mfspr(SPRN_DBSR); 1061d9fbd03dSHollis Blanchard dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 1062d9fbd03dSHollis Blanchard mtspr(SPRN_DBSR, dbsr); 1063d9fbd03dSHollis Blanchard 1064d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DEBUG; 10657b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEBUG_EXITS); 1066d9fbd03dSHollis Blanchard r = RESUME_HOST; 1067d9fbd03dSHollis Blanchard break; 1068d9fbd03dSHollis Blanchard } 1069d9fbd03dSHollis Blanchard 1070d9fbd03dSHollis Blanchard default: 1071d9fbd03dSHollis Blanchard printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1072d9fbd03dSHollis Blanchard BUG(); 1073d9fbd03dSHollis Blanchard } 1074d9fbd03dSHollis Blanchard 1075a8e4ef84SAlexander Graf /* 1076a8e4ef84SAlexander Graf * To avoid clobbering exit_reason, only check for signals if we 1077a8e4ef84SAlexander Graf * aren't already exiting to userspace for some other reason. 1078a8e4ef84SAlexander Graf */ 107903660ba2SAlexander Graf if (!(r & RESUME_HOST)) { 1080d9fbd03dSHollis Blanchard local_irq_disable(); 10817ee78855SAlexander Graf s = kvmppc_prepare_to_enter(vcpu); 10827ee78855SAlexander Graf if (s <= 0) { 108324afa37bSAlexander Graf local_irq_enable(); 10847ee78855SAlexander Graf r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 108524afa37bSAlexander Graf } else { 1086bd2be683SAlexander Graf kvmppc_lazy_ee_enable(); 108724afa37bSAlexander Graf } 108824afa37bSAlexander Graf } 1089706fb730SAlexander Graf 1090d9fbd03dSHollis Blanchard return r; 1091d9fbd03dSHollis Blanchard } 1092d9fbd03dSHollis Blanchard 1093d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1094d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1095d9fbd03dSHollis Blanchard { 1096082decf2SHollis Blanchard int i; 1097af8f38b3SAlexander Graf int r; 1098082decf2SHollis Blanchard 1099d9fbd03dSHollis Blanchard vcpu->arch.pc = 0; 1100b5904972SScott Wood vcpu->arch.shared->pir = vcpu->vcpu_id; 11018e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1102d30f6e48SScott Wood kvmppc_set_msr(vcpu, 0); 1103d9fbd03dSHollis Blanchard 1104d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 1105d30f6e48SScott Wood vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 1106d9fbd03dSHollis Blanchard vcpu->arch.shadow_pid = 1; 1107d30f6e48SScott Wood vcpu->arch.shared->msr = 0; 1108d30f6e48SScott Wood #endif 1109d9fbd03dSHollis Blanchard 1110082decf2SHollis Blanchard /* Eye-catching numbers so we know if the guest takes an interrupt 1111082decf2SHollis Blanchard * before it's programmed its own IVPR/IVORs. */ 1112d9fbd03dSHollis Blanchard vcpu->arch.ivpr = 0x55550000; 1113082decf2SHollis Blanchard for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1114082decf2SHollis Blanchard vcpu->arch.ivor[i] = 0x7700 | i * 4; 1115d9fbd03dSHollis Blanchard 111673e75b41SHollis Blanchard kvmppc_init_timing_stats(vcpu); 111773e75b41SHollis Blanchard 1118af8f38b3SAlexander Graf r = kvmppc_core_vcpu_setup(vcpu); 1119af8f38b3SAlexander Graf kvmppc_sanity_check(vcpu); 1120af8f38b3SAlexander Graf return r; 1121d9fbd03dSHollis Blanchard } 1122d9fbd03dSHollis Blanchard 1123*f61c94bbSBharat Bhushan int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1124*f61c94bbSBharat Bhushan { 1125*f61c94bbSBharat Bhushan /* setup watchdog timer once */ 1126*f61c94bbSBharat Bhushan spin_lock_init(&vcpu->arch.wdt_lock); 1127*f61c94bbSBharat Bhushan setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1128*f61c94bbSBharat Bhushan (unsigned long)vcpu); 1129*f61c94bbSBharat Bhushan 1130*f61c94bbSBharat Bhushan return 0; 1131*f61c94bbSBharat Bhushan } 1132*f61c94bbSBharat Bhushan 1133*f61c94bbSBharat Bhushan void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1134*f61c94bbSBharat Bhushan { 1135*f61c94bbSBharat Bhushan del_timer_sync(&vcpu->arch.wdt_timer); 1136*f61c94bbSBharat Bhushan } 1137*f61c94bbSBharat Bhushan 1138d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1139d9fbd03dSHollis Blanchard { 1140d9fbd03dSHollis Blanchard int i; 1141d9fbd03dSHollis Blanchard 1142d9fbd03dSHollis Blanchard regs->pc = vcpu->arch.pc; 1143992b5b29SAlexander Graf regs->cr = kvmppc_get_cr(vcpu); 1144d9fbd03dSHollis Blanchard regs->ctr = vcpu->arch.ctr; 1145d9fbd03dSHollis Blanchard regs->lr = vcpu->arch.lr; 1146992b5b29SAlexander Graf regs->xer = kvmppc_get_xer(vcpu); 1147666e7252SAlexander Graf regs->msr = vcpu->arch.shared->msr; 1148de7906c3SAlexander Graf regs->srr0 = vcpu->arch.shared->srr0; 1149de7906c3SAlexander Graf regs->srr1 = vcpu->arch.shared->srr1; 1150d9fbd03dSHollis Blanchard regs->pid = vcpu->arch.pid; 1151a73a9599SAlexander Graf regs->sprg0 = vcpu->arch.shared->sprg0; 1152a73a9599SAlexander Graf regs->sprg1 = vcpu->arch.shared->sprg1; 1153a73a9599SAlexander Graf regs->sprg2 = vcpu->arch.shared->sprg2; 1154a73a9599SAlexander Graf regs->sprg3 = vcpu->arch.shared->sprg3; 1155b5904972SScott Wood regs->sprg4 = vcpu->arch.shared->sprg4; 1156b5904972SScott Wood regs->sprg5 = vcpu->arch.shared->sprg5; 1157b5904972SScott Wood regs->sprg6 = vcpu->arch.shared->sprg6; 1158b5904972SScott Wood regs->sprg7 = vcpu->arch.shared->sprg7; 1159d9fbd03dSHollis Blanchard 1160d9fbd03dSHollis Blanchard for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 11618e5b26b5SAlexander Graf regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1162d9fbd03dSHollis Blanchard 1163d9fbd03dSHollis Blanchard return 0; 1164d9fbd03dSHollis Blanchard } 1165d9fbd03dSHollis Blanchard 1166d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1167d9fbd03dSHollis Blanchard { 1168d9fbd03dSHollis Blanchard int i; 1169d9fbd03dSHollis Blanchard 1170d9fbd03dSHollis Blanchard vcpu->arch.pc = regs->pc; 1171992b5b29SAlexander Graf kvmppc_set_cr(vcpu, regs->cr); 1172d9fbd03dSHollis Blanchard vcpu->arch.ctr = regs->ctr; 1173d9fbd03dSHollis Blanchard vcpu->arch.lr = regs->lr; 1174992b5b29SAlexander Graf kvmppc_set_xer(vcpu, regs->xer); 1175b8fd68acSHollis Blanchard kvmppc_set_msr(vcpu, regs->msr); 1176de7906c3SAlexander Graf vcpu->arch.shared->srr0 = regs->srr0; 1177de7906c3SAlexander Graf vcpu->arch.shared->srr1 = regs->srr1; 11785ce941eeSScott Wood kvmppc_set_pid(vcpu, regs->pid); 1179a73a9599SAlexander Graf vcpu->arch.shared->sprg0 = regs->sprg0; 1180a73a9599SAlexander Graf vcpu->arch.shared->sprg1 = regs->sprg1; 1181a73a9599SAlexander Graf vcpu->arch.shared->sprg2 = regs->sprg2; 1182a73a9599SAlexander Graf vcpu->arch.shared->sprg3 = regs->sprg3; 1183b5904972SScott Wood vcpu->arch.shared->sprg4 = regs->sprg4; 1184b5904972SScott Wood vcpu->arch.shared->sprg5 = regs->sprg5; 1185b5904972SScott Wood vcpu->arch.shared->sprg6 = regs->sprg6; 1186b5904972SScott Wood vcpu->arch.shared->sprg7 = regs->sprg7; 1187d9fbd03dSHollis Blanchard 11888e5b26b5SAlexander Graf for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 11898e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1190d9fbd03dSHollis Blanchard 1191d9fbd03dSHollis Blanchard return 0; 1192d9fbd03dSHollis Blanchard } 1193d9fbd03dSHollis Blanchard 11945ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu, 11955ce941eeSScott Wood struct kvm_sregs *sregs) 11965ce941eeSScott Wood { 11975ce941eeSScott Wood u64 tb = get_tb(); 11985ce941eeSScott Wood 11995ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_BASE; 12005ce941eeSScott Wood 12015ce941eeSScott Wood sregs->u.e.csrr0 = vcpu->arch.csrr0; 12025ce941eeSScott Wood sregs->u.e.csrr1 = vcpu->arch.csrr1; 12035ce941eeSScott Wood sregs->u.e.mcsr = vcpu->arch.mcsr; 1204d30f6e48SScott Wood sregs->u.e.esr = get_guest_esr(vcpu); 1205d30f6e48SScott Wood sregs->u.e.dear = get_guest_dear(vcpu); 12065ce941eeSScott Wood sregs->u.e.tsr = vcpu->arch.tsr; 12075ce941eeSScott Wood sregs->u.e.tcr = vcpu->arch.tcr; 12085ce941eeSScott Wood sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 12095ce941eeSScott Wood sregs->u.e.tb = tb; 12105ce941eeSScott Wood sregs->u.e.vrsave = vcpu->arch.vrsave; 12115ce941eeSScott Wood } 12125ce941eeSScott Wood 12135ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu, 12145ce941eeSScott Wood struct kvm_sregs *sregs) 12155ce941eeSScott Wood { 12165ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 12175ce941eeSScott Wood return 0; 12185ce941eeSScott Wood 12195ce941eeSScott Wood vcpu->arch.csrr0 = sregs->u.e.csrr0; 12205ce941eeSScott Wood vcpu->arch.csrr1 = sregs->u.e.csrr1; 12215ce941eeSScott Wood vcpu->arch.mcsr = sregs->u.e.mcsr; 1222d30f6e48SScott Wood set_guest_esr(vcpu, sregs->u.e.esr); 1223d30f6e48SScott Wood set_guest_dear(vcpu, sregs->u.e.dear); 12245ce941eeSScott Wood vcpu->arch.vrsave = sregs->u.e.vrsave; 1225dfd4d47eSScott Wood kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 12265ce941eeSScott Wood 1227dfd4d47eSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 12285ce941eeSScott Wood vcpu->arch.dec = sregs->u.e.dec; 12295ce941eeSScott Wood kvmppc_emulate_dec(vcpu); 1230dfd4d47eSScott Wood } 12315ce941eeSScott Wood 12325ce941eeSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) { 1233*f61c94bbSBharat Bhushan u32 old_tsr = vcpu->arch.tsr; 1234*f61c94bbSBharat Bhushan 1235dfd4d47eSScott Wood vcpu->arch.tsr = sregs->u.e.tsr; 1236*f61c94bbSBharat Bhushan 1237*f61c94bbSBharat Bhushan if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1238*f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 1239*f61c94bbSBharat Bhushan 1240dfd4d47eSScott Wood update_timer_ints(vcpu); 12415ce941eeSScott Wood } 12425ce941eeSScott Wood 12435ce941eeSScott Wood return 0; 12445ce941eeSScott Wood } 12455ce941eeSScott Wood 12465ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu, 12475ce941eeSScott Wood struct kvm_sregs *sregs) 12485ce941eeSScott Wood { 12495ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_ARCH206; 12505ce941eeSScott Wood 1251841741f2SScott Wood sregs->u.e.pir = vcpu->vcpu_id; 12525ce941eeSScott Wood sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 12535ce941eeSScott Wood sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 12545ce941eeSScott Wood sregs->u.e.decar = vcpu->arch.decar; 12555ce941eeSScott Wood sregs->u.e.ivpr = vcpu->arch.ivpr; 12565ce941eeSScott Wood } 12575ce941eeSScott Wood 12585ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu, 12595ce941eeSScott Wood struct kvm_sregs *sregs) 12605ce941eeSScott Wood { 12615ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 12625ce941eeSScott Wood return 0; 12635ce941eeSScott Wood 1264841741f2SScott Wood if (sregs->u.e.pir != vcpu->vcpu_id) 12655ce941eeSScott Wood return -EINVAL; 12665ce941eeSScott Wood 12675ce941eeSScott Wood vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 12685ce941eeSScott Wood vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 12695ce941eeSScott Wood vcpu->arch.decar = sregs->u.e.decar; 12705ce941eeSScott Wood vcpu->arch.ivpr = sregs->u.e.ivpr; 12715ce941eeSScott Wood 12725ce941eeSScott Wood return 0; 12735ce941eeSScott Wood } 12745ce941eeSScott Wood 12755ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 12765ce941eeSScott Wood { 12775ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_IVOR; 12785ce941eeSScott Wood 12795ce941eeSScott Wood sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 12805ce941eeSScott Wood sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 12815ce941eeSScott Wood sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 12825ce941eeSScott Wood sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 12835ce941eeSScott Wood sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 12845ce941eeSScott Wood sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 12855ce941eeSScott Wood sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 12865ce941eeSScott Wood sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 12875ce941eeSScott Wood sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 12885ce941eeSScott Wood sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 12895ce941eeSScott Wood sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 12905ce941eeSScott Wood sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 12915ce941eeSScott Wood sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 12925ce941eeSScott Wood sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 12935ce941eeSScott Wood sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 12945ce941eeSScott Wood sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 12955ce941eeSScott Wood } 12965ce941eeSScott Wood 12975ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 12985ce941eeSScott Wood { 12995ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 13005ce941eeSScott Wood return 0; 13015ce941eeSScott Wood 13025ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 13035ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 13045ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 13055ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 13065ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 13075ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 13085ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 13095ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 13105ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 13115ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 13125ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 13135ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 13145ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 13155ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 13165ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 13175ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 13185ce941eeSScott Wood 13195ce941eeSScott Wood return 0; 13205ce941eeSScott Wood } 13215ce941eeSScott Wood 1322d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1323d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 1324d9fbd03dSHollis Blanchard { 13255ce941eeSScott Wood sregs->pvr = vcpu->arch.pvr; 13265ce941eeSScott Wood 13275ce941eeSScott Wood get_sregs_base(vcpu, sregs); 13285ce941eeSScott Wood get_sregs_arch206(vcpu, sregs); 13295ce941eeSScott Wood kvmppc_core_get_sregs(vcpu, sregs); 13305ce941eeSScott Wood return 0; 1331d9fbd03dSHollis Blanchard } 1332d9fbd03dSHollis Blanchard 1333d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1334d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 1335d9fbd03dSHollis Blanchard { 13365ce941eeSScott Wood int ret; 13375ce941eeSScott Wood 13385ce941eeSScott Wood if (vcpu->arch.pvr != sregs->pvr) 13395ce941eeSScott Wood return -EINVAL; 13405ce941eeSScott Wood 13415ce941eeSScott Wood ret = set_sregs_base(vcpu, sregs); 13425ce941eeSScott Wood if (ret < 0) 13435ce941eeSScott Wood return ret; 13445ce941eeSScott Wood 13455ce941eeSScott Wood ret = set_sregs_arch206(vcpu, sregs); 13465ce941eeSScott Wood if (ret < 0) 13475ce941eeSScott Wood return ret; 13485ce941eeSScott Wood 13495ce941eeSScott Wood return kvmppc_core_set_sregs(vcpu, sregs); 1350d9fbd03dSHollis Blanchard } 1351d9fbd03dSHollis Blanchard 135231f3438eSPaul Mackerras int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 135331f3438eSPaul Mackerras { 135431f3438eSPaul Mackerras return -EINVAL; 135531f3438eSPaul Mackerras } 135631f3438eSPaul Mackerras 135731f3438eSPaul Mackerras int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 135831f3438eSPaul Mackerras { 135931f3438eSPaul Mackerras return -EINVAL; 136031f3438eSPaul Mackerras } 136131f3438eSPaul Mackerras 1362d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1363d9fbd03dSHollis Blanchard { 1364d9fbd03dSHollis Blanchard return -ENOTSUPP; 1365d9fbd03dSHollis Blanchard } 1366d9fbd03dSHollis Blanchard 1367d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1368d9fbd03dSHollis Blanchard { 1369d9fbd03dSHollis Blanchard return -ENOTSUPP; 1370d9fbd03dSHollis Blanchard } 1371d9fbd03dSHollis Blanchard 1372d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1373d9fbd03dSHollis Blanchard struct kvm_translation *tr) 1374d9fbd03dSHollis Blanchard { 137598001d8dSAvi Kivity int r; 137698001d8dSAvi Kivity 137798001d8dSAvi Kivity r = kvmppc_core_vcpu_translate(vcpu, tr); 137898001d8dSAvi Kivity return r; 1379d9fbd03dSHollis Blanchard } 1380d9fbd03dSHollis Blanchard 13814e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 13824e755758SAlexander Graf { 13834e755758SAlexander Graf return -ENOTSUPP; 13844e755758SAlexander Graf } 13854e755758SAlexander Graf 1386f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1387f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 1388f9e0554dSPaul Mackerras { 1389f9e0554dSPaul Mackerras return 0; 1390f9e0554dSPaul Mackerras } 1391f9e0554dSPaul Mackerras 1392f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm, 1393f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 1394f9e0554dSPaul Mackerras { 1395f9e0554dSPaul Mackerras } 1396f9e0554dSPaul Mackerras 1397dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1398dfd4d47eSScott Wood { 1399dfd4d47eSScott Wood vcpu->arch.tcr = new_tcr; 1400*f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 1401dfd4d47eSScott Wood update_timer_ints(vcpu); 1402dfd4d47eSScott Wood } 1403dfd4d47eSScott Wood 1404dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1405dfd4d47eSScott Wood { 1406dfd4d47eSScott Wood set_bits(tsr_bits, &vcpu->arch.tsr); 1407dfd4d47eSScott Wood smp_wmb(); 1408dfd4d47eSScott Wood kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1409dfd4d47eSScott Wood kvm_vcpu_kick(vcpu); 1410dfd4d47eSScott Wood } 1411dfd4d47eSScott Wood 1412dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1413dfd4d47eSScott Wood { 1414dfd4d47eSScott Wood clear_bits(tsr_bits, &vcpu->arch.tsr); 1415*f61c94bbSBharat Bhushan 1416*f61c94bbSBharat Bhushan /* 1417*f61c94bbSBharat Bhushan * We may have stopped the watchdog due to 1418*f61c94bbSBharat Bhushan * being stuck on final expiration. 1419*f61c94bbSBharat Bhushan */ 1420*f61c94bbSBharat Bhushan if (tsr_bits & (TSR_ENW | TSR_WIS)) 1421*f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 1422*f61c94bbSBharat Bhushan 1423dfd4d47eSScott Wood update_timer_ints(vcpu); 1424dfd4d47eSScott Wood } 1425dfd4d47eSScott Wood 1426dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data) 1427dfd4d47eSScott Wood { 1428dfd4d47eSScott Wood struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1429dfd4d47eSScott Wood 143021bd000aSBharat Bhushan if (vcpu->arch.tcr & TCR_ARE) { 143121bd000aSBharat Bhushan vcpu->arch.dec = vcpu->arch.decar; 143221bd000aSBharat Bhushan kvmppc_emulate_dec(vcpu); 143321bd000aSBharat Bhushan } 143421bd000aSBharat Bhushan 1435dfd4d47eSScott Wood kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1436dfd4d47eSScott Wood } 1437dfd4d47eSScott Wood 143894fa9d99SScott Wood void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 143994fa9d99SScott Wood { 1440d30f6e48SScott Wood current->thread.kvm_vcpu = vcpu; 144194fa9d99SScott Wood } 144294fa9d99SScott Wood 144394fa9d99SScott Wood void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 144494fa9d99SScott Wood { 1445d30f6e48SScott Wood current->thread.kvm_vcpu = NULL; 144694fa9d99SScott Wood } 144794fa9d99SScott Wood 14482986b8c7SStephen Rothwell int __init kvmppc_booke_init(void) 1449d9fbd03dSHollis Blanchard { 1450d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 1451d9fbd03dSHollis Blanchard unsigned long ivor[16]; 1452d9fbd03dSHollis Blanchard unsigned long max_ivor = 0; 1453d9fbd03dSHollis Blanchard int i; 1454d9fbd03dSHollis Blanchard 1455d9fbd03dSHollis Blanchard /* We install our own exception handlers by hijacking IVPR. IVPR must 1456d9fbd03dSHollis Blanchard * be 16-bit aligned, so we need a 64KB allocation. */ 1457d9fbd03dSHollis Blanchard kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1458d9fbd03dSHollis Blanchard VCPU_SIZE_ORDER); 1459d9fbd03dSHollis Blanchard if (!kvmppc_booke_handlers) 1460d9fbd03dSHollis Blanchard return -ENOMEM; 1461d9fbd03dSHollis Blanchard 1462d9fbd03dSHollis Blanchard /* XXX make sure our handlers are smaller than Linux's */ 1463d9fbd03dSHollis Blanchard 1464d9fbd03dSHollis Blanchard /* Copy our interrupt handlers to match host IVORs. That way we don't 1465d9fbd03dSHollis Blanchard * have to swap the IVORs on every guest/host transition. */ 1466d9fbd03dSHollis Blanchard ivor[0] = mfspr(SPRN_IVOR0); 1467d9fbd03dSHollis Blanchard ivor[1] = mfspr(SPRN_IVOR1); 1468d9fbd03dSHollis Blanchard ivor[2] = mfspr(SPRN_IVOR2); 1469d9fbd03dSHollis Blanchard ivor[3] = mfspr(SPRN_IVOR3); 1470d9fbd03dSHollis Blanchard ivor[4] = mfspr(SPRN_IVOR4); 1471d9fbd03dSHollis Blanchard ivor[5] = mfspr(SPRN_IVOR5); 1472d9fbd03dSHollis Blanchard ivor[6] = mfspr(SPRN_IVOR6); 1473d9fbd03dSHollis Blanchard ivor[7] = mfspr(SPRN_IVOR7); 1474d9fbd03dSHollis Blanchard ivor[8] = mfspr(SPRN_IVOR8); 1475d9fbd03dSHollis Blanchard ivor[9] = mfspr(SPRN_IVOR9); 1476d9fbd03dSHollis Blanchard ivor[10] = mfspr(SPRN_IVOR10); 1477d9fbd03dSHollis Blanchard ivor[11] = mfspr(SPRN_IVOR11); 1478d9fbd03dSHollis Blanchard ivor[12] = mfspr(SPRN_IVOR12); 1479d9fbd03dSHollis Blanchard ivor[13] = mfspr(SPRN_IVOR13); 1480d9fbd03dSHollis Blanchard ivor[14] = mfspr(SPRN_IVOR14); 1481d9fbd03dSHollis Blanchard ivor[15] = mfspr(SPRN_IVOR15); 1482d9fbd03dSHollis Blanchard 1483d9fbd03dSHollis Blanchard for (i = 0; i < 16; i++) { 1484d9fbd03dSHollis Blanchard if (ivor[i] > max_ivor) 1485d9fbd03dSHollis Blanchard max_ivor = ivor[i]; 1486d9fbd03dSHollis Blanchard 1487d9fbd03dSHollis Blanchard memcpy((void *)kvmppc_booke_handlers + ivor[i], 1488d9fbd03dSHollis Blanchard kvmppc_handlers_start + i * kvmppc_handler_len, 1489d9fbd03dSHollis Blanchard kvmppc_handler_len); 1490d9fbd03dSHollis Blanchard } 1491d9fbd03dSHollis Blanchard flush_icache_range(kvmppc_booke_handlers, 1492d9fbd03dSHollis Blanchard kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); 1493d30f6e48SScott Wood #endif /* !BOOKE_HV */ 1494db93f574SHollis Blanchard return 0; 1495d9fbd03dSHollis Blanchard } 1496d9fbd03dSHollis Blanchard 1497db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void) 1498d9fbd03dSHollis Blanchard { 1499d9fbd03dSHollis Blanchard free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1500d9fbd03dSHollis Blanchard kvm_exit(); 1501d9fbd03dSHollis Blanchard } 1502