1d9fbd03dSHollis Blanchard /* 2d9fbd03dSHollis Blanchard * This program is free software; you can redistribute it and/or modify 3d9fbd03dSHollis Blanchard * it under the terms of the GNU General Public License, version 2, as 4d9fbd03dSHollis Blanchard * published by the Free Software Foundation. 5d9fbd03dSHollis Blanchard * 6d9fbd03dSHollis Blanchard * This program is distributed in the hope that it will be useful, 7d9fbd03dSHollis Blanchard * but WITHOUT ANY WARRANTY; without even the implied warranty of 8d9fbd03dSHollis Blanchard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9d9fbd03dSHollis Blanchard * GNU General Public License for more details. 10d9fbd03dSHollis Blanchard * 11d9fbd03dSHollis Blanchard * You should have received a copy of the GNU General Public License 12d9fbd03dSHollis Blanchard * along with this program; if not, write to the Free Software 13d9fbd03dSHollis Blanchard * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14d9fbd03dSHollis Blanchard * 15d9fbd03dSHollis Blanchard * Copyright IBM Corp. 2007 164cd35f67SScott Wood * Copyright 2010-2011 Freescale Semiconductor, Inc. 17d9fbd03dSHollis Blanchard * 18d9fbd03dSHollis Blanchard * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19d9fbd03dSHollis Blanchard * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20d9fbd03dSHollis Blanchard */ 21d9fbd03dSHollis Blanchard 22d9fbd03dSHollis Blanchard #include <linux/errno.h> 23d9fbd03dSHollis Blanchard #include <linux/err.h> 24d9fbd03dSHollis Blanchard #include <linux/kvm_host.h> 255a0e3ad6STejun Heo #include <linux/gfp.h> 26d9fbd03dSHollis Blanchard #include <linux/module.h> 27d9fbd03dSHollis Blanchard #include <linux/vmalloc.h> 28d9fbd03dSHollis Blanchard #include <linux/fs.h> 297924bd41SHollis Blanchard 30d9fbd03dSHollis Blanchard #include <asm/cputable.h> 31d9fbd03dSHollis Blanchard #include <asm/uaccess.h> 32d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h> 3373e75b41SHollis Blanchard #include "timing.h" 34d9fbd03dSHollis Blanchard #include <asm/cacheflush.h> 35d9fbd03dSHollis Blanchard 3675f74f0dSHollis Blanchard #include "booke.h" 37d9fbd03dSHollis Blanchard 38d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers; 39d9fbd03dSHollis Blanchard 40d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 41d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 42d9fbd03dSHollis Blanchard 43d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = { 44d9fbd03dSHollis Blanchard { "mmio", VCPU_STAT(mmio_exits) }, 45d9fbd03dSHollis Blanchard { "dcr", VCPU_STAT(dcr_exits) }, 46d9fbd03dSHollis Blanchard { "sig", VCPU_STAT(signal_exits) }, 47d9fbd03dSHollis Blanchard { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 48d9fbd03dSHollis Blanchard { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 49d9fbd03dSHollis Blanchard { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 50d9fbd03dSHollis Blanchard { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 51d9fbd03dSHollis Blanchard { "sysc", VCPU_STAT(syscall_exits) }, 52d9fbd03dSHollis Blanchard { "isi", VCPU_STAT(isi_exits) }, 53d9fbd03dSHollis Blanchard { "dsi", VCPU_STAT(dsi_exits) }, 54d9fbd03dSHollis Blanchard { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 55d9fbd03dSHollis Blanchard { "dec", VCPU_STAT(dec_exits) }, 56d9fbd03dSHollis Blanchard { "ext_intr", VCPU_STAT(ext_intr_exits) }, 57d9fbd03dSHollis Blanchard { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 58d9fbd03dSHollis Blanchard { NULL } 59d9fbd03dSHollis Blanchard }; 60d9fbd03dSHollis Blanchard 61d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */ 62d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 63d9fbd03dSHollis Blanchard { 64d9fbd03dSHollis Blanchard int i; 65d9fbd03dSHollis Blanchard 66666e7252SAlexander Graf printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 675cf8ca22SHollis Blanchard printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 68de7906c3SAlexander Graf printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 69de7906c3SAlexander Graf vcpu->arch.shared->srr1); 70d9fbd03dSHollis Blanchard 71d9fbd03dSHollis Blanchard printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 72d9fbd03dSHollis Blanchard 73d9fbd03dSHollis Blanchard for (i = 0; i < 32; i += 4) { 745cf8ca22SHollis Blanchard printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 758e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i), 768e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+1), 778e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+2), 788e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+3)); 79d9fbd03dSHollis Blanchard } 80d9fbd03dSHollis Blanchard } 81d9fbd03dSHollis Blanchard 824cd35f67SScott Wood #ifdef CONFIG_SPE 834cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 844cd35f67SScott Wood { 854cd35f67SScott Wood preempt_disable(); 864cd35f67SScott Wood enable_kernel_spe(); 874cd35f67SScott Wood kvmppc_save_guest_spe(vcpu); 884cd35f67SScott Wood vcpu->arch.shadow_msr &= ~MSR_SPE; 894cd35f67SScott Wood preempt_enable(); 904cd35f67SScott Wood } 914cd35f67SScott Wood 924cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 934cd35f67SScott Wood { 944cd35f67SScott Wood preempt_disable(); 954cd35f67SScott Wood enable_kernel_spe(); 964cd35f67SScott Wood kvmppc_load_guest_spe(vcpu); 974cd35f67SScott Wood vcpu->arch.shadow_msr |= MSR_SPE; 984cd35f67SScott Wood preempt_enable(); 994cd35f67SScott Wood } 1004cd35f67SScott Wood 1014cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1024cd35f67SScott Wood { 1034cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) { 1044cd35f67SScott Wood if (!(vcpu->arch.shadow_msr & MSR_SPE)) 1054cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 1064cd35f67SScott Wood } else if (vcpu->arch.shadow_msr & MSR_SPE) { 1074cd35f67SScott Wood kvmppc_vcpu_disable_spe(vcpu); 1084cd35f67SScott Wood } 1094cd35f67SScott Wood } 1104cd35f67SScott Wood #else 1114cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1124cd35f67SScott Wood { 1134cd35f67SScott Wood } 1144cd35f67SScott Wood #endif 1154cd35f67SScott Wood 116dd9ebf1fSLiu Yu /* 117dd9ebf1fSLiu Yu * Helper function for "full" MSR writes. No need to call this if only 118dd9ebf1fSLiu Yu * EE/CE/ME/DE/RI are changing. 119dd9ebf1fSLiu Yu */ 1204cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 1214cd35f67SScott Wood { 122dd9ebf1fSLiu Yu u32 old_msr = vcpu->arch.shared->msr; 1234cd35f67SScott Wood 1244cd35f67SScott Wood vcpu->arch.shared->msr = new_msr; 1254cd35f67SScott Wood 126dd9ebf1fSLiu Yu kvmppc_mmu_msr_notify(vcpu, old_msr); 1274cd35f67SScott Wood kvmppc_vcpu_sync_spe(vcpu); 1284cd35f67SScott Wood } 1294cd35f67SScott Wood 130d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 131d4cf3892SHollis Blanchard unsigned int priority) 1329dd921cfSHollis Blanchard { 1339dd921cfSHollis Blanchard set_bit(priority, &vcpu->arch.pending_exceptions); 1349dd921cfSHollis Blanchard } 1359dd921cfSHollis Blanchard 136daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 137daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 1389dd921cfSHollis Blanchard { 139daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 140daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 141daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 142daf5e271SLiu Yu } 143daf5e271SLiu Yu 144daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 145daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 146daf5e271SLiu Yu { 147daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 148daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 149daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 150daf5e271SLiu Yu } 151daf5e271SLiu Yu 152daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 153daf5e271SLiu Yu ulong esr_flags) 154daf5e271SLiu Yu { 155daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 156daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 157daf5e271SLiu Yu } 158daf5e271SLiu Yu 159daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 160daf5e271SLiu Yu { 161daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 162d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 1639dd921cfSHollis Blanchard } 1649dd921cfSHollis Blanchard 1659dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 1669dd921cfSHollis Blanchard { 167d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 1689dd921cfSHollis Blanchard } 1699dd921cfSHollis Blanchard 1709dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 1719dd921cfSHollis Blanchard { 172d4cf3892SHollis Blanchard return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1739dd921cfSHollis Blanchard } 1749dd921cfSHollis Blanchard 1757706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 1767706664dSAlexander Graf { 1777706664dSAlexander Graf clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1787706664dSAlexander Graf } 1797706664dSAlexander Graf 1809dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 1819dd921cfSHollis Blanchard struct kvm_interrupt *irq) 1829dd921cfSHollis Blanchard { 183c5335f17SAlexander Graf unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 184c5335f17SAlexander Graf 185c5335f17SAlexander Graf if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 186c5335f17SAlexander Graf prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 187c5335f17SAlexander Graf 188c5335f17SAlexander Graf kvmppc_booke_queue_irqprio(vcpu, prio); 1899dd921cfSHollis Blanchard } 1909dd921cfSHollis Blanchard 1914496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, 1924496f974SAlexander Graf struct kvm_interrupt *irq) 1934496f974SAlexander Graf { 1944496f974SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 195c5335f17SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 1964496f974SAlexander Graf } 1974496f974SAlexander Graf 198d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */ 199d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 200d4cf3892SHollis Blanchard unsigned int priority) 201d9fbd03dSHollis Blanchard { 202d4cf3892SHollis Blanchard int allowed = 0; 2036045be5dSAsias He ulong uninitialized_var(msr_mask); 204daf5e271SLiu Yu bool update_esr = false, update_dear = false; 2055c6cedf4SAlexander Graf ulong crit_raw = vcpu->arch.shared->critical; 2065c6cedf4SAlexander Graf ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 2075c6cedf4SAlexander Graf bool crit; 208c5335f17SAlexander Graf bool keep_irq = false; 2095c6cedf4SAlexander Graf 2105c6cedf4SAlexander Graf /* Truncate crit indicators in 32 bit mode */ 2115c6cedf4SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_SF)) { 2125c6cedf4SAlexander Graf crit_raw &= 0xffffffff; 2135c6cedf4SAlexander Graf crit_r1 &= 0xffffffff; 2145c6cedf4SAlexander Graf } 2155c6cedf4SAlexander Graf 2165c6cedf4SAlexander Graf /* Critical section when crit == r1 */ 2175c6cedf4SAlexander Graf crit = (crit_raw == crit_r1); 2185c6cedf4SAlexander Graf /* ... and we're in supervisor mode */ 2195c6cedf4SAlexander Graf crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 220d9fbd03dSHollis Blanchard 221c5335f17SAlexander Graf if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 222c5335f17SAlexander Graf priority = BOOKE_IRQPRIO_EXTERNAL; 223c5335f17SAlexander Graf keep_irq = true; 224c5335f17SAlexander Graf } 225c5335f17SAlexander Graf 226d4cf3892SHollis Blanchard switch (priority) { 227d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DTLB_MISS: 228daf5e271SLiu Yu case BOOKE_IRQPRIO_DATA_STORAGE: 229daf5e271SLiu Yu update_dear = true; 230daf5e271SLiu Yu /* fall through */ 231daf5e271SLiu Yu case BOOKE_IRQPRIO_INST_STORAGE: 232daf5e271SLiu Yu case BOOKE_IRQPRIO_PROGRAM: 233daf5e271SLiu Yu update_esr = true; 234daf5e271SLiu Yu /* fall through */ 235d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ITLB_MISS: 236d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_SYSCALL: 237d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FP_UNAVAIL: 238bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_UNAVAIL: 239bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_DATA: 240bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_ROUND: 241d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_AP_UNAVAIL: 242d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ALIGNMENT: 243d4cf3892SHollis Blanchard allowed = 1; 244d4cf3892SHollis Blanchard msr_mask = MSR_CE|MSR_ME|MSR_DE; 245d9fbd03dSHollis Blanchard break; 246d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_CRITICAL: 247d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_WATCHDOG: 248666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_CE; 249d4cf3892SHollis Blanchard msr_mask = MSR_ME; 250d9fbd03dSHollis Blanchard break; 251d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_MACHINE_CHECK: 252666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_ME; 253d4cf3892SHollis Blanchard msr_mask = 0; 254d9fbd03dSHollis Blanchard break; 255d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DECREMENTER: 256d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FIT: 257*dfd4d47eSScott Wood keep_irq = true; 258*dfd4d47eSScott Wood /* fall through */ 259*dfd4d47eSScott Wood case BOOKE_IRQPRIO_EXTERNAL: 260666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_EE; 2615c6cedf4SAlexander Graf allowed = allowed && !crit; 262d4cf3892SHollis Blanchard msr_mask = MSR_CE|MSR_ME|MSR_DE; 263d9fbd03dSHollis Blanchard break; 264d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DEBUG: 265666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_DE; 266d4cf3892SHollis Blanchard msr_mask = MSR_ME; 267d9fbd03dSHollis Blanchard break; 268d9fbd03dSHollis Blanchard } 269d9fbd03dSHollis Blanchard 270d4cf3892SHollis Blanchard if (allowed) { 271de7906c3SAlexander Graf vcpu->arch.shared->srr0 = vcpu->arch.pc; 272de7906c3SAlexander Graf vcpu->arch.shared->srr1 = vcpu->arch.shared->msr; 273d4cf3892SHollis Blanchard vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 274daf5e271SLiu Yu if (update_esr == true) 275b5904972SScott Wood vcpu->arch.shared->esr = vcpu->arch.queued_esr; 276daf5e271SLiu Yu if (update_dear == true) 2775e030186SAlexander Graf vcpu->arch.shared->dar = vcpu->arch.queued_dear; 278666e7252SAlexander Graf kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask); 279d4cf3892SHollis Blanchard 280c5335f17SAlexander Graf if (!keep_irq) 281d4cf3892SHollis Blanchard clear_bit(priority, &vcpu->arch.pending_exceptions); 282d4cf3892SHollis Blanchard } 283d4cf3892SHollis Blanchard 284d4cf3892SHollis Blanchard return allowed; 285d9fbd03dSHollis Blanchard } 286d9fbd03dSHollis Blanchard 287*dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu) 288*dfd4d47eSScott Wood { 289*dfd4d47eSScott Wood if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 290*dfd4d47eSScott Wood kvmppc_core_queue_dec(vcpu); 291*dfd4d47eSScott Wood else 292*dfd4d47eSScott Wood kvmppc_core_dequeue_dec(vcpu); 293*dfd4d47eSScott Wood } 294*dfd4d47eSScott Wood 295c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 296d9fbd03dSHollis Blanchard { 297d9fbd03dSHollis Blanchard unsigned long *pending = &vcpu->arch.pending_exceptions; 298d9fbd03dSHollis Blanchard unsigned int priority; 299d9fbd03dSHollis Blanchard 300*dfd4d47eSScott Wood if (vcpu->requests) { 301*dfd4d47eSScott Wood if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) { 302*dfd4d47eSScott Wood smp_mb(); 303*dfd4d47eSScott Wood update_timer_ints(vcpu); 304*dfd4d47eSScott Wood } 305*dfd4d47eSScott Wood } 306*dfd4d47eSScott Wood 3079ab80843SHollis Blanchard priority = __ffs(*pending); 308bdc89f13SHollis Blanchard while (priority <= BOOKE_IRQPRIO_MAX) { 309d4cf3892SHollis Blanchard if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 310d9fbd03dSHollis Blanchard break; 311d9fbd03dSHollis Blanchard 312d9fbd03dSHollis Blanchard priority = find_next_bit(pending, 313d9fbd03dSHollis Blanchard BITS_PER_BYTE * sizeof(*pending), 314d9fbd03dSHollis Blanchard priority + 1); 315d9fbd03dSHollis Blanchard } 31690bba358SAlexander Graf 31790bba358SAlexander Graf /* Tell the guest about our interrupt status */ 31829ac26efSScott Wood vcpu->arch.shared->int_pending = !!*pending; 319d9fbd03dSHollis Blanchard } 320d9fbd03dSHollis Blanchard 321c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */ 322c59a6a3eSScott Wood void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 323c59a6a3eSScott Wood { 324c59a6a3eSScott Wood WARN_ON_ONCE(!irqs_disabled()); 325c59a6a3eSScott Wood 326c59a6a3eSScott Wood kvmppc_core_check_exceptions(vcpu); 327c59a6a3eSScott Wood 328c59a6a3eSScott Wood if (vcpu->arch.shared->msr & MSR_WE) { 329c59a6a3eSScott Wood local_irq_enable(); 330c59a6a3eSScott Wood kvm_vcpu_block(vcpu); 331c59a6a3eSScott Wood local_irq_disable(); 332c59a6a3eSScott Wood 333c59a6a3eSScott Wood kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 334c59a6a3eSScott Wood kvmppc_core_check_exceptions(vcpu); 335c59a6a3eSScott Wood }; 336c59a6a3eSScott Wood } 337c59a6a3eSScott Wood 338df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 339df6909e5SPaul Mackerras { 340df6909e5SPaul Mackerras int ret; 341df6909e5SPaul Mackerras 342af8f38b3SAlexander Graf if (!vcpu->arch.sane) { 343af8f38b3SAlexander Graf kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 344af8f38b3SAlexander Graf return -EINVAL; 345af8f38b3SAlexander Graf } 346af8f38b3SAlexander Graf 347df6909e5SPaul Mackerras local_irq_disable(); 3481d1ef222SScott Wood 34925051b5aSScott Wood kvmppc_core_prepare_to_enter(vcpu); 35025051b5aSScott Wood 3511d1ef222SScott Wood if (signal_pending(current)) { 3521d1ef222SScott Wood kvm_run->exit_reason = KVM_EXIT_INTR; 3531d1ef222SScott Wood ret = -EINTR; 3541d1ef222SScott Wood goto out; 3551d1ef222SScott Wood } 3561d1ef222SScott Wood 357df6909e5SPaul Mackerras kvm_guest_enter(); 358df6909e5SPaul Mackerras ret = __kvmppc_vcpu_run(kvm_run, vcpu); 359df6909e5SPaul Mackerras kvm_guest_exit(); 360df6909e5SPaul Mackerras 3611d1ef222SScott Wood out: 3621d1ef222SScott Wood local_irq_enable(); 363df6909e5SPaul Mackerras return ret; 364df6909e5SPaul Mackerras } 365df6909e5SPaul Mackerras 366d9fbd03dSHollis Blanchard /** 367d9fbd03dSHollis Blanchard * kvmppc_handle_exit 368d9fbd03dSHollis Blanchard * 369d9fbd03dSHollis Blanchard * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 370d9fbd03dSHollis Blanchard */ 371d9fbd03dSHollis Blanchard int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 372d9fbd03dSHollis Blanchard unsigned int exit_nr) 373d9fbd03dSHollis Blanchard { 374d9fbd03dSHollis Blanchard enum emulation_result er; 375d9fbd03dSHollis Blanchard int r = RESUME_HOST; 376d9fbd03dSHollis Blanchard 37773e75b41SHollis Blanchard /* update before a new last_exit_type is rewritten */ 37873e75b41SHollis Blanchard kvmppc_update_timing_stats(vcpu); 37973e75b41SHollis Blanchard 380d9fbd03dSHollis Blanchard local_irq_enable(); 381d9fbd03dSHollis Blanchard 382d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_UNKNOWN; 383d9fbd03dSHollis Blanchard run->ready_for_interrupt_injection = 1; 384d9fbd03dSHollis Blanchard 385d9fbd03dSHollis Blanchard switch (exit_nr) { 386d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_MACHINE_CHECK: 387d9fbd03dSHollis Blanchard printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 388d9fbd03dSHollis Blanchard kvmppc_dump_vcpu(vcpu); 389d9fbd03dSHollis Blanchard r = RESUME_HOST; 390d9fbd03dSHollis Blanchard break; 391d9fbd03dSHollis Blanchard 392d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_EXTERNAL: 3937b701591SHollis Blanchard kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 3941b6766c7SHollis Blanchard if (need_resched()) 3951b6766c7SHollis Blanchard cond_resched(); 3961b6766c7SHollis Blanchard r = RESUME_GUEST; 3971b6766c7SHollis Blanchard break; 3981b6766c7SHollis Blanchard 399d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DECREMENTER: 400d9fbd03dSHollis Blanchard /* Since we switched IVPR back to the host's value, the host 401d9fbd03dSHollis Blanchard * handled this interrupt the moment we enabled interrupts. 402d9fbd03dSHollis Blanchard * Now we just offer it a chance to reschedule the guest. */ 4037b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEC_EXITS); 404d9fbd03dSHollis Blanchard if (need_resched()) 405d9fbd03dSHollis Blanchard cond_resched(); 406d9fbd03dSHollis Blanchard r = RESUME_GUEST; 407d9fbd03dSHollis Blanchard break; 408d9fbd03dSHollis Blanchard 409d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_PROGRAM: 410666e7252SAlexander Graf if (vcpu->arch.shared->msr & MSR_PR) { 411d9fbd03dSHollis Blanchard /* Program traps generated by user-level software must be handled 412d9fbd03dSHollis Blanchard * by the guest kernel. */ 413daf5e271SLiu Yu kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 414d9fbd03dSHollis Blanchard r = RESUME_GUEST; 4157b701591SHollis Blanchard kvmppc_account_exit(vcpu, USR_PR_INST); 416d9fbd03dSHollis Blanchard break; 417d9fbd03dSHollis Blanchard } 418d9fbd03dSHollis Blanchard 419d9fbd03dSHollis Blanchard er = kvmppc_emulate_instruction(run, vcpu); 420d9fbd03dSHollis Blanchard switch (er) { 421d9fbd03dSHollis Blanchard case EMULATE_DONE: 42273e75b41SHollis Blanchard /* don't overwrite subtypes, just account kvm_stats */ 4237b701591SHollis Blanchard kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 424d9fbd03dSHollis Blanchard /* Future optimization: only reload non-volatiles if 425d9fbd03dSHollis Blanchard * they were actually modified by emulation. */ 426d9fbd03dSHollis Blanchard r = RESUME_GUEST_NV; 427d9fbd03dSHollis Blanchard break; 428d9fbd03dSHollis Blanchard case EMULATE_DO_DCR: 429d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DCR; 430d9fbd03dSHollis Blanchard r = RESUME_HOST; 431d9fbd03dSHollis Blanchard break; 432d9fbd03dSHollis Blanchard case EMULATE_FAIL: 433d9fbd03dSHollis Blanchard /* XXX Deliver Program interrupt to guest. */ 4345cf8ca22SHollis Blanchard printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 435d9fbd03dSHollis Blanchard __func__, vcpu->arch.pc, vcpu->arch.last_inst); 436d9fbd03dSHollis Blanchard /* For debugging, encode the failing instruction and 437d9fbd03dSHollis Blanchard * report it to userspace. */ 438d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason = ~0ULL << 32; 439d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 440d9fbd03dSHollis Blanchard r = RESUME_HOST; 441d9fbd03dSHollis Blanchard break; 442d9fbd03dSHollis Blanchard default: 443d9fbd03dSHollis Blanchard BUG(); 444d9fbd03dSHollis Blanchard } 445d9fbd03dSHollis Blanchard break; 446d9fbd03dSHollis Blanchard 447d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_FP_UNAVAIL: 448d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 4497b701591SHollis Blanchard kvmppc_account_exit(vcpu, FP_UNAVAIL); 450d9fbd03dSHollis Blanchard r = RESUME_GUEST; 451d9fbd03dSHollis Blanchard break; 452d9fbd03dSHollis Blanchard 4534cd35f67SScott Wood #ifdef CONFIG_SPE 4544cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: { 4554cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) 4564cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 4574cd35f67SScott Wood else 4584cd35f67SScott Wood kvmppc_booke_queue_irqprio(vcpu, 4594cd35f67SScott Wood BOOKE_IRQPRIO_SPE_UNAVAIL); 460bb3a8a17SHollis Blanchard r = RESUME_GUEST; 461bb3a8a17SHollis Blanchard break; 4624cd35f67SScott Wood } 463bb3a8a17SHollis Blanchard 464bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_DATA: 465bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 466bb3a8a17SHollis Blanchard r = RESUME_GUEST; 467bb3a8a17SHollis Blanchard break; 468bb3a8a17SHollis Blanchard 469bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_ROUND: 470bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 471bb3a8a17SHollis Blanchard r = RESUME_GUEST; 472bb3a8a17SHollis Blanchard break; 4734cd35f67SScott Wood #else 4744cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: 4754cd35f67SScott Wood /* 4764cd35f67SScott Wood * Guest wants SPE, but host kernel doesn't support it. Send 4774cd35f67SScott Wood * an "unimplemented operation" program check to the guest. 4784cd35f67SScott Wood */ 4794cd35f67SScott Wood kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 4804cd35f67SScott Wood r = RESUME_GUEST; 4814cd35f67SScott Wood break; 4824cd35f67SScott Wood 4834cd35f67SScott Wood /* 4844cd35f67SScott Wood * These really should never happen without CONFIG_SPE, 4854cd35f67SScott Wood * as we should never enable the real MSR[SPE] in the guest. 4864cd35f67SScott Wood */ 4874cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_DATA: 4884cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_ROUND: 4894cd35f67SScott Wood printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 4904cd35f67SScott Wood __func__, exit_nr, vcpu->arch.pc); 4914cd35f67SScott Wood run->hw.hardware_exit_reason = exit_nr; 4924cd35f67SScott Wood r = RESUME_HOST; 4934cd35f67SScott Wood break; 4944cd35f67SScott Wood #endif 495bb3a8a17SHollis Blanchard 496d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DATA_STORAGE: 497daf5e271SLiu Yu kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 498daf5e271SLiu Yu vcpu->arch.fault_esr); 4997b701591SHollis Blanchard kvmppc_account_exit(vcpu, DSI_EXITS); 500d9fbd03dSHollis Blanchard r = RESUME_GUEST; 501d9fbd03dSHollis Blanchard break; 502d9fbd03dSHollis Blanchard 503d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_INST_STORAGE: 504daf5e271SLiu Yu kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 5057b701591SHollis Blanchard kvmppc_account_exit(vcpu, ISI_EXITS); 506d9fbd03dSHollis Blanchard r = RESUME_GUEST; 507d9fbd03dSHollis Blanchard break; 508d9fbd03dSHollis Blanchard 509d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_SYSCALL: 5102a342ed5SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_PR) && 5112a342ed5SAlexander Graf (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 5122a342ed5SAlexander Graf /* KVM PV hypercalls */ 5132a342ed5SAlexander Graf kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 5142a342ed5SAlexander Graf r = RESUME_GUEST; 5152a342ed5SAlexander Graf } else { 5162a342ed5SAlexander Graf /* Guest syscalls */ 517d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 5182a342ed5SAlexander Graf } 5197b701591SHollis Blanchard kvmppc_account_exit(vcpu, SYSCALL_EXITS); 520d9fbd03dSHollis Blanchard r = RESUME_GUEST; 521d9fbd03dSHollis Blanchard break; 522d9fbd03dSHollis Blanchard 523d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DTLB_MISS: { 524d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.fault_dear; 5257924bd41SHollis Blanchard int gtlb_index; 526475e7cddSHollis Blanchard gpa_t gpaddr; 527d9fbd03dSHollis Blanchard gfn_t gfn; 528d9fbd03dSHollis Blanchard 529a4cd8b23SScott Wood #ifdef CONFIG_KVM_E500 530a4cd8b23SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR) && 531a4cd8b23SScott Wood (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 532a4cd8b23SScott Wood kvmppc_map_magic(vcpu); 533a4cd8b23SScott Wood kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 534a4cd8b23SScott Wood r = RESUME_GUEST; 535a4cd8b23SScott Wood 536a4cd8b23SScott Wood break; 537a4cd8b23SScott Wood } 538a4cd8b23SScott Wood #endif 539a4cd8b23SScott Wood 540d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 541fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 5427924bd41SHollis Blanchard if (gtlb_index < 0) { 543d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 544daf5e271SLiu Yu kvmppc_core_queue_dtlb_miss(vcpu, 545daf5e271SLiu Yu vcpu->arch.fault_dear, 546daf5e271SLiu Yu vcpu->arch.fault_esr); 547b52a638cSHollis Blanchard kvmppc_mmu_dtlb_miss(vcpu); 5487b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 549d9fbd03dSHollis Blanchard r = RESUME_GUEST; 550d9fbd03dSHollis Blanchard break; 551d9fbd03dSHollis Blanchard } 552d9fbd03dSHollis Blanchard 553be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 554475e7cddSHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 555d9fbd03dSHollis Blanchard 556d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 557d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 558d9fbd03dSHollis Blanchard * didn't, and it is RAM. This could be because: 559d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 560d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 561d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 562d9fbd03dSHollis Blanchard * invoking the guest. */ 56358a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 5647b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 565d9fbd03dSHollis Blanchard r = RESUME_GUEST; 566d9fbd03dSHollis Blanchard } else { 567d9fbd03dSHollis Blanchard /* Guest has mapped and accessed a page which is not 568d9fbd03dSHollis Blanchard * actually RAM. */ 569475e7cddSHollis Blanchard vcpu->arch.paddr_accessed = gpaddr; 570d9fbd03dSHollis Blanchard r = kvmppc_emulate_mmio(run, vcpu); 5717b701591SHollis Blanchard kvmppc_account_exit(vcpu, MMIO_EXITS); 572d9fbd03dSHollis Blanchard } 573d9fbd03dSHollis Blanchard 574d9fbd03dSHollis Blanchard break; 575d9fbd03dSHollis Blanchard } 576d9fbd03dSHollis Blanchard 577d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_ITLB_MISS: { 578d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.pc; 57989168618SHollis Blanchard gpa_t gpaddr; 580d9fbd03dSHollis Blanchard gfn_t gfn; 5817924bd41SHollis Blanchard int gtlb_index; 582d9fbd03dSHollis Blanchard 583d9fbd03dSHollis Blanchard r = RESUME_GUEST; 584d9fbd03dSHollis Blanchard 585d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 586fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 5877924bd41SHollis Blanchard if (gtlb_index < 0) { 588d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 589d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 590b52a638cSHollis Blanchard kvmppc_mmu_itlb_miss(vcpu); 5917b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 592d9fbd03dSHollis Blanchard break; 593d9fbd03dSHollis Blanchard } 594d9fbd03dSHollis Blanchard 5957b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 596d9fbd03dSHollis Blanchard 597be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 59889168618SHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 599d9fbd03dSHollis Blanchard 600d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 601d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 602d9fbd03dSHollis Blanchard * didn't. This could be because: 603d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 604d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 605d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 606d9fbd03dSHollis Blanchard * invoking the guest. */ 60758a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 608d9fbd03dSHollis Blanchard } else { 609d9fbd03dSHollis Blanchard /* Guest mapped and leaped at non-RAM! */ 610d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 611d9fbd03dSHollis Blanchard } 612d9fbd03dSHollis Blanchard 613d9fbd03dSHollis Blanchard break; 614d9fbd03dSHollis Blanchard } 615d9fbd03dSHollis Blanchard 616d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DEBUG: { 617d9fbd03dSHollis Blanchard u32 dbsr; 618d9fbd03dSHollis Blanchard 619d9fbd03dSHollis Blanchard vcpu->arch.pc = mfspr(SPRN_CSRR0); 620d9fbd03dSHollis Blanchard 621d9fbd03dSHollis Blanchard /* clear IAC events in DBSR register */ 622d9fbd03dSHollis Blanchard dbsr = mfspr(SPRN_DBSR); 623d9fbd03dSHollis Blanchard dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 624d9fbd03dSHollis Blanchard mtspr(SPRN_DBSR, dbsr); 625d9fbd03dSHollis Blanchard 626d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DEBUG; 6277b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEBUG_EXITS); 628d9fbd03dSHollis Blanchard r = RESUME_HOST; 629d9fbd03dSHollis Blanchard break; 630d9fbd03dSHollis Blanchard } 631d9fbd03dSHollis Blanchard 632d9fbd03dSHollis Blanchard default: 633d9fbd03dSHollis Blanchard printk(KERN_EMERG "exit_nr %d\n", exit_nr); 634d9fbd03dSHollis Blanchard BUG(); 635d9fbd03dSHollis Blanchard } 636d9fbd03dSHollis Blanchard 637d9fbd03dSHollis Blanchard local_irq_disable(); 638d9fbd03dSHollis Blanchard 6397e28e60eSScott Wood kvmppc_core_prepare_to_enter(vcpu); 640d9fbd03dSHollis Blanchard 641d9fbd03dSHollis Blanchard if (!(r & RESUME_HOST)) { 642d9fbd03dSHollis Blanchard /* To avoid clobbering exit_reason, only check for signals if 643d9fbd03dSHollis Blanchard * we aren't already exiting to userspace for some other 644d9fbd03dSHollis Blanchard * reason. */ 645d9fbd03dSHollis Blanchard if (signal_pending(current)) { 646d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_INTR; 647d9fbd03dSHollis Blanchard r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 6487b701591SHollis Blanchard kvmppc_account_exit(vcpu, SIGNAL_EXITS); 649d9fbd03dSHollis Blanchard } 650d9fbd03dSHollis Blanchard } 651d9fbd03dSHollis Blanchard 652d9fbd03dSHollis Blanchard return r; 653d9fbd03dSHollis Blanchard } 654d9fbd03dSHollis Blanchard 655d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 656d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 657d9fbd03dSHollis Blanchard { 658082decf2SHollis Blanchard int i; 659af8f38b3SAlexander Graf int r; 660082decf2SHollis Blanchard 661d9fbd03dSHollis Blanchard vcpu->arch.pc = 0; 662666e7252SAlexander Graf vcpu->arch.shared->msr = 0; 663ecee273fSScott Wood vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 664b5904972SScott Wood vcpu->arch.shared->pir = vcpu->vcpu_id; 6658e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 666d9fbd03dSHollis Blanchard 667d9fbd03dSHollis Blanchard vcpu->arch.shadow_pid = 1; 668d9fbd03dSHollis Blanchard 669082decf2SHollis Blanchard /* Eye-catching numbers so we know if the guest takes an interrupt 670082decf2SHollis Blanchard * before it's programmed its own IVPR/IVORs. */ 671d9fbd03dSHollis Blanchard vcpu->arch.ivpr = 0x55550000; 672082decf2SHollis Blanchard for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 673082decf2SHollis Blanchard vcpu->arch.ivor[i] = 0x7700 | i * 4; 674d9fbd03dSHollis Blanchard 67573e75b41SHollis Blanchard kvmppc_init_timing_stats(vcpu); 67673e75b41SHollis Blanchard 677af8f38b3SAlexander Graf r = kvmppc_core_vcpu_setup(vcpu); 678af8f38b3SAlexander Graf kvmppc_sanity_check(vcpu); 679af8f38b3SAlexander Graf return r; 680d9fbd03dSHollis Blanchard } 681d9fbd03dSHollis Blanchard 682d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 683d9fbd03dSHollis Blanchard { 684d9fbd03dSHollis Blanchard int i; 685d9fbd03dSHollis Blanchard 686d9fbd03dSHollis Blanchard regs->pc = vcpu->arch.pc; 687992b5b29SAlexander Graf regs->cr = kvmppc_get_cr(vcpu); 688d9fbd03dSHollis Blanchard regs->ctr = vcpu->arch.ctr; 689d9fbd03dSHollis Blanchard regs->lr = vcpu->arch.lr; 690992b5b29SAlexander Graf regs->xer = kvmppc_get_xer(vcpu); 691666e7252SAlexander Graf regs->msr = vcpu->arch.shared->msr; 692de7906c3SAlexander Graf regs->srr0 = vcpu->arch.shared->srr0; 693de7906c3SAlexander Graf regs->srr1 = vcpu->arch.shared->srr1; 694d9fbd03dSHollis Blanchard regs->pid = vcpu->arch.pid; 695a73a9599SAlexander Graf regs->sprg0 = vcpu->arch.shared->sprg0; 696a73a9599SAlexander Graf regs->sprg1 = vcpu->arch.shared->sprg1; 697a73a9599SAlexander Graf regs->sprg2 = vcpu->arch.shared->sprg2; 698a73a9599SAlexander Graf regs->sprg3 = vcpu->arch.shared->sprg3; 699b5904972SScott Wood regs->sprg4 = vcpu->arch.shared->sprg4; 700b5904972SScott Wood regs->sprg5 = vcpu->arch.shared->sprg5; 701b5904972SScott Wood regs->sprg6 = vcpu->arch.shared->sprg6; 702b5904972SScott Wood regs->sprg7 = vcpu->arch.shared->sprg7; 703d9fbd03dSHollis Blanchard 704d9fbd03dSHollis Blanchard for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 7058e5b26b5SAlexander Graf regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 706d9fbd03dSHollis Blanchard 707d9fbd03dSHollis Blanchard return 0; 708d9fbd03dSHollis Blanchard } 709d9fbd03dSHollis Blanchard 710d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 711d9fbd03dSHollis Blanchard { 712d9fbd03dSHollis Blanchard int i; 713d9fbd03dSHollis Blanchard 714d9fbd03dSHollis Blanchard vcpu->arch.pc = regs->pc; 715992b5b29SAlexander Graf kvmppc_set_cr(vcpu, regs->cr); 716d9fbd03dSHollis Blanchard vcpu->arch.ctr = regs->ctr; 717d9fbd03dSHollis Blanchard vcpu->arch.lr = regs->lr; 718992b5b29SAlexander Graf kvmppc_set_xer(vcpu, regs->xer); 719b8fd68acSHollis Blanchard kvmppc_set_msr(vcpu, regs->msr); 720de7906c3SAlexander Graf vcpu->arch.shared->srr0 = regs->srr0; 721de7906c3SAlexander Graf vcpu->arch.shared->srr1 = regs->srr1; 7225ce941eeSScott Wood kvmppc_set_pid(vcpu, regs->pid); 723a73a9599SAlexander Graf vcpu->arch.shared->sprg0 = regs->sprg0; 724a73a9599SAlexander Graf vcpu->arch.shared->sprg1 = regs->sprg1; 725a73a9599SAlexander Graf vcpu->arch.shared->sprg2 = regs->sprg2; 726a73a9599SAlexander Graf vcpu->arch.shared->sprg3 = regs->sprg3; 727b5904972SScott Wood vcpu->arch.shared->sprg4 = regs->sprg4; 728b5904972SScott Wood vcpu->arch.shared->sprg5 = regs->sprg5; 729b5904972SScott Wood vcpu->arch.shared->sprg6 = regs->sprg6; 730b5904972SScott Wood vcpu->arch.shared->sprg7 = regs->sprg7; 731d9fbd03dSHollis Blanchard 7328e5b26b5SAlexander Graf for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 7338e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 734d9fbd03dSHollis Blanchard 735d9fbd03dSHollis Blanchard return 0; 736d9fbd03dSHollis Blanchard } 737d9fbd03dSHollis Blanchard 7385ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu, 7395ce941eeSScott Wood struct kvm_sregs *sregs) 7405ce941eeSScott Wood { 7415ce941eeSScott Wood u64 tb = get_tb(); 7425ce941eeSScott Wood 7435ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_BASE; 7445ce941eeSScott Wood 7455ce941eeSScott Wood sregs->u.e.csrr0 = vcpu->arch.csrr0; 7465ce941eeSScott Wood sregs->u.e.csrr1 = vcpu->arch.csrr1; 7475ce941eeSScott Wood sregs->u.e.mcsr = vcpu->arch.mcsr; 748b5904972SScott Wood sregs->u.e.esr = vcpu->arch.shared->esr; 7495ce941eeSScott Wood sregs->u.e.dear = vcpu->arch.shared->dar; 7505ce941eeSScott Wood sregs->u.e.tsr = vcpu->arch.tsr; 7515ce941eeSScott Wood sregs->u.e.tcr = vcpu->arch.tcr; 7525ce941eeSScott Wood sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 7535ce941eeSScott Wood sregs->u.e.tb = tb; 7545ce941eeSScott Wood sregs->u.e.vrsave = vcpu->arch.vrsave; 7555ce941eeSScott Wood } 7565ce941eeSScott Wood 7575ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu, 7585ce941eeSScott Wood struct kvm_sregs *sregs) 7595ce941eeSScott Wood { 7605ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 7615ce941eeSScott Wood return 0; 7625ce941eeSScott Wood 7635ce941eeSScott Wood vcpu->arch.csrr0 = sregs->u.e.csrr0; 7645ce941eeSScott Wood vcpu->arch.csrr1 = sregs->u.e.csrr1; 7655ce941eeSScott Wood vcpu->arch.mcsr = sregs->u.e.mcsr; 766b5904972SScott Wood vcpu->arch.shared->esr = sregs->u.e.esr; 7675ce941eeSScott Wood vcpu->arch.shared->dar = sregs->u.e.dear; 7685ce941eeSScott Wood vcpu->arch.vrsave = sregs->u.e.vrsave; 769*dfd4d47eSScott Wood kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 7705ce941eeSScott Wood 771*dfd4d47eSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 7725ce941eeSScott Wood vcpu->arch.dec = sregs->u.e.dec; 7735ce941eeSScott Wood kvmppc_emulate_dec(vcpu); 774*dfd4d47eSScott Wood } 7755ce941eeSScott Wood 7765ce941eeSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) { 777*dfd4d47eSScott Wood vcpu->arch.tsr = sregs->u.e.tsr; 778*dfd4d47eSScott Wood update_timer_ints(vcpu); 7795ce941eeSScott Wood } 7805ce941eeSScott Wood 7815ce941eeSScott Wood return 0; 7825ce941eeSScott Wood } 7835ce941eeSScott Wood 7845ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu, 7855ce941eeSScott Wood struct kvm_sregs *sregs) 7865ce941eeSScott Wood { 7875ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_ARCH206; 7885ce941eeSScott Wood 789841741f2SScott Wood sregs->u.e.pir = vcpu->vcpu_id; 7905ce941eeSScott Wood sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 7915ce941eeSScott Wood sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 7925ce941eeSScott Wood sregs->u.e.decar = vcpu->arch.decar; 7935ce941eeSScott Wood sregs->u.e.ivpr = vcpu->arch.ivpr; 7945ce941eeSScott Wood } 7955ce941eeSScott Wood 7965ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu, 7975ce941eeSScott Wood struct kvm_sregs *sregs) 7985ce941eeSScott Wood { 7995ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 8005ce941eeSScott Wood return 0; 8015ce941eeSScott Wood 802841741f2SScott Wood if (sregs->u.e.pir != vcpu->vcpu_id) 8035ce941eeSScott Wood return -EINVAL; 8045ce941eeSScott Wood 8055ce941eeSScott Wood vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 8065ce941eeSScott Wood vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 8075ce941eeSScott Wood vcpu->arch.decar = sregs->u.e.decar; 8085ce941eeSScott Wood vcpu->arch.ivpr = sregs->u.e.ivpr; 8095ce941eeSScott Wood 8105ce941eeSScott Wood return 0; 8115ce941eeSScott Wood } 8125ce941eeSScott Wood 8135ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 8145ce941eeSScott Wood { 8155ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_IVOR; 8165ce941eeSScott Wood 8175ce941eeSScott Wood sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 8185ce941eeSScott Wood sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 8195ce941eeSScott Wood sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 8205ce941eeSScott Wood sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 8215ce941eeSScott Wood sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 8225ce941eeSScott Wood sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 8235ce941eeSScott Wood sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 8245ce941eeSScott Wood sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 8255ce941eeSScott Wood sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 8265ce941eeSScott Wood sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 8275ce941eeSScott Wood sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 8285ce941eeSScott Wood sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 8295ce941eeSScott Wood sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 8305ce941eeSScott Wood sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 8315ce941eeSScott Wood sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 8325ce941eeSScott Wood sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 8335ce941eeSScott Wood } 8345ce941eeSScott Wood 8355ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 8365ce941eeSScott Wood { 8375ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 8385ce941eeSScott Wood return 0; 8395ce941eeSScott Wood 8405ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 8415ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 8425ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 8435ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 8445ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 8455ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 8465ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 8475ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 8485ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 8495ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 8505ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 8515ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 8525ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 8535ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 8545ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 8555ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 8565ce941eeSScott Wood 8575ce941eeSScott Wood return 0; 8585ce941eeSScott Wood } 8595ce941eeSScott Wood 860d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 861d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 862d9fbd03dSHollis Blanchard { 8635ce941eeSScott Wood sregs->pvr = vcpu->arch.pvr; 8645ce941eeSScott Wood 8655ce941eeSScott Wood get_sregs_base(vcpu, sregs); 8665ce941eeSScott Wood get_sregs_arch206(vcpu, sregs); 8675ce941eeSScott Wood kvmppc_core_get_sregs(vcpu, sregs); 8685ce941eeSScott Wood return 0; 869d9fbd03dSHollis Blanchard } 870d9fbd03dSHollis Blanchard 871d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 872d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 873d9fbd03dSHollis Blanchard { 8745ce941eeSScott Wood int ret; 8755ce941eeSScott Wood 8765ce941eeSScott Wood if (vcpu->arch.pvr != sregs->pvr) 8775ce941eeSScott Wood return -EINVAL; 8785ce941eeSScott Wood 8795ce941eeSScott Wood ret = set_sregs_base(vcpu, sregs); 8805ce941eeSScott Wood if (ret < 0) 8815ce941eeSScott Wood return ret; 8825ce941eeSScott Wood 8835ce941eeSScott Wood ret = set_sregs_arch206(vcpu, sregs); 8845ce941eeSScott Wood if (ret < 0) 8855ce941eeSScott Wood return ret; 8865ce941eeSScott Wood 8875ce941eeSScott Wood return kvmppc_core_set_sregs(vcpu, sregs); 888d9fbd03dSHollis Blanchard } 889d9fbd03dSHollis Blanchard 890d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 891d9fbd03dSHollis Blanchard { 892d9fbd03dSHollis Blanchard return -ENOTSUPP; 893d9fbd03dSHollis Blanchard } 894d9fbd03dSHollis Blanchard 895d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 896d9fbd03dSHollis Blanchard { 897d9fbd03dSHollis Blanchard return -ENOTSUPP; 898d9fbd03dSHollis Blanchard } 899d9fbd03dSHollis Blanchard 900d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 901d9fbd03dSHollis Blanchard struct kvm_translation *tr) 902d9fbd03dSHollis Blanchard { 90398001d8dSAvi Kivity int r; 90498001d8dSAvi Kivity 90598001d8dSAvi Kivity r = kvmppc_core_vcpu_translate(vcpu, tr); 90698001d8dSAvi Kivity return r; 907d9fbd03dSHollis Blanchard } 908d9fbd03dSHollis Blanchard 9094e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 9104e755758SAlexander Graf { 9114e755758SAlexander Graf return -ENOTSUPP; 9124e755758SAlexander Graf } 9134e755758SAlexander Graf 914f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm, 915f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 916f9e0554dSPaul Mackerras { 917f9e0554dSPaul Mackerras return 0; 918f9e0554dSPaul Mackerras } 919f9e0554dSPaul Mackerras 920f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm, 921f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 922f9e0554dSPaul Mackerras { 923f9e0554dSPaul Mackerras } 924f9e0554dSPaul Mackerras 925f9e0554dSPaul Mackerras int kvmppc_core_init_vm(struct kvm *kvm) 926f9e0554dSPaul Mackerras { 927f9e0554dSPaul Mackerras return 0; 928f9e0554dSPaul Mackerras } 929f9e0554dSPaul Mackerras 930f9e0554dSPaul Mackerras void kvmppc_core_destroy_vm(struct kvm *kvm) 931f9e0554dSPaul Mackerras { 932f9e0554dSPaul Mackerras } 933f9e0554dSPaul Mackerras 934*dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 935*dfd4d47eSScott Wood { 936*dfd4d47eSScott Wood vcpu->arch.tcr = new_tcr; 937*dfd4d47eSScott Wood update_timer_ints(vcpu); 938*dfd4d47eSScott Wood } 939*dfd4d47eSScott Wood 940*dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 941*dfd4d47eSScott Wood { 942*dfd4d47eSScott Wood set_bits(tsr_bits, &vcpu->arch.tsr); 943*dfd4d47eSScott Wood smp_wmb(); 944*dfd4d47eSScott Wood kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 945*dfd4d47eSScott Wood kvm_vcpu_kick(vcpu); 946*dfd4d47eSScott Wood } 947*dfd4d47eSScott Wood 948*dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 949*dfd4d47eSScott Wood { 950*dfd4d47eSScott Wood clear_bits(tsr_bits, &vcpu->arch.tsr); 951*dfd4d47eSScott Wood update_timer_ints(vcpu); 952*dfd4d47eSScott Wood } 953*dfd4d47eSScott Wood 954*dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data) 955*dfd4d47eSScott Wood { 956*dfd4d47eSScott Wood struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 957*dfd4d47eSScott Wood 958*dfd4d47eSScott Wood kvmppc_set_tsr_bits(vcpu, TSR_DIS); 959*dfd4d47eSScott Wood } 960*dfd4d47eSScott Wood 9612986b8c7SStephen Rothwell int __init kvmppc_booke_init(void) 962d9fbd03dSHollis Blanchard { 963d9fbd03dSHollis Blanchard unsigned long ivor[16]; 964d9fbd03dSHollis Blanchard unsigned long max_ivor = 0; 965d9fbd03dSHollis Blanchard int i; 966d9fbd03dSHollis Blanchard 967d9fbd03dSHollis Blanchard /* We install our own exception handlers by hijacking IVPR. IVPR must 968d9fbd03dSHollis Blanchard * be 16-bit aligned, so we need a 64KB allocation. */ 969d9fbd03dSHollis Blanchard kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 970d9fbd03dSHollis Blanchard VCPU_SIZE_ORDER); 971d9fbd03dSHollis Blanchard if (!kvmppc_booke_handlers) 972d9fbd03dSHollis Blanchard return -ENOMEM; 973d9fbd03dSHollis Blanchard 974d9fbd03dSHollis Blanchard /* XXX make sure our handlers are smaller than Linux's */ 975d9fbd03dSHollis Blanchard 976d9fbd03dSHollis Blanchard /* Copy our interrupt handlers to match host IVORs. That way we don't 977d9fbd03dSHollis Blanchard * have to swap the IVORs on every guest/host transition. */ 978d9fbd03dSHollis Blanchard ivor[0] = mfspr(SPRN_IVOR0); 979d9fbd03dSHollis Blanchard ivor[1] = mfspr(SPRN_IVOR1); 980d9fbd03dSHollis Blanchard ivor[2] = mfspr(SPRN_IVOR2); 981d9fbd03dSHollis Blanchard ivor[3] = mfspr(SPRN_IVOR3); 982d9fbd03dSHollis Blanchard ivor[4] = mfspr(SPRN_IVOR4); 983d9fbd03dSHollis Blanchard ivor[5] = mfspr(SPRN_IVOR5); 984d9fbd03dSHollis Blanchard ivor[6] = mfspr(SPRN_IVOR6); 985d9fbd03dSHollis Blanchard ivor[7] = mfspr(SPRN_IVOR7); 986d9fbd03dSHollis Blanchard ivor[8] = mfspr(SPRN_IVOR8); 987d9fbd03dSHollis Blanchard ivor[9] = mfspr(SPRN_IVOR9); 988d9fbd03dSHollis Blanchard ivor[10] = mfspr(SPRN_IVOR10); 989d9fbd03dSHollis Blanchard ivor[11] = mfspr(SPRN_IVOR11); 990d9fbd03dSHollis Blanchard ivor[12] = mfspr(SPRN_IVOR12); 991d9fbd03dSHollis Blanchard ivor[13] = mfspr(SPRN_IVOR13); 992d9fbd03dSHollis Blanchard ivor[14] = mfspr(SPRN_IVOR14); 993d9fbd03dSHollis Blanchard ivor[15] = mfspr(SPRN_IVOR15); 994d9fbd03dSHollis Blanchard 995d9fbd03dSHollis Blanchard for (i = 0; i < 16; i++) { 996d9fbd03dSHollis Blanchard if (ivor[i] > max_ivor) 997d9fbd03dSHollis Blanchard max_ivor = ivor[i]; 998d9fbd03dSHollis Blanchard 999d9fbd03dSHollis Blanchard memcpy((void *)kvmppc_booke_handlers + ivor[i], 1000d9fbd03dSHollis Blanchard kvmppc_handlers_start + i * kvmppc_handler_len, 1001d9fbd03dSHollis Blanchard kvmppc_handler_len); 1002d9fbd03dSHollis Blanchard } 1003d9fbd03dSHollis Blanchard flush_icache_range(kvmppc_booke_handlers, 1004d9fbd03dSHollis Blanchard kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); 1005d9fbd03dSHollis Blanchard 1006db93f574SHollis Blanchard return 0; 1007d9fbd03dSHollis Blanchard } 1008d9fbd03dSHollis Blanchard 1009db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void) 1010d9fbd03dSHollis Blanchard { 1011d9fbd03dSHollis Blanchard free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1012d9fbd03dSHollis Blanchard kvm_exit(); 1013d9fbd03dSHollis Blanchard } 1014