xref: /openbmc/linux/arch/powerpc/kvm/booke.c (revision d30f6e480055e5be12e7a03fd11ea912a451daa5)
1d9fbd03dSHollis Blanchard /*
2d9fbd03dSHollis Blanchard  * This program is free software; you can redistribute it and/or modify
3d9fbd03dSHollis Blanchard  * it under the terms of the GNU General Public License, version 2, as
4d9fbd03dSHollis Blanchard  * published by the Free Software Foundation.
5d9fbd03dSHollis Blanchard  *
6d9fbd03dSHollis Blanchard  * This program is distributed in the hope that it will be useful,
7d9fbd03dSHollis Blanchard  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8d9fbd03dSHollis Blanchard  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9d9fbd03dSHollis Blanchard  * GNU General Public License for more details.
10d9fbd03dSHollis Blanchard  *
11d9fbd03dSHollis Blanchard  * You should have received a copy of the GNU General Public License
12d9fbd03dSHollis Blanchard  * along with this program; if not, write to the Free Software
13d9fbd03dSHollis Blanchard  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14d9fbd03dSHollis Blanchard  *
15d9fbd03dSHollis Blanchard  * Copyright IBM Corp. 2007
164cd35f67SScott Wood  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17d9fbd03dSHollis Blanchard  *
18d9fbd03dSHollis Blanchard  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19d9fbd03dSHollis Blanchard  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20*d30f6e48SScott Wood  *          Scott Wood <scottwood@freescale.com>
21*d30f6e48SScott Wood  *          Varun Sethi <varun.sethi@freescale.com>
22d9fbd03dSHollis Blanchard  */
23d9fbd03dSHollis Blanchard 
24d9fbd03dSHollis Blanchard #include <linux/errno.h>
25d9fbd03dSHollis Blanchard #include <linux/err.h>
26d9fbd03dSHollis Blanchard #include <linux/kvm_host.h>
275a0e3ad6STejun Heo #include <linux/gfp.h>
28d9fbd03dSHollis Blanchard #include <linux/module.h>
29d9fbd03dSHollis Blanchard #include <linux/vmalloc.h>
30d9fbd03dSHollis Blanchard #include <linux/fs.h>
317924bd41SHollis Blanchard 
32d9fbd03dSHollis Blanchard #include <asm/cputable.h>
33d9fbd03dSHollis Blanchard #include <asm/uaccess.h>
34d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h>
35d9fbd03dSHollis Blanchard #include <asm/cacheflush.h>
36*d30f6e48SScott Wood #include <asm/dbell.h>
37*d30f6e48SScott Wood #include <asm/hw_irq.h>
38*d30f6e48SScott Wood #include <asm/irq.h>
39d9fbd03dSHollis Blanchard 
40*d30f6e48SScott Wood #include "timing.h"
4175f74f0dSHollis Blanchard #include "booke.h"
42d9fbd03dSHollis Blanchard 
43d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers;
44d9fbd03dSHollis Blanchard 
45d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
47d9fbd03dSHollis Blanchard 
48d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = {
49d9fbd03dSHollis Blanchard 	{ "mmio",       VCPU_STAT(mmio_exits) },
50d9fbd03dSHollis Blanchard 	{ "dcr",        VCPU_STAT(dcr_exits) },
51d9fbd03dSHollis Blanchard 	{ "sig",        VCPU_STAT(signal_exits) },
52d9fbd03dSHollis Blanchard 	{ "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
53d9fbd03dSHollis Blanchard 	{ "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
54d9fbd03dSHollis Blanchard 	{ "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
55d9fbd03dSHollis Blanchard 	{ "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
56d9fbd03dSHollis Blanchard 	{ "sysc",       VCPU_STAT(syscall_exits) },
57d9fbd03dSHollis Blanchard 	{ "isi",        VCPU_STAT(isi_exits) },
58d9fbd03dSHollis Blanchard 	{ "dsi",        VCPU_STAT(dsi_exits) },
59d9fbd03dSHollis Blanchard 	{ "inst_emu",   VCPU_STAT(emulated_inst_exits) },
60d9fbd03dSHollis Blanchard 	{ "dec",        VCPU_STAT(dec_exits) },
61d9fbd03dSHollis Blanchard 	{ "ext_intr",   VCPU_STAT(ext_intr_exits) },
62d9fbd03dSHollis Blanchard 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
63*d30f6e48SScott Wood 	{ "doorbell", VCPU_STAT(dbell_exits) },
64*d30f6e48SScott Wood 	{ "guest doorbell", VCPU_STAT(gdbell_exits) },
65d9fbd03dSHollis Blanchard 	{ NULL }
66d9fbd03dSHollis Blanchard };
67d9fbd03dSHollis Blanchard 
68d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */
69d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
70d9fbd03dSHollis Blanchard {
71d9fbd03dSHollis Blanchard 	int i;
72d9fbd03dSHollis Blanchard 
73666e7252SAlexander Graf 	printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
745cf8ca22SHollis Blanchard 	printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
75de7906c3SAlexander Graf 	printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
76de7906c3SAlexander Graf 					    vcpu->arch.shared->srr1);
77d9fbd03dSHollis Blanchard 
78d9fbd03dSHollis Blanchard 	printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
79d9fbd03dSHollis Blanchard 
80d9fbd03dSHollis Blanchard 	for (i = 0; i < 32; i += 4) {
815cf8ca22SHollis Blanchard 		printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
828e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i),
838e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+1),
848e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+2),
858e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+3));
86d9fbd03dSHollis Blanchard 	}
87d9fbd03dSHollis Blanchard }
88d9fbd03dSHollis Blanchard 
894cd35f67SScott Wood #ifdef CONFIG_SPE
904cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
914cd35f67SScott Wood {
924cd35f67SScott Wood 	preempt_disable();
934cd35f67SScott Wood 	enable_kernel_spe();
944cd35f67SScott Wood 	kvmppc_save_guest_spe(vcpu);
954cd35f67SScott Wood 	vcpu->arch.shadow_msr &= ~MSR_SPE;
964cd35f67SScott Wood 	preempt_enable();
974cd35f67SScott Wood }
984cd35f67SScott Wood 
994cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
1004cd35f67SScott Wood {
1014cd35f67SScott Wood 	preempt_disable();
1024cd35f67SScott Wood 	enable_kernel_spe();
1034cd35f67SScott Wood 	kvmppc_load_guest_spe(vcpu);
1044cd35f67SScott Wood 	vcpu->arch.shadow_msr |= MSR_SPE;
1054cd35f67SScott Wood 	preempt_enable();
1064cd35f67SScott Wood }
1074cd35f67SScott Wood 
1084cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
1094cd35f67SScott Wood {
1104cd35f67SScott Wood 	if (vcpu->arch.shared->msr & MSR_SPE) {
1114cd35f67SScott Wood 		if (!(vcpu->arch.shadow_msr & MSR_SPE))
1124cd35f67SScott Wood 			kvmppc_vcpu_enable_spe(vcpu);
1134cd35f67SScott Wood 	} else if (vcpu->arch.shadow_msr & MSR_SPE) {
1144cd35f67SScott Wood 		kvmppc_vcpu_disable_spe(vcpu);
1154cd35f67SScott Wood 	}
1164cd35f67SScott Wood }
1174cd35f67SScott Wood #else
1184cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
1194cd35f67SScott Wood {
1204cd35f67SScott Wood }
1214cd35f67SScott Wood #endif
1224cd35f67SScott Wood 
123dd9ebf1fSLiu Yu /*
124dd9ebf1fSLiu Yu  * Helper function for "full" MSR writes.  No need to call this if only
125dd9ebf1fSLiu Yu  * EE/CE/ME/DE/RI are changing.
126dd9ebf1fSLiu Yu  */
1274cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
1284cd35f67SScott Wood {
129dd9ebf1fSLiu Yu 	u32 old_msr = vcpu->arch.shared->msr;
1304cd35f67SScott Wood 
131*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
132*d30f6e48SScott Wood 	new_msr |= MSR_GS;
133*d30f6e48SScott Wood #endif
134*d30f6e48SScott Wood 
1354cd35f67SScott Wood 	vcpu->arch.shared->msr = new_msr;
1364cd35f67SScott Wood 
137dd9ebf1fSLiu Yu 	kvmppc_mmu_msr_notify(vcpu, old_msr);
1384cd35f67SScott Wood 	kvmppc_vcpu_sync_spe(vcpu);
1394cd35f67SScott Wood }
1404cd35f67SScott Wood 
141d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
142d4cf3892SHollis Blanchard                                        unsigned int priority)
1439dd921cfSHollis Blanchard {
1449dd921cfSHollis Blanchard 	set_bit(priority, &vcpu->arch.pending_exceptions);
1459dd921cfSHollis Blanchard }
1469dd921cfSHollis Blanchard 
147daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
148daf5e271SLiu Yu                                         ulong dear_flags, ulong esr_flags)
1499dd921cfSHollis Blanchard {
150daf5e271SLiu Yu 	vcpu->arch.queued_dear = dear_flags;
151daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
152daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
153daf5e271SLiu Yu }
154daf5e271SLiu Yu 
155daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
156daf5e271SLiu Yu                                            ulong dear_flags, ulong esr_flags)
157daf5e271SLiu Yu {
158daf5e271SLiu Yu 	vcpu->arch.queued_dear = dear_flags;
159daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
160daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
161daf5e271SLiu Yu }
162daf5e271SLiu Yu 
163daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
164daf5e271SLiu Yu                                            ulong esr_flags)
165daf5e271SLiu Yu {
166daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
167daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
168daf5e271SLiu Yu }
169daf5e271SLiu Yu 
170daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
171daf5e271SLiu Yu {
172daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
173d4cf3892SHollis Blanchard 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
1749dd921cfSHollis Blanchard }
1759dd921cfSHollis Blanchard 
1769dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
1779dd921cfSHollis Blanchard {
178d4cf3892SHollis Blanchard 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
1799dd921cfSHollis Blanchard }
1809dd921cfSHollis Blanchard 
1819dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
1829dd921cfSHollis Blanchard {
183d4cf3892SHollis Blanchard 	return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
1849dd921cfSHollis Blanchard }
1859dd921cfSHollis Blanchard 
1867706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
1877706664dSAlexander Graf {
1887706664dSAlexander Graf 	clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
1897706664dSAlexander Graf }
1907706664dSAlexander Graf 
1919dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
1929dd921cfSHollis Blanchard                                 struct kvm_interrupt *irq)
1939dd921cfSHollis Blanchard {
194c5335f17SAlexander Graf 	unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
195c5335f17SAlexander Graf 
196c5335f17SAlexander Graf 	if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
197c5335f17SAlexander Graf 		prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
198c5335f17SAlexander Graf 
199c5335f17SAlexander Graf 	kvmppc_booke_queue_irqprio(vcpu, prio);
2009dd921cfSHollis Blanchard }
2019dd921cfSHollis Blanchard 
2024496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
2034496f974SAlexander Graf                                   struct kvm_interrupt *irq)
2044496f974SAlexander Graf {
2054496f974SAlexander Graf 	clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
206c5335f17SAlexander Graf 	clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
2074496f974SAlexander Graf }
2084496f974SAlexander Graf 
209*d30f6e48SScott Wood static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
210*d30f6e48SScott Wood {
211*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
212*d30f6e48SScott Wood 	mtspr(SPRN_GSRR0, srr0);
213*d30f6e48SScott Wood 	mtspr(SPRN_GSRR1, srr1);
214*d30f6e48SScott Wood #else
215*d30f6e48SScott Wood 	vcpu->arch.shared->srr0 = srr0;
216*d30f6e48SScott Wood 	vcpu->arch.shared->srr1 = srr1;
217*d30f6e48SScott Wood #endif
218*d30f6e48SScott Wood }
219*d30f6e48SScott Wood 
220*d30f6e48SScott Wood static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
221*d30f6e48SScott Wood {
222*d30f6e48SScott Wood 	vcpu->arch.csrr0 = srr0;
223*d30f6e48SScott Wood 	vcpu->arch.csrr1 = srr1;
224*d30f6e48SScott Wood }
225*d30f6e48SScott Wood 
226*d30f6e48SScott Wood static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
227*d30f6e48SScott Wood {
228*d30f6e48SScott Wood 	if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
229*d30f6e48SScott Wood 		vcpu->arch.dsrr0 = srr0;
230*d30f6e48SScott Wood 		vcpu->arch.dsrr1 = srr1;
231*d30f6e48SScott Wood 	} else {
232*d30f6e48SScott Wood 		set_guest_csrr(vcpu, srr0, srr1);
233*d30f6e48SScott Wood 	}
234*d30f6e48SScott Wood }
235*d30f6e48SScott Wood 
236*d30f6e48SScott Wood static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
237*d30f6e48SScott Wood {
238*d30f6e48SScott Wood 	vcpu->arch.mcsrr0 = srr0;
239*d30f6e48SScott Wood 	vcpu->arch.mcsrr1 = srr1;
240*d30f6e48SScott Wood }
241*d30f6e48SScott Wood 
242*d30f6e48SScott Wood static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
243*d30f6e48SScott Wood {
244*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
245*d30f6e48SScott Wood 	return mfspr(SPRN_GDEAR);
246*d30f6e48SScott Wood #else
247*d30f6e48SScott Wood 	return vcpu->arch.shared->dar;
248*d30f6e48SScott Wood #endif
249*d30f6e48SScott Wood }
250*d30f6e48SScott Wood 
251*d30f6e48SScott Wood static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
252*d30f6e48SScott Wood {
253*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
254*d30f6e48SScott Wood 	mtspr(SPRN_GDEAR, dear);
255*d30f6e48SScott Wood #else
256*d30f6e48SScott Wood 	vcpu->arch.shared->dar = dear;
257*d30f6e48SScott Wood #endif
258*d30f6e48SScott Wood }
259*d30f6e48SScott Wood 
260*d30f6e48SScott Wood static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
261*d30f6e48SScott Wood {
262*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
263*d30f6e48SScott Wood 	return mfspr(SPRN_GESR);
264*d30f6e48SScott Wood #else
265*d30f6e48SScott Wood 	return vcpu->arch.shared->esr;
266*d30f6e48SScott Wood #endif
267*d30f6e48SScott Wood }
268*d30f6e48SScott Wood 
269*d30f6e48SScott Wood static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
270*d30f6e48SScott Wood {
271*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
272*d30f6e48SScott Wood 	mtspr(SPRN_GESR, esr);
273*d30f6e48SScott Wood #else
274*d30f6e48SScott Wood 	vcpu->arch.shared->esr = esr;
275*d30f6e48SScott Wood #endif
276*d30f6e48SScott Wood }
277*d30f6e48SScott Wood 
278d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */
279d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
280d4cf3892SHollis Blanchard                                         unsigned int priority)
281d9fbd03dSHollis Blanchard {
282d4cf3892SHollis Blanchard 	int allowed = 0;
2836045be5dSAsias He 	ulong uninitialized_var(msr_mask);
284daf5e271SLiu Yu 	bool update_esr = false, update_dear = false;
2855c6cedf4SAlexander Graf 	ulong crit_raw = vcpu->arch.shared->critical;
2865c6cedf4SAlexander Graf 	ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
2875c6cedf4SAlexander Graf 	bool crit;
288c5335f17SAlexander Graf 	bool keep_irq = false;
289*d30f6e48SScott Wood 	enum int_class int_class;
2905c6cedf4SAlexander Graf 
2915c6cedf4SAlexander Graf 	/* Truncate crit indicators in 32 bit mode */
2925c6cedf4SAlexander Graf 	if (!(vcpu->arch.shared->msr & MSR_SF)) {
2935c6cedf4SAlexander Graf 		crit_raw &= 0xffffffff;
2945c6cedf4SAlexander Graf 		crit_r1 &= 0xffffffff;
2955c6cedf4SAlexander Graf 	}
2965c6cedf4SAlexander Graf 
2975c6cedf4SAlexander Graf 	/* Critical section when crit == r1 */
2985c6cedf4SAlexander Graf 	crit = (crit_raw == crit_r1);
2995c6cedf4SAlexander Graf 	/* ... and we're in supervisor mode */
3005c6cedf4SAlexander Graf 	crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
301d9fbd03dSHollis Blanchard 
302c5335f17SAlexander Graf 	if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
303c5335f17SAlexander Graf 		priority = BOOKE_IRQPRIO_EXTERNAL;
304c5335f17SAlexander Graf 		keep_irq = true;
305c5335f17SAlexander Graf 	}
306c5335f17SAlexander Graf 
307d4cf3892SHollis Blanchard 	switch (priority) {
308d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DTLB_MISS:
309daf5e271SLiu Yu 	case BOOKE_IRQPRIO_DATA_STORAGE:
310daf5e271SLiu Yu 		update_dear = true;
311daf5e271SLiu Yu 		/* fall through */
312daf5e271SLiu Yu 	case BOOKE_IRQPRIO_INST_STORAGE:
313daf5e271SLiu Yu 	case BOOKE_IRQPRIO_PROGRAM:
314daf5e271SLiu Yu 		update_esr = true;
315daf5e271SLiu Yu 		/* fall through */
316d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_ITLB_MISS:
317d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_SYSCALL:
318d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_FP_UNAVAIL:
319bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_UNAVAIL:
320bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_FP_DATA:
321bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_FP_ROUND:
322d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_AP_UNAVAIL:
323d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_ALIGNMENT:
324d4cf3892SHollis Blanchard 		allowed = 1;
325*d30f6e48SScott Wood 		msr_mask = MSR_GS | MSR_CE | MSR_ME | MSR_DE;
326*d30f6e48SScott Wood 		int_class = INT_CLASS_NONCRIT;
327d9fbd03dSHollis Blanchard 		break;
328d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_CRITICAL:
329666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_CE;
330*d30f6e48SScott Wood 		allowed = allowed && !crit;
331*d30f6e48SScott Wood 		msr_mask = MSR_GS | MSR_ME;
332*d30f6e48SScott Wood 		int_class = INT_CLASS_CRIT;
333d9fbd03dSHollis Blanchard 		break;
334d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_MACHINE_CHECK:
335666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_ME;
336*d30f6e48SScott Wood 		allowed = allowed && !crit;
337*d30f6e48SScott Wood 		msr_mask = MSR_GS;
338*d30f6e48SScott Wood 		int_class = INT_CLASS_MC;
339d9fbd03dSHollis Blanchard 		break;
340d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DECREMENTER:
341d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_FIT:
342dfd4d47eSScott Wood 		keep_irq = true;
343dfd4d47eSScott Wood 		/* fall through */
344dfd4d47eSScott Wood 	case BOOKE_IRQPRIO_EXTERNAL:
345666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_EE;
3465c6cedf4SAlexander Graf 		allowed = allowed && !crit;
347*d30f6e48SScott Wood 		msr_mask = MSR_GS | MSR_CE | MSR_ME | MSR_DE;
348*d30f6e48SScott Wood 		int_class = INT_CLASS_NONCRIT;
349d9fbd03dSHollis Blanchard 		break;
350d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DEBUG:
351666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_DE;
352*d30f6e48SScott Wood 		allowed = allowed && !crit;
353*d30f6e48SScott Wood 		msr_mask = MSR_GS | MSR_ME;
354*d30f6e48SScott Wood 		int_class = INT_CLASS_CRIT;
355d9fbd03dSHollis Blanchard 		break;
356d9fbd03dSHollis Blanchard 	}
357d9fbd03dSHollis Blanchard 
358d4cf3892SHollis Blanchard 	if (allowed) {
359*d30f6e48SScott Wood 		switch (int_class) {
360*d30f6e48SScott Wood 		case INT_CLASS_NONCRIT:
361*d30f6e48SScott Wood 			set_guest_srr(vcpu, vcpu->arch.pc,
362*d30f6e48SScott Wood 				      vcpu->arch.shared->msr);
363*d30f6e48SScott Wood 			break;
364*d30f6e48SScott Wood 		case INT_CLASS_CRIT:
365*d30f6e48SScott Wood 			set_guest_csrr(vcpu, vcpu->arch.pc,
366*d30f6e48SScott Wood 				       vcpu->arch.shared->msr);
367*d30f6e48SScott Wood 			break;
368*d30f6e48SScott Wood 		case INT_CLASS_DBG:
369*d30f6e48SScott Wood 			set_guest_dsrr(vcpu, vcpu->arch.pc,
370*d30f6e48SScott Wood 				       vcpu->arch.shared->msr);
371*d30f6e48SScott Wood 			break;
372*d30f6e48SScott Wood 		case INT_CLASS_MC:
373*d30f6e48SScott Wood 			set_guest_mcsrr(vcpu, vcpu->arch.pc,
374*d30f6e48SScott Wood 					vcpu->arch.shared->msr);
375*d30f6e48SScott Wood 			break;
376*d30f6e48SScott Wood 		}
377*d30f6e48SScott Wood 
378d4cf3892SHollis Blanchard 		vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
379daf5e271SLiu Yu 		if (update_esr == true)
380*d30f6e48SScott Wood 			set_guest_esr(vcpu, vcpu->arch.queued_esr);
381daf5e271SLiu Yu 		if (update_dear == true)
382*d30f6e48SScott Wood 			set_guest_dear(vcpu, vcpu->arch.queued_dear);
383666e7252SAlexander Graf 		kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
384d4cf3892SHollis Blanchard 
385c5335f17SAlexander Graf 		if (!keep_irq)
386d4cf3892SHollis Blanchard 			clear_bit(priority, &vcpu->arch.pending_exceptions);
387d4cf3892SHollis Blanchard 	}
388d4cf3892SHollis Blanchard 
389*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
390*d30f6e48SScott Wood 	/*
391*d30f6e48SScott Wood 	 * If an interrupt is pending but masked, raise a guest doorbell
392*d30f6e48SScott Wood 	 * so that we are notified when the guest enables the relevant
393*d30f6e48SScott Wood 	 * MSR bit.
394*d30f6e48SScott Wood 	 */
395*d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
396*d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
397*d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
398*d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
399*d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
400*d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
401*d30f6e48SScott Wood #endif
402*d30f6e48SScott Wood 
403d4cf3892SHollis Blanchard 	return allowed;
404d9fbd03dSHollis Blanchard }
405d9fbd03dSHollis Blanchard 
406dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu)
407dfd4d47eSScott Wood {
408dfd4d47eSScott Wood 	if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
409dfd4d47eSScott Wood 		kvmppc_core_queue_dec(vcpu);
410dfd4d47eSScott Wood 	else
411dfd4d47eSScott Wood 		kvmppc_core_dequeue_dec(vcpu);
412dfd4d47eSScott Wood }
413dfd4d47eSScott Wood 
414c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
415d9fbd03dSHollis Blanchard {
416d9fbd03dSHollis Blanchard 	unsigned long *pending = &vcpu->arch.pending_exceptions;
417d9fbd03dSHollis Blanchard 	unsigned int priority;
418d9fbd03dSHollis Blanchard 
419dfd4d47eSScott Wood 	if (vcpu->requests) {
420dfd4d47eSScott Wood 		if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
421dfd4d47eSScott Wood 			smp_mb();
422dfd4d47eSScott Wood 			update_timer_ints(vcpu);
423dfd4d47eSScott Wood 		}
424dfd4d47eSScott Wood 	}
425dfd4d47eSScott Wood 
4269ab80843SHollis Blanchard 	priority = __ffs(*pending);
427bdc89f13SHollis Blanchard 	while (priority <= BOOKE_IRQPRIO_MAX) {
428d4cf3892SHollis Blanchard 		if (kvmppc_booke_irqprio_deliver(vcpu, priority))
429d9fbd03dSHollis Blanchard 			break;
430d9fbd03dSHollis Blanchard 
431d9fbd03dSHollis Blanchard 		priority = find_next_bit(pending,
432d9fbd03dSHollis Blanchard 		                         BITS_PER_BYTE * sizeof(*pending),
433d9fbd03dSHollis Blanchard 		                         priority + 1);
434d9fbd03dSHollis Blanchard 	}
43590bba358SAlexander Graf 
43690bba358SAlexander Graf 	/* Tell the guest about our interrupt status */
43729ac26efSScott Wood 	vcpu->arch.shared->int_pending = !!*pending;
438d9fbd03dSHollis Blanchard }
439d9fbd03dSHollis Blanchard 
440c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */
441c59a6a3eSScott Wood void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
442c59a6a3eSScott Wood {
443c59a6a3eSScott Wood 	WARN_ON_ONCE(!irqs_disabled());
444c59a6a3eSScott Wood 
445c59a6a3eSScott Wood 	kvmppc_core_check_exceptions(vcpu);
446c59a6a3eSScott Wood 
447c59a6a3eSScott Wood 	if (vcpu->arch.shared->msr & MSR_WE) {
448c59a6a3eSScott Wood 		local_irq_enable();
449c59a6a3eSScott Wood 		kvm_vcpu_block(vcpu);
450c59a6a3eSScott Wood 		local_irq_disable();
451c59a6a3eSScott Wood 
452c59a6a3eSScott Wood 		kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
453c59a6a3eSScott Wood 		kvmppc_core_check_exceptions(vcpu);
454c59a6a3eSScott Wood 	};
455c59a6a3eSScott Wood }
456c59a6a3eSScott Wood 
457df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
458df6909e5SPaul Mackerras {
459df6909e5SPaul Mackerras 	int ret;
460df6909e5SPaul Mackerras 
461af8f38b3SAlexander Graf 	if (!vcpu->arch.sane) {
462af8f38b3SAlexander Graf 		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
463af8f38b3SAlexander Graf 		return -EINVAL;
464af8f38b3SAlexander Graf 	}
465af8f38b3SAlexander Graf 
466*d30f6e48SScott Wood 	if (!current->thread.kvm_vcpu) {
467*d30f6e48SScott Wood 		WARN(1, "no vcpu\n");
468*d30f6e48SScott Wood 		return -EPERM;
469*d30f6e48SScott Wood 	}
470*d30f6e48SScott Wood 
471df6909e5SPaul Mackerras 	local_irq_disable();
4721d1ef222SScott Wood 
47325051b5aSScott Wood 	kvmppc_core_prepare_to_enter(vcpu);
47425051b5aSScott Wood 
4751d1ef222SScott Wood 	if (signal_pending(current)) {
4761d1ef222SScott Wood 		kvm_run->exit_reason = KVM_EXIT_INTR;
4771d1ef222SScott Wood 		ret = -EINTR;
4781d1ef222SScott Wood 		goto out;
4791d1ef222SScott Wood 	}
4801d1ef222SScott Wood 
481df6909e5SPaul Mackerras 	kvm_guest_enter();
482df6909e5SPaul Mackerras 	ret = __kvmppc_vcpu_run(kvm_run, vcpu);
483df6909e5SPaul Mackerras 	kvm_guest_exit();
484df6909e5SPaul Mackerras 
4851d1ef222SScott Wood out:
4861d1ef222SScott Wood 	local_irq_enable();
487df6909e5SPaul Mackerras 	return ret;
488df6909e5SPaul Mackerras }
489df6909e5SPaul Mackerras 
490*d30f6e48SScott Wood static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
491d9fbd03dSHollis Blanchard {
492d9fbd03dSHollis Blanchard 	enum emulation_result er;
493d9fbd03dSHollis Blanchard 
494d9fbd03dSHollis Blanchard 	er = kvmppc_emulate_instruction(run, vcpu);
495d9fbd03dSHollis Blanchard 	switch (er) {
496d9fbd03dSHollis Blanchard 	case EMULATE_DONE:
49773e75b41SHollis Blanchard 		/* don't overwrite subtypes, just account kvm_stats */
4987b701591SHollis Blanchard 		kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
499d9fbd03dSHollis Blanchard 		/* Future optimization: only reload non-volatiles if
500d9fbd03dSHollis Blanchard 		 * they were actually modified by emulation. */
501*d30f6e48SScott Wood 		return RESUME_GUEST_NV;
502*d30f6e48SScott Wood 
503d9fbd03dSHollis Blanchard 	case EMULATE_DO_DCR:
504d9fbd03dSHollis Blanchard 		run->exit_reason = KVM_EXIT_DCR;
505*d30f6e48SScott Wood 		return RESUME_HOST;
506*d30f6e48SScott Wood 
507d9fbd03dSHollis Blanchard 	case EMULATE_FAIL:
508d9fbd03dSHollis Blanchard 		/* XXX Deliver Program interrupt to guest. */
5095cf8ca22SHollis Blanchard 		printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
510d9fbd03dSHollis Blanchard 		       __func__, vcpu->arch.pc, vcpu->arch.last_inst);
511d9fbd03dSHollis Blanchard 		/* For debugging, encode the failing instruction and
512d9fbd03dSHollis Blanchard 		 * report it to userspace. */
513d9fbd03dSHollis Blanchard 		run->hw.hardware_exit_reason = ~0ULL << 32;
514d9fbd03dSHollis Blanchard 		run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
515*d30f6e48SScott Wood 		return RESUME_HOST;
516*d30f6e48SScott Wood 
517d9fbd03dSHollis Blanchard 	default:
518d9fbd03dSHollis Blanchard 		BUG();
519d9fbd03dSHollis Blanchard 	}
520*d30f6e48SScott Wood }
521*d30f6e48SScott Wood 
522*d30f6e48SScott Wood /**
523*d30f6e48SScott Wood  * kvmppc_handle_exit
524*d30f6e48SScott Wood  *
525*d30f6e48SScott Wood  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
526*d30f6e48SScott Wood  */
527*d30f6e48SScott Wood int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
528*d30f6e48SScott Wood                        unsigned int exit_nr)
529*d30f6e48SScott Wood {
530*d30f6e48SScott Wood 	int r = RESUME_HOST;
531*d30f6e48SScott Wood 
532*d30f6e48SScott Wood 	/* update before a new last_exit_type is rewritten */
533*d30f6e48SScott Wood 	kvmppc_update_timing_stats(vcpu);
534*d30f6e48SScott Wood 
535*d30f6e48SScott Wood 	switch (exit_nr) {
536*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_EXTERNAL:
537*d30f6e48SScott Wood 		do_IRQ(current->thread.regs);
538*d30f6e48SScott Wood 		break;
539*d30f6e48SScott Wood 
540*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DECREMENTER:
541*d30f6e48SScott Wood 		timer_interrupt(current->thread.regs);
542*d30f6e48SScott Wood 		break;
543*d30f6e48SScott Wood 
544*d30f6e48SScott Wood #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
545*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DOORBELL:
546*d30f6e48SScott Wood 		doorbell_exception(current->thread.regs);
547*d30f6e48SScott Wood 		break;
548*d30f6e48SScott Wood #endif
549*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_MACHINE_CHECK:
550*d30f6e48SScott Wood 		/* FIXME */
551*d30f6e48SScott Wood 		break;
552*d30f6e48SScott Wood 	}
553*d30f6e48SScott Wood 
554*d30f6e48SScott Wood 	local_irq_enable();
555*d30f6e48SScott Wood 
556*d30f6e48SScott Wood 	run->exit_reason = KVM_EXIT_UNKNOWN;
557*d30f6e48SScott Wood 	run->ready_for_interrupt_injection = 1;
558*d30f6e48SScott Wood 
559*d30f6e48SScott Wood 	switch (exit_nr) {
560*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_MACHINE_CHECK:
561*d30f6e48SScott Wood 		kvm_resched(vcpu);
562*d30f6e48SScott Wood 		r = RESUME_GUEST;
563*d30f6e48SScott Wood 		break;
564*d30f6e48SScott Wood 
565*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_EXTERNAL:
566*d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
567*d30f6e48SScott Wood 		kvm_resched(vcpu);
568*d30f6e48SScott Wood 		r = RESUME_GUEST;
569*d30f6e48SScott Wood 		break;
570*d30f6e48SScott Wood 
571*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DECREMENTER:
572*d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, DEC_EXITS);
573*d30f6e48SScott Wood 		kvm_resched(vcpu);
574*d30f6e48SScott Wood 		r = RESUME_GUEST;
575*d30f6e48SScott Wood 		break;
576*d30f6e48SScott Wood 
577*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DOORBELL:
578*d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, DBELL_EXITS);
579*d30f6e48SScott Wood 		kvm_resched(vcpu);
580*d30f6e48SScott Wood 		r = RESUME_GUEST;
581*d30f6e48SScott Wood 		break;
582*d30f6e48SScott Wood 
583*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
584*d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
585*d30f6e48SScott Wood 
586*d30f6e48SScott Wood 		/*
587*d30f6e48SScott Wood 		 * We are here because there is a pending guest interrupt
588*d30f6e48SScott Wood 		 * which could not be delivered as MSR_CE or MSR_ME was not
589*d30f6e48SScott Wood 		 * set.  Once we break from here we will retry delivery.
590*d30f6e48SScott Wood 		 */
591*d30f6e48SScott Wood 		r = RESUME_GUEST;
592*d30f6e48SScott Wood 		break;
593*d30f6e48SScott Wood 
594*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_GUEST_DBELL:
595*d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
596*d30f6e48SScott Wood 
597*d30f6e48SScott Wood 		/*
598*d30f6e48SScott Wood 		 * We are here because there is a pending guest interrupt
599*d30f6e48SScott Wood 		 * which could not be delivered as MSR_EE was not set.  Once
600*d30f6e48SScott Wood 		 * we break from here we will retry delivery.
601*d30f6e48SScott Wood 		 */
602*d30f6e48SScott Wood 		r = RESUME_GUEST;
603*d30f6e48SScott Wood 		break;
604*d30f6e48SScott Wood 
605*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_HV_PRIV:
606*d30f6e48SScott Wood 		r = emulation_exit(run, vcpu);
607*d30f6e48SScott Wood 		break;
608*d30f6e48SScott Wood 
609*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_PROGRAM:
610*d30f6e48SScott Wood 		if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
611*d30f6e48SScott Wood 			/* Program traps generated by user-level software must be handled
612*d30f6e48SScott Wood 			 * by the guest kernel. */
613*d30f6e48SScott Wood 			kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
614*d30f6e48SScott Wood 			r = RESUME_GUEST;
615*d30f6e48SScott Wood 			kvmppc_account_exit(vcpu, USR_PR_INST);
616*d30f6e48SScott Wood 			break;
617*d30f6e48SScott Wood 		}
618*d30f6e48SScott Wood 
619*d30f6e48SScott Wood 		r = emulation_exit(run, vcpu);
620d9fbd03dSHollis Blanchard 		break;
621d9fbd03dSHollis Blanchard 
622d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_FP_UNAVAIL:
623d4cf3892SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
6247b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, FP_UNAVAIL);
625d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
626d9fbd03dSHollis Blanchard 		break;
627d9fbd03dSHollis Blanchard 
6284cd35f67SScott Wood #ifdef CONFIG_SPE
6294cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_UNAVAIL: {
6304cd35f67SScott Wood 		if (vcpu->arch.shared->msr & MSR_SPE)
6314cd35f67SScott Wood 			kvmppc_vcpu_enable_spe(vcpu);
6324cd35f67SScott Wood 		else
6334cd35f67SScott Wood 			kvmppc_booke_queue_irqprio(vcpu,
6344cd35f67SScott Wood 						   BOOKE_IRQPRIO_SPE_UNAVAIL);
635bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
636bb3a8a17SHollis Blanchard 		break;
6374cd35f67SScott Wood 	}
638bb3a8a17SHollis Blanchard 
639bb3a8a17SHollis Blanchard 	case BOOKE_INTERRUPT_SPE_FP_DATA:
640bb3a8a17SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
641bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
642bb3a8a17SHollis Blanchard 		break;
643bb3a8a17SHollis Blanchard 
644bb3a8a17SHollis Blanchard 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
645bb3a8a17SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
646bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
647bb3a8a17SHollis Blanchard 		break;
6484cd35f67SScott Wood #else
6494cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_UNAVAIL:
6504cd35f67SScott Wood 		/*
6514cd35f67SScott Wood 		 * Guest wants SPE, but host kernel doesn't support it.  Send
6524cd35f67SScott Wood 		 * an "unimplemented operation" program check to the guest.
6534cd35f67SScott Wood 		 */
6544cd35f67SScott Wood 		kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
6554cd35f67SScott Wood 		r = RESUME_GUEST;
6564cd35f67SScott Wood 		break;
6574cd35f67SScott Wood 
6584cd35f67SScott Wood 	/*
6594cd35f67SScott Wood 	 * These really should never happen without CONFIG_SPE,
6604cd35f67SScott Wood 	 * as we should never enable the real MSR[SPE] in the guest.
6614cd35f67SScott Wood 	 */
6624cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_FP_DATA:
6634cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
6644cd35f67SScott Wood 		printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
6654cd35f67SScott Wood 		       __func__, exit_nr, vcpu->arch.pc);
6664cd35f67SScott Wood 		run->hw.hardware_exit_reason = exit_nr;
6674cd35f67SScott Wood 		r = RESUME_HOST;
6684cd35f67SScott Wood 		break;
6694cd35f67SScott Wood #endif
670bb3a8a17SHollis Blanchard 
671d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DATA_STORAGE:
672daf5e271SLiu Yu 		kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
673daf5e271SLiu Yu 		                               vcpu->arch.fault_esr);
6747b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, DSI_EXITS);
675d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
676d9fbd03dSHollis Blanchard 		break;
677d9fbd03dSHollis Blanchard 
678d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_INST_STORAGE:
679daf5e271SLiu Yu 		kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
6807b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, ISI_EXITS);
681d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
682d9fbd03dSHollis Blanchard 		break;
683d9fbd03dSHollis Blanchard 
684*d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
685*d30f6e48SScott Wood 	case BOOKE_INTERRUPT_HV_SYSCALL:
686*d30f6e48SScott Wood 		if (!(vcpu->arch.shared->msr & MSR_PR)) {
687*d30f6e48SScott Wood 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
688*d30f6e48SScott Wood 		} else {
689*d30f6e48SScott Wood 			/*
690*d30f6e48SScott Wood 			 * hcall from guest userspace -- send privileged
691*d30f6e48SScott Wood 			 * instruction program check.
692*d30f6e48SScott Wood 			 */
693*d30f6e48SScott Wood 			kvmppc_core_queue_program(vcpu, ESR_PPR);
694*d30f6e48SScott Wood 		}
695*d30f6e48SScott Wood 
696*d30f6e48SScott Wood 		r = RESUME_GUEST;
697*d30f6e48SScott Wood 		break;
698*d30f6e48SScott Wood #else
699d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_SYSCALL:
7002a342ed5SAlexander Graf 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
7012a342ed5SAlexander Graf 		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
7022a342ed5SAlexander Graf 			/* KVM PV hypercalls */
7032a342ed5SAlexander Graf 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
7042a342ed5SAlexander Graf 			r = RESUME_GUEST;
7052a342ed5SAlexander Graf 		} else {
7062a342ed5SAlexander Graf 			/* Guest syscalls */
707d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
7082a342ed5SAlexander Graf 		}
7097b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, SYSCALL_EXITS);
710d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
711d9fbd03dSHollis Blanchard 		break;
712*d30f6e48SScott Wood #endif
713d9fbd03dSHollis Blanchard 
714d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DTLB_MISS: {
715d9fbd03dSHollis Blanchard 		unsigned long eaddr = vcpu->arch.fault_dear;
7167924bd41SHollis Blanchard 		int gtlb_index;
717475e7cddSHollis Blanchard 		gpa_t gpaddr;
718d9fbd03dSHollis Blanchard 		gfn_t gfn;
719d9fbd03dSHollis Blanchard 
720a4cd8b23SScott Wood #ifdef CONFIG_KVM_E500
721a4cd8b23SScott Wood 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
722a4cd8b23SScott Wood 		    (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
723a4cd8b23SScott Wood 			kvmppc_map_magic(vcpu);
724a4cd8b23SScott Wood 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
725a4cd8b23SScott Wood 			r = RESUME_GUEST;
726a4cd8b23SScott Wood 
727a4cd8b23SScott Wood 			break;
728a4cd8b23SScott Wood 		}
729a4cd8b23SScott Wood #endif
730a4cd8b23SScott Wood 
731d9fbd03dSHollis Blanchard 		/* Check the guest TLB. */
732fa86b8ddSHollis Blanchard 		gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7337924bd41SHollis Blanchard 		if (gtlb_index < 0) {
734d9fbd03dSHollis Blanchard 			/* The guest didn't have a mapping for it. */
735daf5e271SLiu Yu 			kvmppc_core_queue_dtlb_miss(vcpu,
736daf5e271SLiu Yu 			                            vcpu->arch.fault_dear,
737daf5e271SLiu Yu 			                            vcpu->arch.fault_esr);
738b52a638cSHollis Blanchard 			kvmppc_mmu_dtlb_miss(vcpu);
7397b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
740d9fbd03dSHollis Blanchard 			r = RESUME_GUEST;
741d9fbd03dSHollis Blanchard 			break;
742d9fbd03dSHollis Blanchard 		}
743d9fbd03dSHollis Blanchard 
744be8d1caeSHollis Blanchard 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
745475e7cddSHollis Blanchard 		gfn = gpaddr >> PAGE_SHIFT;
746d9fbd03dSHollis Blanchard 
747d9fbd03dSHollis Blanchard 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
748d9fbd03dSHollis Blanchard 			/* The guest TLB had a mapping, but the shadow TLB
749d9fbd03dSHollis Blanchard 			 * didn't, and it is RAM. This could be because:
750d9fbd03dSHollis Blanchard 			 * a) the entry is mapping the host kernel, or
751d9fbd03dSHollis Blanchard 			 * b) the guest used a large mapping which we're faking
752d9fbd03dSHollis Blanchard 			 * Either way, we need to satisfy the fault without
753d9fbd03dSHollis Blanchard 			 * invoking the guest. */
75458a96214SHollis Blanchard 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7557b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
756d9fbd03dSHollis Blanchard 			r = RESUME_GUEST;
757d9fbd03dSHollis Blanchard 		} else {
758d9fbd03dSHollis Blanchard 			/* Guest has mapped and accessed a page which is not
759d9fbd03dSHollis Blanchard 			 * actually RAM. */
760475e7cddSHollis Blanchard 			vcpu->arch.paddr_accessed = gpaddr;
761d9fbd03dSHollis Blanchard 			r = kvmppc_emulate_mmio(run, vcpu);
7627b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, MMIO_EXITS);
763d9fbd03dSHollis Blanchard 		}
764d9fbd03dSHollis Blanchard 
765d9fbd03dSHollis Blanchard 		break;
766d9fbd03dSHollis Blanchard 	}
767d9fbd03dSHollis Blanchard 
768d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_ITLB_MISS: {
769d9fbd03dSHollis Blanchard 		unsigned long eaddr = vcpu->arch.pc;
77089168618SHollis Blanchard 		gpa_t gpaddr;
771d9fbd03dSHollis Blanchard 		gfn_t gfn;
7727924bd41SHollis Blanchard 		int gtlb_index;
773d9fbd03dSHollis Blanchard 
774d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
775d9fbd03dSHollis Blanchard 
776d9fbd03dSHollis Blanchard 		/* Check the guest TLB. */
777fa86b8ddSHollis Blanchard 		gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7787924bd41SHollis Blanchard 		if (gtlb_index < 0) {
779d9fbd03dSHollis Blanchard 			/* The guest didn't have a mapping for it. */
780d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
781b52a638cSHollis Blanchard 			kvmppc_mmu_itlb_miss(vcpu);
7827b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
783d9fbd03dSHollis Blanchard 			break;
784d9fbd03dSHollis Blanchard 		}
785d9fbd03dSHollis Blanchard 
7867b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
787d9fbd03dSHollis Blanchard 
788be8d1caeSHollis Blanchard 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
78989168618SHollis Blanchard 		gfn = gpaddr >> PAGE_SHIFT;
790d9fbd03dSHollis Blanchard 
791d9fbd03dSHollis Blanchard 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
792d9fbd03dSHollis Blanchard 			/* The guest TLB had a mapping, but the shadow TLB
793d9fbd03dSHollis Blanchard 			 * didn't. This could be because:
794d9fbd03dSHollis Blanchard 			 * a) the entry is mapping the host kernel, or
795d9fbd03dSHollis Blanchard 			 * b) the guest used a large mapping which we're faking
796d9fbd03dSHollis Blanchard 			 * Either way, we need to satisfy the fault without
797d9fbd03dSHollis Blanchard 			 * invoking the guest. */
79858a96214SHollis Blanchard 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
799d9fbd03dSHollis Blanchard 		} else {
800d9fbd03dSHollis Blanchard 			/* Guest mapped and leaped at non-RAM! */
801d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
802d9fbd03dSHollis Blanchard 		}
803d9fbd03dSHollis Blanchard 
804d9fbd03dSHollis Blanchard 		break;
805d9fbd03dSHollis Blanchard 	}
806d9fbd03dSHollis Blanchard 
807d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DEBUG: {
808d9fbd03dSHollis Blanchard 		u32 dbsr;
809d9fbd03dSHollis Blanchard 
810d9fbd03dSHollis Blanchard 		vcpu->arch.pc = mfspr(SPRN_CSRR0);
811d9fbd03dSHollis Blanchard 
812d9fbd03dSHollis Blanchard 		/* clear IAC events in DBSR register */
813d9fbd03dSHollis Blanchard 		dbsr = mfspr(SPRN_DBSR);
814d9fbd03dSHollis Blanchard 		dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
815d9fbd03dSHollis Blanchard 		mtspr(SPRN_DBSR, dbsr);
816d9fbd03dSHollis Blanchard 
817d9fbd03dSHollis Blanchard 		run->exit_reason = KVM_EXIT_DEBUG;
8187b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, DEBUG_EXITS);
819d9fbd03dSHollis Blanchard 		r = RESUME_HOST;
820d9fbd03dSHollis Blanchard 		break;
821d9fbd03dSHollis Blanchard 	}
822d9fbd03dSHollis Blanchard 
823d9fbd03dSHollis Blanchard 	default:
824d9fbd03dSHollis Blanchard 		printk(KERN_EMERG "exit_nr %d\n", exit_nr);
825d9fbd03dSHollis Blanchard 		BUG();
826d9fbd03dSHollis Blanchard 	}
827d9fbd03dSHollis Blanchard 
828d9fbd03dSHollis Blanchard 	local_irq_disable();
829d9fbd03dSHollis Blanchard 
8307e28e60eSScott Wood 	kvmppc_core_prepare_to_enter(vcpu);
831d9fbd03dSHollis Blanchard 
832d9fbd03dSHollis Blanchard 	if (!(r & RESUME_HOST)) {
833d9fbd03dSHollis Blanchard 		/* To avoid clobbering exit_reason, only check for signals if
834d9fbd03dSHollis Blanchard 		 * we aren't already exiting to userspace for some other
835d9fbd03dSHollis Blanchard 		 * reason. */
836d9fbd03dSHollis Blanchard 		if (signal_pending(current)) {
837d9fbd03dSHollis Blanchard 			run->exit_reason = KVM_EXIT_INTR;
838d9fbd03dSHollis Blanchard 			r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
8397b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, SIGNAL_EXITS);
840d9fbd03dSHollis Blanchard 		}
841d9fbd03dSHollis Blanchard 	}
842d9fbd03dSHollis Blanchard 
843d9fbd03dSHollis Blanchard 	return r;
844d9fbd03dSHollis Blanchard }
845d9fbd03dSHollis Blanchard 
846d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
847d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
848d9fbd03dSHollis Blanchard {
849082decf2SHollis Blanchard 	int i;
850af8f38b3SAlexander Graf 	int r;
851082decf2SHollis Blanchard 
852d9fbd03dSHollis Blanchard 	vcpu->arch.pc = 0;
853b5904972SScott Wood 	vcpu->arch.shared->pir = vcpu->vcpu_id;
8548e5b26b5SAlexander Graf 	kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
855*d30f6e48SScott Wood 	kvmppc_set_msr(vcpu, 0);
856d9fbd03dSHollis Blanchard 
857*d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
858*d30f6e48SScott Wood 	vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
859d9fbd03dSHollis Blanchard 	vcpu->arch.shadow_pid = 1;
860*d30f6e48SScott Wood 	vcpu->arch.shared->msr = 0;
861*d30f6e48SScott Wood #endif
862d9fbd03dSHollis Blanchard 
863082decf2SHollis Blanchard 	/* Eye-catching numbers so we know if the guest takes an interrupt
864082decf2SHollis Blanchard 	 * before it's programmed its own IVPR/IVORs. */
865d9fbd03dSHollis Blanchard 	vcpu->arch.ivpr = 0x55550000;
866082decf2SHollis Blanchard 	for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
867082decf2SHollis Blanchard 		vcpu->arch.ivor[i] = 0x7700 | i * 4;
868d9fbd03dSHollis Blanchard 
86973e75b41SHollis Blanchard 	kvmppc_init_timing_stats(vcpu);
87073e75b41SHollis Blanchard 
871af8f38b3SAlexander Graf 	r = kvmppc_core_vcpu_setup(vcpu);
872af8f38b3SAlexander Graf 	kvmppc_sanity_check(vcpu);
873af8f38b3SAlexander Graf 	return r;
874d9fbd03dSHollis Blanchard }
875d9fbd03dSHollis Blanchard 
876d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
877d9fbd03dSHollis Blanchard {
878d9fbd03dSHollis Blanchard 	int i;
879d9fbd03dSHollis Blanchard 
880d9fbd03dSHollis Blanchard 	regs->pc = vcpu->arch.pc;
881992b5b29SAlexander Graf 	regs->cr = kvmppc_get_cr(vcpu);
882d9fbd03dSHollis Blanchard 	regs->ctr = vcpu->arch.ctr;
883d9fbd03dSHollis Blanchard 	regs->lr = vcpu->arch.lr;
884992b5b29SAlexander Graf 	regs->xer = kvmppc_get_xer(vcpu);
885666e7252SAlexander Graf 	regs->msr = vcpu->arch.shared->msr;
886de7906c3SAlexander Graf 	regs->srr0 = vcpu->arch.shared->srr0;
887de7906c3SAlexander Graf 	regs->srr1 = vcpu->arch.shared->srr1;
888d9fbd03dSHollis Blanchard 	regs->pid = vcpu->arch.pid;
889a73a9599SAlexander Graf 	regs->sprg0 = vcpu->arch.shared->sprg0;
890a73a9599SAlexander Graf 	regs->sprg1 = vcpu->arch.shared->sprg1;
891a73a9599SAlexander Graf 	regs->sprg2 = vcpu->arch.shared->sprg2;
892a73a9599SAlexander Graf 	regs->sprg3 = vcpu->arch.shared->sprg3;
893b5904972SScott Wood 	regs->sprg4 = vcpu->arch.shared->sprg4;
894b5904972SScott Wood 	regs->sprg5 = vcpu->arch.shared->sprg5;
895b5904972SScott Wood 	regs->sprg6 = vcpu->arch.shared->sprg6;
896b5904972SScott Wood 	regs->sprg7 = vcpu->arch.shared->sprg7;
897d9fbd03dSHollis Blanchard 
898d9fbd03dSHollis Blanchard 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8998e5b26b5SAlexander Graf 		regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
900d9fbd03dSHollis Blanchard 
901d9fbd03dSHollis Blanchard 	return 0;
902d9fbd03dSHollis Blanchard }
903d9fbd03dSHollis Blanchard 
904d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
905d9fbd03dSHollis Blanchard {
906d9fbd03dSHollis Blanchard 	int i;
907d9fbd03dSHollis Blanchard 
908d9fbd03dSHollis Blanchard 	vcpu->arch.pc = regs->pc;
909992b5b29SAlexander Graf 	kvmppc_set_cr(vcpu, regs->cr);
910d9fbd03dSHollis Blanchard 	vcpu->arch.ctr = regs->ctr;
911d9fbd03dSHollis Blanchard 	vcpu->arch.lr = regs->lr;
912992b5b29SAlexander Graf 	kvmppc_set_xer(vcpu, regs->xer);
913b8fd68acSHollis Blanchard 	kvmppc_set_msr(vcpu, regs->msr);
914de7906c3SAlexander Graf 	vcpu->arch.shared->srr0 = regs->srr0;
915de7906c3SAlexander Graf 	vcpu->arch.shared->srr1 = regs->srr1;
9165ce941eeSScott Wood 	kvmppc_set_pid(vcpu, regs->pid);
917a73a9599SAlexander Graf 	vcpu->arch.shared->sprg0 = regs->sprg0;
918a73a9599SAlexander Graf 	vcpu->arch.shared->sprg1 = regs->sprg1;
919a73a9599SAlexander Graf 	vcpu->arch.shared->sprg2 = regs->sprg2;
920a73a9599SAlexander Graf 	vcpu->arch.shared->sprg3 = regs->sprg3;
921b5904972SScott Wood 	vcpu->arch.shared->sprg4 = regs->sprg4;
922b5904972SScott Wood 	vcpu->arch.shared->sprg5 = regs->sprg5;
923b5904972SScott Wood 	vcpu->arch.shared->sprg6 = regs->sprg6;
924b5904972SScott Wood 	vcpu->arch.shared->sprg7 = regs->sprg7;
925d9fbd03dSHollis Blanchard 
9268e5b26b5SAlexander Graf 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
9278e5b26b5SAlexander Graf 		kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
928d9fbd03dSHollis Blanchard 
929d9fbd03dSHollis Blanchard 	return 0;
930d9fbd03dSHollis Blanchard }
931d9fbd03dSHollis Blanchard 
9325ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu,
9335ce941eeSScott Wood                            struct kvm_sregs *sregs)
9345ce941eeSScott Wood {
9355ce941eeSScott Wood 	u64 tb = get_tb();
9365ce941eeSScott Wood 
9375ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_BASE;
9385ce941eeSScott Wood 
9395ce941eeSScott Wood 	sregs->u.e.csrr0 = vcpu->arch.csrr0;
9405ce941eeSScott Wood 	sregs->u.e.csrr1 = vcpu->arch.csrr1;
9415ce941eeSScott Wood 	sregs->u.e.mcsr = vcpu->arch.mcsr;
942*d30f6e48SScott Wood 	sregs->u.e.esr = get_guest_esr(vcpu);
943*d30f6e48SScott Wood 	sregs->u.e.dear = get_guest_dear(vcpu);
9445ce941eeSScott Wood 	sregs->u.e.tsr = vcpu->arch.tsr;
9455ce941eeSScott Wood 	sregs->u.e.tcr = vcpu->arch.tcr;
9465ce941eeSScott Wood 	sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
9475ce941eeSScott Wood 	sregs->u.e.tb = tb;
9485ce941eeSScott Wood 	sregs->u.e.vrsave = vcpu->arch.vrsave;
9495ce941eeSScott Wood }
9505ce941eeSScott Wood 
9515ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu,
9525ce941eeSScott Wood                           struct kvm_sregs *sregs)
9535ce941eeSScott Wood {
9545ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
9555ce941eeSScott Wood 		return 0;
9565ce941eeSScott Wood 
9575ce941eeSScott Wood 	vcpu->arch.csrr0 = sregs->u.e.csrr0;
9585ce941eeSScott Wood 	vcpu->arch.csrr1 = sregs->u.e.csrr1;
9595ce941eeSScott Wood 	vcpu->arch.mcsr = sregs->u.e.mcsr;
960*d30f6e48SScott Wood 	set_guest_esr(vcpu, sregs->u.e.esr);
961*d30f6e48SScott Wood 	set_guest_dear(vcpu, sregs->u.e.dear);
9625ce941eeSScott Wood 	vcpu->arch.vrsave = sregs->u.e.vrsave;
963dfd4d47eSScott Wood 	kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
9645ce941eeSScott Wood 
965dfd4d47eSScott Wood 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
9665ce941eeSScott Wood 		vcpu->arch.dec = sregs->u.e.dec;
9675ce941eeSScott Wood 		kvmppc_emulate_dec(vcpu);
968dfd4d47eSScott Wood 	}
9695ce941eeSScott Wood 
9705ce941eeSScott Wood 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
971dfd4d47eSScott Wood 		vcpu->arch.tsr = sregs->u.e.tsr;
972dfd4d47eSScott Wood 		update_timer_ints(vcpu);
9735ce941eeSScott Wood 	}
9745ce941eeSScott Wood 
9755ce941eeSScott Wood 	return 0;
9765ce941eeSScott Wood }
9775ce941eeSScott Wood 
9785ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu,
9795ce941eeSScott Wood                               struct kvm_sregs *sregs)
9805ce941eeSScott Wood {
9815ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_ARCH206;
9825ce941eeSScott Wood 
983841741f2SScott Wood 	sregs->u.e.pir = vcpu->vcpu_id;
9845ce941eeSScott Wood 	sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
9855ce941eeSScott Wood 	sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
9865ce941eeSScott Wood 	sregs->u.e.decar = vcpu->arch.decar;
9875ce941eeSScott Wood 	sregs->u.e.ivpr = vcpu->arch.ivpr;
9885ce941eeSScott Wood }
9895ce941eeSScott Wood 
9905ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu,
9915ce941eeSScott Wood                              struct kvm_sregs *sregs)
9925ce941eeSScott Wood {
9935ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
9945ce941eeSScott Wood 		return 0;
9955ce941eeSScott Wood 
996841741f2SScott Wood 	if (sregs->u.e.pir != vcpu->vcpu_id)
9975ce941eeSScott Wood 		return -EINVAL;
9985ce941eeSScott Wood 
9995ce941eeSScott Wood 	vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
10005ce941eeSScott Wood 	vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
10015ce941eeSScott Wood 	vcpu->arch.decar = sregs->u.e.decar;
10025ce941eeSScott Wood 	vcpu->arch.ivpr = sregs->u.e.ivpr;
10035ce941eeSScott Wood 
10045ce941eeSScott Wood 	return 0;
10055ce941eeSScott Wood }
10065ce941eeSScott Wood 
10075ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10085ce941eeSScott Wood {
10095ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_IVOR;
10105ce941eeSScott Wood 
10115ce941eeSScott Wood 	sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
10125ce941eeSScott Wood 	sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
10135ce941eeSScott Wood 	sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
10145ce941eeSScott Wood 	sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
10155ce941eeSScott Wood 	sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
10165ce941eeSScott Wood 	sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
10175ce941eeSScott Wood 	sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
10185ce941eeSScott Wood 	sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
10195ce941eeSScott Wood 	sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
10205ce941eeSScott Wood 	sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
10215ce941eeSScott Wood 	sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
10225ce941eeSScott Wood 	sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
10235ce941eeSScott Wood 	sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
10245ce941eeSScott Wood 	sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
10255ce941eeSScott Wood 	sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
10265ce941eeSScott Wood 	sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
10275ce941eeSScott Wood }
10285ce941eeSScott Wood 
10295ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10305ce941eeSScott Wood {
10315ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
10325ce941eeSScott Wood 		return 0;
10335ce941eeSScott Wood 
10345ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
10355ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
10365ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
10375ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
10385ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
10395ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
10405ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
10415ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
10425ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
10435ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
10445ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
10455ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
10465ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
10475ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
10485ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
10495ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
10505ce941eeSScott Wood 
10515ce941eeSScott Wood 	return 0;
10525ce941eeSScott Wood }
10535ce941eeSScott Wood 
1054d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1055d9fbd03dSHollis Blanchard                                   struct kvm_sregs *sregs)
1056d9fbd03dSHollis Blanchard {
10575ce941eeSScott Wood 	sregs->pvr = vcpu->arch.pvr;
10585ce941eeSScott Wood 
10595ce941eeSScott Wood 	get_sregs_base(vcpu, sregs);
10605ce941eeSScott Wood 	get_sregs_arch206(vcpu, sregs);
10615ce941eeSScott Wood 	kvmppc_core_get_sregs(vcpu, sregs);
10625ce941eeSScott Wood 	return 0;
1063d9fbd03dSHollis Blanchard }
1064d9fbd03dSHollis Blanchard 
1065d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1066d9fbd03dSHollis Blanchard                                   struct kvm_sregs *sregs)
1067d9fbd03dSHollis Blanchard {
10685ce941eeSScott Wood 	int ret;
10695ce941eeSScott Wood 
10705ce941eeSScott Wood 	if (vcpu->arch.pvr != sregs->pvr)
10715ce941eeSScott Wood 		return -EINVAL;
10725ce941eeSScott Wood 
10735ce941eeSScott Wood 	ret = set_sregs_base(vcpu, sregs);
10745ce941eeSScott Wood 	if (ret < 0)
10755ce941eeSScott Wood 		return ret;
10765ce941eeSScott Wood 
10775ce941eeSScott Wood 	ret = set_sregs_arch206(vcpu, sregs);
10785ce941eeSScott Wood 	if (ret < 0)
10795ce941eeSScott Wood 		return ret;
10805ce941eeSScott Wood 
10815ce941eeSScott Wood 	return kvmppc_core_set_sregs(vcpu, sregs);
1082d9fbd03dSHollis Blanchard }
1083d9fbd03dSHollis Blanchard 
108431f3438eSPaul Mackerras int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
108531f3438eSPaul Mackerras {
108631f3438eSPaul Mackerras 	return -EINVAL;
108731f3438eSPaul Mackerras }
108831f3438eSPaul Mackerras 
108931f3438eSPaul Mackerras int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
109031f3438eSPaul Mackerras {
109131f3438eSPaul Mackerras 	return -EINVAL;
109231f3438eSPaul Mackerras }
109331f3438eSPaul Mackerras 
1094d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1095d9fbd03dSHollis Blanchard {
1096d9fbd03dSHollis Blanchard 	return -ENOTSUPP;
1097d9fbd03dSHollis Blanchard }
1098d9fbd03dSHollis Blanchard 
1099d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1100d9fbd03dSHollis Blanchard {
1101d9fbd03dSHollis Blanchard 	return -ENOTSUPP;
1102d9fbd03dSHollis Blanchard }
1103d9fbd03dSHollis Blanchard 
1104d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1105d9fbd03dSHollis Blanchard                                   struct kvm_translation *tr)
1106d9fbd03dSHollis Blanchard {
110798001d8dSAvi Kivity 	int r;
110898001d8dSAvi Kivity 
110998001d8dSAvi Kivity 	r = kvmppc_core_vcpu_translate(vcpu, tr);
111098001d8dSAvi Kivity 	return r;
1111d9fbd03dSHollis Blanchard }
1112d9fbd03dSHollis Blanchard 
11134e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
11144e755758SAlexander Graf {
11154e755758SAlexander Graf 	return -ENOTSUPP;
11164e755758SAlexander Graf }
11174e755758SAlexander Graf 
1118f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1119f9e0554dSPaul Mackerras 				      struct kvm_userspace_memory_region *mem)
1120f9e0554dSPaul Mackerras {
1121f9e0554dSPaul Mackerras 	return 0;
1122f9e0554dSPaul Mackerras }
1123f9e0554dSPaul Mackerras 
1124f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm,
1125f9e0554dSPaul Mackerras 				struct kvm_userspace_memory_region *mem)
1126f9e0554dSPaul Mackerras {
1127f9e0554dSPaul Mackerras }
1128f9e0554dSPaul Mackerras 
1129dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1130dfd4d47eSScott Wood {
1131dfd4d47eSScott Wood 	vcpu->arch.tcr = new_tcr;
1132dfd4d47eSScott Wood 	update_timer_ints(vcpu);
1133dfd4d47eSScott Wood }
1134dfd4d47eSScott Wood 
1135dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1136dfd4d47eSScott Wood {
1137dfd4d47eSScott Wood 	set_bits(tsr_bits, &vcpu->arch.tsr);
1138dfd4d47eSScott Wood 	smp_wmb();
1139dfd4d47eSScott Wood 	kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1140dfd4d47eSScott Wood 	kvm_vcpu_kick(vcpu);
1141dfd4d47eSScott Wood }
1142dfd4d47eSScott Wood 
1143dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1144dfd4d47eSScott Wood {
1145dfd4d47eSScott Wood 	clear_bits(tsr_bits, &vcpu->arch.tsr);
1146dfd4d47eSScott Wood 	update_timer_ints(vcpu);
1147dfd4d47eSScott Wood }
1148dfd4d47eSScott Wood 
1149dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data)
1150dfd4d47eSScott Wood {
1151dfd4d47eSScott Wood 	struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1152dfd4d47eSScott Wood 
1153dfd4d47eSScott Wood 	kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1154dfd4d47eSScott Wood }
1155dfd4d47eSScott Wood 
115694fa9d99SScott Wood void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
115794fa9d99SScott Wood {
1158*d30f6e48SScott Wood 	current->thread.kvm_vcpu = vcpu;
115994fa9d99SScott Wood }
116094fa9d99SScott Wood 
116194fa9d99SScott Wood void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
116294fa9d99SScott Wood {
1163*d30f6e48SScott Wood 	current->thread.kvm_vcpu = NULL;
116494fa9d99SScott Wood }
116594fa9d99SScott Wood 
11662986b8c7SStephen Rothwell int __init kvmppc_booke_init(void)
1167d9fbd03dSHollis Blanchard {
1168*d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
1169d9fbd03dSHollis Blanchard 	unsigned long ivor[16];
1170d9fbd03dSHollis Blanchard 	unsigned long max_ivor = 0;
1171d9fbd03dSHollis Blanchard 	int i;
1172d9fbd03dSHollis Blanchard 
1173d9fbd03dSHollis Blanchard 	/* We install our own exception handlers by hijacking IVPR. IVPR must
1174d9fbd03dSHollis Blanchard 	 * be 16-bit aligned, so we need a 64KB allocation. */
1175d9fbd03dSHollis Blanchard 	kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1176d9fbd03dSHollis Blanchard 	                                         VCPU_SIZE_ORDER);
1177d9fbd03dSHollis Blanchard 	if (!kvmppc_booke_handlers)
1178d9fbd03dSHollis Blanchard 		return -ENOMEM;
1179d9fbd03dSHollis Blanchard 
1180d9fbd03dSHollis Blanchard 	/* XXX make sure our handlers are smaller than Linux's */
1181d9fbd03dSHollis Blanchard 
1182d9fbd03dSHollis Blanchard 	/* Copy our interrupt handlers to match host IVORs. That way we don't
1183d9fbd03dSHollis Blanchard 	 * have to swap the IVORs on every guest/host transition. */
1184d9fbd03dSHollis Blanchard 	ivor[0] = mfspr(SPRN_IVOR0);
1185d9fbd03dSHollis Blanchard 	ivor[1] = mfspr(SPRN_IVOR1);
1186d9fbd03dSHollis Blanchard 	ivor[2] = mfspr(SPRN_IVOR2);
1187d9fbd03dSHollis Blanchard 	ivor[3] = mfspr(SPRN_IVOR3);
1188d9fbd03dSHollis Blanchard 	ivor[4] = mfspr(SPRN_IVOR4);
1189d9fbd03dSHollis Blanchard 	ivor[5] = mfspr(SPRN_IVOR5);
1190d9fbd03dSHollis Blanchard 	ivor[6] = mfspr(SPRN_IVOR6);
1191d9fbd03dSHollis Blanchard 	ivor[7] = mfspr(SPRN_IVOR7);
1192d9fbd03dSHollis Blanchard 	ivor[8] = mfspr(SPRN_IVOR8);
1193d9fbd03dSHollis Blanchard 	ivor[9] = mfspr(SPRN_IVOR9);
1194d9fbd03dSHollis Blanchard 	ivor[10] = mfspr(SPRN_IVOR10);
1195d9fbd03dSHollis Blanchard 	ivor[11] = mfspr(SPRN_IVOR11);
1196d9fbd03dSHollis Blanchard 	ivor[12] = mfspr(SPRN_IVOR12);
1197d9fbd03dSHollis Blanchard 	ivor[13] = mfspr(SPRN_IVOR13);
1198d9fbd03dSHollis Blanchard 	ivor[14] = mfspr(SPRN_IVOR14);
1199d9fbd03dSHollis Blanchard 	ivor[15] = mfspr(SPRN_IVOR15);
1200d9fbd03dSHollis Blanchard 
1201d9fbd03dSHollis Blanchard 	for (i = 0; i < 16; i++) {
1202d9fbd03dSHollis Blanchard 		if (ivor[i] > max_ivor)
1203d9fbd03dSHollis Blanchard 			max_ivor = ivor[i];
1204d9fbd03dSHollis Blanchard 
1205d9fbd03dSHollis Blanchard 		memcpy((void *)kvmppc_booke_handlers + ivor[i],
1206d9fbd03dSHollis Blanchard 		       kvmppc_handlers_start + i * kvmppc_handler_len,
1207d9fbd03dSHollis Blanchard 		       kvmppc_handler_len);
1208d9fbd03dSHollis Blanchard 	}
1209d9fbd03dSHollis Blanchard 	flush_icache_range(kvmppc_booke_handlers,
1210d9fbd03dSHollis Blanchard 	                   kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
1211*d30f6e48SScott Wood #endif /* !BOOKE_HV */
1212db93f574SHollis Blanchard 	return 0;
1213d9fbd03dSHollis Blanchard }
1214d9fbd03dSHollis Blanchard 
1215db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void)
1216d9fbd03dSHollis Blanchard {
1217d9fbd03dSHollis Blanchard 	free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1218d9fbd03dSHollis Blanchard 	kvm_exit();
1219d9fbd03dSHollis Blanchard }
1220