1d9fbd03dSHollis Blanchard /* 2d9fbd03dSHollis Blanchard * This program is free software; you can redistribute it and/or modify 3d9fbd03dSHollis Blanchard * it under the terms of the GNU General Public License, version 2, as 4d9fbd03dSHollis Blanchard * published by the Free Software Foundation. 5d9fbd03dSHollis Blanchard * 6d9fbd03dSHollis Blanchard * This program is distributed in the hope that it will be useful, 7d9fbd03dSHollis Blanchard * but WITHOUT ANY WARRANTY; without even the implied warranty of 8d9fbd03dSHollis Blanchard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9d9fbd03dSHollis Blanchard * GNU General Public License for more details. 10d9fbd03dSHollis Blanchard * 11d9fbd03dSHollis Blanchard * You should have received a copy of the GNU General Public License 12d9fbd03dSHollis Blanchard * along with this program; if not, write to the Free Software 13d9fbd03dSHollis Blanchard * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14d9fbd03dSHollis Blanchard * 15d9fbd03dSHollis Blanchard * Copyright IBM Corp. 2007 164cd35f67SScott Wood * Copyright 2010-2011 Freescale Semiconductor, Inc. 17d9fbd03dSHollis Blanchard * 18d9fbd03dSHollis Blanchard * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19d9fbd03dSHollis Blanchard * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20d9fbd03dSHollis Blanchard */ 21d9fbd03dSHollis Blanchard 22d9fbd03dSHollis Blanchard #include <linux/errno.h> 23d9fbd03dSHollis Blanchard #include <linux/err.h> 24d9fbd03dSHollis Blanchard #include <linux/kvm_host.h> 255a0e3ad6STejun Heo #include <linux/gfp.h> 26d9fbd03dSHollis Blanchard #include <linux/module.h> 27d9fbd03dSHollis Blanchard #include <linux/vmalloc.h> 28d9fbd03dSHollis Blanchard #include <linux/fs.h> 297924bd41SHollis Blanchard 30d9fbd03dSHollis Blanchard #include <asm/cputable.h> 31d9fbd03dSHollis Blanchard #include <asm/uaccess.h> 32d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h> 3373e75b41SHollis Blanchard #include "timing.h" 34d9fbd03dSHollis Blanchard #include <asm/cacheflush.h> 35d9fbd03dSHollis Blanchard 3675f74f0dSHollis Blanchard #include "booke.h" 37d9fbd03dSHollis Blanchard 38d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers; 39d9fbd03dSHollis Blanchard 40d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 41d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 42d9fbd03dSHollis Blanchard 43d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = { 44d9fbd03dSHollis Blanchard { "mmio", VCPU_STAT(mmio_exits) }, 45d9fbd03dSHollis Blanchard { "dcr", VCPU_STAT(dcr_exits) }, 46d9fbd03dSHollis Blanchard { "sig", VCPU_STAT(signal_exits) }, 47d9fbd03dSHollis Blanchard { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 48d9fbd03dSHollis Blanchard { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 49d9fbd03dSHollis Blanchard { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 50d9fbd03dSHollis Blanchard { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 51d9fbd03dSHollis Blanchard { "sysc", VCPU_STAT(syscall_exits) }, 52d9fbd03dSHollis Blanchard { "isi", VCPU_STAT(isi_exits) }, 53d9fbd03dSHollis Blanchard { "dsi", VCPU_STAT(dsi_exits) }, 54d9fbd03dSHollis Blanchard { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 55d9fbd03dSHollis Blanchard { "dec", VCPU_STAT(dec_exits) }, 56d9fbd03dSHollis Blanchard { "ext_intr", VCPU_STAT(ext_intr_exits) }, 57d9fbd03dSHollis Blanchard { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 58d9fbd03dSHollis Blanchard { NULL } 59d9fbd03dSHollis Blanchard }; 60d9fbd03dSHollis Blanchard 61d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */ 62d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 63d9fbd03dSHollis Blanchard { 64d9fbd03dSHollis Blanchard int i; 65d9fbd03dSHollis Blanchard 66666e7252SAlexander Graf printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 675cf8ca22SHollis Blanchard printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 68de7906c3SAlexander Graf printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 69de7906c3SAlexander Graf vcpu->arch.shared->srr1); 70d9fbd03dSHollis Blanchard 71d9fbd03dSHollis Blanchard printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 72d9fbd03dSHollis Blanchard 73d9fbd03dSHollis Blanchard for (i = 0; i < 32; i += 4) { 745cf8ca22SHollis Blanchard printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 758e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i), 768e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+1), 778e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+2), 788e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+3)); 79d9fbd03dSHollis Blanchard } 80d9fbd03dSHollis Blanchard } 81d9fbd03dSHollis Blanchard 824cd35f67SScott Wood #ifdef CONFIG_SPE 834cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 844cd35f67SScott Wood { 854cd35f67SScott Wood preempt_disable(); 864cd35f67SScott Wood enable_kernel_spe(); 874cd35f67SScott Wood kvmppc_save_guest_spe(vcpu); 884cd35f67SScott Wood vcpu->arch.shadow_msr &= ~MSR_SPE; 894cd35f67SScott Wood preempt_enable(); 904cd35f67SScott Wood } 914cd35f67SScott Wood 924cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 934cd35f67SScott Wood { 944cd35f67SScott Wood preempt_disable(); 954cd35f67SScott Wood enable_kernel_spe(); 964cd35f67SScott Wood kvmppc_load_guest_spe(vcpu); 974cd35f67SScott Wood vcpu->arch.shadow_msr |= MSR_SPE; 984cd35f67SScott Wood preempt_enable(); 994cd35f67SScott Wood } 1004cd35f67SScott Wood 1014cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1024cd35f67SScott Wood { 1034cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) { 1044cd35f67SScott Wood if (!(vcpu->arch.shadow_msr & MSR_SPE)) 1054cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 1064cd35f67SScott Wood } else if (vcpu->arch.shadow_msr & MSR_SPE) { 1074cd35f67SScott Wood kvmppc_vcpu_disable_spe(vcpu); 1084cd35f67SScott Wood } 1094cd35f67SScott Wood } 1104cd35f67SScott Wood #else 1114cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1124cd35f67SScott Wood { 1134cd35f67SScott Wood } 1144cd35f67SScott Wood #endif 1154cd35f67SScott Wood 1164cd35f67SScott Wood /* Helper function for "full" MSR writes. No need to call this if only EE is 1174cd35f67SScott Wood * changing. */ 1184cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 1194cd35f67SScott Wood { 1204cd35f67SScott Wood if ((new_msr & MSR_PR) != (vcpu->arch.shared->msr & MSR_PR)) 1214cd35f67SScott Wood kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR); 1224cd35f67SScott Wood 1234cd35f67SScott Wood vcpu->arch.shared->msr = new_msr; 1244cd35f67SScott Wood 1254cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_WE) { 1264cd35f67SScott Wood kvm_vcpu_block(vcpu); 1274cd35f67SScott Wood kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 1284cd35f67SScott Wood }; 1294cd35f67SScott Wood 1304cd35f67SScott Wood kvmppc_vcpu_sync_spe(vcpu); 1314cd35f67SScott Wood } 1324cd35f67SScott Wood 133d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 134d4cf3892SHollis Blanchard unsigned int priority) 1359dd921cfSHollis Blanchard { 1369dd921cfSHollis Blanchard set_bit(priority, &vcpu->arch.pending_exceptions); 1379dd921cfSHollis Blanchard } 1389dd921cfSHollis Blanchard 139daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 140daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 1419dd921cfSHollis Blanchard { 142daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 143daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 144daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 145daf5e271SLiu Yu } 146daf5e271SLiu Yu 147daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 148daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 149daf5e271SLiu Yu { 150daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 151daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 152daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 153daf5e271SLiu Yu } 154daf5e271SLiu Yu 155daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 156daf5e271SLiu Yu ulong esr_flags) 157daf5e271SLiu Yu { 158daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 159daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 160daf5e271SLiu Yu } 161daf5e271SLiu Yu 162daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 163daf5e271SLiu Yu { 164daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 165d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 1669dd921cfSHollis Blanchard } 1679dd921cfSHollis Blanchard 1689dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 1699dd921cfSHollis Blanchard { 170d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 1719dd921cfSHollis Blanchard } 1729dd921cfSHollis Blanchard 1739dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 1749dd921cfSHollis Blanchard { 175d4cf3892SHollis Blanchard return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1769dd921cfSHollis Blanchard } 1779dd921cfSHollis Blanchard 1787706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 1797706664dSAlexander Graf { 1807706664dSAlexander Graf clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1817706664dSAlexander Graf } 1827706664dSAlexander Graf 1839dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 1849dd921cfSHollis Blanchard struct kvm_interrupt *irq) 1859dd921cfSHollis Blanchard { 186c5335f17SAlexander Graf unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 187c5335f17SAlexander Graf 188c5335f17SAlexander Graf if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 189c5335f17SAlexander Graf prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 190c5335f17SAlexander Graf 191c5335f17SAlexander Graf kvmppc_booke_queue_irqprio(vcpu, prio); 1929dd921cfSHollis Blanchard } 1939dd921cfSHollis Blanchard 1944496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, 1954496f974SAlexander Graf struct kvm_interrupt *irq) 1964496f974SAlexander Graf { 1974496f974SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 198c5335f17SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 1994496f974SAlexander Graf } 2004496f974SAlexander Graf 201d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */ 202d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 203d4cf3892SHollis Blanchard unsigned int priority) 204d9fbd03dSHollis Blanchard { 205d4cf3892SHollis Blanchard int allowed = 0; 2066045be5dSAsias He ulong uninitialized_var(msr_mask); 207daf5e271SLiu Yu bool update_esr = false, update_dear = false; 2085c6cedf4SAlexander Graf ulong crit_raw = vcpu->arch.shared->critical; 2095c6cedf4SAlexander Graf ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 2105c6cedf4SAlexander Graf bool crit; 211c5335f17SAlexander Graf bool keep_irq = false; 2125c6cedf4SAlexander Graf 2135c6cedf4SAlexander Graf /* Truncate crit indicators in 32 bit mode */ 2145c6cedf4SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_SF)) { 2155c6cedf4SAlexander Graf crit_raw &= 0xffffffff; 2165c6cedf4SAlexander Graf crit_r1 &= 0xffffffff; 2175c6cedf4SAlexander Graf } 2185c6cedf4SAlexander Graf 2195c6cedf4SAlexander Graf /* Critical section when crit == r1 */ 2205c6cedf4SAlexander Graf crit = (crit_raw == crit_r1); 2215c6cedf4SAlexander Graf /* ... and we're in supervisor mode */ 2225c6cedf4SAlexander Graf crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 223d9fbd03dSHollis Blanchard 224c5335f17SAlexander Graf if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 225c5335f17SAlexander Graf priority = BOOKE_IRQPRIO_EXTERNAL; 226c5335f17SAlexander Graf keep_irq = true; 227c5335f17SAlexander Graf } 228c5335f17SAlexander Graf 229d4cf3892SHollis Blanchard switch (priority) { 230d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DTLB_MISS: 231daf5e271SLiu Yu case BOOKE_IRQPRIO_DATA_STORAGE: 232daf5e271SLiu Yu update_dear = true; 233daf5e271SLiu Yu /* fall through */ 234daf5e271SLiu Yu case BOOKE_IRQPRIO_INST_STORAGE: 235daf5e271SLiu Yu case BOOKE_IRQPRIO_PROGRAM: 236daf5e271SLiu Yu update_esr = true; 237daf5e271SLiu Yu /* fall through */ 238d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ITLB_MISS: 239d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_SYSCALL: 240d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FP_UNAVAIL: 241bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_UNAVAIL: 242bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_DATA: 243bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_ROUND: 244d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_AP_UNAVAIL: 245d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ALIGNMENT: 246d4cf3892SHollis Blanchard allowed = 1; 247d4cf3892SHollis Blanchard msr_mask = MSR_CE|MSR_ME|MSR_DE; 248d9fbd03dSHollis Blanchard break; 249d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_CRITICAL: 250d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_WATCHDOG: 251666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_CE; 252d4cf3892SHollis Blanchard msr_mask = MSR_ME; 253d9fbd03dSHollis Blanchard break; 254d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_MACHINE_CHECK: 255666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_ME; 256d4cf3892SHollis Blanchard msr_mask = 0; 257d9fbd03dSHollis Blanchard break; 258d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_EXTERNAL: 259d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DECREMENTER: 260d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FIT: 261666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_EE; 2625c6cedf4SAlexander Graf allowed = allowed && !crit; 263d4cf3892SHollis Blanchard msr_mask = MSR_CE|MSR_ME|MSR_DE; 264d9fbd03dSHollis Blanchard break; 265d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DEBUG: 266666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_DE; 267d4cf3892SHollis Blanchard msr_mask = MSR_ME; 268d9fbd03dSHollis Blanchard break; 269d9fbd03dSHollis Blanchard } 270d9fbd03dSHollis Blanchard 271d4cf3892SHollis Blanchard if (allowed) { 272de7906c3SAlexander Graf vcpu->arch.shared->srr0 = vcpu->arch.pc; 273de7906c3SAlexander Graf vcpu->arch.shared->srr1 = vcpu->arch.shared->msr; 274d4cf3892SHollis Blanchard vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 275daf5e271SLiu Yu if (update_esr == true) 276daf5e271SLiu Yu vcpu->arch.esr = vcpu->arch.queued_esr; 277daf5e271SLiu Yu if (update_dear == true) 2785e030186SAlexander Graf vcpu->arch.shared->dar = vcpu->arch.queued_dear; 279666e7252SAlexander Graf kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask); 280d4cf3892SHollis Blanchard 281c5335f17SAlexander Graf if (!keep_irq) 282d4cf3892SHollis Blanchard clear_bit(priority, &vcpu->arch.pending_exceptions); 283d4cf3892SHollis Blanchard } 284d4cf3892SHollis Blanchard 285d4cf3892SHollis Blanchard return allowed; 286d9fbd03dSHollis Blanchard } 287d9fbd03dSHollis Blanchard 288d9fbd03dSHollis Blanchard /* Check pending exceptions and deliver one, if possible. */ 2899dd921cfSHollis Blanchard void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) 290d9fbd03dSHollis Blanchard { 291d9fbd03dSHollis Blanchard unsigned long *pending = &vcpu->arch.pending_exceptions; 29290bba358SAlexander Graf unsigned long old_pending = vcpu->arch.pending_exceptions; 293d9fbd03dSHollis Blanchard unsigned int priority; 294d9fbd03dSHollis Blanchard 2959ab80843SHollis Blanchard priority = __ffs(*pending); 296bdc89f13SHollis Blanchard while (priority <= BOOKE_IRQPRIO_MAX) { 297d4cf3892SHollis Blanchard if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 298d9fbd03dSHollis Blanchard break; 299d9fbd03dSHollis Blanchard 300d9fbd03dSHollis Blanchard priority = find_next_bit(pending, 301d9fbd03dSHollis Blanchard BITS_PER_BYTE * sizeof(*pending), 302d9fbd03dSHollis Blanchard priority + 1); 303d9fbd03dSHollis Blanchard } 30490bba358SAlexander Graf 30590bba358SAlexander Graf /* Tell the guest about our interrupt status */ 30690bba358SAlexander Graf if (*pending) 30790bba358SAlexander Graf vcpu->arch.shared->int_pending = 1; 30890bba358SAlexander Graf else if (old_pending) 30990bba358SAlexander Graf vcpu->arch.shared->int_pending = 0; 310d9fbd03dSHollis Blanchard } 311d9fbd03dSHollis Blanchard 312d9fbd03dSHollis Blanchard /** 313d9fbd03dSHollis Blanchard * kvmppc_handle_exit 314d9fbd03dSHollis Blanchard * 315d9fbd03dSHollis Blanchard * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 316d9fbd03dSHollis Blanchard */ 317d9fbd03dSHollis Blanchard int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 318d9fbd03dSHollis Blanchard unsigned int exit_nr) 319d9fbd03dSHollis Blanchard { 320d9fbd03dSHollis Blanchard enum emulation_result er; 321d9fbd03dSHollis Blanchard int r = RESUME_HOST; 322d9fbd03dSHollis Blanchard 32373e75b41SHollis Blanchard /* update before a new last_exit_type is rewritten */ 32473e75b41SHollis Blanchard kvmppc_update_timing_stats(vcpu); 32573e75b41SHollis Blanchard 326d9fbd03dSHollis Blanchard local_irq_enable(); 327d9fbd03dSHollis Blanchard 328d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_UNKNOWN; 329d9fbd03dSHollis Blanchard run->ready_for_interrupt_injection = 1; 330d9fbd03dSHollis Blanchard 331d9fbd03dSHollis Blanchard switch (exit_nr) { 332d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_MACHINE_CHECK: 333d9fbd03dSHollis Blanchard printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 334d9fbd03dSHollis Blanchard kvmppc_dump_vcpu(vcpu); 335d9fbd03dSHollis Blanchard r = RESUME_HOST; 336d9fbd03dSHollis Blanchard break; 337d9fbd03dSHollis Blanchard 338d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_EXTERNAL: 3397b701591SHollis Blanchard kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 3401b6766c7SHollis Blanchard if (need_resched()) 3411b6766c7SHollis Blanchard cond_resched(); 3421b6766c7SHollis Blanchard r = RESUME_GUEST; 3431b6766c7SHollis Blanchard break; 3441b6766c7SHollis Blanchard 345d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DECREMENTER: 346d9fbd03dSHollis Blanchard /* Since we switched IVPR back to the host's value, the host 347d9fbd03dSHollis Blanchard * handled this interrupt the moment we enabled interrupts. 348d9fbd03dSHollis Blanchard * Now we just offer it a chance to reschedule the guest. */ 3497b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEC_EXITS); 350d9fbd03dSHollis Blanchard if (need_resched()) 351d9fbd03dSHollis Blanchard cond_resched(); 352d9fbd03dSHollis Blanchard r = RESUME_GUEST; 353d9fbd03dSHollis Blanchard break; 354d9fbd03dSHollis Blanchard 355d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_PROGRAM: 356666e7252SAlexander Graf if (vcpu->arch.shared->msr & MSR_PR) { 357d9fbd03dSHollis Blanchard /* Program traps generated by user-level software must be handled 358d9fbd03dSHollis Blanchard * by the guest kernel. */ 359daf5e271SLiu Yu kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 360d9fbd03dSHollis Blanchard r = RESUME_GUEST; 3617b701591SHollis Blanchard kvmppc_account_exit(vcpu, USR_PR_INST); 362d9fbd03dSHollis Blanchard break; 363d9fbd03dSHollis Blanchard } 364d9fbd03dSHollis Blanchard 365d9fbd03dSHollis Blanchard er = kvmppc_emulate_instruction(run, vcpu); 366d9fbd03dSHollis Blanchard switch (er) { 367d9fbd03dSHollis Blanchard case EMULATE_DONE: 36873e75b41SHollis Blanchard /* don't overwrite subtypes, just account kvm_stats */ 3697b701591SHollis Blanchard kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 370d9fbd03dSHollis Blanchard /* Future optimization: only reload non-volatiles if 371d9fbd03dSHollis Blanchard * they were actually modified by emulation. */ 372d9fbd03dSHollis Blanchard r = RESUME_GUEST_NV; 373d9fbd03dSHollis Blanchard break; 374d9fbd03dSHollis Blanchard case EMULATE_DO_DCR: 375d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DCR; 376d9fbd03dSHollis Blanchard r = RESUME_HOST; 377d9fbd03dSHollis Blanchard break; 378d9fbd03dSHollis Blanchard case EMULATE_FAIL: 379d9fbd03dSHollis Blanchard /* XXX Deliver Program interrupt to guest. */ 3805cf8ca22SHollis Blanchard printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 381d9fbd03dSHollis Blanchard __func__, vcpu->arch.pc, vcpu->arch.last_inst); 382d9fbd03dSHollis Blanchard /* For debugging, encode the failing instruction and 383d9fbd03dSHollis Blanchard * report it to userspace. */ 384d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason = ~0ULL << 32; 385d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 386d9fbd03dSHollis Blanchard r = RESUME_HOST; 387d9fbd03dSHollis Blanchard break; 388d9fbd03dSHollis Blanchard default: 389d9fbd03dSHollis Blanchard BUG(); 390d9fbd03dSHollis Blanchard } 391d9fbd03dSHollis Blanchard break; 392d9fbd03dSHollis Blanchard 393d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_FP_UNAVAIL: 394d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 3957b701591SHollis Blanchard kvmppc_account_exit(vcpu, FP_UNAVAIL); 396d9fbd03dSHollis Blanchard r = RESUME_GUEST; 397d9fbd03dSHollis Blanchard break; 398d9fbd03dSHollis Blanchard 3994cd35f67SScott Wood #ifdef CONFIG_SPE 4004cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: { 4014cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) 4024cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 4034cd35f67SScott Wood else 4044cd35f67SScott Wood kvmppc_booke_queue_irqprio(vcpu, 4054cd35f67SScott Wood BOOKE_IRQPRIO_SPE_UNAVAIL); 406bb3a8a17SHollis Blanchard r = RESUME_GUEST; 407bb3a8a17SHollis Blanchard break; 4084cd35f67SScott Wood } 409bb3a8a17SHollis Blanchard 410bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_DATA: 411bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 412bb3a8a17SHollis Blanchard r = RESUME_GUEST; 413bb3a8a17SHollis Blanchard break; 414bb3a8a17SHollis Blanchard 415bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_ROUND: 416bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 417bb3a8a17SHollis Blanchard r = RESUME_GUEST; 418bb3a8a17SHollis Blanchard break; 4194cd35f67SScott Wood #else 4204cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: 4214cd35f67SScott Wood /* 4224cd35f67SScott Wood * Guest wants SPE, but host kernel doesn't support it. Send 4234cd35f67SScott Wood * an "unimplemented operation" program check to the guest. 4244cd35f67SScott Wood */ 4254cd35f67SScott Wood kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 4264cd35f67SScott Wood r = RESUME_GUEST; 4274cd35f67SScott Wood break; 4284cd35f67SScott Wood 4294cd35f67SScott Wood /* 4304cd35f67SScott Wood * These really should never happen without CONFIG_SPE, 4314cd35f67SScott Wood * as we should never enable the real MSR[SPE] in the guest. 4324cd35f67SScott Wood */ 4334cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_DATA: 4344cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_ROUND: 4354cd35f67SScott Wood printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 4364cd35f67SScott Wood __func__, exit_nr, vcpu->arch.pc); 4374cd35f67SScott Wood run->hw.hardware_exit_reason = exit_nr; 4384cd35f67SScott Wood r = RESUME_HOST; 4394cd35f67SScott Wood break; 4404cd35f67SScott Wood #endif 441bb3a8a17SHollis Blanchard 442d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DATA_STORAGE: 443daf5e271SLiu Yu kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 444daf5e271SLiu Yu vcpu->arch.fault_esr); 4457b701591SHollis Blanchard kvmppc_account_exit(vcpu, DSI_EXITS); 446d9fbd03dSHollis Blanchard r = RESUME_GUEST; 447d9fbd03dSHollis Blanchard break; 448d9fbd03dSHollis Blanchard 449d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_INST_STORAGE: 450daf5e271SLiu Yu kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 4517b701591SHollis Blanchard kvmppc_account_exit(vcpu, ISI_EXITS); 452d9fbd03dSHollis Blanchard r = RESUME_GUEST; 453d9fbd03dSHollis Blanchard break; 454d9fbd03dSHollis Blanchard 455d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_SYSCALL: 4562a342ed5SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_PR) && 4572a342ed5SAlexander Graf (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 4582a342ed5SAlexander Graf /* KVM PV hypercalls */ 4592a342ed5SAlexander Graf kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 4602a342ed5SAlexander Graf r = RESUME_GUEST; 4612a342ed5SAlexander Graf } else { 4622a342ed5SAlexander Graf /* Guest syscalls */ 463d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 4642a342ed5SAlexander Graf } 4657b701591SHollis Blanchard kvmppc_account_exit(vcpu, SYSCALL_EXITS); 466d9fbd03dSHollis Blanchard r = RESUME_GUEST; 467d9fbd03dSHollis Blanchard break; 468d9fbd03dSHollis Blanchard 469d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DTLB_MISS: { 470d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.fault_dear; 4717924bd41SHollis Blanchard int gtlb_index; 472475e7cddSHollis Blanchard gpa_t gpaddr; 473d9fbd03dSHollis Blanchard gfn_t gfn; 474d9fbd03dSHollis Blanchard 475*a4cd8b23SScott Wood #ifdef CONFIG_KVM_E500 476*a4cd8b23SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR) && 477*a4cd8b23SScott Wood (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 478*a4cd8b23SScott Wood kvmppc_map_magic(vcpu); 479*a4cd8b23SScott Wood kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 480*a4cd8b23SScott Wood r = RESUME_GUEST; 481*a4cd8b23SScott Wood 482*a4cd8b23SScott Wood break; 483*a4cd8b23SScott Wood } 484*a4cd8b23SScott Wood #endif 485*a4cd8b23SScott Wood 486d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 487fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 4887924bd41SHollis Blanchard if (gtlb_index < 0) { 489d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 490daf5e271SLiu Yu kvmppc_core_queue_dtlb_miss(vcpu, 491daf5e271SLiu Yu vcpu->arch.fault_dear, 492daf5e271SLiu Yu vcpu->arch.fault_esr); 493b52a638cSHollis Blanchard kvmppc_mmu_dtlb_miss(vcpu); 4947b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 495d9fbd03dSHollis Blanchard r = RESUME_GUEST; 496d9fbd03dSHollis Blanchard break; 497d9fbd03dSHollis Blanchard } 498d9fbd03dSHollis Blanchard 499be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 500475e7cddSHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 501d9fbd03dSHollis Blanchard 502d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 503d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 504d9fbd03dSHollis Blanchard * didn't, and it is RAM. This could be because: 505d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 506d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 507d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 508d9fbd03dSHollis Blanchard * invoking the guest. */ 50958a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 5107b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 511d9fbd03dSHollis Blanchard r = RESUME_GUEST; 512d9fbd03dSHollis Blanchard } else { 513d9fbd03dSHollis Blanchard /* Guest has mapped and accessed a page which is not 514d9fbd03dSHollis Blanchard * actually RAM. */ 515475e7cddSHollis Blanchard vcpu->arch.paddr_accessed = gpaddr; 516d9fbd03dSHollis Blanchard r = kvmppc_emulate_mmio(run, vcpu); 5177b701591SHollis Blanchard kvmppc_account_exit(vcpu, MMIO_EXITS); 518d9fbd03dSHollis Blanchard } 519d9fbd03dSHollis Blanchard 520d9fbd03dSHollis Blanchard break; 521d9fbd03dSHollis Blanchard } 522d9fbd03dSHollis Blanchard 523d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_ITLB_MISS: { 524d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.pc; 52589168618SHollis Blanchard gpa_t gpaddr; 526d9fbd03dSHollis Blanchard gfn_t gfn; 5277924bd41SHollis Blanchard int gtlb_index; 528d9fbd03dSHollis Blanchard 529d9fbd03dSHollis Blanchard r = RESUME_GUEST; 530d9fbd03dSHollis Blanchard 531d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 532fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 5337924bd41SHollis Blanchard if (gtlb_index < 0) { 534d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 535d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 536b52a638cSHollis Blanchard kvmppc_mmu_itlb_miss(vcpu); 5377b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 538d9fbd03dSHollis Blanchard break; 539d9fbd03dSHollis Blanchard } 540d9fbd03dSHollis Blanchard 5417b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 542d9fbd03dSHollis Blanchard 543be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 54489168618SHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 545d9fbd03dSHollis Blanchard 546d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 547d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 548d9fbd03dSHollis Blanchard * didn't. This could be because: 549d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 550d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 551d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 552d9fbd03dSHollis Blanchard * invoking the guest. */ 55358a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 554d9fbd03dSHollis Blanchard } else { 555d9fbd03dSHollis Blanchard /* Guest mapped and leaped at non-RAM! */ 556d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 557d9fbd03dSHollis Blanchard } 558d9fbd03dSHollis Blanchard 559d9fbd03dSHollis Blanchard break; 560d9fbd03dSHollis Blanchard } 561d9fbd03dSHollis Blanchard 562d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DEBUG: { 563d9fbd03dSHollis Blanchard u32 dbsr; 564d9fbd03dSHollis Blanchard 565d9fbd03dSHollis Blanchard vcpu->arch.pc = mfspr(SPRN_CSRR0); 566d9fbd03dSHollis Blanchard 567d9fbd03dSHollis Blanchard /* clear IAC events in DBSR register */ 568d9fbd03dSHollis Blanchard dbsr = mfspr(SPRN_DBSR); 569d9fbd03dSHollis Blanchard dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 570d9fbd03dSHollis Blanchard mtspr(SPRN_DBSR, dbsr); 571d9fbd03dSHollis Blanchard 572d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DEBUG; 5737b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEBUG_EXITS); 574d9fbd03dSHollis Blanchard r = RESUME_HOST; 575d9fbd03dSHollis Blanchard break; 576d9fbd03dSHollis Blanchard } 577d9fbd03dSHollis Blanchard 578d9fbd03dSHollis Blanchard default: 579d9fbd03dSHollis Blanchard printk(KERN_EMERG "exit_nr %d\n", exit_nr); 580d9fbd03dSHollis Blanchard BUG(); 581d9fbd03dSHollis Blanchard } 582d9fbd03dSHollis Blanchard 583d9fbd03dSHollis Blanchard local_irq_disable(); 584d9fbd03dSHollis Blanchard 5859dd921cfSHollis Blanchard kvmppc_core_deliver_interrupts(vcpu); 586d9fbd03dSHollis Blanchard 587d9fbd03dSHollis Blanchard if (!(r & RESUME_HOST)) { 588d9fbd03dSHollis Blanchard /* To avoid clobbering exit_reason, only check for signals if 589d9fbd03dSHollis Blanchard * we aren't already exiting to userspace for some other 590d9fbd03dSHollis Blanchard * reason. */ 591d9fbd03dSHollis Blanchard if (signal_pending(current)) { 592d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_INTR; 593d9fbd03dSHollis Blanchard r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 5947b701591SHollis Blanchard kvmppc_account_exit(vcpu, SIGNAL_EXITS); 595d9fbd03dSHollis Blanchard } 596d9fbd03dSHollis Blanchard } 597d9fbd03dSHollis Blanchard 598d9fbd03dSHollis Blanchard return r; 599d9fbd03dSHollis Blanchard } 600d9fbd03dSHollis Blanchard 601d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 602d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 603d9fbd03dSHollis Blanchard { 604082decf2SHollis Blanchard int i; 605082decf2SHollis Blanchard 606d9fbd03dSHollis Blanchard vcpu->arch.pc = 0; 607666e7252SAlexander Graf vcpu->arch.shared->msr = 0; 608ecee273fSScott Wood vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 6098e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 610d9fbd03dSHollis Blanchard 611d9fbd03dSHollis Blanchard vcpu->arch.shadow_pid = 1; 612d9fbd03dSHollis Blanchard 613082decf2SHollis Blanchard /* Eye-catching numbers so we know if the guest takes an interrupt 614082decf2SHollis Blanchard * before it's programmed its own IVPR/IVORs. */ 615d9fbd03dSHollis Blanchard vcpu->arch.ivpr = 0x55550000; 616082decf2SHollis Blanchard for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 617082decf2SHollis Blanchard vcpu->arch.ivor[i] = 0x7700 | i * 4; 618d9fbd03dSHollis Blanchard 61973e75b41SHollis Blanchard kvmppc_init_timing_stats(vcpu); 62073e75b41SHollis Blanchard 6215cbb5106SHollis Blanchard return kvmppc_core_vcpu_setup(vcpu); 622d9fbd03dSHollis Blanchard } 623d9fbd03dSHollis Blanchard 624d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 625d9fbd03dSHollis Blanchard { 626d9fbd03dSHollis Blanchard int i; 627d9fbd03dSHollis Blanchard 628d9fbd03dSHollis Blanchard regs->pc = vcpu->arch.pc; 629992b5b29SAlexander Graf regs->cr = kvmppc_get_cr(vcpu); 630d9fbd03dSHollis Blanchard regs->ctr = vcpu->arch.ctr; 631d9fbd03dSHollis Blanchard regs->lr = vcpu->arch.lr; 632992b5b29SAlexander Graf regs->xer = kvmppc_get_xer(vcpu); 633666e7252SAlexander Graf regs->msr = vcpu->arch.shared->msr; 634de7906c3SAlexander Graf regs->srr0 = vcpu->arch.shared->srr0; 635de7906c3SAlexander Graf regs->srr1 = vcpu->arch.shared->srr1; 636d9fbd03dSHollis Blanchard regs->pid = vcpu->arch.pid; 637a73a9599SAlexander Graf regs->sprg0 = vcpu->arch.shared->sprg0; 638a73a9599SAlexander Graf regs->sprg1 = vcpu->arch.shared->sprg1; 639a73a9599SAlexander Graf regs->sprg2 = vcpu->arch.shared->sprg2; 640a73a9599SAlexander Graf regs->sprg3 = vcpu->arch.shared->sprg3; 641bc9c1933SPeter Tyser regs->sprg4 = vcpu->arch.sprg4; 642bc9c1933SPeter Tyser regs->sprg5 = vcpu->arch.sprg5; 643bc9c1933SPeter Tyser regs->sprg6 = vcpu->arch.sprg6; 644bc9c1933SPeter Tyser regs->sprg7 = vcpu->arch.sprg7; 645d9fbd03dSHollis Blanchard 646d9fbd03dSHollis Blanchard for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 6478e5b26b5SAlexander Graf regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 648d9fbd03dSHollis Blanchard 649d9fbd03dSHollis Blanchard return 0; 650d9fbd03dSHollis Blanchard } 651d9fbd03dSHollis Blanchard 652d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 653d9fbd03dSHollis Blanchard { 654d9fbd03dSHollis Blanchard int i; 655d9fbd03dSHollis Blanchard 656d9fbd03dSHollis Blanchard vcpu->arch.pc = regs->pc; 657992b5b29SAlexander Graf kvmppc_set_cr(vcpu, regs->cr); 658d9fbd03dSHollis Blanchard vcpu->arch.ctr = regs->ctr; 659d9fbd03dSHollis Blanchard vcpu->arch.lr = regs->lr; 660992b5b29SAlexander Graf kvmppc_set_xer(vcpu, regs->xer); 661b8fd68acSHollis Blanchard kvmppc_set_msr(vcpu, regs->msr); 662de7906c3SAlexander Graf vcpu->arch.shared->srr0 = regs->srr0; 663de7906c3SAlexander Graf vcpu->arch.shared->srr1 = regs->srr1; 6645ce941eeSScott Wood kvmppc_set_pid(vcpu, regs->pid); 665a73a9599SAlexander Graf vcpu->arch.shared->sprg0 = regs->sprg0; 666a73a9599SAlexander Graf vcpu->arch.shared->sprg1 = regs->sprg1; 667a73a9599SAlexander Graf vcpu->arch.shared->sprg2 = regs->sprg2; 668a73a9599SAlexander Graf vcpu->arch.shared->sprg3 = regs->sprg3; 669bc9c1933SPeter Tyser vcpu->arch.sprg4 = regs->sprg4; 670bc9c1933SPeter Tyser vcpu->arch.sprg5 = regs->sprg5; 671bc9c1933SPeter Tyser vcpu->arch.sprg6 = regs->sprg6; 672bc9c1933SPeter Tyser vcpu->arch.sprg7 = regs->sprg7; 673d9fbd03dSHollis Blanchard 6748e5b26b5SAlexander Graf for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 6758e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 676d9fbd03dSHollis Blanchard 677d9fbd03dSHollis Blanchard return 0; 678d9fbd03dSHollis Blanchard } 679d9fbd03dSHollis Blanchard 6805ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu, 6815ce941eeSScott Wood struct kvm_sregs *sregs) 6825ce941eeSScott Wood { 6835ce941eeSScott Wood u64 tb = get_tb(); 6845ce941eeSScott Wood 6855ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_BASE; 6865ce941eeSScott Wood 6875ce941eeSScott Wood sregs->u.e.csrr0 = vcpu->arch.csrr0; 6885ce941eeSScott Wood sregs->u.e.csrr1 = vcpu->arch.csrr1; 6895ce941eeSScott Wood sregs->u.e.mcsr = vcpu->arch.mcsr; 6905ce941eeSScott Wood sregs->u.e.esr = vcpu->arch.esr; 6915ce941eeSScott Wood sregs->u.e.dear = vcpu->arch.shared->dar; 6925ce941eeSScott Wood sregs->u.e.tsr = vcpu->arch.tsr; 6935ce941eeSScott Wood sregs->u.e.tcr = vcpu->arch.tcr; 6945ce941eeSScott Wood sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 6955ce941eeSScott Wood sregs->u.e.tb = tb; 6965ce941eeSScott Wood sregs->u.e.vrsave = vcpu->arch.vrsave; 6975ce941eeSScott Wood } 6985ce941eeSScott Wood 6995ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu, 7005ce941eeSScott Wood struct kvm_sregs *sregs) 7015ce941eeSScott Wood { 7025ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 7035ce941eeSScott Wood return 0; 7045ce941eeSScott Wood 7055ce941eeSScott Wood vcpu->arch.csrr0 = sregs->u.e.csrr0; 7065ce941eeSScott Wood vcpu->arch.csrr1 = sregs->u.e.csrr1; 7075ce941eeSScott Wood vcpu->arch.mcsr = sregs->u.e.mcsr; 7085ce941eeSScott Wood vcpu->arch.esr = sregs->u.e.esr; 7095ce941eeSScott Wood vcpu->arch.shared->dar = sregs->u.e.dear; 7105ce941eeSScott Wood vcpu->arch.vrsave = sregs->u.e.vrsave; 7115ce941eeSScott Wood vcpu->arch.tcr = sregs->u.e.tcr; 7125ce941eeSScott Wood 7135ce941eeSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) 7145ce941eeSScott Wood vcpu->arch.dec = sregs->u.e.dec; 7155ce941eeSScott Wood 7165ce941eeSScott Wood kvmppc_emulate_dec(vcpu); 7175ce941eeSScott Wood 7185ce941eeSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) { 7195ce941eeSScott Wood /* 7205ce941eeSScott Wood * FIXME: existing KVM timer handling is incomplete. 7215ce941eeSScott Wood * TSR cannot be read by the guest, and its value in 7225ce941eeSScott Wood * vcpu->arch is always zero. For now, just handle 7235ce941eeSScott Wood * the case where the caller is trying to inject a 7245ce941eeSScott Wood * decrementer interrupt. 7255ce941eeSScott Wood */ 7265ce941eeSScott Wood 7275ce941eeSScott Wood if ((sregs->u.e.tsr & TSR_DIS) && 7285ce941eeSScott Wood (vcpu->arch.tcr & TCR_DIE)) 7295ce941eeSScott Wood kvmppc_core_queue_dec(vcpu); 7305ce941eeSScott Wood } 7315ce941eeSScott Wood 7325ce941eeSScott Wood return 0; 7335ce941eeSScott Wood } 7345ce941eeSScott Wood 7355ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu, 7365ce941eeSScott Wood struct kvm_sregs *sregs) 7375ce941eeSScott Wood { 7385ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_ARCH206; 7395ce941eeSScott Wood 7405ce941eeSScott Wood sregs->u.e.pir = 0; 7415ce941eeSScott Wood sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 7425ce941eeSScott Wood sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 7435ce941eeSScott Wood sregs->u.e.decar = vcpu->arch.decar; 7445ce941eeSScott Wood sregs->u.e.ivpr = vcpu->arch.ivpr; 7455ce941eeSScott Wood } 7465ce941eeSScott Wood 7475ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu, 7485ce941eeSScott Wood struct kvm_sregs *sregs) 7495ce941eeSScott Wood { 7505ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 7515ce941eeSScott Wood return 0; 7525ce941eeSScott Wood 7535ce941eeSScott Wood if (sregs->u.e.pir != 0) 7545ce941eeSScott Wood return -EINVAL; 7555ce941eeSScott Wood 7565ce941eeSScott Wood vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 7575ce941eeSScott Wood vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 7585ce941eeSScott Wood vcpu->arch.decar = sregs->u.e.decar; 7595ce941eeSScott Wood vcpu->arch.ivpr = sregs->u.e.ivpr; 7605ce941eeSScott Wood 7615ce941eeSScott Wood return 0; 7625ce941eeSScott Wood } 7635ce941eeSScott Wood 7645ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 7655ce941eeSScott Wood { 7665ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_IVOR; 7675ce941eeSScott Wood 7685ce941eeSScott Wood sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 7695ce941eeSScott Wood sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 7705ce941eeSScott Wood sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 7715ce941eeSScott Wood sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 7725ce941eeSScott Wood sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 7735ce941eeSScott Wood sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 7745ce941eeSScott Wood sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 7755ce941eeSScott Wood sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 7765ce941eeSScott Wood sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 7775ce941eeSScott Wood sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 7785ce941eeSScott Wood sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 7795ce941eeSScott Wood sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 7805ce941eeSScott Wood sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 7815ce941eeSScott Wood sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 7825ce941eeSScott Wood sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 7835ce941eeSScott Wood sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 7845ce941eeSScott Wood } 7855ce941eeSScott Wood 7865ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 7875ce941eeSScott Wood { 7885ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 7895ce941eeSScott Wood return 0; 7905ce941eeSScott Wood 7915ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 7925ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 7935ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 7945ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 7955ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 7965ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 7975ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 7985ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 7995ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 8005ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 8015ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 8025ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 8035ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 8045ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 8055ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 8065ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 8075ce941eeSScott Wood 8085ce941eeSScott Wood return 0; 8095ce941eeSScott Wood } 8105ce941eeSScott Wood 811d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 812d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 813d9fbd03dSHollis Blanchard { 8145ce941eeSScott Wood sregs->pvr = vcpu->arch.pvr; 8155ce941eeSScott Wood 8165ce941eeSScott Wood get_sregs_base(vcpu, sregs); 8175ce941eeSScott Wood get_sregs_arch206(vcpu, sregs); 8185ce941eeSScott Wood kvmppc_core_get_sregs(vcpu, sregs); 8195ce941eeSScott Wood return 0; 820d9fbd03dSHollis Blanchard } 821d9fbd03dSHollis Blanchard 822d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 823d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 824d9fbd03dSHollis Blanchard { 8255ce941eeSScott Wood int ret; 8265ce941eeSScott Wood 8275ce941eeSScott Wood if (vcpu->arch.pvr != sregs->pvr) 8285ce941eeSScott Wood return -EINVAL; 8295ce941eeSScott Wood 8305ce941eeSScott Wood ret = set_sregs_base(vcpu, sregs); 8315ce941eeSScott Wood if (ret < 0) 8325ce941eeSScott Wood return ret; 8335ce941eeSScott Wood 8345ce941eeSScott Wood ret = set_sregs_arch206(vcpu, sregs); 8355ce941eeSScott Wood if (ret < 0) 8365ce941eeSScott Wood return ret; 8375ce941eeSScott Wood 8385ce941eeSScott Wood return kvmppc_core_set_sregs(vcpu, sregs); 839d9fbd03dSHollis Blanchard } 840d9fbd03dSHollis Blanchard 841d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 842d9fbd03dSHollis Blanchard { 843d9fbd03dSHollis Blanchard return -ENOTSUPP; 844d9fbd03dSHollis Blanchard } 845d9fbd03dSHollis Blanchard 846d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 847d9fbd03dSHollis Blanchard { 848d9fbd03dSHollis Blanchard return -ENOTSUPP; 849d9fbd03dSHollis Blanchard } 850d9fbd03dSHollis Blanchard 851d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 852d9fbd03dSHollis Blanchard struct kvm_translation *tr) 853d9fbd03dSHollis Blanchard { 85498001d8dSAvi Kivity int r; 85598001d8dSAvi Kivity 85698001d8dSAvi Kivity r = kvmppc_core_vcpu_translate(vcpu, tr); 85798001d8dSAvi Kivity return r; 858d9fbd03dSHollis Blanchard } 859d9fbd03dSHollis Blanchard 8604e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 8614e755758SAlexander Graf { 8624e755758SAlexander Graf return -ENOTSUPP; 8634e755758SAlexander Graf } 8644e755758SAlexander Graf 8652986b8c7SStephen Rothwell int __init kvmppc_booke_init(void) 866d9fbd03dSHollis Blanchard { 867d9fbd03dSHollis Blanchard unsigned long ivor[16]; 868d9fbd03dSHollis Blanchard unsigned long max_ivor = 0; 869d9fbd03dSHollis Blanchard int i; 870d9fbd03dSHollis Blanchard 871d9fbd03dSHollis Blanchard /* We install our own exception handlers by hijacking IVPR. IVPR must 872d9fbd03dSHollis Blanchard * be 16-bit aligned, so we need a 64KB allocation. */ 873d9fbd03dSHollis Blanchard kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 874d9fbd03dSHollis Blanchard VCPU_SIZE_ORDER); 875d9fbd03dSHollis Blanchard if (!kvmppc_booke_handlers) 876d9fbd03dSHollis Blanchard return -ENOMEM; 877d9fbd03dSHollis Blanchard 878d9fbd03dSHollis Blanchard /* XXX make sure our handlers are smaller than Linux's */ 879d9fbd03dSHollis Blanchard 880d9fbd03dSHollis Blanchard /* Copy our interrupt handlers to match host IVORs. That way we don't 881d9fbd03dSHollis Blanchard * have to swap the IVORs on every guest/host transition. */ 882d9fbd03dSHollis Blanchard ivor[0] = mfspr(SPRN_IVOR0); 883d9fbd03dSHollis Blanchard ivor[1] = mfspr(SPRN_IVOR1); 884d9fbd03dSHollis Blanchard ivor[2] = mfspr(SPRN_IVOR2); 885d9fbd03dSHollis Blanchard ivor[3] = mfspr(SPRN_IVOR3); 886d9fbd03dSHollis Blanchard ivor[4] = mfspr(SPRN_IVOR4); 887d9fbd03dSHollis Blanchard ivor[5] = mfspr(SPRN_IVOR5); 888d9fbd03dSHollis Blanchard ivor[6] = mfspr(SPRN_IVOR6); 889d9fbd03dSHollis Blanchard ivor[7] = mfspr(SPRN_IVOR7); 890d9fbd03dSHollis Blanchard ivor[8] = mfspr(SPRN_IVOR8); 891d9fbd03dSHollis Blanchard ivor[9] = mfspr(SPRN_IVOR9); 892d9fbd03dSHollis Blanchard ivor[10] = mfspr(SPRN_IVOR10); 893d9fbd03dSHollis Blanchard ivor[11] = mfspr(SPRN_IVOR11); 894d9fbd03dSHollis Blanchard ivor[12] = mfspr(SPRN_IVOR12); 895d9fbd03dSHollis Blanchard ivor[13] = mfspr(SPRN_IVOR13); 896d9fbd03dSHollis Blanchard ivor[14] = mfspr(SPRN_IVOR14); 897d9fbd03dSHollis Blanchard ivor[15] = mfspr(SPRN_IVOR15); 898d9fbd03dSHollis Blanchard 899d9fbd03dSHollis Blanchard for (i = 0; i < 16; i++) { 900d9fbd03dSHollis Blanchard if (ivor[i] > max_ivor) 901d9fbd03dSHollis Blanchard max_ivor = ivor[i]; 902d9fbd03dSHollis Blanchard 903d9fbd03dSHollis Blanchard memcpy((void *)kvmppc_booke_handlers + ivor[i], 904d9fbd03dSHollis Blanchard kvmppc_handlers_start + i * kvmppc_handler_len, 905d9fbd03dSHollis Blanchard kvmppc_handler_len); 906d9fbd03dSHollis Blanchard } 907d9fbd03dSHollis Blanchard flush_icache_range(kvmppc_booke_handlers, 908d9fbd03dSHollis Blanchard kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); 909d9fbd03dSHollis Blanchard 910db93f574SHollis Blanchard return 0; 911d9fbd03dSHollis Blanchard } 912d9fbd03dSHollis Blanchard 913db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void) 914d9fbd03dSHollis Blanchard { 915d9fbd03dSHollis Blanchard free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 916d9fbd03dSHollis Blanchard kvm_exit(); 917d9fbd03dSHollis Blanchard } 918