1d9fbd03dSHollis Blanchard /* 2d9fbd03dSHollis Blanchard * This program is free software; you can redistribute it and/or modify 3d9fbd03dSHollis Blanchard * it under the terms of the GNU General Public License, version 2, as 4d9fbd03dSHollis Blanchard * published by the Free Software Foundation. 5d9fbd03dSHollis Blanchard * 6d9fbd03dSHollis Blanchard * This program is distributed in the hope that it will be useful, 7d9fbd03dSHollis Blanchard * but WITHOUT ANY WARRANTY; without even the implied warranty of 8d9fbd03dSHollis Blanchard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9d9fbd03dSHollis Blanchard * GNU General Public License for more details. 10d9fbd03dSHollis Blanchard * 11d9fbd03dSHollis Blanchard * You should have received a copy of the GNU General Public License 12d9fbd03dSHollis Blanchard * along with this program; if not, write to the Free Software 13d9fbd03dSHollis Blanchard * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14d9fbd03dSHollis Blanchard * 15d9fbd03dSHollis Blanchard * Copyright IBM Corp. 2007 164cd35f67SScott Wood * Copyright 2010-2011 Freescale Semiconductor, Inc. 17d9fbd03dSHollis Blanchard * 18d9fbd03dSHollis Blanchard * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19d9fbd03dSHollis Blanchard * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20d30f6e48SScott Wood * Scott Wood <scottwood@freescale.com> 21d30f6e48SScott Wood * Varun Sethi <varun.sethi@freescale.com> 22d9fbd03dSHollis Blanchard */ 23d9fbd03dSHollis Blanchard 24d9fbd03dSHollis Blanchard #include <linux/errno.h> 25d9fbd03dSHollis Blanchard #include <linux/err.h> 26d9fbd03dSHollis Blanchard #include <linux/kvm_host.h> 275a0e3ad6STejun Heo #include <linux/gfp.h> 28d9fbd03dSHollis Blanchard #include <linux/module.h> 29d9fbd03dSHollis Blanchard #include <linux/vmalloc.h> 30d9fbd03dSHollis Blanchard #include <linux/fs.h> 317924bd41SHollis Blanchard 32d9fbd03dSHollis Blanchard #include <asm/cputable.h> 33d9fbd03dSHollis Blanchard #include <asm/uaccess.h> 34d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h> 35d9fbd03dSHollis Blanchard #include <asm/cacheflush.h> 36d30f6e48SScott Wood #include <asm/dbell.h> 37d30f6e48SScott Wood #include <asm/hw_irq.h> 38d30f6e48SScott Wood #include <asm/irq.h> 39d9fbd03dSHollis Blanchard 40d30f6e48SScott Wood #include "timing.h" 4175f74f0dSHollis Blanchard #include "booke.h" 42d9fbd03dSHollis Blanchard 43d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers; 44d9fbd03dSHollis Blanchard 45d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 46d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 47d9fbd03dSHollis Blanchard 48d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = { 49d9fbd03dSHollis Blanchard { "mmio", VCPU_STAT(mmio_exits) }, 50d9fbd03dSHollis Blanchard { "dcr", VCPU_STAT(dcr_exits) }, 51d9fbd03dSHollis Blanchard { "sig", VCPU_STAT(signal_exits) }, 52d9fbd03dSHollis Blanchard { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 53d9fbd03dSHollis Blanchard { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 54d9fbd03dSHollis Blanchard { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 55d9fbd03dSHollis Blanchard { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 56d9fbd03dSHollis Blanchard { "sysc", VCPU_STAT(syscall_exits) }, 57d9fbd03dSHollis Blanchard { "isi", VCPU_STAT(isi_exits) }, 58d9fbd03dSHollis Blanchard { "dsi", VCPU_STAT(dsi_exits) }, 59d9fbd03dSHollis Blanchard { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 60d9fbd03dSHollis Blanchard { "dec", VCPU_STAT(dec_exits) }, 61d9fbd03dSHollis Blanchard { "ext_intr", VCPU_STAT(ext_intr_exits) }, 62d9fbd03dSHollis Blanchard { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 63d30f6e48SScott Wood { "doorbell", VCPU_STAT(dbell_exits) }, 64d30f6e48SScott Wood { "guest doorbell", VCPU_STAT(gdbell_exits) }, 65d9fbd03dSHollis Blanchard { NULL } 66d9fbd03dSHollis Blanchard }; 67d9fbd03dSHollis Blanchard 68d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */ 69d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 70d9fbd03dSHollis Blanchard { 71d9fbd03dSHollis Blanchard int i; 72d9fbd03dSHollis Blanchard 73666e7252SAlexander Graf printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 745cf8ca22SHollis Blanchard printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 75de7906c3SAlexander Graf printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 76de7906c3SAlexander Graf vcpu->arch.shared->srr1); 77d9fbd03dSHollis Blanchard 78d9fbd03dSHollis Blanchard printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 79d9fbd03dSHollis Blanchard 80d9fbd03dSHollis Blanchard for (i = 0; i < 32; i += 4) { 815cf8ca22SHollis Blanchard printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 828e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i), 838e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+1), 848e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+2), 858e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+3)); 86d9fbd03dSHollis Blanchard } 87d9fbd03dSHollis Blanchard } 88d9fbd03dSHollis Blanchard 894cd35f67SScott Wood #ifdef CONFIG_SPE 904cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 914cd35f67SScott Wood { 924cd35f67SScott Wood preempt_disable(); 934cd35f67SScott Wood enable_kernel_spe(); 944cd35f67SScott Wood kvmppc_save_guest_spe(vcpu); 954cd35f67SScott Wood vcpu->arch.shadow_msr &= ~MSR_SPE; 964cd35f67SScott Wood preempt_enable(); 974cd35f67SScott Wood } 984cd35f67SScott Wood 994cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 1004cd35f67SScott Wood { 1014cd35f67SScott Wood preempt_disable(); 1024cd35f67SScott Wood enable_kernel_spe(); 1034cd35f67SScott Wood kvmppc_load_guest_spe(vcpu); 1044cd35f67SScott Wood vcpu->arch.shadow_msr |= MSR_SPE; 1054cd35f67SScott Wood preempt_enable(); 1064cd35f67SScott Wood } 1074cd35f67SScott Wood 1084cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1094cd35f67SScott Wood { 1104cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) { 1114cd35f67SScott Wood if (!(vcpu->arch.shadow_msr & MSR_SPE)) 1124cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 1134cd35f67SScott Wood } else if (vcpu->arch.shadow_msr & MSR_SPE) { 1144cd35f67SScott Wood kvmppc_vcpu_disable_spe(vcpu); 1154cd35f67SScott Wood } 1164cd35f67SScott Wood } 1174cd35f67SScott Wood #else 1184cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1194cd35f67SScott Wood { 1204cd35f67SScott Wood } 1214cd35f67SScott Wood #endif 1224cd35f67SScott Wood 123dd9ebf1fSLiu Yu /* 124dd9ebf1fSLiu Yu * Helper function for "full" MSR writes. No need to call this if only 125dd9ebf1fSLiu Yu * EE/CE/ME/DE/RI are changing. 126dd9ebf1fSLiu Yu */ 1274cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 1284cd35f67SScott Wood { 129dd9ebf1fSLiu Yu u32 old_msr = vcpu->arch.shared->msr; 1304cd35f67SScott Wood 131d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 132d30f6e48SScott Wood new_msr |= MSR_GS; 133d30f6e48SScott Wood #endif 134d30f6e48SScott Wood 1354cd35f67SScott Wood vcpu->arch.shared->msr = new_msr; 1364cd35f67SScott Wood 137dd9ebf1fSLiu Yu kvmppc_mmu_msr_notify(vcpu, old_msr); 1384cd35f67SScott Wood kvmppc_vcpu_sync_spe(vcpu); 1394cd35f67SScott Wood } 1404cd35f67SScott Wood 141d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 142d4cf3892SHollis Blanchard unsigned int priority) 1439dd921cfSHollis Blanchard { 1449dd921cfSHollis Blanchard set_bit(priority, &vcpu->arch.pending_exceptions); 1459dd921cfSHollis Blanchard } 1469dd921cfSHollis Blanchard 147daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 148daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 1499dd921cfSHollis Blanchard { 150daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 151daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 152daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 153daf5e271SLiu Yu } 154daf5e271SLiu Yu 155daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 156daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 157daf5e271SLiu Yu { 158daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 159daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 160daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 161daf5e271SLiu Yu } 162daf5e271SLiu Yu 163daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 164daf5e271SLiu Yu ulong esr_flags) 165daf5e271SLiu Yu { 166daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 167daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 168daf5e271SLiu Yu } 169daf5e271SLiu Yu 170daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 171daf5e271SLiu Yu { 172daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 173d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 1749dd921cfSHollis Blanchard } 1759dd921cfSHollis Blanchard 1769dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 1779dd921cfSHollis Blanchard { 178d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 1799dd921cfSHollis Blanchard } 1809dd921cfSHollis Blanchard 1819dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 1829dd921cfSHollis Blanchard { 183d4cf3892SHollis Blanchard return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1849dd921cfSHollis Blanchard } 1859dd921cfSHollis Blanchard 1867706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 1877706664dSAlexander Graf { 1887706664dSAlexander Graf clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 1897706664dSAlexander Graf } 1907706664dSAlexander Graf 1919dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 1929dd921cfSHollis Blanchard struct kvm_interrupt *irq) 1939dd921cfSHollis Blanchard { 194c5335f17SAlexander Graf unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 195c5335f17SAlexander Graf 196c5335f17SAlexander Graf if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 197c5335f17SAlexander Graf prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 198c5335f17SAlexander Graf 199c5335f17SAlexander Graf kvmppc_booke_queue_irqprio(vcpu, prio); 2009dd921cfSHollis Blanchard } 2019dd921cfSHollis Blanchard 2024496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, 2034496f974SAlexander Graf struct kvm_interrupt *irq) 2044496f974SAlexander Graf { 2054496f974SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 206c5335f17SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 2074496f974SAlexander Graf } 2084496f974SAlexander Graf 209d30f6e48SScott Wood static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 210d30f6e48SScott Wood { 211d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 212d30f6e48SScott Wood mtspr(SPRN_GSRR0, srr0); 213d30f6e48SScott Wood mtspr(SPRN_GSRR1, srr1); 214d30f6e48SScott Wood #else 215d30f6e48SScott Wood vcpu->arch.shared->srr0 = srr0; 216d30f6e48SScott Wood vcpu->arch.shared->srr1 = srr1; 217d30f6e48SScott Wood #endif 218d30f6e48SScott Wood } 219d30f6e48SScott Wood 220d30f6e48SScott Wood static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 221d30f6e48SScott Wood { 222d30f6e48SScott Wood vcpu->arch.csrr0 = srr0; 223d30f6e48SScott Wood vcpu->arch.csrr1 = srr1; 224d30f6e48SScott Wood } 225d30f6e48SScott Wood 226d30f6e48SScott Wood static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 227d30f6e48SScott Wood { 228d30f6e48SScott Wood if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 229d30f6e48SScott Wood vcpu->arch.dsrr0 = srr0; 230d30f6e48SScott Wood vcpu->arch.dsrr1 = srr1; 231d30f6e48SScott Wood } else { 232d30f6e48SScott Wood set_guest_csrr(vcpu, srr0, srr1); 233d30f6e48SScott Wood } 234d30f6e48SScott Wood } 235d30f6e48SScott Wood 236d30f6e48SScott Wood static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 237d30f6e48SScott Wood { 238d30f6e48SScott Wood vcpu->arch.mcsrr0 = srr0; 239d30f6e48SScott Wood vcpu->arch.mcsrr1 = srr1; 240d30f6e48SScott Wood } 241d30f6e48SScott Wood 242d30f6e48SScott Wood static unsigned long get_guest_dear(struct kvm_vcpu *vcpu) 243d30f6e48SScott Wood { 244d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 245d30f6e48SScott Wood return mfspr(SPRN_GDEAR); 246d30f6e48SScott Wood #else 247d30f6e48SScott Wood return vcpu->arch.shared->dar; 248d30f6e48SScott Wood #endif 249d30f6e48SScott Wood } 250d30f6e48SScott Wood 251d30f6e48SScott Wood static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear) 252d30f6e48SScott Wood { 253d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 254d30f6e48SScott Wood mtspr(SPRN_GDEAR, dear); 255d30f6e48SScott Wood #else 256d30f6e48SScott Wood vcpu->arch.shared->dar = dear; 257d30f6e48SScott Wood #endif 258d30f6e48SScott Wood } 259d30f6e48SScott Wood 260d30f6e48SScott Wood static unsigned long get_guest_esr(struct kvm_vcpu *vcpu) 261d30f6e48SScott Wood { 262d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 263d30f6e48SScott Wood return mfspr(SPRN_GESR); 264d30f6e48SScott Wood #else 265d30f6e48SScott Wood return vcpu->arch.shared->esr; 266d30f6e48SScott Wood #endif 267d30f6e48SScott Wood } 268d30f6e48SScott Wood 269d30f6e48SScott Wood static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr) 270d30f6e48SScott Wood { 271d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 272d30f6e48SScott Wood mtspr(SPRN_GESR, esr); 273d30f6e48SScott Wood #else 274d30f6e48SScott Wood vcpu->arch.shared->esr = esr; 275d30f6e48SScott Wood #endif 276d30f6e48SScott Wood } 277d30f6e48SScott Wood 278d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */ 279d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 280d4cf3892SHollis Blanchard unsigned int priority) 281d9fbd03dSHollis Blanchard { 282d4cf3892SHollis Blanchard int allowed = 0; 28379300f8cSAlexander Graf ulong msr_mask = 0; 284daf5e271SLiu Yu bool update_esr = false, update_dear = false; 2855c6cedf4SAlexander Graf ulong crit_raw = vcpu->arch.shared->critical; 2865c6cedf4SAlexander Graf ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 2875c6cedf4SAlexander Graf bool crit; 288c5335f17SAlexander Graf bool keep_irq = false; 289d30f6e48SScott Wood enum int_class int_class; 2905c6cedf4SAlexander Graf 2915c6cedf4SAlexander Graf /* Truncate crit indicators in 32 bit mode */ 2925c6cedf4SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_SF)) { 2935c6cedf4SAlexander Graf crit_raw &= 0xffffffff; 2945c6cedf4SAlexander Graf crit_r1 &= 0xffffffff; 2955c6cedf4SAlexander Graf } 2965c6cedf4SAlexander Graf 2975c6cedf4SAlexander Graf /* Critical section when crit == r1 */ 2985c6cedf4SAlexander Graf crit = (crit_raw == crit_r1); 2995c6cedf4SAlexander Graf /* ... and we're in supervisor mode */ 3005c6cedf4SAlexander Graf crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 301d9fbd03dSHollis Blanchard 302c5335f17SAlexander Graf if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 303c5335f17SAlexander Graf priority = BOOKE_IRQPRIO_EXTERNAL; 304c5335f17SAlexander Graf keep_irq = true; 305c5335f17SAlexander Graf } 306c5335f17SAlexander Graf 307d4cf3892SHollis Blanchard switch (priority) { 308d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DTLB_MISS: 309daf5e271SLiu Yu case BOOKE_IRQPRIO_DATA_STORAGE: 310daf5e271SLiu Yu update_dear = true; 311daf5e271SLiu Yu /* fall through */ 312daf5e271SLiu Yu case BOOKE_IRQPRIO_INST_STORAGE: 313daf5e271SLiu Yu case BOOKE_IRQPRIO_PROGRAM: 314daf5e271SLiu Yu update_esr = true; 315daf5e271SLiu Yu /* fall through */ 316d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ITLB_MISS: 317d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_SYSCALL: 318d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FP_UNAVAIL: 319bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_UNAVAIL: 320bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_DATA: 321bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_ROUND: 322d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_AP_UNAVAIL: 323d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ALIGNMENT: 324d4cf3892SHollis Blanchard allowed = 1; 32579300f8cSAlexander Graf msr_mask = MSR_CE | MSR_ME | MSR_DE; 326d30f6e48SScott Wood int_class = INT_CLASS_NONCRIT; 327d9fbd03dSHollis Blanchard break; 328d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_CRITICAL: 3294ab96919SAlexander Graf case BOOKE_IRQPRIO_DBELL_CRIT: 330666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_CE; 331d30f6e48SScott Wood allowed = allowed && !crit; 33279300f8cSAlexander Graf msr_mask = MSR_ME; 333d30f6e48SScott Wood int_class = INT_CLASS_CRIT; 334d9fbd03dSHollis Blanchard break; 335d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_MACHINE_CHECK: 336666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_ME; 337d30f6e48SScott Wood allowed = allowed && !crit; 338d30f6e48SScott Wood int_class = INT_CLASS_MC; 339d9fbd03dSHollis Blanchard break; 340d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DECREMENTER: 341d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FIT: 342dfd4d47eSScott Wood keep_irq = true; 343dfd4d47eSScott Wood /* fall through */ 344dfd4d47eSScott Wood case BOOKE_IRQPRIO_EXTERNAL: 3454ab96919SAlexander Graf case BOOKE_IRQPRIO_DBELL: 346666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_EE; 3475c6cedf4SAlexander Graf allowed = allowed && !crit; 34879300f8cSAlexander Graf msr_mask = MSR_CE | MSR_ME | MSR_DE; 349d30f6e48SScott Wood int_class = INT_CLASS_NONCRIT; 350d9fbd03dSHollis Blanchard break; 351d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DEBUG: 352666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_DE; 353d30f6e48SScott Wood allowed = allowed && !crit; 35479300f8cSAlexander Graf msr_mask = MSR_ME; 355d30f6e48SScott Wood int_class = INT_CLASS_CRIT; 356d9fbd03dSHollis Blanchard break; 357d9fbd03dSHollis Blanchard } 358d9fbd03dSHollis Blanchard 359d4cf3892SHollis Blanchard if (allowed) { 360d30f6e48SScott Wood switch (int_class) { 361d30f6e48SScott Wood case INT_CLASS_NONCRIT: 362d30f6e48SScott Wood set_guest_srr(vcpu, vcpu->arch.pc, 363d30f6e48SScott Wood vcpu->arch.shared->msr); 364d30f6e48SScott Wood break; 365d30f6e48SScott Wood case INT_CLASS_CRIT: 366d30f6e48SScott Wood set_guest_csrr(vcpu, vcpu->arch.pc, 367d30f6e48SScott Wood vcpu->arch.shared->msr); 368d30f6e48SScott Wood break; 369d30f6e48SScott Wood case INT_CLASS_DBG: 370d30f6e48SScott Wood set_guest_dsrr(vcpu, vcpu->arch.pc, 371d30f6e48SScott Wood vcpu->arch.shared->msr); 372d30f6e48SScott Wood break; 373d30f6e48SScott Wood case INT_CLASS_MC: 374d30f6e48SScott Wood set_guest_mcsrr(vcpu, vcpu->arch.pc, 375d30f6e48SScott Wood vcpu->arch.shared->msr); 376d30f6e48SScott Wood break; 377d30f6e48SScott Wood } 378d30f6e48SScott Wood 379d4cf3892SHollis Blanchard vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 380daf5e271SLiu Yu if (update_esr == true) 381d30f6e48SScott Wood set_guest_esr(vcpu, vcpu->arch.queued_esr); 382daf5e271SLiu Yu if (update_dear == true) 383d30f6e48SScott Wood set_guest_dear(vcpu, vcpu->arch.queued_dear); 384666e7252SAlexander Graf kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask); 385d4cf3892SHollis Blanchard 386c5335f17SAlexander Graf if (!keep_irq) 387d4cf3892SHollis Blanchard clear_bit(priority, &vcpu->arch.pending_exceptions); 388d4cf3892SHollis Blanchard } 389d4cf3892SHollis Blanchard 390d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 391d30f6e48SScott Wood /* 392d30f6e48SScott Wood * If an interrupt is pending but masked, raise a guest doorbell 393d30f6e48SScott Wood * so that we are notified when the guest enables the relevant 394d30f6e48SScott Wood * MSR bit. 395d30f6e48SScott Wood */ 396d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 397d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 398d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 399d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 400d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 401d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 402d30f6e48SScott Wood #endif 403d30f6e48SScott Wood 404d4cf3892SHollis Blanchard return allowed; 405d9fbd03dSHollis Blanchard } 406d9fbd03dSHollis Blanchard 407dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu) 408dfd4d47eSScott Wood { 409dfd4d47eSScott Wood if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 410dfd4d47eSScott Wood kvmppc_core_queue_dec(vcpu); 411dfd4d47eSScott Wood else 412dfd4d47eSScott Wood kvmppc_core_dequeue_dec(vcpu); 413dfd4d47eSScott Wood } 414dfd4d47eSScott Wood 415c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 416d9fbd03dSHollis Blanchard { 417d9fbd03dSHollis Blanchard unsigned long *pending = &vcpu->arch.pending_exceptions; 418d9fbd03dSHollis Blanchard unsigned int priority; 419d9fbd03dSHollis Blanchard 420dfd4d47eSScott Wood if (vcpu->requests) { 421dfd4d47eSScott Wood if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) { 422dfd4d47eSScott Wood smp_mb(); 423dfd4d47eSScott Wood update_timer_ints(vcpu); 424dfd4d47eSScott Wood } 425dfd4d47eSScott Wood } 426dfd4d47eSScott Wood 4279ab80843SHollis Blanchard priority = __ffs(*pending); 4288b3a00fcSAlexander Graf while (priority < BOOKE_IRQPRIO_MAX) { 429d4cf3892SHollis Blanchard if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 430d9fbd03dSHollis Blanchard break; 431d9fbd03dSHollis Blanchard 432d9fbd03dSHollis Blanchard priority = find_next_bit(pending, 433d9fbd03dSHollis Blanchard BITS_PER_BYTE * sizeof(*pending), 434d9fbd03dSHollis Blanchard priority + 1); 435d9fbd03dSHollis Blanchard } 43690bba358SAlexander Graf 43790bba358SAlexander Graf /* Tell the guest about our interrupt status */ 43829ac26efSScott Wood vcpu->arch.shared->int_pending = !!*pending; 439d9fbd03dSHollis Blanchard } 440d9fbd03dSHollis Blanchard 441c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */ 442a8e4ef84SAlexander Graf int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 443c59a6a3eSScott Wood { 444a8e4ef84SAlexander Graf int r = 0; 445c59a6a3eSScott Wood WARN_ON_ONCE(!irqs_disabled()); 446c59a6a3eSScott Wood 447c59a6a3eSScott Wood kvmppc_core_check_exceptions(vcpu); 448c59a6a3eSScott Wood 449c59a6a3eSScott Wood if (vcpu->arch.shared->msr & MSR_WE) { 450c59a6a3eSScott Wood local_irq_enable(); 451c59a6a3eSScott Wood kvm_vcpu_block(vcpu); 452*966cd0f3SAlexander Graf clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 453c59a6a3eSScott Wood local_irq_disable(); 454c59a6a3eSScott Wood 455c59a6a3eSScott Wood kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 456a8e4ef84SAlexander Graf r = 1; 457c59a6a3eSScott Wood }; 458a8e4ef84SAlexander Graf 459a8e4ef84SAlexander Graf return r; 460a8e4ef84SAlexander Graf } 461a8e4ef84SAlexander Graf 462a8e4ef84SAlexander Graf /* 463a8e4ef84SAlexander Graf * Common checks before entering the guest world. Call with interrupts 464a8e4ef84SAlexander Graf * disabled. 465a8e4ef84SAlexander Graf * 466a8e4ef84SAlexander Graf * returns !0 if a signal is pending and check_signal is true 467a8e4ef84SAlexander Graf */ 46803660ba2SAlexander Graf static int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu) 469a8e4ef84SAlexander Graf { 470a8e4ef84SAlexander Graf int r = 0; 471a8e4ef84SAlexander Graf 472a8e4ef84SAlexander Graf WARN_ON_ONCE(!irqs_disabled()); 473a8e4ef84SAlexander Graf while (true) { 474a8e4ef84SAlexander Graf if (need_resched()) { 475a8e4ef84SAlexander Graf local_irq_enable(); 476a8e4ef84SAlexander Graf cond_resched(); 477a8e4ef84SAlexander Graf local_irq_disable(); 478a8e4ef84SAlexander Graf continue; 479a8e4ef84SAlexander Graf } 480a8e4ef84SAlexander Graf 48103660ba2SAlexander Graf if (signal_pending(current)) { 482a8e4ef84SAlexander Graf r = 1; 483a8e4ef84SAlexander Graf break; 484a8e4ef84SAlexander Graf } 485a8e4ef84SAlexander Graf 486a8e4ef84SAlexander Graf if (kvmppc_core_prepare_to_enter(vcpu)) { 487a8e4ef84SAlexander Graf /* interrupts got enabled in between, so we 488a8e4ef84SAlexander Graf are back at square 1 */ 489a8e4ef84SAlexander Graf continue; 490a8e4ef84SAlexander Graf } 491a8e4ef84SAlexander Graf 492a8e4ef84SAlexander Graf break; 493a8e4ef84SAlexander Graf } 494a8e4ef84SAlexander Graf 495a8e4ef84SAlexander Graf return r; 496c59a6a3eSScott Wood } 497c59a6a3eSScott Wood 498df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 499df6909e5SPaul Mackerras { 500df6909e5SPaul Mackerras int ret; 5018fae845fSScott Wood #ifdef CONFIG_PPC_FPU 5028fae845fSScott Wood unsigned int fpscr; 5038fae845fSScott Wood int fpexc_mode; 5048fae845fSScott Wood u64 fpr[32]; 5058fae845fSScott Wood #endif 506df6909e5SPaul Mackerras 507af8f38b3SAlexander Graf if (!vcpu->arch.sane) { 508af8f38b3SAlexander Graf kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 509af8f38b3SAlexander Graf return -EINVAL; 510af8f38b3SAlexander Graf } 511af8f38b3SAlexander Graf 512df6909e5SPaul Mackerras local_irq_disable(); 51303660ba2SAlexander Graf if (kvmppc_prepare_to_enter(vcpu)) { 5141d1ef222SScott Wood kvm_run->exit_reason = KVM_EXIT_INTR; 5151d1ef222SScott Wood ret = -EINTR; 5161d1ef222SScott Wood goto out; 5171d1ef222SScott Wood } 5181d1ef222SScott Wood 519df6909e5SPaul Mackerras kvm_guest_enter(); 5208fae845fSScott Wood 5218fae845fSScott Wood #ifdef CONFIG_PPC_FPU 5228fae845fSScott Wood /* Save userspace FPU state in stack */ 5238fae845fSScott Wood enable_kernel_fp(); 5248fae845fSScott Wood memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 5258fae845fSScott Wood fpscr = current->thread.fpscr.val; 5268fae845fSScott Wood fpexc_mode = current->thread.fpexc_mode; 5278fae845fSScott Wood 5288fae845fSScott Wood /* Restore guest FPU state to thread */ 5298fae845fSScott Wood memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 5308fae845fSScott Wood current->thread.fpscr.val = vcpu->arch.fpscr; 5318fae845fSScott Wood 5328fae845fSScott Wood /* 5338fae845fSScott Wood * Since we can't trap on MSR_FP in GS-mode, we consider the guest 5348fae845fSScott Wood * as always using the FPU. Kernel usage of FP (via 5358fae845fSScott Wood * enable_kernel_fp()) in this thread must not occur while 5368fae845fSScott Wood * vcpu->fpu_active is set. 5378fae845fSScott Wood */ 5388fae845fSScott Wood vcpu->fpu_active = 1; 5398fae845fSScott Wood 5408fae845fSScott Wood kvmppc_load_guest_fp(vcpu); 5418fae845fSScott Wood #endif 5428fae845fSScott Wood 543df6909e5SPaul Mackerras ret = __kvmppc_vcpu_run(kvm_run, vcpu); 5448fae845fSScott Wood 5458fae845fSScott Wood #ifdef CONFIG_PPC_FPU 5468fae845fSScott Wood kvmppc_save_guest_fp(vcpu); 5478fae845fSScott Wood 5488fae845fSScott Wood vcpu->fpu_active = 0; 5498fae845fSScott Wood 5508fae845fSScott Wood /* Save guest FPU state from thread */ 5518fae845fSScott Wood memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 5528fae845fSScott Wood vcpu->arch.fpscr = current->thread.fpscr.val; 5538fae845fSScott Wood 5548fae845fSScott Wood /* Restore userspace FPU state from stack */ 5558fae845fSScott Wood memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 5568fae845fSScott Wood current->thread.fpscr.val = fpscr; 5578fae845fSScott Wood current->thread.fpexc_mode = fpexc_mode; 5588fae845fSScott Wood #endif 5598fae845fSScott Wood 560df6909e5SPaul Mackerras kvm_guest_exit(); 561df6909e5SPaul Mackerras 5621d1ef222SScott Wood out: 5631d1ef222SScott Wood local_irq_enable(); 564df6909e5SPaul Mackerras return ret; 565df6909e5SPaul Mackerras } 566df6909e5SPaul Mackerras 567d30f6e48SScott Wood static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 568d9fbd03dSHollis Blanchard { 569d9fbd03dSHollis Blanchard enum emulation_result er; 570d9fbd03dSHollis Blanchard 571d9fbd03dSHollis Blanchard er = kvmppc_emulate_instruction(run, vcpu); 572d9fbd03dSHollis Blanchard switch (er) { 573d9fbd03dSHollis Blanchard case EMULATE_DONE: 57473e75b41SHollis Blanchard /* don't overwrite subtypes, just account kvm_stats */ 5757b701591SHollis Blanchard kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 576d9fbd03dSHollis Blanchard /* Future optimization: only reload non-volatiles if 577d9fbd03dSHollis Blanchard * they were actually modified by emulation. */ 578d30f6e48SScott Wood return RESUME_GUEST_NV; 579d30f6e48SScott Wood 580d9fbd03dSHollis Blanchard case EMULATE_DO_DCR: 581d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DCR; 582d30f6e48SScott Wood return RESUME_HOST; 583d30f6e48SScott Wood 584d9fbd03dSHollis Blanchard case EMULATE_FAIL: 5855cf8ca22SHollis Blanchard printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 586d9fbd03dSHollis Blanchard __func__, vcpu->arch.pc, vcpu->arch.last_inst); 587d9fbd03dSHollis Blanchard /* For debugging, encode the failing instruction and 588d9fbd03dSHollis Blanchard * report it to userspace. */ 589d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason = ~0ULL << 32; 590d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 591d1ff5499SAlexander Graf kvmppc_core_queue_program(vcpu, ESR_PIL); 592d30f6e48SScott Wood return RESUME_HOST; 593d30f6e48SScott Wood 594d9fbd03dSHollis Blanchard default: 595d9fbd03dSHollis Blanchard BUG(); 596d9fbd03dSHollis Blanchard } 597d30f6e48SScott Wood } 598d30f6e48SScott Wood 5994e642ccbSAlexander Graf static void kvmppc_fill_pt_regs(struct pt_regs *regs) 6004e642ccbSAlexander Graf { 6014e642ccbSAlexander Graf ulong r1, ip, msr, lr; 6024e642ccbSAlexander Graf 6034e642ccbSAlexander Graf asm("mr %0, 1" : "=r"(r1)); 6044e642ccbSAlexander Graf asm("mflr %0" : "=r"(lr)); 6054e642ccbSAlexander Graf asm("mfmsr %0" : "=r"(msr)); 6064e642ccbSAlexander Graf asm("bl 1f; 1: mflr %0" : "=r"(ip)); 6074e642ccbSAlexander Graf 6084e642ccbSAlexander Graf memset(regs, 0, sizeof(*regs)); 6094e642ccbSAlexander Graf regs->gpr[1] = r1; 6104e642ccbSAlexander Graf regs->nip = ip; 6114e642ccbSAlexander Graf regs->msr = msr; 6124e642ccbSAlexander Graf regs->link = lr; 6134e642ccbSAlexander Graf } 6144e642ccbSAlexander Graf 6154e642ccbSAlexander Graf static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 6164e642ccbSAlexander Graf unsigned int exit_nr) 6174e642ccbSAlexander Graf { 6184e642ccbSAlexander Graf struct pt_regs regs; 6194e642ccbSAlexander Graf 6204e642ccbSAlexander Graf switch (exit_nr) { 6214e642ccbSAlexander Graf case BOOKE_INTERRUPT_EXTERNAL: 6224e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 6234e642ccbSAlexander Graf do_IRQ(®s); 6244e642ccbSAlexander Graf break; 6254e642ccbSAlexander Graf case BOOKE_INTERRUPT_DECREMENTER: 6264e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 6274e642ccbSAlexander Graf timer_interrupt(®s); 6284e642ccbSAlexander Graf break; 6294e642ccbSAlexander Graf #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64) 6304e642ccbSAlexander Graf case BOOKE_INTERRUPT_DOORBELL: 6314e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 6324e642ccbSAlexander Graf doorbell_exception(®s); 6334e642ccbSAlexander Graf break; 6344e642ccbSAlexander Graf #endif 6354e642ccbSAlexander Graf case BOOKE_INTERRUPT_MACHINE_CHECK: 6364e642ccbSAlexander Graf /* FIXME */ 6374e642ccbSAlexander Graf break; 6387cc1e8eeSAlexander Graf case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 6397cc1e8eeSAlexander Graf kvmppc_fill_pt_regs(®s); 6407cc1e8eeSAlexander Graf performance_monitor_exception(®s); 6417cc1e8eeSAlexander Graf break; 6424e642ccbSAlexander Graf } 6434e642ccbSAlexander Graf } 6444e642ccbSAlexander Graf 645d30f6e48SScott Wood /** 646d30f6e48SScott Wood * kvmppc_handle_exit 647d30f6e48SScott Wood * 648d30f6e48SScott Wood * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 649d30f6e48SScott Wood */ 650d30f6e48SScott Wood int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 651d30f6e48SScott Wood unsigned int exit_nr) 652d30f6e48SScott Wood { 653d30f6e48SScott Wood int r = RESUME_HOST; 654d30f6e48SScott Wood 655d30f6e48SScott Wood /* update before a new last_exit_type is rewritten */ 656d30f6e48SScott Wood kvmppc_update_timing_stats(vcpu); 657d30f6e48SScott Wood 6584e642ccbSAlexander Graf /* restart interrupts if they were meant for the host */ 6594e642ccbSAlexander Graf kvmppc_restart_interrupt(vcpu, exit_nr); 660d30f6e48SScott Wood 661d30f6e48SScott Wood local_irq_enable(); 662d30f6e48SScott Wood 663d30f6e48SScott Wood run->exit_reason = KVM_EXIT_UNKNOWN; 664d30f6e48SScott Wood run->ready_for_interrupt_injection = 1; 665d30f6e48SScott Wood 666d30f6e48SScott Wood switch (exit_nr) { 667d30f6e48SScott Wood case BOOKE_INTERRUPT_MACHINE_CHECK: 668c35c9d84SAlexander Graf printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 669c35c9d84SAlexander Graf kvmppc_dump_vcpu(vcpu); 670c35c9d84SAlexander Graf /* For debugging, send invalid exit reason to user space */ 671c35c9d84SAlexander Graf run->hw.hardware_exit_reason = ~1ULL << 32; 672c35c9d84SAlexander Graf run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 673c35c9d84SAlexander Graf r = RESUME_HOST; 674d30f6e48SScott Wood break; 675d30f6e48SScott Wood 676d30f6e48SScott Wood case BOOKE_INTERRUPT_EXTERNAL: 677d30f6e48SScott Wood kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 678d30f6e48SScott Wood r = RESUME_GUEST; 679d30f6e48SScott Wood break; 680d30f6e48SScott Wood 681d30f6e48SScott Wood case BOOKE_INTERRUPT_DECREMENTER: 682d30f6e48SScott Wood kvmppc_account_exit(vcpu, DEC_EXITS); 683d30f6e48SScott Wood r = RESUME_GUEST; 684d30f6e48SScott Wood break; 685d30f6e48SScott Wood 686d30f6e48SScott Wood case BOOKE_INTERRUPT_DOORBELL: 687d30f6e48SScott Wood kvmppc_account_exit(vcpu, DBELL_EXITS); 688d30f6e48SScott Wood r = RESUME_GUEST; 689d30f6e48SScott Wood break; 690d30f6e48SScott Wood 691d30f6e48SScott Wood case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 692d30f6e48SScott Wood kvmppc_account_exit(vcpu, GDBELL_EXITS); 693d30f6e48SScott Wood 694d30f6e48SScott Wood /* 695d30f6e48SScott Wood * We are here because there is a pending guest interrupt 696d30f6e48SScott Wood * which could not be delivered as MSR_CE or MSR_ME was not 697d30f6e48SScott Wood * set. Once we break from here we will retry delivery. 698d30f6e48SScott Wood */ 699d30f6e48SScott Wood r = RESUME_GUEST; 700d30f6e48SScott Wood break; 701d30f6e48SScott Wood 702d30f6e48SScott Wood case BOOKE_INTERRUPT_GUEST_DBELL: 703d30f6e48SScott Wood kvmppc_account_exit(vcpu, GDBELL_EXITS); 704d30f6e48SScott Wood 705d30f6e48SScott Wood /* 706d30f6e48SScott Wood * We are here because there is a pending guest interrupt 707d30f6e48SScott Wood * which could not be delivered as MSR_EE was not set. Once 708d30f6e48SScott Wood * we break from here we will retry delivery. 709d30f6e48SScott Wood */ 710d30f6e48SScott Wood r = RESUME_GUEST; 711d30f6e48SScott Wood break; 712d30f6e48SScott Wood 71395f2e921SAlexander Graf case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 71495f2e921SAlexander Graf r = RESUME_GUEST; 71595f2e921SAlexander Graf break; 71695f2e921SAlexander Graf 717d30f6e48SScott Wood case BOOKE_INTERRUPT_HV_PRIV: 718d30f6e48SScott Wood r = emulation_exit(run, vcpu); 719d30f6e48SScott Wood break; 720d30f6e48SScott Wood 721d30f6e48SScott Wood case BOOKE_INTERRUPT_PROGRAM: 722d30f6e48SScott Wood if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 7230268597cSAlexander Graf /* 7240268597cSAlexander Graf * Program traps generated by user-level software must 7250268597cSAlexander Graf * be handled by the guest kernel. 7260268597cSAlexander Graf * 7270268597cSAlexander Graf * In GS mode, hypervisor privileged instructions trap 7280268597cSAlexander Graf * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 7290268597cSAlexander Graf * actual program interrupts, handled by the guest. 7300268597cSAlexander Graf */ 731d30f6e48SScott Wood kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 732d30f6e48SScott Wood r = RESUME_GUEST; 733d30f6e48SScott Wood kvmppc_account_exit(vcpu, USR_PR_INST); 734d30f6e48SScott Wood break; 735d30f6e48SScott Wood } 736d30f6e48SScott Wood 737d30f6e48SScott Wood r = emulation_exit(run, vcpu); 738d9fbd03dSHollis Blanchard break; 739d9fbd03dSHollis Blanchard 740d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_FP_UNAVAIL: 741d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 7427b701591SHollis Blanchard kvmppc_account_exit(vcpu, FP_UNAVAIL); 743d9fbd03dSHollis Blanchard r = RESUME_GUEST; 744d9fbd03dSHollis Blanchard break; 745d9fbd03dSHollis Blanchard 7464cd35f67SScott Wood #ifdef CONFIG_SPE 7474cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: { 7484cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) 7494cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 7504cd35f67SScott Wood else 7514cd35f67SScott Wood kvmppc_booke_queue_irqprio(vcpu, 7524cd35f67SScott Wood BOOKE_IRQPRIO_SPE_UNAVAIL); 753bb3a8a17SHollis Blanchard r = RESUME_GUEST; 754bb3a8a17SHollis Blanchard break; 7554cd35f67SScott Wood } 756bb3a8a17SHollis Blanchard 757bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_DATA: 758bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 759bb3a8a17SHollis Blanchard r = RESUME_GUEST; 760bb3a8a17SHollis Blanchard break; 761bb3a8a17SHollis Blanchard 762bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_ROUND: 763bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 764bb3a8a17SHollis Blanchard r = RESUME_GUEST; 765bb3a8a17SHollis Blanchard break; 7664cd35f67SScott Wood #else 7674cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: 7684cd35f67SScott Wood /* 7694cd35f67SScott Wood * Guest wants SPE, but host kernel doesn't support it. Send 7704cd35f67SScott Wood * an "unimplemented operation" program check to the guest. 7714cd35f67SScott Wood */ 7724cd35f67SScott Wood kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 7734cd35f67SScott Wood r = RESUME_GUEST; 7744cd35f67SScott Wood break; 7754cd35f67SScott Wood 7764cd35f67SScott Wood /* 7774cd35f67SScott Wood * These really should never happen without CONFIG_SPE, 7784cd35f67SScott Wood * as we should never enable the real MSR[SPE] in the guest. 7794cd35f67SScott Wood */ 7804cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_DATA: 7814cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_ROUND: 7824cd35f67SScott Wood printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 7834cd35f67SScott Wood __func__, exit_nr, vcpu->arch.pc); 7844cd35f67SScott Wood run->hw.hardware_exit_reason = exit_nr; 7854cd35f67SScott Wood r = RESUME_HOST; 7864cd35f67SScott Wood break; 7874cd35f67SScott Wood #endif 788bb3a8a17SHollis Blanchard 789d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DATA_STORAGE: 790daf5e271SLiu Yu kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 791daf5e271SLiu Yu vcpu->arch.fault_esr); 7927b701591SHollis Blanchard kvmppc_account_exit(vcpu, DSI_EXITS); 793d9fbd03dSHollis Blanchard r = RESUME_GUEST; 794d9fbd03dSHollis Blanchard break; 795d9fbd03dSHollis Blanchard 796d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_INST_STORAGE: 797daf5e271SLiu Yu kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 7987b701591SHollis Blanchard kvmppc_account_exit(vcpu, ISI_EXITS); 799d9fbd03dSHollis Blanchard r = RESUME_GUEST; 800d9fbd03dSHollis Blanchard break; 801d9fbd03dSHollis Blanchard 802d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 803d30f6e48SScott Wood case BOOKE_INTERRUPT_HV_SYSCALL: 804d30f6e48SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR)) { 805d30f6e48SScott Wood kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 806d30f6e48SScott Wood } else { 807d30f6e48SScott Wood /* 808d30f6e48SScott Wood * hcall from guest userspace -- send privileged 809d30f6e48SScott Wood * instruction program check. 810d30f6e48SScott Wood */ 811d30f6e48SScott Wood kvmppc_core_queue_program(vcpu, ESR_PPR); 812d30f6e48SScott Wood } 813d30f6e48SScott Wood 814d30f6e48SScott Wood r = RESUME_GUEST; 815d30f6e48SScott Wood break; 816d30f6e48SScott Wood #else 817d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_SYSCALL: 8182a342ed5SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_PR) && 8192a342ed5SAlexander Graf (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 8202a342ed5SAlexander Graf /* KVM PV hypercalls */ 8212a342ed5SAlexander Graf kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 8222a342ed5SAlexander Graf r = RESUME_GUEST; 8232a342ed5SAlexander Graf } else { 8242a342ed5SAlexander Graf /* Guest syscalls */ 825d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 8262a342ed5SAlexander Graf } 8277b701591SHollis Blanchard kvmppc_account_exit(vcpu, SYSCALL_EXITS); 828d9fbd03dSHollis Blanchard r = RESUME_GUEST; 829d9fbd03dSHollis Blanchard break; 830d30f6e48SScott Wood #endif 831d9fbd03dSHollis Blanchard 832d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DTLB_MISS: { 833d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.fault_dear; 8347924bd41SHollis Blanchard int gtlb_index; 835475e7cddSHollis Blanchard gpa_t gpaddr; 836d9fbd03dSHollis Blanchard gfn_t gfn; 837d9fbd03dSHollis Blanchard 838bf7ca4bdSAlexander Graf #ifdef CONFIG_KVM_E500V2 839a4cd8b23SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR) && 840a4cd8b23SScott Wood (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 841a4cd8b23SScott Wood kvmppc_map_magic(vcpu); 842a4cd8b23SScott Wood kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 843a4cd8b23SScott Wood r = RESUME_GUEST; 844a4cd8b23SScott Wood 845a4cd8b23SScott Wood break; 846a4cd8b23SScott Wood } 847a4cd8b23SScott Wood #endif 848a4cd8b23SScott Wood 849d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 850fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 8517924bd41SHollis Blanchard if (gtlb_index < 0) { 852d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 853daf5e271SLiu Yu kvmppc_core_queue_dtlb_miss(vcpu, 854daf5e271SLiu Yu vcpu->arch.fault_dear, 855daf5e271SLiu Yu vcpu->arch.fault_esr); 856b52a638cSHollis Blanchard kvmppc_mmu_dtlb_miss(vcpu); 8577b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 858d9fbd03dSHollis Blanchard r = RESUME_GUEST; 859d9fbd03dSHollis Blanchard break; 860d9fbd03dSHollis Blanchard } 861d9fbd03dSHollis Blanchard 862be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 863475e7cddSHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 864d9fbd03dSHollis Blanchard 865d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 866d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 867d9fbd03dSHollis Blanchard * didn't, and it is RAM. This could be because: 868d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 869d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 870d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 871d9fbd03dSHollis Blanchard * invoking the guest. */ 87258a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 8737b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 874d9fbd03dSHollis Blanchard r = RESUME_GUEST; 875d9fbd03dSHollis Blanchard } else { 876d9fbd03dSHollis Blanchard /* Guest has mapped and accessed a page which is not 877d9fbd03dSHollis Blanchard * actually RAM. */ 878475e7cddSHollis Blanchard vcpu->arch.paddr_accessed = gpaddr; 8796020c0f6SAlexander Graf vcpu->arch.vaddr_accessed = eaddr; 880d9fbd03dSHollis Blanchard r = kvmppc_emulate_mmio(run, vcpu); 8817b701591SHollis Blanchard kvmppc_account_exit(vcpu, MMIO_EXITS); 882d9fbd03dSHollis Blanchard } 883d9fbd03dSHollis Blanchard 884d9fbd03dSHollis Blanchard break; 885d9fbd03dSHollis Blanchard } 886d9fbd03dSHollis Blanchard 887d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_ITLB_MISS: { 888d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.pc; 88989168618SHollis Blanchard gpa_t gpaddr; 890d9fbd03dSHollis Blanchard gfn_t gfn; 8917924bd41SHollis Blanchard int gtlb_index; 892d9fbd03dSHollis Blanchard 893d9fbd03dSHollis Blanchard r = RESUME_GUEST; 894d9fbd03dSHollis Blanchard 895d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 896fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 8977924bd41SHollis Blanchard if (gtlb_index < 0) { 898d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 899d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 900b52a638cSHollis Blanchard kvmppc_mmu_itlb_miss(vcpu); 9017b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 902d9fbd03dSHollis Blanchard break; 903d9fbd03dSHollis Blanchard } 904d9fbd03dSHollis Blanchard 9057b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 906d9fbd03dSHollis Blanchard 907be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 90889168618SHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 909d9fbd03dSHollis Blanchard 910d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 911d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 912d9fbd03dSHollis Blanchard * didn't. This could be because: 913d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 914d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 915d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 916d9fbd03dSHollis Blanchard * invoking the guest. */ 91758a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 918d9fbd03dSHollis Blanchard } else { 919d9fbd03dSHollis Blanchard /* Guest mapped and leaped at non-RAM! */ 920d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 921d9fbd03dSHollis Blanchard } 922d9fbd03dSHollis Blanchard 923d9fbd03dSHollis Blanchard break; 924d9fbd03dSHollis Blanchard } 925d9fbd03dSHollis Blanchard 926d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DEBUG: { 927d9fbd03dSHollis Blanchard u32 dbsr; 928d9fbd03dSHollis Blanchard 929d9fbd03dSHollis Blanchard vcpu->arch.pc = mfspr(SPRN_CSRR0); 930d9fbd03dSHollis Blanchard 931d9fbd03dSHollis Blanchard /* clear IAC events in DBSR register */ 932d9fbd03dSHollis Blanchard dbsr = mfspr(SPRN_DBSR); 933d9fbd03dSHollis Blanchard dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 934d9fbd03dSHollis Blanchard mtspr(SPRN_DBSR, dbsr); 935d9fbd03dSHollis Blanchard 936d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DEBUG; 9377b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEBUG_EXITS); 938d9fbd03dSHollis Blanchard r = RESUME_HOST; 939d9fbd03dSHollis Blanchard break; 940d9fbd03dSHollis Blanchard } 941d9fbd03dSHollis Blanchard 942d9fbd03dSHollis Blanchard default: 943d9fbd03dSHollis Blanchard printk(KERN_EMERG "exit_nr %d\n", exit_nr); 944d9fbd03dSHollis Blanchard BUG(); 945d9fbd03dSHollis Blanchard } 946d9fbd03dSHollis Blanchard 947a8e4ef84SAlexander Graf /* 948a8e4ef84SAlexander Graf * To avoid clobbering exit_reason, only check for signals if we 949a8e4ef84SAlexander Graf * aren't already exiting to userspace for some other reason. 950a8e4ef84SAlexander Graf */ 95103660ba2SAlexander Graf if (!(r & RESUME_HOST)) { 952d9fbd03dSHollis Blanchard local_irq_disable(); 95303660ba2SAlexander Graf if (kvmppc_prepare_to_enter(vcpu)) { 954d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_INTR; 955d9fbd03dSHollis Blanchard r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 9567b701591SHollis Blanchard kvmppc_account_exit(vcpu, SIGNAL_EXITS); 957d9fbd03dSHollis Blanchard } 95803660ba2SAlexander Graf } 959d9fbd03dSHollis Blanchard 960d9fbd03dSHollis Blanchard return r; 961d9fbd03dSHollis Blanchard } 962d9fbd03dSHollis Blanchard 963d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 964d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 965d9fbd03dSHollis Blanchard { 966082decf2SHollis Blanchard int i; 967af8f38b3SAlexander Graf int r; 968082decf2SHollis Blanchard 969d9fbd03dSHollis Blanchard vcpu->arch.pc = 0; 970b5904972SScott Wood vcpu->arch.shared->pir = vcpu->vcpu_id; 9718e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 972d30f6e48SScott Wood kvmppc_set_msr(vcpu, 0); 973d9fbd03dSHollis Blanchard 974d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 975d30f6e48SScott Wood vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 976d9fbd03dSHollis Blanchard vcpu->arch.shadow_pid = 1; 977d30f6e48SScott Wood vcpu->arch.shared->msr = 0; 978d30f6e48SScott Wood #endif 979d9fbd03dSHollis Blanchard 980082decf2SHollis Blanchard /* Eye-catching numbers so we know if the guest takes an interrupt 981082decf2SHollis Blanchard * before it's programmed its own IVPR/IVORs. */ 982d9fbd03dSHollis Blanchard vcpu->arch.ivpr = 0x55550000; 983082decf2SHollis Blanchard for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 984082decf2SHollis Blanchard vcpu->arch.ivor[i] = 0x7700 | i * 4; 985d9fbd03dSHollis Blanchard 98673e75b41SHollis Blanchard kvmppc_init_timing_stats(vcpu); 98773e75b41SHollis Blanchard 988af8f38b3SAlexander Graf r = kvmppc_core_vcpu_setup(vcpu); 989af8f38b3SAlexander Graf kvmppc_sanity_check(vcpu); 990af8f38b3SAlexander Graf return r; 991d9fbd03dSHollis Blanchard } 992d9fbd03dSHollis Blanchard 993d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 994d9fbd03dSHollis Blanchard { 995d9fbd03dSHollis Blanchard int i; 996d9fbd03dSHollis Blanchard 997d9fbd03dSHollis Blanchard regs->pc = vcpu->arch.pc; 998992b5b29SAlexander Graf regs->cr = kvmppc_get_cr(vcpu); 999d9fbd03dSHollis Blanchard regs->ctr = vcpu->arch.ctr; 1000d9fbd03dSHollis Blanchard regs->lr = vcpu->arch.lr; 1001992b5b29SAlexander Graf regs->xer = kvmppc_get_xer(vcpu); 1002666e7252SAlexander Graf regs->msr = vcpu->arch.shared->msr; 1003de7906c3SAlexander Graf regs->srr0 = vcpu->arch.shared->srr0; 1004de7906c3SAlexander Graf regs->srr1 = vcpu->arch.shared->srr1; 1005d9fbd03dSHollis Blanchard regs->pid = vcpu->arch.pid; 1006a73a9599SAlexander Graf regs->sprg0 = vcpu->arch.shared->sprg0; 1007a73a9599SAlexander Graf regs->sprg1 = vcpu->arch.shared->sprg1; 1008a73a9599SAlexander Graf regs->sprg2 = vcpu->arch.shared->sprg2; 1009a73a9599SAlexander Graf regs->sprg3 = vcpu->arch.shared->sprg3; 1010b5904972SScott Wood regs->sprg4 = vcpu->arch.shared->sprg4; 1011b5904972SScott Wood regs->sprg5 = vcpu->arch.shared->sprg5; 1012b5904972SScott Wood regs->sprg6 = vcpu->arch.shared->sprg6; 1013b5904972SScott Wood regs->sprg7 = vcpu->arch.shared->sprg7; 1014d9fbd03dSHollis Blanchard 1015d9fbd03dSHollis Blanchard for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 10168e5b26b5SAlexander Graf regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1017d9fbd03dSHollis Blanchard 1018d9fbd03dSHollis Blanchard return 0; 1019d9fbd03dSHollis Blanchard } 1020d9fbd03dSHollis Blanchard 1021d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1022d9fbd03dSHollis Blanchard { 1023d9fbd03dSHollis Blanchard int i; 1024d9fbd03dSHollis Blanchard 1025d9fbd03dSHollis Blanchard vcpu->arch.pc = regs->pc; 1026992b5b29SAlexander Graf kvmppc_set_cr(vcpu, regs->cr); 1027d9fbd03dSHollis Blanchard vcpu->arch.ctr = regs->ctr; 1028d9fbd03dSHollis Blanchard vcpu->arch.lr = regs->lr; 1029992b5b29SAlexander Graf kvmppc_set_xer(vcpu, regs->xer); 1030b8fd68acSHollis Blanchard kvmppc_set_msr(vcpu, regs->msr); 1031de7906c3SAlexander Graf vcpu->arch.shared->srr0 = regs->srr0; 1032de7906c3SAlexander Graf vcpu->arch.shared->srr1 = regs->srr1; 10335ce941eeSScott Wood kvmppc_set_pid(vcpu, regs->pid); 1034a73a9599SAlexander Graf vcpu->arch.shared->sprg0 = regs->sprg0; 1035a73a9599SAlexander Graf vcpu->arch.shared->sprg1 = regs->sprg1; 1036a73a9599SAlexander Graf vcpu->arch.shared->sprg2 = regs->sprg2; 1037a73a9599SAlexander Graf vcpu->arch.shared->sprg3 = regs->sprg3; 1038b5904972SScott Wood vcpu->arch.shared->sprg4 = regs->sprg4; 1039b5904972SScott Wood vcpu->arch.shared->sprg5 = regs->sprg5; 1040b5904972SScott Wood vcpu->arch.shared->sprg6 = regs->sprg6; 1041b5904972SScott Wood vcpu->arch.shared->sprg7 = regs->sprg7; 1042d9fbd03dSHollis Blanchard 10438e5b26b5SAlexander Graf for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 10448e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1045d9fbd03dSHollis Blanchard 1046d9fbd03dSHollis Blanchard return 0; 1047d9fbd03dSHollis Blanchard } 1048d9fbd03dSHollis Blanchard 10495ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu, 10505ce941eeSScott Wood struct kvm_sregs *sregs) 10515ce941eeSScott Wood { 10525ce941eeSScott Wood u64 tb = get_tb(); 10535ce941eeSScott Wood 10545ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_BASE; 10555ce941eeSScott Wood 10565ce941eeSScott Wood sregs->u.e.csrr0 = vcpu->arch.csrr0; 10575ce941eeSScott Wood sregs->u.e.csrr1 = vcpu->arch.csrr1; 10585ce941eeSScott Wood sregs->u.e.mcsr = vcpu->arch.mcsr; 1059d30f6e48SScott Wood sregs->u.e.esr = get_guest_esr(vcpu); 1060d30f6e48SScott Wood sregs->u.e.dear = get_guest_dear(vcpu); 10615ce941eeSScott Wood sregs->u.e.tsr = vcpu->arch.tsr; 10625ce941eeSScott Wood sregs->u.e.tcr = vcpu->arch.tcr; 10635ce941eeSScott Wood sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 10645ce941eeSScott Wood sregs->u.e.tb = tb; 10655ce941eeSScott Wood sregs->u.e.vrsave = vcpu->arch.vrsave; 10665ce941eeSScott Wood } 10675ce941eeSScott Wood 10685ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu, 10695ce941eeSScott Wood struct kvm_sregs *sregs) 10705ce941eeSScott Wood { 10715ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 10725ce941eeSScott Wood return 0; 10735ce941eeSScott Wood 10745ce941eeSScott Wood vcpu->arch.csrr0 = sregs->u.e.csrr0; 10755ce941eeSScott Wood vcpu->arch.csrr1 = sregs->u.e.csrr1; 10765ce941eeSScott Wood vcpu->arch.mcsr = sregs->u.e.mcsr; 1077d30f6e48SScott Wood set_guest_esr(vcpu, sregs->u.e.esr); 1078d30f6e48SScott Wood set_guest_dear(vcpu, sregs->u.e.dear); 10795ce941eeSScott Wood vcpu->arch.vrsave = sregs->u.e.vrsave; 1080dfd4d47eSScott Wood kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 10815ce941eeSScott Wood 1082dfd4d47eSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 10835ce941eeSScott Wood vcpu->arch.dec = sregs->u.e.dec; 10845ce941eeSScott Wood kvmppc_emulate_dec(vcpu); 1085dfd4d47eSScott Wood } 10865ce941eeSScott Wood 10875ce941eeSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) { 1088dfd4d47eSScott Wood vcpu->arch.tsr = sregs->u.e.tsr; 1089dfd4d47eSScott Wood update_timer_ints(vcpu); 10905ce941eeSScott Wood } 10915ce941eeSScott Wood 10925ce941eeSScott Wood return 0; 10935ce941eeSScott Wood } 10945ce941eeSScott Wood 10955ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu, 10965ce941eeSScott Wood struct kvm_sregs *sregs) 10975ce941eeSScott Wood { 10985ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_ARCH206; 10995ce941eeSScott Wood 1100841741f2SScott Wood sregs->u.e.pir = vcpu->vcpu_id; 11015ce941eeSScott Wood sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 11025ce941eeSScott Wood sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 11035ce941eeSScott Wood sregs->u.e.decar = vcpu->arch.decar; 11045ce941eeSScott Wood sregs->u.e.ivpr = vcpu->arch.ivpr; 11055ce941eeSScott Wood } 11065ce941eeSScott Wood 11075ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu, 11085ce941eeSScott Wood struct kvm_sregs *sregs) 11095ce941eeSScott Wood { 11105ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 11115ce941eeSScott Wood return 0; 11125ce941eeSScott Wood 1113841741f2SScott Wood if (sregs->u.e.pir != vcpu->vcpu_id) 11145ce941eeSScott Wood return -EINVAL; 11155ce941eeSScott Wood 11165ce941eeSScott Wood vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 11175ce941eeSScott Wood vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 11185ce941eeSScott Wood vcpu->arch.decar = sregs->u.e.decar; 11195ce941eeSScott Wood vcpu->arch.ivpr = sregs->u.e.ivpr; 11205ce941eeSScott Wood 11215ce941eeSScott Wood return 0; 11225ce941eeSScott Wood } 11235ce941eeSScott Wood 11245ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 11255ce941eeSScott Wood { 11265ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_IVOR; 11275ce941eeSScott Wood 11285ce941eeSScott Wood sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 11295ce941eeSScott Wood sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 11305ce941eeSScott Wood sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 11315ce941eeSScott Wood sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 11325ce941eeSScott Wood sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 11335ce941eeSScott Wood sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 11345ce941eeSScott Wood sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 11355ce941eeSScott Wood sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 11365ce941eeSScott Wood sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 11375ce941eeSScott Wood sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 11385ce941eeSScott Wood sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 11395ce941eeSScott Wood sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 11405ce941eeSScott Wood sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 11415ce941eeSScott Wood sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 11425ce941eeSScott Wood sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 11435ce941eeSScott Wood sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 11445ce941eeSScott Wood } 11455ce941eeSScott Wood 11465ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 11475ce941eeSScott Wood { 11485ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 11495ce941eeSScott Wood return 0; 11505ce941eeSScott Wood 11515ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 11525ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 11535ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 11545ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 11555ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 11565ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 11575ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 11585ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 11595ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 11605ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 11615ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 11625ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 11635ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 11645ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 11655ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 11665ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 11675ce941eeSScott Wood 11685ce941eeSScott Wood return 0; 11695ce941eeSScott Wood } 11705ce941eeSScott Wood 1171d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1172d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 1173d9fbd03dSHollis Blanchard { 11745ce941eeSScott Wood sregs->pvr = vcpu->arch.pvr; 11755ce941eeSScott Wood 11765ce941eeSScott Wood get_sregs_base(vcpu, sregs); 11775ce941eeSScott Wood get_sregs_arch206(vcpu, sregs); 11785ce941eeSScott Wood kvmppc_core_get_sregs(vcpu, sregs); 11795ce941eeSScott Wood return 0; 1180d9fbd03dSHollis Blanchard } 1181d9fbd03dSHollis Blanchard 1182d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1183d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 1184d9fbd03dSHollis Blanchard { 11855ce941eeSScott Wood int ret; 11865ce941eeSScott Wood 11875ce941eeSScott Wood if (vcpu->arch.pvr != sregs->pvr) 11885ce941eeSScott Wood return -EINVAL; 11895ce941eeSScott Wood 11905ce941eeSScott Wood ret = set_sregs_base(vcpu, sregs); 11915ce941eeSScott Wood if (ret < 0) 11925ce941eeSScott Wood return ret; 11935ce941eeSScott Wood 11945ce941eeSScott Wood ret = set_sregs_arch206(vcpu, sregs); 11955ce941eeSScott Wood if (ret < 0) 11965ce941eeSScott Wood return ret; 11975ce941eeSScott Wood 11985ce941eeSScott Wood return kvmppc_core_set_sregs(vcpu, sregs); 1199d9fbd03dSHollis Blanchard } 1200d9fbd03dSHollis Blanchard 120131f3438eSPaul Mackerras int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 120231f3438eSPaul Mackerras { 120331f3438eSPaul Mackerras return -EINVAL; 120431f3438eSPaul Mackerras } 120531f3438eSPaul Mackerras 120631f3438eSPaul Mackerras int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 120731f3438eSPaul Mackerras { 120831f3438eSPaul Mackerras return -EINVAL; 120931f3438eSPaul Mackerras } 121031f3438eSPaul Mackerras 1211d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1212d9fbd03dSHollis Blanchard { 1213d9fbd03dSHollis Blanchard return -ENOTSUPP; 1214d9fbd03dSHollis Blanchard } 1215d9fbd03dSHollis Blanchard 1216d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1217d9fbd03dSHollis Blanchard { 1218d9fbd03dSHollis Blanchard return -ENOTSUPP; 1219d9fbd03dSHollis Blanchard } 1220d9fbd03dSHollis Blanchard 1221d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1222d9fbd03dSHollis Blanchard struct kvm_translation *tr) 1223d9fbd03dSHollis Blanchard { 122498001d8dSAvi Kivity int r; 122598001d8dSAvi Kivity 122698001d8dSAvi Kivity r = kvmppc_core_vcpu_translate(vcpu, tr); 122798001d8dSAvi Kivity return r; 1228d9fbd03dSHollis Blanchard } 1229d9fbd03dSHollis Blanchard 12304e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 12314e755758SAlexander Graf { 12324e755758SAlexander Graf return -ENOTSUPP; 12334e755758SAlexander Graf } 12344e755758SAlexander Graf 1235f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1236f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 1237f9e0554dSPaul Mackerras { 1238f9e0554dSPaul Mackerras return 0; 1239f9e0554dSPaul Mackerras } 1240f9e0554dSPaul Mackerras 1241f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm, 1242f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 1243f9e0554dSPaul Mackerras { 1244f9e0554dSPaul Mackerras } 1245f9e0554dSPaul Mackerras 1246dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1247dfd4d47eSScott Wood { 1248dfd4d47eSScott Wood vcpu->arch.tcr = new_tcr; 1249dfd4d47eSScott Wood update_timer_ints(vcpu); 1250dfd4d47eSScott Wood } 1251dfd4d47eSScott Wood 1252dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1253dfd4d47eSScott Wood { 1254dfd4d47eSScott Wood set_bits(tsr_bits, &vcpu->arch.tsr); 1255dfd4d47eSScott Wood smp_wmb(); 1256dfd4d47eSScott Wood kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1257dfd4d47eSScott Wood kvm_vcpu_kick(vcpu); 1258dfd4d47eSScott Wood } 1259dfd4d47eSScott Wood 1260dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1261dfd4d47eSScott Wood { 1262dfd4d47eSScott Wood clear_bits(tsr_bits, &vcpu->arch.tsr); 1263dfd4d47eSScott Wood update_timer_ints(vcpu); 1264dfd4d47eSScott Wood } 1265dfd4d47eSScott Wood 1266dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data) 1267dfd4d47eSScott Wood { 1268dfd4d47eSScott Wood struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1269dfd4d47eSScott Wood 1270dfd4d47eSScott Wood kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1271dfd4d47eSScott Wood } 1272dfd4d47eSScott Wood 127394fa9d99SScott Wood void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 127494fa9d99SScott Wood { 1275d30f6e48SScott Wood current->thread.kvm_vcpu = vcpu; 127694fa9d99SScott Wood } 127794fa9d99SScott Wood 127894fa9d99SScott Wood void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 127994fa9d99SScott Wood { 1280d30f6e48SScott Wood current->thread.kvm_vcpu = NULL; 128194fa9d99SScott Wood } 128294fa9d99SScott Wood 12832986b8c7SStephen Rothwell int __init kvmppc_booke_init(void) 1284d9fbd03dSHollis Blanchard { 1285d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 1286d9fbd03dSHollis Blanchard unsigned long ivor[16]; 1287d9fbd03dSHollis Blanchard unsigned long max_ivor = 0; 1288d9fbd03dSHollis Blanchard int i; 1289d9fbd03dSHollis Blanchard 1290d9fbd03dSHollis Blanchard /* We install our own exception handlers by hijacking IVPR. IVPR must 1291d9fbd03dSHollis Blanchard * be 16-bit aligned, so we need a 64KB allocation. */ 1292d9fbd03dSHollis Blanchard kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1293d9fbd03dSHollis Blanchard VCPU_SIZE_ORDER); 1294d9fbd03dSHollis Blanchard if (!kvmppc_booke_handlers) 1295d9fbd03dSHollis Blanchard return -ENOMEM; 1296d9fbd03dSHollis Blanchard 1297d9fbd03dSHollis Blanchard /* XXX make sure our handlers are smaller than Linux's */ 1298d9fbd03dSHollis Blanchard 1299d9fbd03dSHollis Blanchard /* Copy our interrupt handlers to match host IVORs. That way we don't 1300d9fbd03dSHollis Blanchard * have to swap the IVORs on every guest/host transition. */ 1301d9fbd03dSHollis Blanchard ivor[0] = mfspr(SPRN_IVOR0); 1302d9fbd03dSHollis Blanchard ivor[1] = mfspr(SPRN_IVOR1); 1303d9fbd03dSHollis Blanchard ivor[2] = mfspr(SPRN_IVOR2); 1304d9fbd03dSHollis Blanchard ivor[3] = mfspr(SPRN_IVOR3); 1305d9fbd03dSHollis Blanchard ivor[4] = mfspr(SPRN_IVOR4); 1306d9fbd03dSHollis Blanchard ivor[5] = mfspr(SPRN_IVOR5); 1307d9fbd03dSHollis Blanchard ivor[6] = mfspr(SPRN_IVOR6); 1308d9fbd03dSHollis Blanchard ivor[7] = mfspr(SPRN_IVOR7); 1309d9fbd03dSHollis Blanchard ivor[8] = mfspr(SPRN_IVOR8); 1310d9fbd03dSHollis Blanchard ivor[9] = mfspr(SPRN_IVOR9); 1311d9fbd03dSHollis Blanchard ivor[10] = mfspr(SPRN_IVOR10); 1312d9fbd03dSHollis Blanchard ivor[11] = mfspr(SPRN_IVOR11); 1313d9fbd03dSHollis Blanchard ivor[12] = mfspr(SPRN_IVOR12); 1314d9fbd03dSHollis Blanchard ivor[13] = mfspr(SPRN_IVOR13); 1315d9fbd03dSHollis Blanchard ivor[14] = mfspr(SPRN_IVOR14); 1316d9fbd03dSHollis Blanchard ivor[15] = mfspr(SPRN_IVOR15); 1317d9fbd03dSHollis Blanchard 1318d9fbd03dSHollis Blanchard for (i = 0; i < 16; i++) { 1319d9fbd03dSHollis Blanchard if (ivor[i] > max_ivor) 1320d9fbd03dSHollis Blanchard max_ivor = ivor[i]; 1321d9fbd03dSHollis Blanchard 1322d9fbd03dSHollis Blanchard memcpy((void *)kvmppc_booke_handlers + ivor[i], 1323d9fbd03dSHollis Blanchard kvmppc_handlers_start + i * kvmppc_handler_len, 1324d9fbd03dSHollis Blanchard kvmppc_handler_len); 1325d9fbd03dSHollis Blanchard } 1326d9fbd03dSHollis Blanchard flush_icache_range(kvmppc_booke_handlers, 1327d9fbd03dSHollis Blanchard kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); 1328d30f6e48SScott Wood #endif /* !BOOKE_HV */ 1329db93f574SHollis Blanchard return 0; 1330d9fbd03dSHollis Blanchard } 1331d9fbd03dSHollis Blanchard 1332db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void) 1333d9fbd03dSHollis Blanchard { 1334d9fbd03dSHollis Blanchard free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1335d9fbd03dSHollis Blanchard kvm_exit(); 1336d9fbd03dSHollis Blanchard } 1337