1d9fbd03dSHollis Blanchard /* 2d9fbd03dSHollis Blanchard * This program is free software; you can redistribute it and/or modify 3d9fbd03dSHollis Blanchard * it under the terms of the GNU General Public License, version 2, as 4d9fbd03dSHollis Blanchard * published by the Free Software Foundation. 5d9fbd03dSHollis Blanchard * 6d9fbd03dSHollis Blanchard * This program is distributed in the hope that it will be useful, 7d9fbd03dSHollis Blanchard * but WITHOUT ANY WARRANTY; without even the implied warranty of 8d9fbd03dSHollis Blanchard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9d9fbd03dSHollis Blanchard * GNU General Public License for more details. 10d9fbd03dSHollis Blanchard * 11d9fbd03dSHollis Blanchard * You should have received a copy of the GNU General Public License 12d9fbd03dSHollis Blanchard * along with this program; if not, write to the Free Software 13d9fbd03dSHollis Blanchard * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14d9fbd03dSHollis Blanchard * 15d9fbd03dSHollis Blanchard * Copyright IBM Corp. 2007 164cd35f67SScott Wood * Copyright 2010-2011 Freescale Semiconductor, Inc. 17d9fbd03dSHollis Blanchard * 18d9fbd03dSHollis Blanchard * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19d9fbd03dSHollis Blanchard * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20d30f6e48SScott Wood * Scott Wood <scottwood@freescale.com> 21d30f6e48SScott Wood * Varun Sethi <varun.sethi@freescale.com> 22d9fbd03dSHollis Blanchard */ 23d9fbd03dSHollis Blanchard 24d9fbd03dSHollis Blanchard #include <linux/errno.h> 25d9fbd03dSHollis Blanchard #include <linux/err.h> 26d9fbd03dSHollis Blanchard #include <linux/kvm_host.h> 275a0e3ad6STejun Heo #include <linux/gfp.h> 28d9fbd03dSHollis Blanchard #include <linux/module.h> 29d9fbd03dSHollis Blanchard #include <linux/vmalloc.h> 30d9fbd03dSHollis Blanchard #include <linux/fs.h> 317924bd41SHollis Blanchard 32d9fbd03dSHollis Blanchard #include <asm/cputable.h> 33d9fbd03dSHollis Blanchard #include <asm/uaccess.h> 34d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h> 35d9fbd03dSHollis Blanchard #include <asm/cacheflush.h> 36d30f6e48SScott Wood #include <asm/dbell.h> 37d30f6e48SScott Wood #include <asm/hw_irq.h> 38d30f6e48SScott Wood #include <asm/irq.h> 39b50df19cSMihai Caraman #include <asm/time.h> 40d9fbd03dSHollis Blanchard 41d30f6e48SScott Wood #include "timing.h" 4275f74f0dSHollis Blanchard #include "booke.h" 4397c95059SAlexander Graf #include "trace.h" 44d9fbd03dSHollis Blanchard 45d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers; 46d9fbd03dSHollis Blanchard 47d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 48d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 49d9fbd03dSHollis Blanchard 50d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = { 51d9fbd03dSHollis Blanchard { "mmio", VCPU_STAT(mmio_exits) }, 52d9fbd03dSHollis Blanchard { "dcr", VCPU_STAT(dcr_exits) }, 53d9fbd03dSHollis Blanchard { "sig", VCPU_STAT(signal_exits) }, 54d9fbd03dSHollis Blanchard { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 55d9fbd03dSHollis Blanchard { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 56d9fbd03dSHollis Blanchard { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 57d9fbd03dSHollis Blanchard { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 58d9fbd03dSHollis Blanchard { "sysc", VCPU_STAT(syscall_exits) }, 59d9fbd03dSHollis Blanchard { "isi", VCPU_STAT(isi_exits) }, 60d9fbd03dSHollis Blanchard { "dsi", VCPU_STAT(dsi_exits) }, 61d9fbd03dSHollis Blanchard { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 62d9fbd03dSHollis Blanchard { "dec", VCPU_STAT(dec_exits) }, 63d9fbd03dSHollis Blanchard { "ext_intr", VCPU_STAT(ext_intr_exits) }, 64d9fbd03dSHollis Blanchard { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 65d30f6e48SScott Wood { "doorbell", VCPU_STAT(dbell_exits) }, 66d30f6e48SScott Wood { "guest doorbell", VCPU_STAT(gdbell_exits) }, 67cf1c5ca4SAlexander Graf { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 68d9fbd03dSHollis Blanchard { NULL } 69d9fbd03dSHollis Blanchard }; 70d9fbd03dSHollis Blanchard 71d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */ 72d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 73d9fbd03dSHollis Blanchard { 74d9fbd03dSHollis Blanchard int i; 75d9fbd03dSHollis Blanchard 76666e7252SAlexander Graf printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 775cf8ca22SHollis Blanchard printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 78de7906c3SAlexander Graf printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 79de7906c3SAlexander Graf vcpu->arch.shared->srr1); 80d9fbd03dSHollis Blanchard 81d9fbd03dSHollis Blanchard printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 82d9fbd03dSHollis Blanchard 83d9fbd03dSHollis Blanchard for (i = 0; i < 32; i += 4) { 845cf8ca22SHollis Blanchard printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 858e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i), 868e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+1), 878e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+2), 888e5b26b5SAlexander Graf kvmppc_get_gpr(vcpu, i+3)); 89d9fbd03dSHollis Blanchard } 90d9fbd03dSHollis Blanchard } 91d9fbd03dSHollis Blanchard 924cd35f67SScott Wood #ifdef CONFIG_SPE 934cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 944cd35f67SScott Wood { 954cd35f67SScott Wood preempt_disable(); 964cd35f67SScott Wood enable_kernel_spe(); 974cd35f67SScott Wood kvmppc_save_guest_spe(vcpu); 984cd35f67SScott Wood vcpu->arch.shadow_msr &= ~MSR_SPE; 994cd35f67SScott Wood preempt_enable(); 1004cd35f67SScott Wood } 1014cd35f67SScott Wood 1024cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 1034cd35f67SScott Wood { 1044cd35f67SScott Wood preempt_disable(); 1054cd35f67SScott Wood enable_kernel_spe(); 1064cd35f67SScott Wood kvmppc_load_guest_spe(vcpu); 1074cd35f67SScott Wood vcpu->arch.shadow_msr |= MSR_SPE; 1084cd35f67SScott Wood preempt_enable(); 1094cd35f67SScott Wood } 1104cd35f67SScott Wood 1114cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1124cd35f67SScott Wood { 1134cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) { 1144cd35f67SScott Wood if (!(vcpu->arch.shadow_msr & MSR_SPE)) 1154cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 1164cd35f67SScott Wood } else if (vcpu->arch.shadow_msr & MSR_SPE) { 1174cd35f67SScott Wood kvmppc_vcpu_disable_spe(vcpu); 1184cd35f67SScott Wood } 1194cd35f67SScott Wood } 1204cd35f67SScott Wood #else 1214cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 1224cd35f67SScott Wood { 1234cd35f67SScott Wood } 1244cd35f67SScott Wood #endif 1254cd35f67SScott Wood 1267a08c274SAlexander Graf static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 1277a08c274SAlexander Graf { 1287a08c274SAlexander Graf #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 1297a08c274SAlexander Graf /* We always treat the FP bit as enabled from the host 1307a08c274SAlexander Graf perspective, so only need to adjust the shadow MSR */ 1317a08c274SAlexander Graf vcpu->arch.shadow_msr &= ~MSR_FP; 1327a08c274SAlexander Graf vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 1337a08c274SAlexander Graf #endif 1347a08c274SAlexander Graf } 1357a08c274SAlexander Graf 136dd9ebf1fSLiu Yu /* 137dd9ebf1fSLiu Yu * Helper function for "full" MSR writes. No need to call this if only 138dd9ebf1fSLiu Yu * EE/CE/ME/DE/RI are changing. 139dd9ebf1fSLiu Yu */ 1404cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 1414cd35f67SScott Wood { 142dd9ebf1fSLiu Yu u32 old_msr = vcpu->arch.shared->msr; 1434cd35f67SScott Wood 144d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 145d30f6e48SScott Wood new_msr |= MSR_GS; 146d30f6e48SScott Wood #endif 147d30f6e48SScott Wood 1484cd35f67SScott Wood vcpu->arch.shared->msr = new_msr; 1494cd35f67SScott Wood 150dd9ebf1fSLiu Yu kvmppc_mmu_msr_notify(vcpu, old_msr); 1514cd35f67SScott Wood kvmppc_vcpu_sync_spe(vcpu); 1527a08c274SAlexander Graf kvmppc_vcpu_sync_fpu(vcpu); 1534cd35f67SScott Wood } 1544cd35f67SScott Wood 155d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 156d4cf3892SHollis Blanchard unsigned int priority) 1579dd921cfSHollis Blanchard { 1586346046cSAlexander Graf trace_kvm_booke_queue_irqprio(vcpu, priority); 1599dd921cfSHollis Blanchard set_bit(priority, &vcpu->arch.pending_exceptions); 1609dd921cfSHollis Blanchard } 1619dd921cfSHollis Blanchard 162daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 163daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 1649dd921cfSHollis Blanchard { 165daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 166daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 167daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 168daf5e271SLiu Yu } 169daf5e271SLiu Yu 170daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 171daf5e271SLiu Yu ulong dear_flags, ulong esr_flags) 172daf5e271SLiu Yu { 173daf5e271SLiu Yu vcpu->arch.queued_dear = dear_flags; 174daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 175daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 176daf5e271SLiu Yu } 177daf5e271SLiu Yu 178daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 179daf5e271SLiu Yu ulong esr_flags) 180daf5e271SLiu Yu { 181daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 182daf5e271SLiu Yu kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 183daf5e271SLiu Yu } 184daf5e271SLiu Yu 185011da899SAlexander Graf static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 186011da899SAlexander Graf ulong esr_flags) 187011da899SAlexander Graf { 188011da899SAlexander Graf vcpu->arch.queued_dear = dear_flags; 189011da899SAlexander Graf vcpu->arch.queued_esr = esr_flags; 190011da899SAlexander Graf kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 191011da899SAlexander Graf } 192011da899SAlexander Graf 193daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 194daf5e271SLiu Yu { 195daf5e271SLiu Yu vcpu->arch.queued_esr = esr_flags; 196d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 1979dd921cfSHollis Blanchard } 1989dd921cfSHollis Blanchard 1999dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 2009dd921cfSHollis Blanchard { 201d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 2029dd921cfSHollis Blanchard } 2039dd921cfSHollis Blanchard 2049dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 2059dd921cfSHollis Blanchard { 206d4cf3892SHollis Blanchard return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 2079dd921cfSHollis Blanchard } 2089dd921cfSHollis Blanchard 2097706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 2107706664dSAlexander Graf { 2117706664dSAlexander Graf clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 2127706664dSAlexander Graf } 2137706664dSAlexander Graf 2149dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 2159dd921cfSHollis Blanchard struct kvm_interrupt *irq) 2169dd921cfSHollis Blanchard { 217c5335f17SAlexander Graf unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 218c5335f17SAlexander Graf 219c5335f17SAlexander Graf if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 220c5335f17SAlexander Graf prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 221c5335f17SAlexander Graf 222c5335f17SAlexander Graf kvmppc_booke_queue_irqprio(vcpu, prio); 2239dd921cfSHollis Blanchard } 2249dd921cfSHollis Blanchard 2254fe27d2aSPaul Mackerras void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 2264496f974SAlexander Graf { 2274496f974SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 228c5335f17SAlexander Graf clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 2294496f974SAlexander Graf } 2304496f974SAlexander Graf 231f61c94bbSBharat Bhushan static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 232f61c94bbSBharat Bhushan { 233f61c94bbSBharat Bhushan kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 234f61c94bbSBharat Bhushan } 235f61c94bbSBharat Bhushan 236f61c94bbSBharat Bhushan static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 237f61c94bbSBharat Bhushan { 238f61c94bbSBharat Bhushan clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 239f61c94bbSBharat Bhushan } 240f61c94bbSBharat Bhushan 241d30f6e48SScott Wood static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 242d30f6e48SScott Wood { 243d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 244d30f6e48SScott Wood mtspr(SPRN_GSRR0, srr0); 245d30f6e48SScott Wood mtspr(SPRN_GSRR1, srr1); 246d30f6e48SScott Wood #else 247d30f6e48SScott Wood vcpu->arch.shared->srr0 = srr0; 248d30f6e48SScott Wood vcpu->arch.shared->srr1 = srr1; 249d30f6e48SScott Wood #endif 250d30f6e48SScott Wood } 251d30f6e48SScott Wood 252d30f6e48SScott Wood static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 253d30f6e48SScott Wood { 254d30f6e48SScott Wood vcpu->arch.csrr0 = srr0; 255d30f6e48SScott Wood vcpu->arch.csrr1 = srr1; 256d30f6e48SScott Wood } 257d30f6e48SScott Wood 258d30f6e48SScott Wood static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 259d30f6e48SScott Wood { 260d30f6e48SScott Wood if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 261d30f6e48SScott Wood vcpu->arch.dsrr0 = srr0; 262d30f6e48SScott Wood vcpu->arch.dsrr1 = srr1; 263d30f6e48SScott Wood } else { 264d30f6e48SScott Wood set_guest_csrr(vcpu, srr0, srr1); 265d30f6e48SScott Wood } 266d30f6e48SScott Wood } 267d30f6e48SScott Wood 268d30f6e48SScott Wood static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 269d30f6e48SScott Wood { 270d30f6e48SScott Wood vcpu->arch.mcsrr0 = srr0; 271d30f6e48SScott Wood vcpu->arch.mcsrr1 = srr1; 272d30f6e48SScott Wood } 273d30f6e48SScott Wood 274d30f6e48SScott Wood static unsigned long get_guest_dear(struct kvm_vcpu *vcpu) 275d30f6e48SScott Wood { 276d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 277d30f6e48SScott Wood return mfspr(SPRN_GDEAR); 278d30f6e48SScott Wood #else 279d30f6e48SScott Wood return vcpu->arch.shared->dar; 280d30f6e48SScott Wood #endif 281d30f6e48SScott Wood } 282d30f6e48SScott Wood 283d30f6e48SScott Wood static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear) 284d30f6e48SScott Wood { 285d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 286d30f6e48SScott Wood mtspr(SPRN_GDEAR, dear); 287d30f6e48SScott Wood #else 288d30f6e48SScott Wood vcpu->arch.shared->dar = dear; 289d30f6e48SScott Wood #endif 290d30f6e48SScott Wood } 291d30f6e48SScott Wood 292d30f6e48SScott Wood static unsigned long get_guest_esr(struct kvm_vcpu *vcpu) 293d30f6e48SScott Wood { 294d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 295d30f6e48SScott Wood return mfspr(SPRN_GESR); 296d30f6e48SScott Wood #else 297d30f6e48SScott Wood return vcpu->arch.shared->esr; 298d30f6e48SScott Wood #endif 299d30f6e48SScott Wood } 300d30f6e48SScott Wood 301d30f6e48SScott Wood static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr) 302d30f6e48SScott Wood { 303d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 304d30f6e48SScott Wood mtspr(SPRN_GESR, esr); 305d30f6e48SScott Wood #else 306d30f6e48SScott Wood vcpu->arch.shared->esr = esr; 307d30f6e48SScott Wood #endif 308d30f6e48SScott Wood } 309d30f6e48SScott Wood 310324b3e63SAlexander Graf static unsigned long get_guest_epr(struct kvm_vcpu *vcpu) 311324b3e63SAlexander Graf { 312324b3e63SAlexander Graf #ifdef CONFIG_KVM_BOOKE_HV 313324b3e63SAlexander Graf return mfspr(SPRN_GEPR); 314324b3e63SAlexander Graf #else 315324b3e63SAlexander Graf return vcpu->arch.epr; 316324b3e63SAlexander Graf #endif 317324b3e63SAlexander Graf } 318324b3e63SAlexander Graf 319d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */ 320d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 321d4cf3892SHollis Blanchard unsigned int priority) 322d9fbd03dSHollis Blanchard { 323d4cf3892SHollis Blanchard int allowed = 0; 32479300f8cSAlexander Graf ulong msr_mask = 0; 3251c810636SAlexander Graf bool update_esr = false, update_dear = false, update_epr = false; 3265c6cedf4SAlexander Graf ulong crit_raw = vcpu->arch.shared->critical; 3275c6cedf4SAlexander Graf ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 3285c6cedf4SAlexander Graf bool crit; 329c5335f17SAlexander Graf bool keep_irq = false; 330d30f6e48SScott Wood enum int_class int_class; 33195e90b43SMihai Caraman ulong new_msr = vcpu->arch.shared->msr; 3325c6cedf4SAlexander Graf 3335c6cedf4SAlexander Graf /* Truncate crit indicators in 32 bit mode */ 3345c6cedf4SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_SF)) { 3355c6cedf4SAlexander Graf crit_raw &= 0xffffffff; 3365c6cedf4SAlexander Graf crit_r1 &= 0xffffffff; 3375c6cedf4SAlexander Graf } 3385c6cedf4SAlexander Graf 3395c6cedf4SAlexander Graf /* Critical section when crit == r1 */ 3405c6cedf4SAlexander Graf crit = (crit_raw == crit_r1); 3415c6cedf4SAlexander Graf /* ... and we're in supervisor mode */ 3425c6cedf4SAlexander Graf crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 343d9fbd03dSHollis Blanchard 344c5335f17SAlexander Graf if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 345c5335f17SAlexander Graf priority = BOOKE_IRQPRIO_EXTERNAL; 346c5335f17SAlexander Graf keep_irq = true; 347c5335f17SAlexander Graf } 348c5335f17SAlexander Graf 3495df554adSScott Wood if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 3501c810636SAlexander Graf update_epr = true; 3511c810636SAlexander Graf 352d4cf3892SHollis Blanchard switch (priority) { 353d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DTLB_MISS: 354daf5e271SLiu Yu case BOOKE_IRQPRIO_DATA_STORAGE: 355011da899SAlexander Graf case BOOKE_IRQPRIO_ALIGNMENT: 356daf5e271SLiu Yu update_dear = true; 357daf5e271SLiu Yu /* fall through */ 358daf5e271SLiu Yu case BOOKE_IRQPRIO_INST_STORAGE: 359daf5e271SLiu Yu case BOOKE_IRQPRIO_PROGRAM: 360daf5e271SLiu Yu update_esr = true; 361daf5e271SLiu Yu /* fall through */ 362d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_ITLB_MISS: 363d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_SYSCALL: 364d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FP_UNAVAIL: 365bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_UNAVAIL: 366bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_DATA: 367bb3a8a17SHollis Blanchard case BOOKE_IRQPRIO_SPE_FP_ROUND: 368d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_AP_UNAVAIL: 369d4cf3892SHollis Blanchard allowed = 1; 37079300f8cSAlexander Graf msr_mask = MSR_CE | MSR_ME | MSR_DE; 371d30f6e48SScott Wood int_class = INT_CLASS_NONCRIT; 372d9fbd03dSHollis Blanchard break; 373f61c94bbSBharat Bhushan case BOOKE_IRQPRIO_WATCHDOG: 374d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_CRITICAL: 3754ab96919SAlexander Graf case BOOKE_IRQPRIO_DBELL_CRIT: 376666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_CE; 377d30f6e48SScott Wood allowed = allowed && !crit; 37879300f8cSAlexander Graf msr_mask = MSR_ME; 379d30f6e48SScott Wood int_class = INT_CLASS_CRIT; 380d9fbd03dSHollis Blanchard break; 381d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_MACHINE_CHECK: 382666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_ME; 383d30f6e48SScott Wood allowed = allowed && !crit; 384d30f6e48SScott Wood int_class = INT_CLASS_MC; 385d9fbd03dSHollis Blanchard break; 386d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DECREMENTER: 387d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_FIT: 388dfd4d47eSScott Wood keep_irq = true; 389dfd4d47eSScott Wood /* fall through */ 390dfd4d47eSScott Wood case BOOKE_IRQPRIO_EXTERNAL: 3914ab96919SAlexander Graf case BOOKE_IRQPRIO_DBELL: 392666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_EE; 3935c6cedf4SAlexander Graf allowed = allowed && !crit; 39479300f8cSAlexander Graf msr_mask = MSR_CE | MSR_ME | MSR_DE; 395d30f6e48SScott Wood int_class = INT_CLASS_NONCRIT; 396d9fbd03dSHollis Blanchard break; 397d4cf3892SHollis Blanchard case BOOKE_IRQPRIO_DEBUG: 398666e7252SAlexander Graf allowed = vcpu->arch.shared->msr & MSR_DE; 399d30f6e48SScott Wood allowed = allowed && !crit; 40079300f8cSAlexander Graf msr_mask = MSR_ME; 401d30f6e48SScott Wood int_class = INT_CLASS_CRIT; 402d9fbd03dSHollis Blanchard break; 403d9fbd03dSHollis Blanchard } 404d9fbd03dSHollis Blanchard 405d4cf3892SHollis Blanchard if (allowed) { 406d30f6e48SScott Wood switch (int_class) { 407d30f6e48SScott Wood case INT_CLASS_NONCRIT: 408d30f6e48SScott Wood set_guest_srr(vcpu, vcpu->arch.pc, 409d30f6e48SScott Wood vcpu->arch.shared->msr); 410d30f6e48SScott Wood break; 411d30f6e48SScott Wood case INT_CLASS_CRIT: 412d30f6e48SScott Wood set_guest_csrr(vcpu, vcpu->arch.pc, 413d30f6e48SScott Wood vcpu->arch.shared->msr); 414d30f6e48SScott Wood break; 415d30f6e48SScott Wood case INT_CLASS_DBG: 416d30f6e48SScott Wood set_guest_dsrr(vcpu, vcpu->arch.pc, 417d30f6e48SScott Wood vcpu->arch.shared->msr); 418d30f6e48SScott Wood break; 419d30f6e48SScott Wood case INT_CLASS_MC: 420d30f6e48SScott Wood set_guest_mcsrr(vcpu, vcpu->arch.pc, 421d30f6e48SScott Wood vcpu->arch.shared->msr); 422d30f6e48SScott Wood break; 423d30f6e48SScott Wood } 424d30f6e48SScott Wood 425d4cf3892SHollis Blanchard vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 426daf5e271SLiu Yu if (update_esr == true) 427d30f6e48SScott Wood set_guest_esr(vcpu, vcpu->arch.queued_esr); 428daf5e271SLiu Yu if (update_dear == true) 429d30f6e48SScott Wood set_guest_dear(vcpu, vcpu->arch.queued_dear); 4305df554adSScott Wood if (update_epr == true) { 4315df554adSScott Wood if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 4321c810636SAlexander Graf kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 433eb1e4f43SScott Wood else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 434eb1e4f43SScott Wood BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 435eb1e4f43SScott Wood kvmppc_mpic_set_epr(vcpu); 436eb1e4f43SScott Wood } 4375df554adSScott Wood } 43895e90b43SMihai Caraman 43995e90b43SMihai Caraman new_msr &= msr_mask; 44095e90b43SMihai Caraman #if defined(CONFIG_64BIT) 44195e90b43SMihai Caraman if (vcpu->arch.epcr & SPRN_EPCR_ICM) 44295e90b43SMihai Caraman new_msr |= MSR_CM; 44395e90b43SMihai Caraman #endif 44495e90b43SMihai Caraman kvmppc_set_msr(vcpu, new_msr); 445d4cf3892SHollis Blanchard 446c5335f17SAlexander Graf if (!keep_irq) 447d4cf3892SHollis Blanchard clear_bit(priority, &vcpu->arch.pending_exceptions); 448d4cf3892SHollis Blanchard } 449d4cf3892SHollis Blanchard 450d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 451d30f6e48SScott Wood /* 452d30f6e48SScott Wood * If an interrupt is pending but masked, raise a guest doorbell 453d30f6e48SScott Wood * so that we are notified when the guest enables the relevant 454d30f6e48SScott Wood * MSR bit. 455d30f6e48SScott Wood */ 456d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 457d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 458d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 459d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 460d30f6e48SScott Wood if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 461d30f6e48SScott Wood kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 462d30f6e48SScott Wood #endif 463d30f6e48SScott Wood 464d4cf3892SHollis Blanchard return allowed; 465d9fbd03dSHollis Blanchard } 466d9fbd03dSHollis Blanchard 467f61c94bbSBharat Bhushan /* 468f61c94bbSBharat Bhushan * Return the number of jiffies until the next timeout. If the timeout is 469f61c94bbSBharat Bhushan * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 470f61c94bbSBharat Bhushan * because the larger value can break the timer APIs. 471f61c94bbSBharat Bhushan */ 472f61c94bbSBharat Bhushan static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 473f61c94bbSBharat Bhushan { 474f61c94bbSBharat Bhushan u64 tb, wdt_tb, wdt_ticks = 0; 475f61c94bbSBharat Bhushan u64 nr_jiffies = 0; 476f61c94bbSBharat Bhushan u32 period = TCR_GET_WP(vcpu->arch.tcr); 477f61c94bbSBharat Bhushan 478f61c94bbSBharat Bhushan wdt_tb = 1ULL << (63 - period); 479f61c94bbSBharat Bhushan tb = get_tb(); 480f61c94bbSBharat Bhushan /* 481f61c94bbSBharat Bhushan * The watchdog timeout will hapeen when TB bit corresponding 482f61c94bbSBharat Bhushan * to watchdog will toggle from 0 to 1. 483f61c94bbSBharat Bhushan */ 484f61c94bbSBharat Bhushan if (tb & wdt_tb) 485f61c94bbSBharat Bhushan wdt_ticks = wdt_tb; 486f61c94bbSBharat Bhushan 487f61c94bbSBharat Bhushan wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 488f61c94bbSBharat Bhushan 489f61c94bbSBharat Bhushan /* Convert timebase ticks to jiffies */ 490f61c94bbSBharat Bhushan nr_jiffies = wdt_ticks; 491f61c94bbSBharat Bhushan 492f61c94bbSBharat Bhushan if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 493f61c94bbSBharat Bhushan nr_jiffies++; 494f61c94bbSBharat Bhushan 495f61c94bbSBharat Bhushan return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 496f61c94bbSBharat Bhushan } 497f61c94bbSBharat Bhushan 498f61c94bbSBharat Bhushan static void arm_next_watchdog(struct kvm_vcpu *vcpu) 499f61c94bbSBharat Bhushan { 500f61c94bbSBharat Bhushan unsigned long nr_jiffies; 501f61c94bbSBharat Bhushan unsigned long flags; 502f61c94bbSBharat Bhushan 503f61c94bbSBharat Bhushan /* 504f61c94bbSBharat Bhushan * If TSR_ENW and TSR_WIS are not set then no need to exit to 505f61c94bbSBharat Bhushan * userspace, so clear the KVM_REQ_WATCHDOG request. 506f61c94bbSBharat Bhushan */ 507f61c94bbSBharat Bhushan if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 508f61c94bbSBharat Bhushan clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 509f61c94bbSBharat Bhushan 510f61c94bbSBharat Bhushan spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 511f61c94bbSBharat Bhushan nr_jiffies = watchdog_next_timeout(vcpu); 512f61c94bbSBharat Bhushan /* 513f61c94bbSBharat Bhushan * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 514f61c94bbSBharat Bhushan * then do not run the watchdog timer as this can break timer APIs. 515f61c94bbSBharat Bhushan */ 516f61c94bbSBharat Bhushan if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 517f61c94bbSBharat Bhushan mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 518f61c94bbSBharat Bhushan else 519f61c94bbSBharat Bhushan del_timer(&vcpu->arch.wdt_timer); 520f61c94bbSBharat Bhushan spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 521f61c94bbSBharat Bhushan } 522f61c94bbSBharat Bhushan 523f61c94bbSBharat Bhushan void kvmppc_watchdog_func(unsigned long data) 524f61c94bbSBharat Bhushan { 525f61c94bbSBharat Bhushan struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 526f61c94bbSBharat Bhushan u32 tsr, new_tsr; 527f61c94bbSBharat Bhushan int final; 528f61c94bbSBharat Bhushan 529f61c94bbSBharat Bhushan do { 530f61c94bbSBharat Bhushan new_tsr = tsr = vcpu->arch.tsr; 531f61c94bbSBharat Bhushan final = 0; 532f61c94bbSBharat Bhushan 533f61c94bbSBharat Bhushan /* Time out event */ 534f61c94bbSBharat Bhushan if (tsr & TSR_ENW) { 535f61c94bbSBharat Bhushan if (tsr & TSR_WIS) 536f61c94bbSBharat Bhushan final = 1; 537f61c94bbSBharat Bhushan else 538f61c94bbSBharat Bhushan new_tsr = tsr | TSR_WIS; 539f61c94bbSBharat Bhushan } else { 540f61c94bbSBharat Bhushan new_tsr = tsr | TSR_ENW; 541f61c94bbSBharat Bhushan } 542f61c94bbSBharat Bhushan } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 543f61c94bbSBharat Bhushan 544f61c94bbSBharat Bhushan if (new_tsr & TSR_WIS) { 545f61c94bbSBharat Bhushan smp_wmb(); 546f61c94bbSBharat Bhushan kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 547f61c94bbSBharat Bhushan kvm_vcpu_kick(vcpu); 548f61c94bbSBharat Bhushan } 549f61c94bbSBharat Bhushan 550f61c94bbSBharat Bhushan /* 551f61c94bbSBharat Bhushan * If this is final watchdog expiry and some action is required 552f61c94bbSBharat Bhushan * then exit to userspace. 553f61c94bbSBharat Bhushan */ 554f61c94bbSBharat Bhushan if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 555f61c94bbSBharat Bhushan vcpu->arch.watchdog_enabled) { 556f61c94bbSBharat Bhushan smp_wmb(); 557f61c94bbSBharat Bhushan kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 558f61c94bbSBharat Bhushan kvm_vcpu_kick(vcpu); 559f61c94bbSBharat Bhushan } 560f61c94bbSBharat Bhushan 561f61c94bbSBharat Bhushan /* 562f61c94bbSBharat Bhushan * Stop running the watchdog timer after final expiration to 563f61c94bbSBharat Bhushan * prevent the host from being flooded with timers if the 564f61c94bbSBharat Bhushan * guest sets a short period. 565f61c94bbSBharat Bhushan * Timers will resume when TSR/TCR is updated next time. 566f61c94bbSBharat Bhushan */ 567f61c94bbSBharat Bhushan if (!final) 568f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 569f61c94bbSBharat Bhushan } 570f61c94bbSBharat Bhushan 571dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu) 572dfd4d47eSScott Wood { 573dfd4d47eSScott Wood if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 574dfd4d47eSScott Wood kvmppc_core_queue_dec(vcpu); 575dfd4d47eSScott Wood else 576dfd4d47eSScott Wood kvmppc_core_dequeue_dec(vcpu); 577f61c94bbSBharat Bhushan 578f61c94bbSBharat Bhushan if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 579f61c94bbSBharat Bhushan kvmppc_core_queue_watchdog(vcpu); 580f61c94bbSBharat Bhushan else 581f61c94bbSBharat Bhushan kvmppc_core_dequeue_watchdog(vcpu); 582dfd4d47eSScott Wood } 583dfd4d47eSScott Wood 584c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 585d9fbd03dSHollis Blanchard { 586d9fbd03dSHollis Blanchard unsigned long *pending = &vcpu->arch.pending_exceptions; 587d9fbd03dSHollis Blanchard unsigned int priority; 588d9fbd03dSHollis Blanchard 5899ab80843SHollis Blanchard priority = __ffs(*pending); 5908b3a00fcSAlexander Graf while (priority < BOOKE_IRQPRIO_MAX) { 591d4cf3892SHollis Blanchard if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 592d9fbd03dSHollis Blanchard break; 593d9fbd03dSHollis Blanchard 594d9fbd03dSHollis Blanchard priority = find_next_bit(pending, 595d9fbd03dSHollis Blanchard BITS_PER_BYTE * sizeof(*pending), 596d9fbd03dSHollis Blanchard priority + 1); 597d9fbd03dSHollis Blanchard } 59890bba358SAlexander Graf 59990bba358SAlexander Graf /* Tell the guest about our interrupt status */ 60029ac26efSScott Wood vcpu->arch.shared->int_pending = !!*pending; 601d9fbd03dSHollis Blanchard } 602d9fbd03dSHollis Blanchard 603c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */ 604a8e4ef84SAlexander Graf int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 605c59a6a3eSScott Wood { 606a8e4ef84SAlexander Graf int r = 0; 607c59a6a3eSScott Wood WARN_ON_ONCE(!irqs_disabled()); 608c59a6a3eSScott Wood 609c59a6a3eSScott Wood kvmppc_core_check_exceptions(vcpu); 610c59a6a3eSScott Wood 611b8c649a9SAlexander Graf if (vcpu->requests) { 612b8c649a9SAlexander Graf /* Exception delivery raised request; start over */ 613b8c649a9SAlexander Graf return 1; 614b8c649a9SAlexander Graf } 615b8c649a9SAlexander Graf 616c59a6a3eSScott Wood if (vcpu->arch.shared->msr & MSR_WE) { 617c59a6a3eSScott Wood local_irq_enable(); 618c59a6a3eSScott Wood kvm_vcpu_block(vcpu); 619966cd0f3SAlexander Graf clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 620c59a6a3eSScott Wood local_irq_disable(); 621c59a6a3eSScott Wood 622c59a6a3eSScott Wood kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 623a8e4ef84SAlexander Graf r = 1; 624c59a6a3eSScott Wood }; 625a8e4ef84SAlexander Graf 626a8e4ef84SAlexander Graf return r; 627a8e4ef84SAlexander Graf } 628a8e4ef84SAlexander Graf 6297c973a2eSAlexander Graf int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 6304ffc6356SAlexander Graf { 6317c973a2eSAlexander Graf int r = 1; /* Indicate we want to get back into the guest */ 6327c973a2eSAlexander Graf 6334ffc6356SAlexander Graf if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 6344ffc6356SAlexander Graf update_timer_ints(vcpu); 635862d31f7SAlexander Graf #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 636862d31f7SAlexander Graf if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 637862d31f7SAlexander Graf kvmppc_core_flush_tlb(vcpu); 638862d31f7SAlexander Graf #endif 6397c973a2eSAlexander Graf 640f61c94bbSBharat Bhushan if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 641f61c94bbSBharat Bhushan vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 642f61c94bbSBharat Bhushan r = 0; 643f61c94bbSBharat Bhushan } 644f61c94bbSBharat Bhushan 6451c810636SAlexander Graf if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 6461c810636SAlexander Graf vcpu->run->epr.epr = 0; 6471c810636SAlexander Graf vcpu->arch.epr_needed = true; 6481c810636SAlexander Graf vcpu->run->exit_reason = KVM_EXIT_EPR; 6491c810636SAlexander Graf r = 0; 6501c810636SAlexander Graf } 6511c810636SAlexander Graf 6527c973a2eSAlexander Graf return r; 6534ffc6356SAlexander Graf } 6544ffc6356SAlexander Graf 655df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 656df6909e5SPaul Mackerras { 6577ee78855SAlexander Graf int ret, s; 6588fae845fSScott Wood #ifdef CONFIG_PPC_FPU 6598fae845fSScott Wood unsigned int fpscr; 6608fae845fSScott Wood int fpexc_mode; 6618fae845fSScott Wood u64 fpr[32]; 6628fae845fSScott Wood #endif 663df6909e5SPaul Mackerras 664af8f38b3SAlexander Graf if (!vcpu->arch.sane) { 665af8f38b3SAlexander Graf kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 666af8f38b3SAlexander Graf return -EINVAL; 667af8f38b3SAlexander Graf } 668af8f38b3SAlexander Graf 669df6909e5SPaul Mackerras local_irq_disable(); 6707ee78855SAlexander Graf s = kvmppc_prepare_to_enter(vcpu); 6717ee78855SAlexander Graf if (s <= 0) { 67224afa37bSAlexander Graf local_irq_enable(); 6737ee78855SAlexander Graf ret = s; 6741d1ef222SScott Wood goto out; 6751d1ef222SScott Wood } 6761d1ef222SScott Wood 6778fae845fSScott Wood #ifdef CONFIG_PPC_FPU 6788fae845fSScott Wood /* Save userspace FPU state in stack */ 6798fae845fSScott Wood enable_kernel_fp(); 6808fae845fSScott Wood memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 6818fae845fSScott Wood fpscr = current->thread.fpscr.val; 6828fae845fSScott Wood fpexc_mode = current->thread.fpexc_mode; 6838fae845fSScott Wood 6848fae845fSScott Wood /* Restore guest FPU state to thread */ 6858fae845fSScott Wood memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 6868fae845fSScott Wood current->thread.fpscr.val = vcpu->arch.fpscr; 6878fae845fSScott Wood 6888fae845fSScott Wood /* 6898fae845fSScott Wood * Since we can't trap on MSR_FP in GS-mode, we consider the guest 6908fae845fSScott Wood * as always using the FPU. Kernel usage of FP (via 6918fae845fSScott Wood * enable_kernel_fp()) in this thread must not occur while 6928fae845fSScott Wood * vcpu->fpu_active is set. 6938fae845fSScott Wood */ 6948fae845fSScott Wood vcpu->fpu_active = 1; 6958fae845fSScott Wood 6968fae845fSScott Wood kvmppc_load_guest_fp(vcpu); 6978fae845fSScott Wood #endif 6988fae845fSScott Wood 6995f1c248fSScott Wood kvmppc_fix_ee_before_entry(); 700f8941fbeSScott Wood 701df6909e5SPaul Mackerras ret = __kvmppc_vcpu_run(kvm_run, vcpu); 7028fae845fSScott Wood 70324afa37bSAlexander Graf /* No need for kvm_guest_exit. It's done in handle_exit. 70424afa37bSAlexander Graf We also get here with interrupts enabled. */ 70524afa37bSAlexander Graf 7068fae845fSScott Wood #ifdef CONFIG_PPC_FPU 7078fae845fSScott Wood kvmppc_save_guest_fp(vcpu); 7088fae845fSScott Wood 7098fae845fSScott Wood vcpu->fpu_active = 0; 7108fae845fSScott Wood 7118fae845fSScott Wood /* Save guest FPU state from thread */ 7128fae845fSScott Wood memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 7138fae845fSScott Wood vcpu->arch.fpscr = current->thread.fpscr.val; 7148fae845fSScott Wood 7158fae845fSScott Wood /* Restore userspace FPU state from stack */ 7168fae845fSScott Wood memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 7178fae845fSScott Wood current->thread.fpscr.val = fpscr; 7188fae845fSScott Wood current->thread.fpexc_mode = fpexc_mode; 7198fae845fSScott Wood #endif 7208fae845fSScott Wood 7211d1ef222SScott Wood out: 722d69c6436SAlexander Graf vcpu->mode = OUTSIDE_GUEST_MODE; 723df6909e5SPaul Mackerras return ret; 724df6909e5SPaul Mackerras } 725df6909e5SPaul Mackerras 726d30f6e48SScott Wood static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 727d9fbd03dSHollis Blanchard { 728d9fbd03dSHollis Blanchard enum emulation_result er; 729d9fbd03dSHollis Blanchard 730d9fbd03dSHollis Blanchard er = kvmppc_emulate_instruction(run, vcpu); 731d9fbd03dSHollis Blanchard switch (er) { 732d9fbd03dSHollis Blanchard case EMULATE_DONE: 73373e75b41SHollis Blanchard /* don't overwrite subtypes, just account kvm_stats */ 7347b701591SHollis Blanchard kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 735d9fbd03dSHollis Blanchard /* Future optimization: only reload non-volatiles if 736d9fbd03dSHollis Blanchard * they were actually modified by emulation. */ 737d30f6e48SScott Wood return RESUME_GUEST_NV; 738d30f6e48SScott Wood 739d9fbd03dSHollis Blanchard case EMULATE_DO_DCR: 740d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DCR; 741d30f6e48SScott Wood return RESUME_HOST; 742d30f6e48SScott Wood 743d9fbd03dSHollis Blanchard case EMULATE_FAIL: 7445cf8ca22SHollis Blanchard printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 745d9fbd03dSHollis Blanchard __func__, vcpu->arch.pc, vcpu->arch.last_inst); 746d9fbd03dSHollis Blanchard /* For debugging, encode the failing instruction and 747d9fbd03dSHollis Blanchard * report it to userspace. */ 748d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason = ~0ULL << 32; 749d9fbd03dSHollis Blanchard run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 750d1ff5499SAlexander Graf kvmppc_core_queue_program(vcpu, ESR_PIL); 751d30f6e48SScott Wood return RESUME_HOST; 752d30f6e48SScott Wood 7539b4f5308SBharat Bhushan case EMULATE_EXIT_USER: 7549b4f5308SBharat Bhushan return RESUME_HOST; 7559b4f5308SBharat Bhushan 756d9fbd03dSHollis Blanchard default: 757d9fbd03dSHollis Blanchard BUG(); 758d9fbd03dSHollis Blanchard } 759d30f6e48SScott Wood } 760d30f6e48SScott Wood 7614e642ccbSAlexander Graf static void kvmppc_fill_pt_regs(struct pt_regs *regs) 7624e642ccbSAlexander Graf { 7634e642ccbSAlexander Graf ulong r1, ip, msr, lr; 7644e642ccbSAlexander Graf 7654e642ccbSAlexander Graf asm("mr %0, 1" : "=r"(r1)); 7664e642ccbSAlexander Graf asm("mflr %0" : "=r"(lr)); 7674e642ccbSAlexander Graf asm("mfmsr %0" : "=r"(msr)); 7684e642ccbSAlexander Graf asm("bl 1f; 1: mflr %0" : "=r"(ip)); 7694e642ccbSAlexander Graf 7704e642ccbSAlexander Graf memset(regs, 0, sizeof(*regs)); 7714e642ccbSAlexander Graf regs->gpr[1] = r1; 7724e642ccbSAlexander Graf regs->nip = ip; 7734e642ccbSAlexander Graf regs->msr = msr; 7744e642ccbSAlexander Graf regs->link = lr; 7754e642ccbSAlexander Graf } 7764e642ccbSAlexander Graf 7776328e593SBharat Bhushan /* 7786328e593SBharat Bhushan * For interrupts needed to be handled by host interrupt handlers, 7796328e593SBharat Bhushan * corresponding host handler are called from here in similar way 7806328e593SBharat Bhushan * (but not exact) as they are called from low level handler 7816328e593SBharat Bhushan * (such as from arch/powerpc/kernel/head_fsl_booke.S). 7826328e593SBharat Bhushan */ 7834e642ccbSAlexander Graf static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 7844e642ccbSAlexander Graf unsigned int exit_nr) 7854e642ccbSAlexander Graf { 7864e642ccbSAlexander Graf struct pt_regs regs; 7874e642ccbSAlexander Graf 7884e642ccbSAlexander Graf switch (exit_nr) { 7894e642ccbSAlexander Graf case BOOKE_INTERRUPT_EXTERNAL: 7904e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 7914e642ccbSAlexander Graf do_IRQ(®s); 7924e642ccbSAlexander Graf break; 7934e642ccbSAlexander Graf case BOOKE_INTERRUPT_DECREMENTER: 7944e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 7954e642ccbSAlexander Graf timer_interrupt(®s); 7964e642ccbSAlexander Graf break; 7975f17ce8bSTiejun Chen #if defined(CONFIG_PPC_DOORBELL) 7984e642ccbSAlexander Graf case BOOKE_INTERRUPT_DOORBELL: 7994e642ccbSAlexander Graf kvmppc_fill_pt_regs(®s); 8004e642ccbSAlexander Graf doorbell_exception(®s); 8014e642ccbSAlexander Graf break; 8024e642ccbSAlexander Graf #endif 8034e642ccbSAlexander Graf case BOOKE_INTERRUPT_MACHINE_CHECK: 8044e642ccbSAlexander Graf /* FIXME */ 8054e642ccbSAlexander Graf break; 8067cc1e8eeSAlexander Graf case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 8077cc1e8eeSAlexander Graf kvmppc_fill_pt_regs(®s); 8087cc1e8eeSAlexander Graf performance_monitor_exception(®s); 8097cc1e8eeSAlexander Graf break; 8106328e593SBharat Bhushan case BOOKE_INTERRUPT_WATCHDOG: 8116328e593SBharat Bhushan kvmppc_fill_pt_regs(®s); 8126328e593SBharat Bhushan #ifdef CONFIG_BOOKE_WDT 8136328e593SBharat Bhushan WatchdogException(®s); 8146328e593SBharat Bhushan #else 8156328e593SBharat Bhushan unknown_exception(®s); 8166328e593SBharat Bhushan #endif 8176328e593SBharat Bhushan break; 8186328e593SBharat Bhushan case BOOKE_INTERRUPT_CRITICAL: 8196328e593SBharat Bhushan unknown_exception(®s); 8206328e593SBharat Bhushan break; 8214e642ccbSAlexander Graf } 8224e642ccbSAlexander Graf } 8234e642ccbSAlexander Graf 824d30f6e48SScott Wood /** 825d30f6e48SScott Wood * kvmppc_handle_exit 826d30f6e48SScott Wood * 827d30f6e48SScott Wood * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 828d30f6e48SScott Wood */ 829d30f6e48SScott Wood int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 830d30f6e48SScott Wood unsigned int exit_nr) 831d30f6e48SScott Wood { 832d30f6e48SScott Wood int r = RESUME_HOST; 8337ee78855SAlexander Graf int s; 834f1e89028SScott Wood int idx; 835d30f6e48SScott Wood 8367c11c0ccSScott Wood #ifdef CONFIG_PPC64 8377c11c0ccSScott Wood WARN_ON(local_paca->irq_happened != 0); 8387c11c0ccSScott Wood #endif 8397c11c0ccSScott Wood 8407c11c0ccSScott Wood /* 8417c11c0ccSScott Wood * We enter with interrupts disabled in hardware, but 8427c11c0ccSScott Wood * we need to call hard_irq_disable anyway to ensure that 8437c11c0ccSScott Wood * the software state is kept in sync. 8447c11c0ccSScott Wood */ 8457c11c0ccSScott Wood hard_irq_disable(); 8467c11c0ccSScott Wood 847d30f6e48SScott Wood /* update before a new last_exit_type is rewritten */ 848d30f6e48SScott Wood kvmppc_update_timing_stats(vcpu); 849d30f6e48SScott Wood 8504e642ccbSAlexander Graf /* restart interrupts if they were meant for the host */ 8514e642ccbSAlexander Graf kvmppc_restart_interrupt(vcpu, exit_nr); 852d30f6e48SScott Wood 853d30f6e48SScott Wood local_irq_enable(); 854d30f6e48SScott Wood 85597c95059SAlexander Graf trace_kvm_exit(exit_nr, vcpu); 856706fb730SAlexander Graf kvm_guest_exit(); 85797c95059SAlexander Graf 858d30f6e48SScott Wood run->exit_reason = KVM_EXIT_UNKNOWN; 859d30f6e48SScott Wood run->ready_for_interrupt_injection = 1; 860d30f6e48SScott Wood 861d30f6e48SScott Wood switch (exit_nr) { 862d30f6e48SScott Wood case BOOKE_INTERRUPT_MACHINE_CHECK: 863c35c9d84SAlexander Graf printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 864c35c9d84SAlexander Graf kvmppc_dump_vcpu(vcpu); 865c35c9d84SAlexander Graf /* For debugging, send invalid exit reason to user space */ 866c35c9d84SAlexander Graf run->hw.hardware_exit_reason = ~1ULL << 32; 867c35c9d84SAlexander Graf run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 868c35c9d84SAlexander Graf r = RESUME_HOST; 869d30f6e48SScott Wood break; 870d30f6e48SScott Wood 871d30f6e48SScott Wood case BOOKE_INTERRUPT_EXTERNAL: 872d30f6e48SScott Wood kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 873d30f6e48SScott Wood r = RESUME_GUEST; 874d30f6e48SScott Wood break; 875d30f6e48SScott Wood 876d30f6e48SScott Wood case BOOKE_INTERRUPT_DECREMENTER: 877d30f6e48SScott Wood kvmppc_account_exit(vcpu, DEC_EXITS); 878d30f6e48SScott Wood r = RESUME_GUEST; 879d30f6e48SScott Wood break; 880d30f6e48SScott Wood 8816328e593SBharat Bhushan case BOOKE_INTERRUPT_WATCHDOG: 8826328e593SBharat Bhushan r = RESUME_GUEST; 8836328e593SBharat Bhushan break; 8846328e593SBharat Bhushan 885d30f6e48SScott Wood case BOOKE_INTERRUPT_DOORBELL: 886d30f6e48SScott Wood kvmppc_account_exit(vcpu, DBELL_EXITS); 887d30f6e48SScott Wood r = RESUME_GUEST; 888d30f6e48SScott Wood break; 889d30f6e48SScott Wood 890d30f6e48SScott Wood case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 891d30f6e48SScott Wood kvmppc_account_exit(vcpu, GDBELL_EXITS); 892d30f6e48SScott Wood 893d30f6e48SScott Wood /* 894d30f6e48SScott Wood * We are here because there is a pending guest interrupt 895d30f6e48SScott Wood * which could not be delivered as MSR_CE or MSR_ME was not 896d30f6e48SScott Wood * set. Once we break from here we will retry delivery. 897d30f6e48SScott Wood */ 898d30f6e48SScott Wood r = RESUME_GUEST; 899d30f6e48SScott Wood break; 900d30f6e48SScott Wood 901d30f6e48SScott Wood case BOOKE_INTERRUPT_GUEST_DBELL: 902d30f6e48SScott Wood kvmppc_account_exit(vcpu, GDBELL_EXITS); 903d30f6e48SScott Wood 904d30f6e48SScott Wood /* 905d30f6e48SScott Wood * We are here because there is a pending guest interrupt 906d30f6e48SScott Wood * which could not be delivered as MSR_EE was not set. Once 907d30f6e48SScott Wood * we break from here we will retry delivery. 908d30f6e48SScott Wood */ 909d30f6e48SScott Wood r = RESUME_GUEST; 910d30f6e48SScott Wood break; 911d30f6e48SScott Wood 91295f2e921SAlexander Graf case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 91395f2e921SAlexander Graf r = RESUME_GUEST; 91495f2e921SAlexander Graf break; 91595f2e921SAlexander Graf 916d30f6e48SScott Wood case BOOKE_INTERRUPT_HV_PRIV: 917d30f6e48SScott Wood r = emulation_exit(run, vcpu); 918d30f6e48SScott Wood break; 919d30f6e48SScott Wood 920d30f6e48SScott Wood case BOOKE_INTERRUPT_PROGRAM: 921d30f6e48SScott Wood if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 9220268597cSAlexander Graf /* 9230268597cSAlexander Graf * Program traps generated by user-level software must 9240268597cSAlexander Graf * be handled by the guest kernel. 9250268597cSAlexander Graf * 9260268597cSAlexander Graf * In GS mode, hypervisor privileged instructions trap 9270268597cSAlexander Graf * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 9280268597cSAlexander Graf * actual program interrupts, handled by the guest. 9290268597cSAlexander Graf */ 930d30f6e48SScott Wood kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 931d30f6e48SScott Wood r = RESUME_GUEST; 932d30f6e48SScott Wood kvmppc_account_exit(vcpu, USR_PR_INST); 933d30f6e48SScott Wood break; 934d30f6e48SScott Wood } 935d30f6e48SScott Wood 936d30f6e48SScott Wood r = emulation_exit(run, vcpu); 937d9fbd03dSHollis Blanchard break; 938d9fbd03dSHollis Blanchard 939d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_FP_UNAVAIL: 940d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 9417b701591SHollis Blanchard kvmppc_account_exit(vcpu, FP_UNAVAIL); 942d9fbd03dSHollis Blanchard r = RESUME_GUEST; 943d9fbd03dSHollis Blanchard break; 944d9fbd03dSHollis Blanchard 9454cd35f67SScott Wood #ifdef CONFIG_SPE 9464cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: { 9474cd35f67SScott Wood if (vcpu->arch.shared->msr & MSR_SPE) 9484cd35f67SScott Wood kvmppc_vcpu_enable_spe(vcpu); 9494cd35f67SScott Wood else 9504cd35f67SScott Wood kvmppc_booke_queue_irqprio(vcpu, 9514cd35f67SScott Wood BOOKE_IRQPRIO_SPE_UNAVAIL); 952bb3a8a17SHollis Blanchard r = RESUME_GUEST; 953bb3a8a17SHollis Blanchard break; 9544cd35f67SScott Wood } 955bb3a8a17SHollis Blanchard 956bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_DATA: 957bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 958bb3a8a17SHollis Blanchard r = RESUME_GUEST; 959bb3a8a17SHollis Blanchard break; 960bb3a8a17SHollis Blanchard 961bb3a8a17SHollis Blanchard case BOOKE_INTERRUPT_SPE_FP_ROUND: 962bb3a8a17SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 963bb3a8a17SHollis Blanchard r = RESUME_GUEST; 964bb3a8a17SHollis Blanchard break; 9654cd35f67SScott Wood #else 9664cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_UNAVAIL: 9674cd35f67SScott Wood /* 9684cd35f67SScott Wood * Guest wants SPE, but host kernel doesn't support it. Send 9694cd35f67SScott Wood * an "unimplemented operation" program check to the guest. 9704cd35f67SScott Wood */ 9714cd35f67SScott Wood kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 9724cd35f67SScott Wood r = RESUME_GUEST; 9734cd35f67SScott Wood break; 9744cd35f67SScott Wood 9754cd35f67SScott Wood /* 9764cd35f67SScott Wood * These really should never happen without CONFIG_SPE, 9774cd35f67SScott Wood * as we should never enable the real MSR[SPE] in the guest. 9784cd35f67SScott Wood */ 9794cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_DATA: 9804cd35f67SScott Wood case BOOKE_INTERRUPT_SPE_FP_ROUND: 9814cd35f67SScott Wood printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 9824cd35f67SScott Wood __func__, exit_nr, vcpu->arch.pc); 9834cd35f67SScott Wood run->hw.hardware_exit_reason = exit_nr; 9844cd35f67SScott Wood r = RESUME_HOST; 9854cd35f67SScott Wood break; 9864cd35f67SScott Wood #endif 987bb3a8a17SHollis Blanchard 988d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DATA_STORAGE: 989daf5e271SLiu Yu kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 990daf5e271SLiu Yu vcpu->arch.fault_esr); 9917b701591SHollis Blanchard kvmppc_account_exit(vcpu, DSI_EXITS); 992d9fbd03dSHollis Blanchard r = RESUME_GUEST; 993d9fbd03dSHollis Blanchard break; 994d9fbd03dSHollis Blanchard 995d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_INST_STORAGE: 996daf5e271SLiu Yu kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 9977b701591SHollis Blanchard kvmppc_account_exit(vcpu, ISI_EXITS); 998d9fbd03dSHollis Blanchard r = RESUME_GUEST; 999d9fbd03dSHollis Blanchard break; 1000d9fbd03dSHollis Blanchard 1001011da899SAlexander Graf case BOOKE_INTERRUPT_ALIGNMENT: 1002011da899SAlexander Graf kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1003011da899SAlexander Graf vcpu->arch.fault_esr); 1004011da899SAlexander Graf r = RESUME_GUEST; 1005011da899SAlexander Graf break; 1006011da899SAlexander Graf 1007d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 1008d30f6e48SScott Wood case BOOKE_INTERRUPT_HV_SYSCALL: 1009d30f6e48SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR)) { 1010d30f6e48SScott Wood kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1011d30f6e48SScott Wood } else { 1012d30f6e48SScott Wood /* 1013d30f6e48SScott Wood * hcall from guest userspace -- send privileged 1014d30f6e48SScott Wood * instruction program check. 1015d30f6e48SScott Wood */ 1016d30f6e48SScott Wood kvmppc_core_queue_program(vcpu, ESR_PPR); 1017d30f6e48SScott Wood } 1018d30f6e48SScott Wood 1019d30f6e48SScott Wood r = RESUME_GUEST; 1020d30f6e48SScott Wood break; 1021d30f6e48SScott Wood #else 1022d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_SYSCALL: 10232a342ed5SAlexander Graf if (!(vcpu->arch.shared->msr & MSR_PR) && 10242a342ed5SAlexander Graf (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 10252a342ed5SAlexander Graf /* KVM PV hypercalls */ 10262a342ed5SAlexander Graf kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 10272a342ed5SAlexander Graf r = RESUME_GUEST; 10282a342ed5SAlexander Graf } else { 10292a342ed5SAlexander Graf /* Guest syscalls */ 1030d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 10312a342ed5SAlexander Graf } 10327b701591SHollis Blanchard kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1033d9fbd03dSHollis Blanchard r = RESUME_GUEST; 1034d9fbd03dSHollis Blanchard break; 1035d30f6e48SScott Wood #endif 1036d9fbd03dSHollis Blanchard 1037d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DTLB_MISS: { 1038d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.fault_dear; 10397924bd41SHollis Blanchard int gtlb_index; 1040475e7cddSHollis Blanchard gpa_t gpaddr; 1041d9fbd03dSHollis Blanchard gfn_t gfn; 1042d9fbd03dSHollis Blanchard 1043bf7ca4bdSAlexander Graf #ifdef CONFIG_KVM_E500V2 1044a4cd8b23SScott Wood if (!(vcpu->arch.shared->msr & MSR_PR) && 1045a4cd8b23SScott Wood (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1046a4cd8b23SScott Wood kvmppc_map_magic(vcpu); 1047a4cd8b23SScott Wood kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1048a4cd8b23SScott Wood r = RESUME_GUEST; 1049a4cd8b23SScott Wood 1050a4cd8b23SScott Wood break; 1051a4cd8b23SScott Wood } 1052a4cd8b23SScott Wood #endif 1053a4cd8b23SScott Wood 1054d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 1055fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 10567924bd41SHollis Blanchard if (gtlb_index < 0) { 1057d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 1058daf5e271SLiu Yu kvmppc_core_queue_dtlb_miss(vcpu, 1059daf5e271SLiu Yu vcpu->arch.fault_dear, 1060daf5e271SLiu Yu vcpu->arch.fault_esr); 1061b52a638cSHollis Blanchard kvmppc_mmu_dtlb_miss(vcpu); 10627b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1063d9fbd03dSHollis Blanchard r = RESUME_GUEST; 1064d9fbd03dSHollis Blanchard break; 1065d9fbd03dSHollis Blanchard } 1066d9fbd03dSHollis Blanchard 1067f1e89028SScott Wood idx = srcu_read_lock(&vcpu->kvm->srcu); 1068f1e89028SScott Wood 1069be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1070475e7cddSHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 1071d9fbd03dSHollis Blanchard 1072d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1073d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 1074d9fbd03dSHollis Blanchard * didn't, and it is RAM. This could be because: 1075d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 1076d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 1077d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 1078d9fbd03dSHollis Blanchard * invoking the guest. */ 107958a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 10807b701591SHollis Blanchard kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1081d9fbd03dSHollis Blanchard r = RESUME_GUEST; 1082d9fbd03dSHollis Blanchard } else { 1083d9fbd03dSHollis Blanchard /* Guest has mapped and accessed a page which is not 1084d9fbd03dSHollis Blanchard * actually RAM. */ 1085475e7cddSHollis Blanchard vcpu->arch.paddr_accessed = gpaddr; 10866020c0f6SAlexander Graf vcpu->arch.vaddr_accessed = eaddr; 1087d9fbd03dSHollis Blanchard r = kvmppc_emulate_mmio(run, vcpu); 10887b701591SHollis Blanchard kvmppc_account_exit(vcpu, MMIO_EXITS); 1089d9fbd03dSHollis Blanchard } 1090d9fbd03dSHollis Blanchard 1091f1e89028SScott Wood srcu_read_unlock(&vcpu->kvm->srcu, idx); 1092d9fbd03dSHollis Blanchard break; 1093d9fbd03dSHollis Blanchard } 1094d9fbd03dSHollis Blanchard 1095d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_ITLB_MISS: { 1096d9fbd03dSHollis Blanchard unsigned long eaddr = vcpu->arch.pc; 109789168618SHollis Blanchard gpa_t gpaddr; 1098d9fbd03dSHollis Blanchard gfn_t gfn; 10997924bd41SHollis Blanchard int gtlb_index; 1100d9fbd03dSHollis Blanchard 1101d9fbd03dSHollis Blanchard r = RESUME_GUEST; 1102d9fbd03dSHollis Blanchard 1103d9fbd03dSHollis Blanchard /* Check the guest TLB. */ 1104fa86b8ddSHollis Blanchard gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 11057924bd41SHollis Blanchard if (gtlb_index < 0) { 1106d9fbd03dSHollis Blanchard /* The guest didn't have a mapping for it. */ 1107d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1108b52a638cSHollis Blanchard kvmppc_mmu_itlb_miss(vcpu); 11097b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1110d9fbd03dSHollis Blanchard break; 1111d9fbd03dSHollis Blanchard } 1112d9fbd03dSHollis Blanchard 11137b701591SHollis Blanchard kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1114d9fbd03dSHollis Blanchard 1115f1e89028SScott Wood idx = srcu_read_lock(&vcpu->kvm->srcu); 1116f1e89028SScott Wood 1117be8d1caeSHollis Blanchard gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 111889168618SHollis Blanchard gfn = gpaddr >> PAGE_SHIFT; 1119d9fbd03dSHollis Blanchard 1120d9fbd03dSHollis Blanchard if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1121d9fbd03dSHollis Blanchard /* The guest TLB had a mapping, but the shadow TLB 1122d9fbd03dSHollis Blanchard * didn't. This could be because: 1123d9fbd03dSHollis Blanchard * a) the entry is mapping the host kernel, or 1124d9fbd03dSHollis Blanchard * b) the guest used a large mapping which we're faking 1125d9fbd03dSHollis Blanchard * Either way, we need to satisfy the fault without 1126d9fbd03dSHollis Blanchard * invoking the guest. */ 112758a96214SHollis Blanchard kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1128d9fbd03dSHollis Blanchard } else { 1129d9fbd03dSHollis Blanchard /* Guest mapped and leaped at non-RAM! */ 1130d4cf3892SHollis Blanchard kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1131d9fbd03dSHollis Blanchard } 1132d9fbd03dSHollis Blanchard 1133f1e89028SScott Wood srcu_read_unlock(&vcpu->kvm->srcu, idx); 1134d9fbd03dSHollis Blanchard break; 1135d9fbd03dSHollis Blanchard } 1136d9fbd03dSHollis Blanchard 1137d9fbd03dSHollis Blanchard case BOOKE_INTERRUPT_DEBUG: { 1138d9fbd03dSHollis Blanchard u32 dbsr; 1139d9fbd03dSHollis Blanchard 1140d9fbd03dSHollis Blanchard vcpu->arch.pc = mfspr(SPRN_CSRR0); 1141d9fbd03dSHollis Blanchard 1142d9fbd03dSHollis Blanchard /* clear IAC events in DBSR register */ 1143d9fbd03dSHollis Blanchard dbsr = mfspr(SPRN_DBSR); 1144d9fbd03dSHollis Blanchard dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 1145d9fbd03dSHollis Blanchard mtspr(SPRN_DBSR, dbsr); 1146d9fbd03dSHollis Blanchard 1147d9fbd03dSHollis Blanchard run->exit_reason = KVM_EXIT_DEBUG; 11487b701591SHollis Blanchard kvmppc_account_exit(vcpu, DEBUG_EXITS); 1149d9fbd03dSHollis Blanchard r = RESUME_HOST; 1150d9fbd03dSHollis Blanchard break; 1151d9fbd03dSHollis Blanchard } 1152d9fbd03dSHollis Blanchard 1153d9fbd03dSHollis Blanchard default: 1154d9fbd03dSHollis Blanchard printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1155d9fbd03dSHollis Blanchard BUG(); 1156d9fbd03dSHollis Blanchard } 1157d9fbd03dSHollis Blanchard 1158a8e4ef84SAlexander Graf /* 1159a8e4ef84SAlexander Graf * To avoid clobbering exit_reason, only check for signals if we 1160a8e4ef84SAlexander Graf * aren't already exiting to userspace for some other reason. 1161a8e4ef84SAlexander Graf */ 116203660ba2SAlexander Graf if (!(r & RESUME_HOST)) { 1163d9fbd03dSHollis Blanchard local_irq_disable(); 11647ee78855SAlexander Graf s = kvmppc_prepare_to_enter(vcpu); 11657ee78855SAlexander Graf if (s <= 0) { 116624afa37bSAlexander Graf local_irq_enable(); 11677ee78855SAlexander Graf r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 116824afa37bSAlexander Graf } else { 11695f1c248fSScott Wood kvmppc_fix_ee_before_entry(); 117024afa37bSAlexander Graf } 117124afa37bSAlexander Graf } 1172706fb730SAlexander Graf 1173d9fbd03dSHollis Blanchard return r; 1174d9fbd03dSHollis Blanchard } 1175d9fbd03dSHollis Blanchard 1176d26f22c9SBharat Bhushan static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1177d26f22c9SBharat Bhushan { 1178d26f22c9SBharat Bhushan u32 old_tsr = vcpu->arch.tsr; 1179d26f22c9SBharat Bhushan 1180d26f22c9SBharat Bhushan vcpu->arch.tsr = new_tsr; 1181d26f22c9SBharat Bhushan 1182d26f22c9SBharat Bhushan if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1183d26f22c9SBharat Bhushan arm_next_watchdog(vcpu); 1184d26f22c9SBharat Bhushan 1185d26f22c9SBharat Bhushan update_timer_ints(vcpu); 1186d26f22c9SBharat Bhushan } 1187d26f22c9SBharat Bhushan 1188d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1189d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1190d9fbd03dSHollis Blanchard { 1191082decf2SHollis Blanchard int i; 1192af8f38b3SAlexander Graf int r; 1193082decf2SHollis Blanchard 1194d9fbd03dSHollis Blanchard vcpu->arch.pc = 0; 1195b5904972SScott Wood vcpu->arch.shared->pir = vcpu->vcpu_id; 11968e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1197d30f6e48SScott Wood kvmppc_set_msr(vcpu, 0); 1198d9fbd03dSHollis Blanchard 1199d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 1200d30f6e48SScott Wood vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 1201d9fbd03dSHollis Blanchard vcpu->arch.shadow_pid = 1; 1202d30f6e48SScott Wood vcpu->arch.shared->msr = 0; 1203d30f6e48SScott Wood #endif 1204d9fbd03dSHollis Blanchard 1205082decf2SHollis Blanchard /* Eye-catching numbers so we know if the guest takes an interrupt 1206082decf2SHollis Blanchard * before it's programmed its own IVPR/IVORs. */ 1207d9fbd03dSHollis Blanchard vcpu->arch.ivpr = 0x55550000; 1208082decf2SHollis Blanchard for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1209082decf2SHollis Blanchard vcpu->arch.ivor[i] = 0x7700 | i * 4; 1210d9fbd03dSHollis Blanchard 121173e75b41SHollis Blanchard kvmppc_init_timing_stats(vcpu); 121273e75b41SHollis Blanchard 1213af8f38b3SAlexander Graf r = kvmppc_core_vcpu_setup(vcpu); 1214af8f38b3SAlexander Graf kvmppc_sanity_check(vcpu); 1215af8f38b3SAlexander Graf return r; 1216d9fbd03dSHollis Blanchard } 1217d9fbd03dSHollis Blanchard 1218f61c94bbSBharat Bhushan int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1219f61c94bbSBharat Bhushan { 1220f61c94bbSBharat Bhushan /* setup watchdog timer once */ 1221f61c94bbSBharat Bhushan spin_lock_init(&vcpu->arch.wdt_lock); 1222f61c94bbSBharat Bhushan setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1223f61c94bbSBharat Bhushan (unsigned long)vcpu); 1224f61c94bbSBharat Bhushan 1225f61c94bbSBharat Bhushan return 0; 1226f61c94bbSBharat Bhushan } 1227f61c94bbSBharat Bhushan 1228f61c94bbSBharat Bhushan void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1229f61c94bbSBharat Bhushan { 1230f61c94bbSBharat Bhushan del_timer_sync(&vcpu->arch.wdt_timer); 1231f61c94bbSBharat Bhushan } 1232f61c94bbSBharat Bhushan 1233d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1234d9fbd03dSHollis Blanchard { 1235d9fbd03dSHollis Blanchard int i; 1236d9fbd03dSHollis Blanchard 1237d9fbd03dSHollis Blanchard regs->pc = vcpu->arch.pc; 1238992b5b29SAlexander Graf regs->cr = kvmppc_get_cr(vcpu); 1239d9fbd03dSHollis Blanchard regs->ctr = vcpu->arch.ctr; 1240d9fbd03dSHollis Blanchard regs->lr = vcpu->arch.lr; 1241992b5b29SAlexander Graf regs->xer = kvmppc_get_xer(vcpu); 1242666e7252SAlexander Graf regs->msr = vcpu->arch.shared->msr; 1243de7906c3SAlexander Graf regs->srr0 = vcpu->arch.shared->srr0; 1244de7906c3SAlexander Graf regs->srr1 = vcpu->arch.shared->srr1; 1245d9fbd03dSHollis Blanchard regs->pid = vcpu->arch.pid; 1246a73a9599SAlexander Graf regs->sprg0 = vcpu->arch.shared->sprg0; 1247a73a9599SAlexander Graf regs->sprg1 = vcpu->arch.shared->sprg1; 1248a73a9599SAlexander Graf regs->sprg2 = vcpu->arch.shared->sprg2; 1249a73a9599SAlexander Graf regs->sprg3 = vcpu->arch.shared->sprg3; 1250b5904972SScott Wood regs->sprg4 = vcpu->arch.shared->sprg4; 1251b5904972SScott Wood regs->sprg5 = vcpu->arch.shared->sprg5; 1252b5904972SScott Wood regs->sprg6 = vcpu->arch.shared->sprg6; 1253b5904972SScott Wood regs->sprg7 = vcpu->arch.shared->sprg7; 1254d9fbd03dSHollis Blanchard 1255d9fbd03dSHollis Blanchard for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 12568e5b26b5SAlexander Graf regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1257d9fbd03dSHollis Blanchard 1258d9fbd03dSHollis Blanchard return 0; 1259d9fbd03dSHollis Blanchard } 1260d9fbd03dSHollis Blanchard 1261d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1262d9fbd03dSHollis Blanchard { 1263d9fbd03dSHollis Blanchard int i; 1264d9fbd03dSHollis Blanchard 1265d9fbd03dSHollis Blanchard vcpu->arch.pc = regs->pc; 1266992b5b29SAlexander Graf kvmppc_set_cr(vcpu, regs->cr); 1267d9fbd03dSHollis Blanchard vcpu->arch.ctr = regs->ctr; 1268d9fbd03dSHollis Blanchard vcpu->arch.lr = regs->lr; 1269992b5b29SAlexander Graf kvmppc_set_xer(vcpu, regs->xer); 1270b8fd68acSHollis Blanchard kvmppc_set_msr(vcpu, regs->msr); 1271de7906c3SAlexander Graf vcpu->arch.shared->srr0 = regs->srr0; 1272de7906c3SAlexander Graf vcpu->arch.shared->srr1 = regs->srr1; 12735ce941eeSScott Wood kvmppc_set_pid(vcpu, regs->pid); 1274a73a9599SAlexander Graf vcpu->arch.shared->sprg0 = regs->sprg0; 1275a73a9599SAlexander Graf vcpu->arch.shared->sprg1 = regs->sprg1; 1276a73a9599SAlexander Graf vcpu->arch.shared->sprg2 = regs->sprg2; 1277a73a9599SAlexander Graf vcpu->arch.shared->sprg3 = regs->sprg3; 1278b5904972SScott Wood vcpu->arch.shared->sprg4 = regs->sprg4; 1279b5904972SScott Wood vcpu->arch.shared->sprg5 = regs->sprg5; 1280b5904972SScott Wood vcpu->arch.shared->sprg6 = regs->sprg6; 1281b5904972SScott Wood vcpu->arch.shared->sprg7 = regs->sprg7; 1282d9fbd03dSHollis Blanchard 12838e5b26b5SAlexander Graf for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 12848e5b26b5SAlexander Graf kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1285d9fbd03dSHollis Blanchard 1286d9fbd03dSHollis Blanchard return 0; 1287d9fbd03dSHollis Blanchard } 1288d9fbd03dSHollis Blanchard 12895ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu, 12905ce941eeSScott Wood struct kvm_sregs *sregs) 12915ce941eeSScott Wood { 12925ce941eeSScott Wood u64 tb = get_tb(); 12935ce941eeSScott Wood 12945ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_BASE; 12955ce941eeSScott Wood 12965ce941eeSScott Wood sregs->u.e.csrr0 = vcpu->arch.csrr0; 12975ce941eeSScott Wood sregs->u.e.csrr1 = vcpu->arch.csrr1; 12985ce941eeSScott Wood sregs->u.e.mcsr = vcpu->arch.mcsr; 1299d30f6e48SScott Wood sregs->u.e.esr = get_guest_esr(vcpu); 1300d30f6e48SScott Wood sregs->u.e.dear = get_guest_dear(vcpu); 13015ce941eeSScott Wood sregs->u.e.tsr = vcpu->arch.tsr; 13025ce941eeSScott Wood sregs->u.e.tcr = vcpu->arch.tcr; 13035ce941eeSScott Wood sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 13045ce941eeSScott Wood sregs->u.e.tb = tb; 13055ce941eeSScott Wood sregs->u.e.vrsave = vcpu->arch.vrsave; 13065ce941eeSScott Wood } 13075ce941eeSScott Wood 13085ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu, 13095ce941eeSScott Wood struct kvm_sregs *sregs) 13105ce941eeSScott Wood { 13115ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 13125ce941eeSScott Wood return 0; 13135ce941eeSScott Wood 13145ce941eeSScott Wood vcpu->arch.csrr0 = sregs->u.e.csrr0; 13155ce941eeSScott Wood vcpu->arch.csrr1 = sregs->u.e.csrr1; 13165ce941eeSScott Wood vcpu->arch.mcsr = sregs->u.e.mcsr; 1317d30f6e48SScott Wood set_guest_esr(vcpu, sregs->u.e.esr); 1318d30f6e48SScott Wood set_guest_dear(vcpu, sregs->u.e.dear); 13195ce941eeSScott Wood vcpu->arch.vrsave = sregs->u.e.vrsave; 1320dfd4d47eSScott Wood kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 13215ce941eeSScott Wood 1322dfd4d47eSScott Wood if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 13235ce941eeSScott Wood vcpu->arch.dec = sregs->u.e.dec; 13245ce941eeSScott Wood kvmppc_emulate_dec(vcpu); 1325dfd4d47eSScott Wood } 13265ce941eeSScott Wood 1327d26f22c9SBharat Bhushan if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1328d26f22c9SBharat Bhushan kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 13295ce941eeSScott Wood 13305ce941eeSScott Wood return 0; 13315ce941eeSScott Wood } 13325ce941eeSScott Wood 13335ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu, 13345ce941eeSScott Wood struct kvm_sregs *sregs) 13355ce941eeSScott Wood { 13365ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_ARCH206; 13375ce941eeSScott Wood 1338841741f2SScott Wood sregs->u.e.pir = vcpu->vcpu_id; 13395ce941eeSScott Wood sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 13405ce941eeSScott Wood sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 13415ce941eeSScott Wood sregs->u.e.decar = vcpu->arch.decar; 13425ce941eeSScott Wood sregs->u.e.ivpr = vcpu->arch.ivpr; 13435ce941eeSScott Wood } 13445ce941eeSScott Wood 13455ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu, 13465ce941eeSScott Wood struct kvm_sregs *sregs) 13475ce941eeSScott Wood { 13485ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 13495ce941eeSScott Wood return 0; 13505ce941eeSScott Wood 1351841741f2SScott Wood if (sregs->u.e.pir != vcpu->vcpu_id) 13525ce941eeSScott Wood return -EINVAL; 13535ce941eeSScott Wood 13545ce941eeSScott Wood vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 13555ce941eeSScott Wood vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 13565ce941eeSScott Wood vcpu->arch.decar = sregs->u.e.decar; 13575ce941eeSScott Wood vcpu->arch.ivpr = sregs->u.e.ivpr; 13585ce941eeSScott Wood 13595ce941eeSScott Wood return 0; 13605ce941eeSScott Wood } 13615ce941eeSScott Wood 13625ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 13635ce941eeSScott Wood { 13645ce941eeSScott Wood sregs->u.e.features |= KVM_SREGS_E_IVOR; 13655ce941eeSScott Wood 13665ce941eeSScott Wood sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 13675ce941eeSScott Wood sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 13685ce941eeSScott Wood sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 13695ce941eeSScott Wood sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 13705ce941eeSScott Wood sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 13715ce941eeSScott Wood sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 13725ce941eeSScott Wood sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 13735ce941eeSScott Wood sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 13745ce941eeSScott Wood sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 13755ce941eeSScott Wood sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 13765ce941eeSScott Wood sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 13775ce941eeSScott Wood sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 13785ce941eeSScott Wood sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 13795ce941eeSScott Wood sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 13805ce941eeSScott Wood sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 13815ce941eeSScott Wood sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 13825ce941eeSScott Wood } 13835ce941eeSScott Wood 13845ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 13855ce941eeSScott Wood { 13865ce941eeSScott Wood if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 13875ce941eeSScott Wood return 0; 13885ce941eeSScott Wood 13895ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 13905ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 13915ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 13925ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 13935ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 13945ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 13955ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 13965ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 13975ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 13985ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 13995ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 14005ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 14015ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 14025ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 14035ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 14045ce941eeSScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 14055ce941eeSScott Wood 14065ce941eeSScott Wood return 0; 14075ce941eeSScott Wood } 14085ce941eeSScott Wood 1409d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1410d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 1411d9fbd03dSHollis Blanchard { 14125ce941eeSScott Wood sregs->pvr = vcpu->arch.pvr; 14135ce941eeSScott Wood 14145ce941eeSScott Wood get_sregs_base(vcpu, sregs); 14155ce941eeSScott Wood get_sregs_arch206(vcpu, sregs); 14165ce941eeSScott Wood kvmppc_core_get_sregs(vcpu, sregs); 14175ce941eeSScott Wood return 0; 1418d9fbd03dSHollis Blanchard } 1419d9fbd03dSHollis Blanchard 1420d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1421d9fbd03dSHollis Blanchard struct kvm_sregs *sregs) 1422d9fbd03dSHollis Blanchard { 14235ce941eeSScott Wood int ret; 14245ce941eeSScott Wood 14255ce941eeSScott Wood if (vcpu->arch.pvr != sregs->pvr) 14265ce941eeSScott Wood return -EINVAL; 14275ce941eeSScott Wood 14285ce941eeSScott Wood ret = set_sregs_base(vcpu, sregs); 14295ce941eeSScott Wood if (ret < 0) 14305ce941eeSScott Wood return ret; 14315ce941eeSScott Wood 14325ce941eeSScott Wood ret = set_sregs_arch206(vcpu, sregs); 14335ce941eeSScott Wood if (ret < 0) 14345ce941eeSScott Wood return ret; 14355ce941eeSScott Wood 14365ce941eeSScott Wood return kvmppc_core_set_sregs(vcpu, sregs); 1437d9fbd03dSHollis Blanchard } 1438d9fbd03dSHollis Blanchard 143931f3438eSPaul Mackerras int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 144031f3438eSPaul Mackerras { 144135b299e2SMihai Caraman int r = 0; 144235b299e2SMihai Caraman union kvmppc_one_reg val; 144335b299e2SMihai Caraman int size; 144435b299e2SMihai Caraman long int i; 144535b299e2SMihai Caraman 144635b299e2SMihai Caraman size = one_reg_size(reg->id); 144735b299e2SMihai Caraman if (size > sizeof(val)) 144835b299e2SMihai Caraman return -EINVAL; 14496df8d3fcSBharat Bhushan 14506df8d3fcSBharat Bhushan switch (reg->id) { 14516df8d3fcSBharat Bhushan case KVM_REG_PPC_IAC1: 14526df8d3fcSBharat Bhushan case KVM_REG_PPC_IAC2: 14536df8d3fcSBharat Bhushan case KVM_REG_PPC_IAC3: 145435b299e2SMihai Caraman case KVM_REG_PPC_IAC4: 145535b299e2SMihai Caraman i = reg->id - KVM_REG_PPC_IAC1; 145635b299e2SMihai Caraman val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]); 14576df8d3fcSBharat Bhushan break; 14586df8d3fcSBharat Bhushan case KVM_REG_PPC_DAC1: 145935b299e2SMihai Caraman case KVM_REG_PPC_DAC2: 146035b299e2SMihai Caraman i = reg->id - KVM_REG_PPC_DAC1; 146135b299e2SMihai Caraman val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]); 14626df8d3fcSBharat Bhushan break; 1463324b3e63SAlexander Graf case KVM_REG_PPC_EPR: { 1464324b3e63SAlexander Graf u32 epr = get_guest_epr(vcpu); 146535b299e2SMihai Caraman val = get_reg_val(reg->id, epr); 1466324b3e63SAlexander Graf break; 1467324b3e63SAlexander Graf } 1468352df1deSMihai Caraman #if defined(CONFIG_64BIT) 1469352df1deSMihai Caraman case KVM_REG_PPC_EPCR: 147035b299e2SMihai Caraman val = get_reg_val(reg->id, vcpu->arch.epcr); 1471352df1deSMihai Caraman break; 1472352df1deSMihai Caraman #endif 147378accda4SBharat Bhushan case KVM_REG_PPC_TCR: 147435b299e2SMihai Caraman val = get_reg_val(reg->id, vcpu->arch.tcr); 147578accda4SBharat Bhushan break; 147678accda4SBharat Bhushan case KVM_REG_PPC_TSR: 147735b299e2SMihai Caraman val = get_reg_val(reg->id, vcpu->arch.tsr); 147878accda4SBharat Bhushan break; 147935b299e2SMihai Caraman case KVM_REG_PPC_DEBUG_INST: 148035b299e2SMihai Caraman val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV); 14818c32a2eaSBharat Bhushan break; 1482*8b75cbbeSPaul Mackerras case KVM_REG_PPC_VRSAVE: 1483*8b75cbbeSPaul Mackerras val = get_reg_val(reg->id, vcpu->arch.vrsave); 1484*8b75cbbeSPaul Mackerras break; 14856df8d3fcSBharat Bhushan default: 148635b299e2SMihai Caraman r = kvmppc_get_one_reg(vcpu, reg->id, &val); 14876df8d3fcSBharat Bhushan break; 14886df8d3fcSBharat Bhushan } 148935b299e2SMihai Caraman 149035b299e2SMihai Caraman if (r) 149135b299e2SMihai Caraman return r; 149235b299e2SMihai Caraman 149335b299e2SMihai Caraman if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 149435b299e2SMihai Caraman r = -EFAULT; 149535b299e2SMihai Caraman 14966df8d3fcSBharat Bhushan return r; 149731f3438eSPaul Mackerras } 149831f3438eSPaul Mackerras 149931f3438eSPaul Mackerras int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 150031f3438eSPaul Mackerras { 150135b299e2SMihai Caraman int r = 0; 150235b299e2SMihai Caraman union kvmppc_one_reg val; 150335b299e2SMihai Caraman int size; 150435b299e2SMihai Caraman long int i; 150535b299e2SMihai Caraman 150635b299e2SMihai Caraman size = one_reg_size(reg->id); 150735b299e2SMihai Caraman if (size > sizeof(val)) 150835b299e2SMihai Caraman return -EINVAL; 150935b299e2SMihai Caraman 151035b299e2SMihai Caraman if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 151135b299e2SMihai Caraman return -EFAULT; 15126df8d3fcSBharat Bhushan 15136df8d3fcSBharat Bhushan switch (reg->id) { 15146df8d3fcSBharat Bhushan case KVM_REG_PPC_IAC1: 15156df8d3fcSBharat Bhushan case KVM_REG_PPC_IAC2: 15166df8d3fcSBharat Bhushan case KVM_REG_PPC_IAC3: 151735b299e2SMihai Caraman case KVM_REG_PPC_IAC4: 151835b299e2SMihai Caraman i = reg->id - KVM_REG_PPC_IAC1; 151935b299e2SMihai Caraman vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val); 15206df8d3fcSBharat Bhushan break; 15216df8d3fcSBharat Bhushan case KVM_REG_PPC_DAC1: 152235b299e2SMihai Caraman case KVM_REG_PPC_DAC2: 152335b299e2SMihai Caraman i = reg->id - KVM_REG_PPC_DAC1; 152435b299e2SMihai Caraman vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val); 15256df8d3fcSBharat Bhushan break; 1526324b3e63SAlexander Graf case KVM_REG_PPC_EPR: { 152735b299e2SMihai Caraman u32 new_epr = set_reg_val(reg->id, val); 1528324b3e63SAlexander Graf kvmppc_set_epr(vcpu, new_epr); 1529324b3e63SAlexander Graf break; 1530324b3e63SAlexander Graf } 1531352df1deSMihai Caraman #if defined(CONFIG_64BIT) 1532352df1deSMihai Caraman case KVM_REG_PPC_EPCR: { 153335b299e2SMihai Caraman u32 new_epcr = set_reg_val(reg->id, val); 1534352df1deSMihai Caraman kvmppc_set_epcr(vcpu, new_epcr); 1535352df1deSMihai Caraman break; 1536352df1deSMihai Caraman } 1537352df1deSMihai Caraman #endif 153878accda4SBharat Bhushan case KVM_REG_PPC_OR_TSR: { 153935b299e2SMihai Caraman u32 tsr_bits = set_reg_val(reg->id, val); 154078accda4SBharat Bhushan kvmppc_set_tsr_bits(vcpu, tsr_bits); 154178accda4SBharat Bhushan break; 154278accda4SBharat Bhushan } 154378accda4SBharat Bhushan case KVM_REG_PPC_CLEAR_TSR: { 154435b299e2SMihai Caraman u32 tsr_bits = set_reg_val(reg->id, val); 154578accda4SBharat Bhushan kvmppc_clr_tsr_bits(vcpu, tsr_bits); 154678accda4SBharat Bhushan break; 154778accda4SBharat Bhushan } 154878accda4SBharat Bhushan case KVM_REG_PPC_TSR: { 154935b299e2SMihai Caraman u32 tsr = set_reg_val(reg->id, val); 155078accda4SBharat Bhushan kvmppc_set_tsr(vcpu, tsr); 155178accda4SBharat Bhushan break; 155278accda4SBharat Bhushan } 155378accda4SBharat Bhushan case KVM_REG_PPC_TCR: { 155435b299e2SMihai Caraman u32 tcr = set_reg_val(reg->id, val); 155578accda4SBharat Bhushan kvmppc_set_tcr(vcpu, tcr); 155678accda4SBharat Bhushan break; 155778accda4SBharat Bhushan } 1558*8b75cbbeSPaul Mackerras case KVM_REG_PPC_VRSAVE: 1559*8b75cbbeSPaul Mackerras vcpu->arch.vrsave = set_reg_val(reg->id, val); 1560*8b75cbbeSPaul Mackerras break; 15616df8d3fcSBharat Bhushan default: 156235b299e2SMihai Caraman r = kvmppc_set_one_reg(vcpu, reg->id, &val); 15636df8d3fcSBharat Bhushan break; 15646df8d3fcSBharat Bhushan } 156535b299e2SMihai Caraman 15666df8d3fcSBharat Bhushan return r; 156731f3438eSPaul Mackerras } 156831f3438eSPaul Mackerras 1569092d62eeSBharat Bhushan int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1570092d62eeSBharat Bhushan struct kvm_guest_debug *dbg) 1571092d62eeSBharat Bhushan { 1572092d62eeSBharat Bhushan return -EINVAL; 1573092d62eeSBharat Bhushan } 1574092d62eeSBharat Bhushan 1575d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1576d9fbd03dSHollis Blanchard { 1577d9fbd03dSHollis Blanchard return -ENOTSUPP; 1578d9fbd03dSHollis Blanchard } 1579d9fbd03dSHollis Blanchard 1580d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1581d9fbd03dSHollis Blanchard { 1582d9fbd03dSHollis Blanchard return -ENOTSUPP; 1583d9fbd03dSHollis Blanchard } 1584d9fbd03dSHollis Blanchard 1585d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1586d9fbd03dSHollis Blanchard struct kvm_translation *tr) 1587d9fbd03dSHollis Blanchard { 158898001d8dSAvi Kivity int r; 158998001d8dSAvi Kivity 159098001d8dSAvi Kivity r = kvmppc_core_vcpu_translate(vcpu, tr); 159198001d8dSAvi Kivity return r; 1592d9fbd03dSHollis Blanchard } 1593d9fbd03dSHollis Blanchard 15944e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 15954e755758SAlexander Graf { 15964e755758SAlexander Graf return -ENOTSUPP; 15974e755758SAlexander Graf } 15984e755758SAlexander Graf 1599a66b48c3SPaul Mackerras void kvmppc_core_free_memslot(struct kvm_memory_slot *free, 1600a66b48c3SPaul Mackerras struct kvm_memory_slot *dont) 1601a66b48c3SPaul Mackerras { 1602a66b48c3SPaul Mackerras } 1603a66b48c3SPaul Mackerras 1604a66b48c3SPaul Mackerras int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, 1605a66b48c3SPaul Mackerras unsigned long npages) 1606a66b48c3SPaul Mackerras { 1607a66b48c3SPaul Mackerras return 0; 1608a66b48c3SPaul Mackerras } 1609a66b48c3SPaul Mackerras 1610f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1611a66b48c3SPaul Mackerras struct kvm_memory_slot *memslot, 1612f9e0554dSPaul Mackerras struct kvm_userspace_memory_region *mem) 1613f9e0554dSPaul Mackerras { 1614f9e0554dSPaul Mackerras return 0; 1615f9e0554dSPaul Mackerras } 1616f9e0554dSPaul Mackerras 1617f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm, 1618dfe49dbdSPaul Mackerras struct kvm_userspace_memory_region *mem, 16198482644aSTakuya Yoshikawa const struct kvm_memory_slot *old) 1620dfe49dbdSPaul Mackerras { 1621dfe49dbdSPaul Mackerras } 1622dfe49dbdSPaul Mackerras 1623dfe49dbdSPaul Mackerras void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1624f9e0554dSPaul Mackerras { 1625f9e0554dSPaul Mackerras } 1626f9e0554dSPaul Mackerras 162738f98824SMihai Caraman void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 162838f98824SMihai Caraman { 162938f98824SMihai Caraman #if defined(CONFIG_64BIT) 163038f98824SMihai Caraman vcpu->arch.epcr = new_epcr; 163138f98824SMihai Caraman #ifdef CONFIG_KVM_BOOKE_HV 163238f98824SMihai Caraman vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 163338f98824SMihai Caraman if (vcpu->arch.epcr & SPRN_EPCR_ICM) 163438f98824SMihai Caraman vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 163538f98824SMihai Caraman #endif 163638f98824SMihai Caraman #endif 163738f98824SMihai Caraman } 163838f98824SMihai Caraman 1639dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1640dfd4d47eSScott Wood { 1641dfd4d47eSScott Wood vcpu->arch.tcr = new_tcr; 1642f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 1643dfd4d47eSScott Wood update_timer_ints(vcpu); 1644dfd4d47eSScott Wood } 1645dfd4d47eSScott Wood 1646dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1647dfd4d47eSScott Wood { 1648dfd4d47eSScott Wood set_bits(tsr_bits, &vcpu->arch.tsr); 1649dfd4d47eSScott Wood smp_wmb(); 1650dfd4d47eSScott Wood kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1651dfd4d47eSScott Wood kvm_vcpu_kick(vcpu); 1652dfd4d47eSScott Wood } 1653dfd4d47eSScott Wood 1654dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1655dfd4d47eSScott Wood { 1656dfd4d47eSScott Wood clear_bits(tsr_bits, &vcpu->arch.tsr); 1657f61c94bbSBharat Bhushan 1658f61c94bbSBharat Bhushan /* 1659f61c94bbSBharat Bhushan * We may have stopped the watchdog due to 1660f61c94bbSBharat Bhushan * being stuck on final expiration. 1661f61c94bbSBharat Bhushan */ 1662f61c94bbSBharat Bhushan if (tsr_bits & (TSR_ENW | TSR_WIS)) 1663f61c94bbSBharat Bhushan arm_next_watchdog(vcpu); 1664f61c94bbSBharat Bhushan 1665dfd4d47eSScott Wood update_timer_ints(vcpu); 1666dfd4d47eSScott Wood } 1667dfd4d47eSScott Wood 1668dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data) 1669dfd4d47eSScott Wood { 1670dfd4d47eSScott Wood struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1671dfd4d47eSScott Wood 167221bd000aSBharat Bhushan if (vcpu->arch.tcr & TCR_ARE) { 167321bd000aSBharat Bhushan vcpu->arch.dec = vcpu->arch.decar; 167421bd000aSBharat Bhushan kvmppc_emulate_dec(vcpu); 167521bd000aSBharat Bhushan } 167621bd000aSBharat Bhushan 1677dfd4d47eSScott Wood kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1678dfd4d47eSScott Wood } 1679dfd4d47eSScott Wood 168094fa9d99SScott Wood void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 168194fa9d99SScott Wood { 1682a47d72f3SPaul Mackerras vcpu->cpu = smp_processor_id(); 1683d30f6e48SScott Wood current->thread.kvm_vcpu = vcpu; 168494fa9d99SScott Wood } 168594fa9d99SScott Wood 168694fa9d99SScott Wood void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 168794fa9d99SScott Wood { 1688d30f6e48SScott Wood current->thread.kvm_vcpu = NULL; 1689a47d72f3SPaul Mackerras vcpu->cpu = -1; 169094fa9d99SScott Wood } 169194fa9d99SScott Wood 16922986b8c7SStephen Rothwell int __init kvmppc_booke_init(void) 1693d9fbd03dSHollis Blanchard { 1694d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 1695d9fbd03dSHollis Blanchard unsigned long ivor[16]; 16961d542d9cSBharat Bhushan unsigned long *handler = kvmppc_booke_handler_addr; 1697d9fbd03dSHollis Blanchard unsigned long max_ivor = 0; 16981d542d9cSBharat Bhushan unsigned long handler_len; 1699d9fbd03dSHollis Blanchard int i; 1700d9fbd03dSHollis Blanchard 1701d9fbd03dSHollis Blanchard /* We install our own exception handlers by hijacking IVPR. IVPR must 1702d9fbd03dSHollis Blanchard * be 16-bit aligned, so we need a 64KB allocation. */ 1703d9fbd03dSHollis Blanchard kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1704d9fbd03dSHollis Blanchard VCPU_SIZE_ORDER); 1705d9fbd03dSHollis Blanchard if (!kvmppc_booke_handlers) 1706d9fbd03dSHollis Blanchard return -ENOMEM; 1707d9fbd03dSHollis Blanchard 1708d9fbd03dSHollis Blanchard /* XXX make sure our handlers are smaller than Linux's */ 1709d9fbd03dSHollis Blanchard 1710d9fbd03dSHollis Blanchard /* Copy our interrupt handlers to match host IVORs. That way we don't 1711d9fbd03dSHollis Blanchard * have to swap the IVORs on every guest/host transition. */ 1712d9fbd03dSHollis Blanchard ivor[0] = mfspr(SPRN_IVOR0); 1713d9fbd03dSHollis Blanchard ivor[1] = mfspr(SPRN_IVOR1); 1714d9fbd03dSHollis Blanchard ivor[2] = mfspr(SPRN_IVOR2); 1715d9fbd03dSHollis Blanchard ivor[3] = mfspr(SPRN_IVOR3); 1716d9fbd03dSHollis Blanchard ivor[4] = mfspr(SPRN_IVOR4); 1717d9fbd03dSHollis Blanchard ivor[5] = mfspr(SPRN_IVOR5); 1718d9fbd03dSHollis Blanchard ivor[6] = mfspr(SPRN_IVOR6); 1719d9fbd03dSHollis Blanchard ivor[7] = mfspr(SPRN_IVOR7); 1720d9fbd03dSHollis Blanchard ivor[8] = mfspr(SPRN_IVOR8); 1721d9fbd03dSHollis Blanchard ivor[9] = mfspr(SPRN_IVOR9); 1722d9fbd03dSHollis Blanchard ivor[10] = mfspr(SPRN_IVOR10); 1723d9fbd03dSHollis Blanchard ivor[11] = mfspr(SPRN_IVOR11); 1724d9fbd03dSHollis Blanchard ivor[12] = mfspr(SPRN_IVOR12); 1725d9fbd03dSHollis Blanchard ivor[13] = mfspr(SPRN_IVOR13); 1726d9fbd03dSHollis Blanchard ivor[14] = mfspr(SPRN_IVOR14); 1727d9fbd03dSHollis Blanchard ivor[15] = mfspr(SPRN_IVOR15); 1728d9fbd03dSHollis Blanchard 1729d9fbd03dSHollis Blanchard for (i = 0; i < 16; i++) { 1730d9fbd03dSHollis Blanchard if (ivor[i] > max_ivor) 17311d542d9cSBharat Bhushan max_ivor = i; 1732d9fbd03dSHollis Blanchard 17331d542d9cSBharat Bhushan handler_len = handler[i + 1] - handler[i]; 1734d9fbd03dSHollis Blanchard memcpy((void *)kvmppc_booke_handlers + ivor[i], 17351d542d9cSBharat Bhushan (void *)handler[i], handler_len); 1736d9fbd03dSHollis Blanchard } 17371d542d9cSBharat Bhushan 17381d542d9cSBharat Bhushan handler_len = handler[max_ivor + 1] - handler[max_ivor]; 17391d542d9cSBharat Bhushan flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 17401d542d9cSBharat Bhushan ivor[max_ivor] + handler_len); 1741d30f6e48SScott Wood #endif /* !BOOKE_HV */ 1742db93f574SHollis Blanchard return 0; 1743d9fbd03dSHollis Blanchard } 1744d9fbd03dSHollis Blanchard 1745db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void) 1746d9fbd03dSHollis Blanchard { 1747d9fbd03dSHollis Blanchard free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1748d9fbd03dSHollis Blanchard kvm_exit(); 1749d9fbd03dSHollis Blanchard } 1750