xref: /openbmc/linux/arch/powerpc/kvm/booke.c (revision 79300f8cb9be201f916d075b3ef2e032d83a0d75)
1d9fbd03dSHollis Blanchard /*
2d9fbd03dSHollis Blanchard  * This program is free software; you can redistribute it and/or modify
3d9fbd03dSHollis Blanchard  * it under the terms of the GNU General Public License, version 2, as
4d9fbd03dSHollis Blanchard  * published by the Free Software Foundation.
5d9fbd03dSHollis Blanchard  *
6d9fbd03dSHollis Blanchard  * This program is distributed in the hope that it will be useful,
7d9fbd03dSHollis Blanchard  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8d9fbd03dSHollis Blanchard  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9d9fbd03dSHollis Blanchard  * GNU General Public License for more details.
10d9fbd03dSHollis Blanchard  *
11d9fbd03dSHollis Blanchard  * You should have received a copy of the GNU General Public License
12d9fbd03dSHollis Blanchard  * along with this program; if not, write to the Free Software
13d9fbd03dSHollis Blanchard  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14d9fbd03dSHollis Blanchard  *
15d9fbd03dSHollis Blanchard  * Copyright IBM Corp. 2007
164cd35f67SScott Wood  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17d9fbd03dSHollis Blanchard  *
18d9fbd03dSHollis Blanchard  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19d9fbd03dSHollis Blanchard  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20d30f6e48SScott Wood  *          Scott Wood <scottwood@freescale.com>
21d30f6e48SScott Wood  *          Varun Sethi <varun.sethi@freescale.com>
22d9fbd03dSHollis Blanchard  */
23d9fbd03dSHollis Blanchard 
24d9fbd03dSHollis Blanchard #include <linux/errno.h>
25d9fbd03dSHollis Blanchard #include <linux/err.h>
26d9fbd03dSHollis Blanchard #include <linux/kvm_host.h>
275a0e3ad6STejun Heo #include <linux/gfp.h>
28d9fbd03dSHollis Blanchard #include <linux/module.h>
29d9fbd03dSHollis Blanchard #include <linux/vmalloc.h>
30d9fbd03dSHollis Blanchard #include <linux/fs.h>
317924bd41SHollis Blanchard 
32d9fbd03dSHollis Blanchard #include <asm/cputable.h>
33d9fbd03dSHollis Blanchard #include <asm/uaccess.h>
34d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h>
35d9fbd03dSHollis Blanchard #include <asm/cacheflush.h>
36d30f6e48SScott Wood #include <asm/dbell.h>
37d30f6e48SScott Wood #include <asm/hw_irq.h>
38d30f6e48SScott Wood #include <asm/irq.h>
39d9fbd03dSHollis Blanchard 
40d30f6e48SScott Wood #include "timing.h"
4175f74f0dSHollis Blanchard #include "booke.h"
42d9fbd03dSHollis Blanchard 
43d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers;
44d9fbd03dSHollis Blanchard 
45d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
47d9fbd03dSHollis Blanchard 
48d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = {
49d9fbd03dSHollis Blanchard 	{ "mmio",       VCPU_STAT(mmio_exits) },
50d9fbd03dSHollis Blanchard 	{ "dcr",        VCPU_STAT(dcr_exits) },
51d9fbd03dSHollis Blanchard 	{ "sig",        VCPU_STAT(signal_exits) },
52d9fbd03dSHollis Blanchard 	{ "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
53d9fbd03dSHollis Blanchard 	{ "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
54d9fbd03dSHollis Blanchard 	{ "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
55d9fbd03dSHollis Blanchard 	{ "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
56d9fbd03dSHollis Blanchard 	{ "sysc",       VCPU_STAT(syscall_exits) },
57d9fbd03dSHollis Blanchard 	{ "isi",        VCPU_STAT(isi_exits) },
58d9fbd03dSHollis Blanchard 	{ "dsi",        VCPU_STAT(dsi_exits) },
59d9fbd03dSHollis Blanchard 	{ "inst_emu",   VCPU_STAT(emulated_inst_exits) },
60d9fbd03dSHollis Blanchard 	{ "dec",        VCPU_STAT(dec_exits) },
61d9fbd03dSHollis Blanchard 	{ "ext_intr",   VCPU_STAT(ext_intr_exits) },
62d9fbd03dSHollis Blanchard 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
63d30f6e48SScott Wood 	{ "doorbell", VCPU_STAT(dbell_exits) },
64d30f6e48SScott Wood 	{ "guest doorbell", VCPU_STAT(gdbell_exits) },
65d9fbd03dSHollis Blanchard 	{ NULL }
66d9fbd03dSHollis Blanchard };
67d9fbd03dSHollis Blanchard 
68d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */
69d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
70d9fbd03dSHollis Blanchard {
71d9fbd03dSHollis Blanchard 	int i;
72d9fbd03dSHollis Blanchard 
73666e7252SAlexander Graf 	printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
745cf8ca22SHollis Blanchard 	printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
75de7906c3SAlexander Graf 	printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
76de7906c3SAlexander Graf 					    vcpu->arch.shared->srr1);
77d9fbd03dSHollis Blanchard 
78d9fbd03dSHollis Blanchard 	printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
79d9fbd03dSHollis Blanchard 
80d9fbd03dSHollis Blanchard 	for (i = 0; i < 32; i += 4) {
815cf8ca22SHollis Blanchard 		printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
828e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i),
838e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+1),
848e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+2),
858e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+3));
86d9fbd03dSHollis Blanchard 	}
87d9fbd03dSHollis Blanchard }
88d9fbd03dSHollis Blanchard 
894cd35f67SScott Wood #ifdef CONFIG_SPE
904cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
914cd35f67SScott Wood {
924cd35f67SScott Wood 	preempt_disable();
934cd35f67SScott Wood 	enable_kernel_spe();
944cd35f67SScott Wood 	kvmppc_save_guest_spe(vcpu);
954cd35f67SScott Wood 	vcpu->arch.shadow_msr &= ~MSR_SPE;
964cd35f67SScott Wood 	preempt_enable();
974cd35f67SScott Wood }
984cd35f67SScott Wood 
994cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
1004cd35f67SScott Wood {
1014cd35f67SScott Wood 	preempt_disable();
1024cd35f67SScott Wood 	enable_kernel_spe();
1034cd35f67SScott Wood 	kvmppc_load_guest_spe(vcpu);
1044cd35f67SScott Wood 	vcpu->arch.shadow_msr |= MSR_SPE;
1054cd35f67SScott Wood 	preempt_enable();
1064cd35f67SScott Wood }
1074cd35f67SScott Wood 
1084cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
1094cd35f67SScott Wood {
1104cd35f67SScott Wood 	if (vcpu->arch.shared->msr & MSR_SPE) {
1114cd35f67SScott Wood 		if (!(vcpu->arch.shadow_msr & MSR_SPE))
1124cd35f67SScott Wood 			kvmppc_vcpu_enable_spe(vcpu);
1134cd35f67SScott Wood 	} else if (vcpu->arch.shadow_msr & MSR_SPE) {
1144cd35f67SScott Wood 		kvmppc_vcpu_disable_spe(vcpu);
1154cd35f67SScott Wood 	}
1164cd35f67SScott Wood }
1174cd35f67SScott Wood #else
1184cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
1194cd35f67SScott Wood {
1204cd35f67SScott Wood }
1214cd35f67SScott Wood #endif
1224cd35f67SScott Wood 
123dd9ebf1fSLiu Yu /*
124dd9ebf1fSLiu Yu  * Helper function for "full" MSR writes.  No need to call this if only
125dd9ebf1fSLiu Yu  * EE/CE/ME/DE/RI are changing.
126dd9ebf1fSLiu Yu  */
1274cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
1284cd35f67SScott Wood {
129dd9ebf1fSLiu Yu 	u32 old_msr = vcpu->arch.shared->msr;
1304cd35f67SScott Wood 
131d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
132d30f6e48SScott Wood 	new_msr |= MSR_GS;
133d30f6e48SScott Wood #endif
134d30f6e48SScott Wood 
1354cd35f67SScott Wood 	vcpu->arch.shared->msr = new_msr;
1364cd35f67SScott Wood 
137dd9ebf1fSLiu Yu 	kvmppc_mmu_msr_notify(vcpu, old_msr);
1384cd35f67SScott Wood 	kvmppc_vcpu_sync_spe(vcpu);
1394cd35f67SScott Wood }
1404cd35f67SScott Wood 
141d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
142d4cf3892SHollis Blanchard                                        unsigned int priority)
1439dd921cfSHollis Blanchard {
1449dd921cfSHollis Blanchard 	set_bit(priority, &vcpu->arch.pending_exceptions);
1459dd921cfSHollis Blanchard }
1469dd921cfSHollis Blanchard 
147daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
148daf5e271SLiu Yu                                         ulong dear_flags, ulong esr_flags)
1499dd921cfSHollis Blanchard {
150daf5e271SLiu Yu 	vcpu->arch.queued_dear = dear_flags;
151daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
152daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
153daf5e271SLiu Yu }
154daf5e271SLiu Yu 
155daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
156daf5e271SLiu Yu                                            ulong dear_flags, ulong esr_flags)
157daf5e271SLiu Yu {
158daf5e271SLiu Yu 	vcpu->arch.queued_dear = dear_flags;
159daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
160daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
161daf5e271SLiu Yu }
162daf5e271SLiu Yu 
163daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
164daf5e271SLiu Yu                                            ulong esr_flags)
165daf5e271SLiu Yu {
166daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
167daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
168daf5e271SLiu Yu }
169daf5e271SLiu Yu 
170daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
171daf5e271SLiu Yu {
172daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
173d4cf3892SHollis Blanchard 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
1749dd921cfSHollis Blanchard }
1759dd921cfSHollis Blanchard 
1769dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
1779dd921cfSHollis Blanchard {
178d4cf3892SHollis Blanchard 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
1799dd921cfSHollis Blanchard }
1809dd921cfSHollis Blanchard 
1819dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
1829dd921cfSHollis Blanchard {
183d4cf3892SHollis Blanchard 	return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
1849dd921cfSHollis Blanchard }
1859dd921cfSHollis Blanchard 
1867706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
1877706664dSAlexander Graf {
1887706664dSAlexander Graf 	clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
1897706664dSAlexander Graf }
1907706664dSAlexander Graf 
1919dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
1929dd921cfSHollis Blanchard                                 struct kvm_interrupt *irq)
1939dd921cfSHollis Blanchard {
194c5335f17SAlexander Graf 	unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
195c5335f17SAlexander Graf 
196c5335f17SAlexander Graf 	if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
197c5335f17SAlexander Graf 		prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
198c5335f17SAlexander Graf 
199c5335f17SAlexander Graf 	kvmppc_booke_queue_irqprio(vcpu, prio);
2009dd921cfSHollis Blanchard }
2019dd921cfSHollis Blanchard 
2024496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
2034496f974SAlexander Graf                                   struct kvm_interrupt *irq)
2044496f974SAlexander Graf {
2054496f974SAlexander Graf 	clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
206c5335f17SAlexander Graf 	clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
2074496f974SAlexander Graf }
2084496f974SAlexander Graf 
209d30f6e48SScott Wood static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
210d30f6e48SScott Wood {
211d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
212d30f6e48SScott Wood 	mtspr(SPRN_GSRR0, srr0);
213d30f6e48SScott Wood 	mtspr(SPRN_GSRR1, srr1);
214d30f6e48SScott Wood #else
215d30f6e48SScott Wood 	vcpu->arch.shared->srr0 = srr0;
216d30f6e48SScott Wood 	vcpu->arch.shared->srr1 = srr1;
217d30f6e48SScott Wood #endif
218d30f6e48SScott Wood }
219d30f6e48SScott Wood 
220d30f6e48SScott Wood static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
221d30f6e48SScott Wood {
222d30f6e48SScott Wood 	vcpu->arch.csrr0 = srr0;
223d30f6e48SScott Wood 	vcpu->arch.csrr1 = srr1;
224d30f6e48SScott Wood }
225d30f6e48SScott Wood 
226d30f6e48SScott Wood static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
227d30f6e48SScott Wood {
228d30f6e48SScott Wood 	if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
229d30f6e48SScott Wood 		vcpu->arch.dsrr0 = srr0;
230d30f6e48SScott Wood 		vcpu->arch.dsrr1 = srr1;
231d30f6e48SScott Wood 	} else {
232d30f6e48SScott Wood 		set_guest_csrr(vcpu, srr0, srr1);
233d30f6e48SScott Wood 	}
234d30f6e48SScott Wood }
235d30f6e48SScott Wood 
236d30f6e48SScott Wood static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
237d30f6e48SScott Wood {
238d30f6e48SScott Wood 	vcpu->arch.mcsrr0 = srr0;
239d30f6e48SScott Wood 	vcpu->arch.mcsrr1 = srr1;
240d30f6e48SScott Wood }
241d30f6e48SScott Wood 
242d30f6e48SScott Wood static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
243d30f6e48SScott Wood {
244d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
245d30f6e48SScott Wood 	return mfspr(SPRN_GDEAR);
246d30f6e48SScott Wood #else
247d30f6e48SScott Wood 	return vcpu->arch.shared->dar;
248d30f6e48SScott Wood #endif
249d30f6e48SScott Wood }
250d30f6e48SScott Wood 
251d30f6e48SScott Wood static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
252d30f6e48SScott Wood {
253d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
254d30f6e48SScott Wood 	mtspr(SPRN_GDEAR, dear);
255d30f6e48SScott Wood #else
256d30f6e48SScott Wood 	vcpu->arch.shared->dar = dear;
257d30f6e48SScott Wood #endif
258d30f6e48SScott Wood }
259d30f6e48SScott Wood 
260d30f6e48SScott Wood static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
261d30f6e48SScott Wood {
262d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
263d30f6e48SScott Wood 	return mfspr(SPRN_GESR);
264d30f6e48SScott Wood #else
265d30f6e48SScott Wood 	return vcpu->arch.shared->esr;
266d30f6e48SScott Wood #endif
267d30f6e48SScott Wood }
268d30f6e48SScott Wood 
269d30f6e48SScott Wood static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
270d30f6e48SScott Wood {
271d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
272d30f6e48SScott Wood 	mtspr(SPRN_GESR, esr);
273d30f6e48SScott Wood #else
274d30f6e48SScott Wood 	vcpu->arch.shared->esr = esr;
275d30f6e48SScott Wood #endif
276d30f6e48SScott Wood }
277d30f6e48SScott Wood 
278d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */
279d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
280d4cf3892SHollis Blanchard                                         unsigned int priority)
281d9fbd03dSHollis Blanchard {
282d4cf3892SHollis Blanchard 	int allowed = 0;
283*79300f8cSAlexander Graf 	ulong msr_mask = 0;
284daf5e271SLiu Yu 	bool update_esr = false, update_dear = false;
2855c6cedf4SAlexander Graf 	ulong crit_raw = vcpu->arch.shared->critical;
2865c6cedf4SAlexander Graf 	ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
2875c6cedf4SAlexander Graf 	bool crit;
288c5335f17SAlexander Graf 	bool keep_irq = false;
289d30f6e48SScott Wood 	enum int_class int_class;
2905c6cedf4SAlexander Graf 
2915c6cedf4SAlexander Graf 	/* Truncate crit indicators in 32 bit mode */
2925c6cedf4SAlexander Graf 	if (!(vcpu->arch.shared->msr & MSR_SF)) {
2935c6cedf4SAlexander Graf 		crit_raw &= 0xffffffff;
2945c6cedf4SAlexander Graf 		crit_r1 &= 0xffffffff;
2955c6cedf4SAlexander Graf 	}
2965c6cedf4SAlexander Graf 
2975c6cedf4SAlexander Graf 	/* Critical section when crit == r1 */
2985c6cedf4SAlexander Graf 	crit = (crit_raw == crit_r1);
2995c6cedf4SAlexander Graf 	/* ... and we're in supervisor mode */
3005c6cedf4SAlexander Graf 	crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
301d9fbd03dSHollis Blanchard 
302c5335f17SAlexander Graf 	if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
303c5335f17SAlexander Graf 		priority = BOOKE_IRQPRIO_EXTERNAL;
304c5335f17SAlexander Graf 		keep_irq = true;
305c5335f17SAlexander Graf 	}
306c5335f17SAlexander Graf 
307d4cf3892SHollis Blanchard 	switch (priority) {
308d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DTLB_MISS:
309daf5e271SLiu Yu 	case BOOKE_IRQPRIO_DATA_STORAGE:
310daf5e271SLiu Yu 		update_dear = true;
311daf5e271SLiu Yu 		/* fall through */
312daf5e271SLiu Yu 	case BOOKE_IRQPRIO_INST_STORAGE:
313daf5e271SLiu Yu 	case BOOKE_IRQPRIO_PROGRAM:
314daf5e271SLiu Yu 		update_esr = true;
315daf5e271SLiu Yu 		/* fall through */
316d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_ITLB_MISS:
317d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_SYSCALL:
318d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_FP_UNAVAIL:
319bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_UNAVAIL:
320bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_FP_DATA:
321bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_FP_ROUND:
322d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_AP_UNAVAIL:
323d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_ALIGNMENT:
324d4cf3892SHollis Blanchard 		allowed = 1;
325*79300f8cSAlexander Graf 		msr_mask = MSR_CE | MSR_ME | MSR_DE;
326d30f6e48SScott Wood 		int_class = INT_CLASS_NONCRIT;
327d9fbd03dSHollis Blanchard 		break;
328d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_CRITICAL:
3294ab96919SAlexander Graf 	case BOOKE_IRQPRIO_DBELL_CRIT:
330666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_CE;
331d30f6e48SScott Wood 		allowed = allowed && !crit;
332*79300f8cSAlexander Graf 		msr_mask = MSR_ME;
333d30f6e48SScott Wood 		int_class = INT_CLASS_CRIT;
334d9fbd03dSHollis Blanchard 		break;
335d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_MACHINE_CHECK:
336666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_ME;
337d30f6e48SScott Wood 		allowed = allowed && !crit;
338d30f6e48SScott Wood 		int_class = INT_CLASS_MC;
339d9fbd03dSHollis Blanchard 		break;
340d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DECREMENTER:
341d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_FIT:
342dfd4d47eSScott Wood 		keep_irq = true;
343dfd4d47eSScott Wood 		/* fall through */
344dfd4d47eSScott Wood 	case BOOKE_IRQPRIO_EXTERNAL:
3454ab96919SAlexander Graf 	case BOOKE_IRQPRIO_DBELL:
346666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_EE;
3475c6cedf4SAlexander Graf 		allowed = allowed && !crit;
348*79300f8cSAlexander Graf 		msr_mask = MSR_CE | MSR_ME | MSR_DE;
349d30f6e48SScott Wood 		int_class = INT_CLASS_NONCRIT;
350d9fbd03dSHollis Blanchard 		break;
351d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DEBUG:
352666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_DE;
353d30f6e48SScott Wood 		allowed = allowed && !crit;
354*79300f8cSAlexander Graf 		msr_mask = MSR_ME;
355d30f6e48SScott Wood 		int_class = INT_CLASS_CRIT;
356d9fbd03dSHollis Blanchard 		break;
357d9fbd03dSHollis Blanchard 	}
358d9fbd03dSHollis Blanchard 
359d4cf3892SHollis Blanchard 	if (allowed) {
360d30f6e48SScott Wood 		switch (int_class) {
361d30f6e48SScott Wood 		case INT_CLASS_NONCRIT:
362d30f6e48SScott Wood 			set_guest_srr(vcpu, vcpu->arch.pc,
363d30f6e48SScott Wood 				      vcpu->arch.shared->msr);
364d30f6e48SScott Wood 			break;
365d30f6e48SScott Wood 		case INT_CLASS_CRIT:
366d30f6e48SScott Wood 			set_guest_csrr(vcpu, vcpu->arch.pc,
367d30f6e48SScott Wood 				       vcpu->arch.shared->msr);
368d30f6e48SScott Wood 			break;
369d30f6e48SScott Wood 		case INT_CLASS_DBG:
370d30f6e48SScott Wood 			set_guest_dsrr(vcpu, vcpu->arch.pc,
371d30f6e48SScott Wood 				       vcpu->arch.shared->msr);
372d30f6e48SScott Wood 			break;
373d30f6e48SScott Wood 		case INT_CLASS_MC:
374d30f6e48SScott Wood 			set_guest_mcsrr(vcpu, vcpu->arch.pc,
375d30f6e48SScott Wood 					vcpu->arch.shared->msr);
376d30f6e48SScott Wood 			break;
377d30f6e48SScott Wood 		}
378d30f6e48SScott Wood 
379d4cf3892SHollis Blanchard 		vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
380daf5e271SLiu Yu 		if (update_esr == true)
381d30f6e48SScott Wood 			set_guest_esr(vcpu, vcpu->arch.queued_esr);
382daf5e271SLiu Yu 		if (update_dear == true)
383d30f6e48SScott Wood 			set_guest_dear(vcpu, vcpu->arch.queued_dear);
384666e7252SAlexander Graf 		kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
385d4cf3892SHollis Blanchard 
386c5335f17SAlexander Graf 		if (!keep_irq)
387d4cf3892SHollis Blanchard 			clear_bit(priority, &vcpu->arch.pending_exceptions);
388d4cf3892SHollis Blanchard 	}
389d4cf3892SHollis Blanchard 
390d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
391d30f6e48SScott Wood 	/*
392d30f6e48SScott Wood 	 * If an interrupt is pending but masked, raise a guest doorbell
393d30f6e48SScott Wood 	 * so that we are notified when the guest enables the relevant
394d30f6e48SScott Wood 	 * MSR bit.
395d30f6e48SScott Wood 	 */
396d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
397d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
398d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
399d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
400d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
401d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
402d30f6e48SScott Wood #endif
403d30f6e48SScott Wood 
404d4cf3892SHollis Blanchard 	return allowed;
405d9fbd03dSHollis Blanchard }
406d9fbd03dSHollis Blanchard 
407dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu)
408dfd4d47eSScott Wood {
409dfd4d47eSScott Wood 	if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
410dfd4d47eSScott Wood 		kvmppc_core_queue_dec(vcpu);
411dfd4d47eSScott Wood 	else
412dfd4d47eSScott Wood 		kvmppc_core_dequeue_dec(vcpu);
413dfd4d47eSScott Wood }
414dfd4d47eSScott Wood 
415c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
416d9fbd03dSHollis Blanchard {
417d9fbd03dSHollis Blanchard 	unsigned long *pending = &vcpu->arch.pending_exceptions;
418d9fbd03dSHollis Blanchard 	unsigned int priority;
419d9fbd03dSHollis Blanchard 
420dfd4d47eSScott Wood 	if (vcpu->requests) {
421dfd4d47eSScott Wood 		if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
422dfd4d47eSScott Wood 			smp_mb();
423dfd4d47eSScott Wood 			update_timer_ints(vcpu);
424dfd4d47eSScott Wood 		}
425dfd4d47eSScott Wood 	}
426dfd4d47eSScott Wood 
4279ab80843SHollis Blanchard 	priority = __ffs(*pending);
428bdc89f13SHollis Blanchard 	while (priority <= BOOKE_IRQPRIO_MAX) {
429d4cf3892SHollis Blanchard 		if (kvmppc_booke_irqprio_deliver(vcpu, priority))
430d9fbd03dSHollis Blanchard 			break;
431d9fbd03dSHollis Blanchard 
432d9fbd03dSHollis Blanchard 		priority = find_next_bit(pending,
433d9fbd03dSHollis Blanchard 		                         BITS_PER_BYTE * sizeof(*pending),
434d9fbd03dSHollis Blanchard 		                         priority + 1);
435d9fbd03dSHollis Blanchard 	}
43690bba358SAlexander Graf 
43790bba358SAlexander Graf 	/* Tell the guest about our interrupt status */
43829ac26efSScott Wood 	vcpu->arch.shared->int_pending = !!*pending;
439d9fbd03dSHollis Blanchard }
440d9fbd03dSHollis Blanchard 
441c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */
442c59a6a3eSScott Wood void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
443c59a6a3eSScott Wood {
444c59a6a3eSScott Wood 	WARN_ON_ONCE(!irqs_disabled());
445c59a6a3eSScott Wood 
446c59a6a3eSScott Wood 	kvmppc_core_check_exceptions(vcpu);
447c59a6a3eSScott Wood 
448c59a6a3eSScott Wood 	if (vcpu->arch.shared->msr & MSR_WE) {
449c59a6a3eSScott Wood 		local_irq_enable();
450c59a6a3eSScott Wood 		kvm_vcpu_block(vcpu);
451c59a6a3eSScott Wood 		local_irq_disable();
452c59a6a3eSScott Wood 
453c59a6a3eSScott Wood 		kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
454c59a6a3eSScott Wood 		kvmppc_core_check_exceptions(vcpu);
455c59a6a3eSScott Wood 	};
456c59a6a3eSScott Wood }
457c59a6a3eSScott Wood 
458df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
459df6909e5SPaul Mackerras {
460df6909e5SPaul Mackerras 	int ret;
4618fae845fSScott Wood #ifdef CONFIG_PPC_FPU
4628fae845fSScott Wood 	unsigned int fpscr;
4638fae845fSScott Wood 	int fpexc_mode;
4648fae845fSScott Wood 	u64 fpr[32];
4658fae845fSScott Wood #endif
466df6909e5SPaul Mackerras 
467af8f38b3SAlexander Graf 	if (!vcpu->arch.sane) {
468af8f38b3SAlexander Graf 		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
469af8f38b3SAlexander Graf 		return -EINVAL;
470af8f38b3SAlexander Graf 	}
471af8f38b3SAlexander Graf 
472d30f6e48SScott Wood 	if (!current->thread.kvm_vcpu) {
473d30f6e48SScott Wood 		WARN(1, "no vcpu\n");
474d30f6e48SScott Wood 		return -EPERM;
475d30f6e48SScott Wood 	}
476d30f6e48SScott Wood 
477df6909e5SPaul Mackerras 	local_irq_disable();
4781d1ef222SScott Wood 
47925051b5aSScott Wood 	kvmppc_core_prepare_to_enter(vcpu);
48025051b5aSScott Wood 
4811d1ef222SScott Wood 	if (signal_pending(current)) {
4821d1ef222SScott Wood 		kvm_run->exit_reason = KVM_EXIT_INTR;
4831d1ef222SScott Wood 		ret = -EINTR;
4841d1ef222SScott Wood 		goto out;
4851d1ef222SScott Wood 	}
4861d1ef222SScott Wood 
487df6909e5SPaul Mackerras 	kvm_guest_enter();
4888fae845fSScott Wood 
4898fae845fSScott Wood #ifdef CONFIG_PPC_FPU
4908fae845fSScott Wood 	/* Save userspace FPU state in stack */
4918fae845fSScott Wood 	enable_kernel_fp();
4928fae845fSScott Wood 	memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
4938fae845fSScott Wood 	fpscr = current->thread.fpscr.val;
4948fae845fSScott Wood 	fpexc_mode = current->thread.fpexc_mode;
4958fae845fSScott Wood 
4968fae845fSScott Wood 	/* Restore guest FPU state to thread */
4978fae845fSScott Wood 	memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
4988fae845fSScott Wood 	current->thread.fpscr.val = vcpu->arch.fpscr;
4998fae845fSScott Wood 
5008fae845fSScott Wood 	/*
5018fae845fSScott Wood 	 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
5028fae845fSScott Wood 	 * as always using the FPU.  Kernel usage of FP (via
5038fae845fSScott Wood 	 * enable_kernel_fp()) in this thread must not occur while
5048fae845fSScott Wood 	 * vcpu->fpu_active is set.
5058fae845fSScott Wood 	 */
5068fae845fSScott Wood 	vcpu->fpu_active = 1;
5078fae845fSScott Wood 
5088fae845fSScott Wood 	kvmppc_load_guest_fp(vcpu);
5098fae845fSScott Wood #endif
5108fae845fSScott Wood 
511df6909e5SPaul Mackerras 	ret = __kvmppc_vcpu_run(kvm_run, vcpu);
5128fae845fSScott Wood 
5138fae845fSScott Wood #ifdef CONFIG_PPC_FPU
5148fae845fSScott Wood 	kvmppc_save_guest_fp(vcpu);
5158fae845fSScott Wood 
5168fae845fSScott Wood 	vcpu->fpu_active = 0;
5178fae845fSScott Wood 
5188fae845fSScott Wood 	/* Save guest FPU state from thread */
5198fae845fSScott Wood 	memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
5208fae845fSScott Wood 	vcpu->arch.fpscr = current->thread.fpscr.val;
5218fae845fSScott Wood 
5228fae845fSScott Wood 	/* Restore userspace FPU state from stack */
5238fae845fSScott Wood 	memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
5248fae845fSScott Wood 	current->thread.fpscr.val = fpscr;
5258fae845fSScott Wood 	current->thread.fpexc_mode = fpexc_mode;
5268fae845fSScott Wood #endif
5278fae845fSScott Wood 
528df6909e5SPaul Mackerras 	kvm_guest_exit();
529df6909e5SPaul Mackerras 
5301d1ef222SScott Wood out:
5311d1ef222SScott Wood 	local_irq_enable();
532df6909e5SPaul Mackerras 	return ret;
533df6909e5SPaul Mackerras }
534df6909e5SPaul Mackerras 
535d30f6e48SScott Wood static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
536d9fbd03dSHollis Blanchard {
537d9fbd03dSHollis Blanchard 	enum emulation_result er;
538d9fbd03dSHollis Blanchard 
539d9fbd03dSHollis Blanchard 	er = kvmppc_emulate_instruction(run, vcpu);
540d9fbd03dSHollis Blanchard 	switch (er) {
541d9fbd03dSHollis Blanchard 	case EMULATE_DONE:
54273e75b41SHollis Blanchard 		/* don't overwrite subtypes, just account kvm_stats */
5437b701591SHollis Blanchard 		kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
544d9fbd03dSHollis Blanchard 		/* Future optimization: only reload non-volatiles if
545d9fbd03dSHollis Blanchard 		 * they were actually modified by emulation. */
546d30f6e48SScott Wood 		return RESUME_GUEST_NV;
547d30f6e48SScott Wood 
548d9fbd03dSHollis Blanchard 	case EMULATE_DO_DCR:
549d9fbd03dSHollis Blanchard 		run->exit_reason = KVM_EXIT_DCR;
550d30f6e48SScott Wood 		return RESUME_HOST;
551d30f6e48SScott Wood 
552d9fbd03dSHollis Blanchard 	case EMULATE_FAIL:
553d9fbd03dSHollis Blanchard 		/* XXX Deliver Program interrupt to guest. */
5545cf8ca22SHollis Blanchard 		printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
555d9fbd03dSHollis Blanchard 		       __func__, vcpu->arch.pc, vcpu->arch.last_inst);
556d9fbd03dSHollis Blanchard 		/* For debugging, encode the failing instruction and
557d9fbd03dSHollis Blanchard 		 * report it to userspace. */
558d9fbd03dSHollis Blanchard 		run->hw.hardware_exit_reason = ~0ULL << 32;
559d9fbd03dSHollis Blanchard 		run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
560d30f6e48SScott Wood 		return RESUME_HOST;
561d30f6e48SScott Wood 
562d9fbd03dSHollis Blanchard 	default:
563d9fbd03dSHollis Blanchard 		BUG();
564d9fbd03dSHollis Blanchard 	}
565d30f6e48SScott Wood }
566d30f6e48SScott Wood 
567d30f6e48SScott Wood /**
568d30f6e48SScott Wood  * kvmppc_handle_exit
569d30f6e48SScott Wood  *
570d30f6e48SScott Wood  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
571d30f6e48SScott Wood  */
572d30f6e48SScott Wood int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
573d30f6e48SScott Wood                        unsigned int exit_nr)
574d30f6e48SScott Wood {
575d30f6e48SScott Wood 	int r = RESUME_HOST;
576d30f6e48SScott Wood 
577d30f6e48SScott Wood 	/* update before a new last_exit_type is rewritten */
578d30f6e48SScott Wood 	kvmppc_update_timing_stats(vcpu);
579d30f6e48SScott Wood 
580d30f6e48SScott Wood 	switch (exit_nr) {
581d30f6e48SScott Wood 	case BOOKE_INTERRUPT_EXTERNAL:
582d30f6e48SScott Wood 		do_IRQ(current->thread.regs);
583d30f6e48SScott Wood 		break;
584d30f6e48SScott Wood 
585d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DECREMENTER:
586d30f6e48SScott Wood 		timer_interrupt(current->thread.regs);
587d30f6e48SScott Wood 		break;
588d30f6e48SScott Wood 
589d30f6e48SScott Wood #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
590d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DOORBELL:
591d30f6e48SScott Wood 		doorbell_exception(current->thread.regs);
592d30f6e48SScott Wood 		break;
593d30f6e48SScott Wood #endif
594d30f6e48SScott Wood 	case BOOKE_INTERRUPT_MACHINE_CHECK:
595d30f6e48SScott Wood 		/* FIXME */
596d30f6e48SScott Wood 		break;
597d30f6e48SScott Wood 	}
598d30f6e48SScott Wood 
599d30f6e48SScott Wood 	local_irq_enable();
600d30f6e48SScott Wood 
601d30f6e48SScott Wood 	run->exit_reason = KVM_EXIT_UNKNOWN;
602d30f6e48SScott Wood 	run->ready_for_interrupt_injection = 1;
603d30f6e48SScott Wood 
604d30f6e48SScott Wood 	switch (exit_nr) {
605d30f6e48SScott Wood 	case BOOKE_INTERRUPT_MACHINE_CHECK:
606d30f6e48SScott Wood 		kvm_resched(vcpu);
607d30f6e48SScott Wood 		r = RESUME_GUEST;
608d30f6e48SScott Wood 		break;
609d30f6e48SScott Wood 
610d30f6e48SScott Wood 	case BOOKE_INTERRUPT_EXTERNAL:
611d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
612d30f6e48SScott Wood 		kvm_resched(vcpu);
613d30f6e48SScott Wood 		r = RESUME_GUEST;
614d30f6e48SScott Wood 		break;
615d30f6e48SScott Wood 
616d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DECREMENTER:
617d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, DEC_EXITS);
618d30f6e48SScott Wood 		kvm_resched(vcpu);
619d30f6e48SScott Wood 		r = RESUME_GUEST;
620d30f6e48SScott Wood 		break;
621d30f6e48SScott Wood 
622d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DOORBELL:
623d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, DBELL_EXITS);
624d30f6e48SScott Wood 		kvm_resched(vcpu);
625d30f6e48SScott Wood 		r = RESUME_GUEST;
626d30f6e48SScott Wood 		break;
627d30f6e48SScott Wood 
628d30f6e48SScott Wood 	case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
629d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
630d30f6e48SScott Wood 
631d30f6e48SScott Wood 		/*
632d30f6e48SScott Wood 		 * We are here because there is a pending guest interrupt
633d30f6e48SScott Wood 		 * which could not be delivered as MSR_CE or MSR_ME was not
634d30f6e48SScott Wood 		 * set.  Once we break from here we will retry delivery.
635d30f6e48SScott Wood 		 */
636d30f6e48SScott Wood 		r = RESUME_GUEST;
637d30f6e48SScott Wood 		break;
638d30f6e48SScott Wood 
639d30f6e48SScott Wood 	case BOOKE_INTERRUPT_GUEST_DBELL:
640d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
641d30f6e48SScott Wood 
642d30f6e48SScott Wood 		/*
643d30f6e48SScott Wood 		 * We are here because there is a pending guest interrupt
644d30f6e48SScott Wood 		 * which could not be delivered as MSR_EE was not set.  Once
645d30f6e48SScott Wood 		 * we break from here we will retry delivery.
646d30f6e48SScott Wood 		 */
647d30f6e48SScott Wood 		r = RESUME_GUEST;
648d30f6e48SScott Wood 		break;
649d30f6e48SScott Wood 
650d30f6e48SScott Wood 	case BOOKE_INTERRUPT_HV_PRIV:
651d30f6e48SScott Wood 		r = emulation_exit(run, vcpu);
652d30f6e48SScott Wood 		break;
653d30f6e48SScott Wood 
654d30f6e48SScott Wood 	case BOOKE_INTERRUPT_PROGRAM:
655d30f6e48SScott Wood 		if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
656d30f6e48SScott Wood 			/* Program traps generated by user-level software must be handled
657d30f6e48SScott Wood 			 * by the guest kernel. */
658d30f6e48SScott Wood 			kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
659d30f6e48SScott Wood 			r = RESUME_GUEST;
660d30f6e48SScott Wood 			kvmppc_account_exit(vcpu, USR_PR_INST);
661d30f6e48SScott Wood 			break;
662d30f6e48SScott Wood 		}
663d30f6e48SScott Wood 
664d30f6e48SScott Wood 		r = emulation_exit(run, vcpu);
665d9fbd03dSHollis Blanchard 		break;
666d9fbd03dSHollis Blanchard 
667d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_FP_UNAVAIL:
668d4cf3892SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
6697b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, FP_UNAVAIL);
670d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
671d9fbd03dSHollis Blanchard 		break;
672d9fbd03dSHollis Blanchard 
6734cd35f67SScott Wood #ifdef CONFIG_SPE
6744cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_UNAVAIL: {
6754cd35f67SScott Wood 		if (vcpu->arch.shared->msr & MSR_SPE)
6764cd35f67SScott Wood 			kvmppc_vcpu_enable_spe(vcpu);
6774cd35f67SScott Wood 		else
6784cd35f67SScott Wood 			kvmppc_booke_queue_irqprio(vcpu,
6794cd35f67SScott Wood 						   BOOKE_IRQPRIO_SPE_UNAVAIL);
680bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
681bb3a8a17SHollis Blanchard 		break;
6824cd35f67SScott Wood 	}
683bb3a8a17SHollis Blanchard 
684bb3a8a17SHollis Blanchard 	case BOOKE_INTERRUPT_SPE_FP_DATA:
685bb3a8a17SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
686bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
687bb3a8a17SHollis Blanchard 		break;
688bb3a8a17SHollis Blanchard 
689bb3a8a17SHollis Blanchard 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
690bb3a8a17SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
691bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
692bb3a8a17SHollis Blanchard 		break;
6934cd35f67SScott Wood #else
6944cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_UNAVAIL:
6954cd35f67SScott Wood 		/*
6964cd35f67SScott Wood 		 * Guest wants SPE, but host kernel doesn't support it.  Send
6974cd35f67SScott Wood 		 * an "unimplemented operation" program check to the guest.
6984cd35f67SScott Wood 		 */
6994cd35f67SScott Wood 		kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
7004cd35f67SScott Wood 		r = RESUME_GUEST;
7014cd35f67SScott Wood 		break;
7024cd35f67SScott Wood 
7034cd35f67SScott Wood 	/*
7044cd35f67SScott Wood 	 * These really should never happen without CONFIG_SPE,
7054cd35f67SScott Wood 	 * as we should never enable the real MSR[SPE] in the guest.
7064cd35f67SScott Wood 	 */
7074cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_FP_DATA:
7084cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
7094cd35f67SScott Wood 		printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
7104cd35f67SScott Wood 		       __func__, exit_nr, vcpu->arch.pc);
7114cd35f67SScott Wood 		run->hw.hardware_exit_reason = exit_nr;
7124cd35f67SScott Wood 		r = RESUME_HOST;
7134cd35f67SScott Wood 		break;
7144cd35f67SScott Wood #endif
715bb3a8a17SHollis Blanchard 
716d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DATA_STORAGE:
717daf5e271SLiu Yu 		kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
718daf5e271SLiu Yu 		                               vcpu->arch.fault_esr);
7197b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, DSI_EXITS);
720d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
721d9fbd03dSHollis Blanchard 		break;
722d9fbd03dSHollis Blanchard 
723d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_INST_STORAGE:
724daf5e271SLiu Yu 		kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7257b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, ISI_EXITS);
726d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
727d9fbd03dSHollis Blanchard 		break;
728d9fbd03dSHollis Blanchard 
729d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
730d30f6e48SScott Wood 	case BOOKE_INTERRUPT_HV_SYSCALL:
731d30f6e48SScott Wood 		if (!(vcpu->arch.shared->msr & MSR_PR)) {
732d30f6e48SScott Wood 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
733d30f6e48SScott Wood 		} else {
734d30f6e48SScott Wood 			/*
735d30f6e48SScott Wood 			 * hcall from guest userspace -- send privileged
736d30f6e48SScott Wood 			 * instruction program check.
737d30f6e48SScott Wood 			 */
738d30f6e48SScott Wood 			kvmppc_core_queue_program(vcpu, ESR_PPR);
739d30f6e48SScott Wood 		}
740d30f6e48SScott Wood 
741d30f6e48SScott Wood 		r = RESUME_GUEST;
742d30f6e48SScott Wood 		break;
743d30f6e48SScott Wood #else
744d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_SYSCALL:
7452a342ed5SAlexander Graf 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
7462a342ed5SAlexander Graf 		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
7472a342ed5SAlexander Graf 			/* KVM PV hypercalls */
7482a342ed5SAlexander Graf 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
7492a342ed5SAlexander Graf 			r = RESUME_GUEST;
7502a342ed5SAlexander Graf 		} else {
7512a342ed5SAlexander Graf 			/* Guest syscalls */
752d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
7532a342ed5SAlexander Graf 		}
7547b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, SYSCALL_EXITS);
755d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
756d9fbd03dSHollis Blanchard 		break;
757d30f6e48SScott Wood #endif
758d9fbd03dSHollis Blanchard 
759d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DTLB_MISS: {
760d9fbd03dSHollis Blanchard 		unsigned long eaddr = vcpu->arch.fault_dear;
7617924bd41SHollis Blanchard 		int gtlb_index;
762475e7cddSHollis Blanchard 		gpa_t gpaddr;
763d9fbd03dSHollis Blanchard 		gfn_t gfn;
764d9fbd03dSHollis Blanchard 
765a4cd8b23SScott Wood #ifdef CONFIG_KVM_E500
766a4cd8b23SScott Wood 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
767a4cd8b23SScott Wood 		    (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
768a4cd8b23SScott Wood 			kvmppc_map_magic(vcpu);
769a4cd8b23SScott Wood 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
770a4cd8b23SScott Wood 			r = RESUME_GUEST;
771a4cd8b23SScott Wood 
772a4cd8b23SScott Wood 			break;
773a4cd8b23SScott Wood 		}
774a4cd8b23SScott Wood #endif
775a4cd8b23SScott Wood 
776d9fbd03dSHollis Blanchard 		/* Check the guest TLB. */
777fa86b8ddSHollis Blanchard 		gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7787924bd41SHollis Blanchard 		if (gtlb_index < 0) {
779d9fbd03dSHollis Blanchard 			/* The guest didn't have a mapping for it. */
780daf5e271SLiu Yu 			kvmppc_core_queue_dtlb_miss(vcpu,
781daf5e271SLiu Yu 			                            vcpu->arch.fault_dear,
782daf5e271SLiu Yu 			                            vcpu->arch.fault_esr);
783b52a638cSHollis Blanchard 			kvmppc_mmu_dtlb_miss(vcpu);
7847b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
785d9fbd03dSHollis Blanchard 			r = RESUME_GUEST;
786d9fbd03dSHollis Blanchard 			break;
787d9fbd03dSHollis Blanchard 		}
788d9fbd03dSHollis Blanchard 
789be8d1caeSHollis Blanchard 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
790475e7cddSHollis Blanchard 		gfn = gpaddr >> PAGE_SHIFT;
791d9fbd03dSHollis Blanchard 
792d9fbd03dSHollis Blanchard 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
793d9fbd03dSHollis Blanchard 			/* The guest TLB had a mapping, but the shadow TLB
794d9fbd03dSHollis Blanchard 			 * didn't, and it is RAM. This could be because:
795d9fbd03dSHollis Blanchard 			 * a) the entry is mapping the host kernel, or
796d9fbd03dSHollis Blanchard 			 * b) the guest used a large mapping which we're faking
797d9fbd03dSHollis Blanchard 			 * Either way, we need to satisfy the fault without
798d9fbd03dSHollis Blanchard 			 * invoking the guest. */
79958a96214SHollis Blanchard 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
8007b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
801d9fbd03dSHollis Blanchard 			r = RESUME_GUEST;
802d9fbd03dSHollis Blanchard 		} else {
803d9fbd03dSHollis Blanchard 			/* Guest has mapped and accessed a page which is not
804d9fbd03dSHollis Blanchard 			 * actually RAM. */
805475e7cddSHollis Blanchard 			vcpu->arch.paddr_accessed = gpaddr;
806d9fbd03dSHollis Blanchard 			r = kvmppc_emulate_mmio(run, vcpu);
8077b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, MMIO_EXITS);
808d9fbd03dSHollis Blanchard 		}
809d9fbd03dSHollis Blanchard 
810d9fbd03dSHollis Blanchard 		break;
811d9fbd03dSHollis Blanchard 	}
812d9fbd03dSHollis Blanchard 
813d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_ITLB_MISS: {
814d9fbd03dSHollis Blanchard 		unsigned long eaddr = vcpu->arch.pc;
81589168618SHollis Blanchard 		gpa_t gpaddr;
816d9fbd03dSHollis Blanchard 		gfn_t gfn;
8177924bd41SHollis Blanchard 		int gtlb_index;
818d9fbd03dSHollis Blanchard 
819d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
820d9fbd03dSHollis Blanchard 
821d9fbd03dSHollis Blanchard 		/* Check the guest TLB. */
822fa86b8ddSHollis Blanchard 		gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
8237924bd41SHollis Blanchard 		if (gtlb_index < 0) {
824d9fbd03dSHollis Blanchard 			/* The guest didn't have a mapping for it. */
825d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
826b52a638cSHollis Blanchard 			kvmppc_mmu_itlb_miss(vcpu);
8277b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
828d9fbd03dSHollis Blanchard 			break;
829d9fbd03dSHollis Blanchard 		}
830d9fbd03dSHollis Blanchard 
8317b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
832d9fbd03dSHollis Blanchard 
833be8d1caeSHollis Blanchard 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
83489168618SHollis Blanchard 		gfn = gpaddr >> PAGE_SHIFT;
835d9fbd03dSHollis Blanchard 
836d9fbd03dSHollis Blanchard 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
837d9fbd03dSHollis Blanchard 			/* The guest TLB had a mapping, but the shadow TLB
838d9fbd03dSHollis Blanchard 			 * didn't. This could be because:
839d9fbd03dSHollis Blanchard 			 * a) the entry is mapping the host kernel, or
840d9fbd03dSHollis Blanchard 			 * b) the guest used a large mapping which we're faking
841d9fbd03dSHollis Blanchard 			 * Either way, we need to satisfy the fault without
842d9fbd03dSHollis Blanchard 			 * invoking the guest. */
84358a96214SHollis Blanchard 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
844d9fbd03dSHollis Blanchard 		} else {
845d9fbd03dSHollis Blanchard 			/* Guest mapped and leaped at non-RAM! */
846d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
847d9fbd03dSHollis Blanchard 		}
848d9fbd03dSHollis Blanchard 
849d9fbd03dSHollis Blanchard 		break;
850d9fbd03dSHollis Blanchard 	}
851d9fbd03dSHollis Blanchard 
852d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DEBUG: {
853d9fbd03dSHollis Blanchard 		u32 dbsr;
854d9fbd03dSHollis Blanchard 
855d9fbd03dSHollis Blanchard 		vcpu->arch.pc = mfspr(SPRN_CSRR0);
856d9fbd03dSHollis Blanchard 
857d9fbd03dSHollis Blanchard 		/* clear IAC events in DBSR register */
858d9fbd03dSHollis Blanchard 		dbsr = mfspr(SPRN_DBSR);
859d9fbd03dSHollis Blanchard 		dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
860d9fbd03dSHollis Blanchard 		mtspr(SPRN_DBSR, dbsr);
861d9fbd03dSHollis Blanchard 
862d9fbd03dSHollis Blanchard 		run->exit_reason = KVM_EXIT_DEBUG;
8637b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, DEBUG_EXITS);
864d9fbd03dSHollis Blanchard 		r = RESUME_HOST;
865d9fbd03dSHollis Blanchard 		break;
866d9fbd03dSHollis Blanchard 	}
867d9fbd03dSHollis Blanchard 
868d9fbd03dSHollis Blanchard 	default:
869d9fbd03dSHollis Blanchard 		printk(KERN_EMERG "exit_nr %d\n", exit_nr);
870d9fbd03dSHollis Blanchard 		BUG();
871d9fbd03dSHollis Blanchard 	}
872d9fbd03dSHollis Blanchard 
873d9fbd03dSHollis Blanchard 	local_irq_disable();
874d9fbd03dSHollis Blanchard 
8757e28e60eSScott Wood 	kvmppc_core_prepare_to_enter(vcpu);
876d9fbd03dSHollis Blanchard 
877d9fbd03dSHollis Blanchard 	if (!(r & RESUME_HOST)) {
878d9fbd03dSHollis Blanchard 		/* To avoid clobbering exit_reason, only check for signals if
879d9fbd03dSHollis Blanchard 		 * we aren't already exiting to userspace for some other
880d9fbd03dSHollis Blanchard 		 * reason. */
881d9fbd03dSHollis Blanchard 		if (signal_pending(current)) {
882d9fbd03dSHollis Blanchard 			run->exit_reason = KVM_EXIT_INTR;
883d9fbd03dSHollis Blanchard 			r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
8847b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, SIGNAL_EXITS);
885d9fbd03dSHollis Blanchard 		}
886d9fbd03dSHollis Blanchard 	}
887d9fbd03dSHollis Blanchard 
888d9fbd03dSHollis Blanchard 	return r;
889d9fbd03dSHollis Blanchard }
890d9fbd03dSHollis Blanchard 
891d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
892d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
893d9fbd03dSHollis Blanchard {
894082decf2SHollis Blanchard 	int i;
895af8f38b3SAlexander Graf 	int r;
896082decf2SHollis Blanchard 
897d9fbd03dSHollis Blanchard 	vcpu->arch.pc = 0;
898b5904972SScott Wood 	vcpu->arch.shared->pir = vcpu->vcpu_id;
8998e5b26b5SAlexander Graf 	kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
900d30f6e48SScott Wood 	kvmppc_set_msr(vcpu, 0);
901d9fbd03dSHollis Blanchard 
902d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
903d30f6e48SScott Wood 	vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
904d9fbd03dSHollis Blanchard 	vcpu->arch.shadow_pid = 1;
905d30f6e48SScott Wood 	vcpu->arch.shared->msr = 0;
906d30f6e48SScott Wood #endif
907d9fbd03dSHollis Blanchard 
908082decf2SHollis Blanchard 	/* Eye-catching numbers so we know if the guest takes an interrupt
909082decf2SHollis Blanchard 	 * before it's programmed its own IVPR/IVORs. */
910d9fbd03dSHollis Blanchard 	vcpu->arch.ivpr = 0x55550000;
911082decf2SHollis Blanchard 	for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
912082decf2SHollis Blanchard 		vcpu->arch.ivor[i] = 0x7700 | i * 4;
913d9fbd03dSHollis Blanchard 
91473e75b41SHollis Blanchard 	kvmppc_init_timing_stats(vcpu);
91573e75b41SHollis Blanchard 
916af8f38b3SAlexander Graf 	r = kvmppc_core_vcpu_setup(vcpu);
917af8f38b3SAlexander Graf 	kvmppc_sanity_check(vcpu);
918af8f38b3SAlexander Graf 	return r;
919d9fbd03dSHollis Blanchard }
920d9fbd03dSHollis Blanchard 
921d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
922d9fbd03dSHollis Blanchard {
923d9fbd03dSHollis Blanchard 	int i;
924d9fbd03dSHollis Blanchard 
925d9fbd03dSHollis Blanchard 	regs->pc = vcpu->arch.pc;
926992b5b29SAlexander Graf 	regs->cr = kvmppc_get_cr(vcpu);
927d9fbd03dSHollis Blanchard 	regs->ctr = vcpu->arch.ctr;
928d9fbd03dSHollis Blanchard 	regs->lr = vcpu->arch.lr;
929992b5b29SAlexander Graf 	regs->xer = kvmppc_get_xer(vcpu);
930666e7252SAlexander Graf 	regs->msr = vcpu->arch.shared->msr;
931de7906c3SAlexander Graf 	regs->srr0 = vcpu->arch.shared->srr0;
932de7906c3SAlexander Graf 	regs->srr1 = vcpu->arch.shared->srr1;
933d9fbd03dSHollis Blanchard 	regs->pid = vcpu->arch.pid;
934a73a9599SAlexander Graf 	regs->sprg0 = vcpu->arch.shared->sprg0;
935a73a9599SAlexander Graf 	regs->sprg1 = vcpu->arch.shared->sprg1;
936a73a9599SAlexander Graf 	regs->sprg2 = vcpu->arch.shared->sprg2;
937a73a9599SAlexander Graf 	regs->sprg3 = vcpu->arch.shared->sprg3;
938b5904972SScott Wood 	regs->sprg4 = vcpu->arch.shared->sprg4;
939b5904972SScott Wood 	regs->sprg5 = vcpu->arch.shared->sprg5;
940b5904972SScott Wood 	regs->sprg6 = vcpu->arch.shared->sprg6;
941b5904972SScott Wood 	regs->sprg7 = vcpu->arch.shared->sprg7;
942d9fbd03dSHollis Blanchard 
943d9fbd03dSHollis Blanchard 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
9448e5b26b5SAlexander Graf 		regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
945d9fbd03dSHollis Blanchard 
946d9fbd03dSHollis Blanchard 	return 0;
947d9fbd03dSHollis Blanchard }
948d9fbd03dSHollis Blanchard 
949d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
950d9fbd03dSHollis Blanchard {
951d9fbd03dSHollis Blanchard 	int i;
952d9fbd03dSHollis Blanchard 
953d9fbd03dSHollis Blanchard 	vcpu->arch.pc = regs->pc;
954992b5b29SAlexander Graf 	kvmppc_set_cr(vcpu, regs->cr);
955d9fbd03dSHollis Blanchard 	vcpu->arch.ctr = regs->ctr;
956d9fbd03dSHollis Blanchard 	vcpu->arch.lr = regs->lr;
957992b5b29SAlexander Graf 	kvmppc_set_xer(vcpu, regs->xer);
958b8fd68acSHollis Blanchard 	kvmppc_set_msr(vcpu, regs->msr);
959de7906c3SAlexander Graf 	vcpu->arch.shared->srr0 = regs->srr0;
960de7906c3SAlexander Graf 	vcpu->arch.shared->srr1 = regs->srr1;
9615ce941eeSScott Wood 	kvmppc_set_pid(vcpu, regs->pid);
962a73a9599SAlexander Graf 	vcpu->arch.shared->sprg0 = regs->sprg0;
963a73a9599SAlexander Graf 	vcpu->arch.shared->sprg1 = regs->sprg1;
964a73a9599SAlexander Graf 	vcpu->arch.shared->sprg2 = regs->sprg2;
965a73a9599SAlexander Graf 	vcpu->arch.shared->sprg3 = regs->sprg3;
966b5904972SScott Wood 	vcpu->arch.shared->sprg4 = regs->sprg4;
967b5904972SScott Wood 	vcpu->arch.shared->sprg5 = regs->sprg5;
968b5904972SScott Wood 	vcpu->arch.shared->sprg6 = regs->sprg6;
969b5904972SScott Wood 	vcpu->arch.shared->sprg7 = regs->sprg7;
970d9fbd03dSHollis Blanchard 
9718e5b26b5SAlexander Graf 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
9728e5b26b5SAlexander Graf 		kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
973d9fbd03dSHollis Blanchard 
974d9fbd03dSHollis Blanchard 	return 0;
975d9fbd03dSHollis Blanchard }
976d9fbd03dSHollis Blanchard 
9775ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu,
9785ce941eeSScott Wood                            struct kvm_sregs *sregs)
9795ce941eeSScott Wood {
9805ce941eeSScott Wood 	u64 tb = get_tb();
9815ce941eeSScott Wood 
9825ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_BASE;
9835ce941eeSScott Wood 
9845ce941eeSScott Wood 	sregs->u.e.csrr0 = vcpu->arch.csrr0;
9855ce941eeSScott Wood 	sregs->u.e.csrr1 = vcpu->arch.csrr1;
9865ce941eeSScott Wood 	sregs->u.e.mcsr = vcpu->arch.mcsr;
987d30f6e48SScott Wood 	sregs->u.e.esr = get_guest_esr(vcpu);
988d30f6e48SScott Wood 	sregs->u.e.dear = get_guest_dear(vcpu);
9895ce941eeSScott Wood 	sregs->u.e.tsr = vcpu->arch.tsr;
9905ce941eeSScott Wood 	sregs->u.e.tcr = vcpu->arch.tcr;
9915ce941eeSScott Wood 	sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
9925ce941eeSScott Wood 	sregs->u.e.tb = tb;
9935ce941eeSScott Wood 	sregs->u.e.vrsave = vcpu->arch.vrsave;
9945ce941eeSScott Wood }
9955ce941eeSScott Wood 
9965ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu,
9975ce941eeSScott Wood                           struct kvm_sregs *sregs)
9985ce941eeSScott Wood {
9995ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
10005ce941eeSScott Wood 		return 0;
10015ce941eeSScott Wood 
10025ce941eeSScott Wood 	vcpu->arch.csrr0 = sregs->u.e.csrr0;
10035ce941eeSScott Wood 	vcpu->arch.csrr1 = sregs->u.e.csrr1;
10045ce941eeSScott Wood 	vcpu->arch.mcsr = sregs->u.e.mcsr;
1005d30f6e48SScott Wood 	set_guest_esr(vcpu, sregs->u.e.esr);
1006d30f6e48SScott Wood 	set_guest_dear(vcpu, sregs->u.e.dear);
10075ce941eeSScott Wood 	vcpu->arch.vrsave = sregs->u.e.vrsave;
1008dfd4d47eSScott Wood 	kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
10095ce941eeSScott Wood 
1010dfd4d47eSScott Wood 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
10115ce941eeSScott Wood 		vcpu->arch.dec = sregs->u.e.dec;
10125ce941eeSScott Wood 		kvmppc_emulate_dec(vcpu);
1013dfd4d47eSScott Wood 	}
10145ce941eeSScott Wood 
10155ce941eeSScott Wood 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
1016dfd4d47eSScott Wood 		vcpu->arch.tsr = sregs->u.e.tsr;
1017dfd4d47eSScott Wood 		update_timer_ints(vcpu);
10185ce941eeSScott Wood 	}
10195ce941eeSScott Wood 
10205ce941eeSScott Wood 	return 0;
10215ce941eeSScott Wood }
10225ce941eeSScott Wood 
10235ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu,
10245ce941eeSScott Wood                               struct kvm_sregs *sregs)
10255ce941eeSScott Wood {
10265ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_ARCH206;
10275ce941eeSScott Wood 
1028841741f2SScott Wood 	sregs->u.e.pir = vcpu->vcpu_id;
10295ce941eeSScott Wood 	sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
10305ce941eeSScott Wood 	sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
10315ce941eeSScott Wood 	sregs->u.e.decar = vcpu->arch.decar;
10325ce941eeSScott Wood 	sregs->u.e.ivpr = vcpu->arch.ivpr;
10335ce941eeSScott Wood }
10345ce941eeSScott Wood 
10355ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu,
10365ce941eeSScott Wood                              struct kvm_sregs *sregs)
10375ce941eeSScott Wood {
10385ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
10395ce941eeSScott Wood 		return 0;
10405ce941eeSScott Wood 
1041841741f2SScott Wood 	if (sregs->u.e.pir != vcpu->vcpu_id)
10425ce941eeSScott Wood 		return -EINVAL;
10435ce941eeSScott Wood 
10445ce941eeSScott Wood 	vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
10455ce941eeSScott Wood 	vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
10465ce941eeSScott Wood 	vcpu->arch.decar = sregs->u.e.decar;
10475ce941eeSScott Wood 	vcpu->arch.ivpr = sregs->u.e.ivpr;
10485ce941eeSScott Wood 
10495ce941eeSScott Wood 	return 0;
10505ce941eeSScott Wood }
10515ce941eeSScott Wood 
10525ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10535ce941eeSScott Wood {
10545ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_IVOR;
10555ce941eeSScott Wood 
10565ce941eeSScott Wood 	sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
10575ce941eeSScott Wood 	sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
10585ce941eeSScott Wood 	sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
10595ce941eeSScott Wood 	sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
10605ce941eeSScott Wood 	sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
10615ce941eeSScott Wood 	sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
10625ce941eeSScott Wood 	sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
10635ce941eeSScott Wood 	sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
10645ce941eeSScott Wood 	sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
10655ce941eeSScott Wood 	sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
10665ce941eeSScott Wood 	sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
10675ce941eeSScott Wood 	sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
10685ce941eeSScott Wood 	sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
10695ce941eeSScott Wood 	sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
10705ce941eeSScott Wood 	sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
10715ce941eeSScott Wood 	sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
10725ce941eeSScott Wood }
10735ce941eeSScott Wood 
10745ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10755ce941eeSScott Wood {
10765ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
10775ce941eeSScott Wood 		return 0;
10785ce941eeSScott Wood 
10795ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
10805ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
10815ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
10825ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
10835ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
10845ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
10855ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
10865ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
10875ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
10885ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
10895ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
10905ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
10915ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
10925ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
10935ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
10945ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
10955ce941eeSScott Wood 
10965ce941eeSScott Wood 	return 0;
10975ce941eeSScott Wood }
10985ce941eeSScott Wood 
1099d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1100d9fbd03dSHollis Blanchard                                   struct kvm_sregs *sregs)
1101d9fbd03dSHollis Blanchard {
11025ce941eeSScott Wood 	sregs->pvr = vcpu->arch.pvr;
11035ce941eeSScott Wood 
11045ce941eeSScott Wood 	get_sregs_base(vcpu, sregs);
11055ce941eeSScott Wood 	get_sregs_arch206(vcpu, sregs);
11065ce941eeSScott Wood 	kvmppc_core_get_sregs(vcpu, sregs);
11075ce941eeSScott Wood 	return 0;
1108d9fbd03dSHollis Blanchard }
1109d9fbd03dSHollis Blanchard 
1110d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1111d9fbd03dSHollis Blanchard                                   struct kvm_sregs *sregs)
1112d9fbd03dSHollis Blanchard {
11135ce941eeSScott Wood 	int ret;
11145ce941eeSScott Wood 
11155ce941eeSScott Wood 	if (vcpu->arch.pvr != sregs->pvr)
11165ce941eeSScott Wood 		return -EINVAL;
11175ce941eeSScott Wood 
11185ce941eeSScott Wood 	ret = set_sregs_base(vcpu, sregs);
11195ce941eeSScott Wood 	if (ret < 0)
11205ce941eeSScott Wood 		return ret;
11215ce941eeSScott Wood 
11225ce941eeSScott Wood 	ret = set_sregs_arch206(vcpu, sregs);
11235ce941eeSScott Wood 	if (ret < 0)
11245ce941eeSScott Wood 		return ret;
11255ce941eeSScott Wood 
11265ce941eeSScott Wood 	return kvmppc_core_set_sregs(vcpu, sregs);
1127d9fbd03dSHollis Blanchard }
1128d9fbd03dSHollis Blanchard 
112931f3438eSPaul Mackerras int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
113031f3438eSPaul Mackerras {
113131f3438eSPaul Mackerras 	return -EINVAL;
113231f3438eSPaul Mackerras }
113331f3438eSPaul Mackerras 
113431f3438eSPaul Mackerras int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
113531f3438eSPaul Mackerras {
113631f3438eSPaul Mackerras 	return -EINVAL;
113731f3438eSPaul Mackerras }
113831f3438eSPaul Mackerras 
1139d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1140d9fbd03dSHollis Blanchard {
1141d9fbd03dSHollis Blanchard 	return -ENOTSUPP;
1142d9fbd03dSHollis Blanchard }
1143d9fbd03dSHollis Blanchard 
1144d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1145d9fbd03dSHollis Blanchard {
1146d9fbd03dSHollis Blanchard 	return -ENOTSUPP;
1147d9fbd03dSHollis Blanchard }
1148d9fbd03dSHollis Blanchard 
1149d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1150d9fbd03dSHollis Blanchard                                   struct kvm_translation *tr)
1151d9fbd03dSHollis Blanchard {
115298001d8dSAvi Kivity 	int r;
115398001d8dSAvi Kivity 
115498001d8dSAvi Kivity 	r = kvmppc_core_vcpu_translate(vcpu, tr);
115598001d8dSAvi Kivity 	return r;
1156d9fbd03dSHollis Blanchard }
1157d9fbd03dSHollis Blanchard 
11584e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
11594e755758SAlexander Graf {
11604e755758SAlexander Graf 	return -ENOTSUPP;
11614e755758SAlexander Graf }
11624e755758SAlexander Graf 
1163f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1164f9e0554dSPaul Mackerras 				      struct kvm_userspace_memory_region *mem)
1165f9e0554dSPaul Mackerras {
1166f9e0554dSPaul Mackerras 	return 0;
1167f9e0554dSPaul Mackerras }
1168f9e0554dSPaul Mackerras 
1169f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm,
1170f9e0554dSPaul Mackerras 				struct kvm_userspace_memory_region *mem)
1171f9e0554dSPaul Mackerras {
1172f9e0554dSPaul Mackerras }
1173f9e0554dSPaul Mackerras 
1174dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1175dfd4d47eSScott Wood {
1176dfd4d47eSScott Wood 	vcpu->arch.tcr = new_tcr;
1177dfd4d47eSScott Wood 	update_timer_ints(vcpu);
1178dfd4d47eSScott Wood }
1179dfd4d47eSScott Wood 
1180dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1181dfd4d47eSScott Wood {
1182dfd4d47eSScott Wood 	set_bits(tsr_bits, &vcpu->arch.tsr);
1183dfd4d47eSScott Wood 	smp_wmb();
1184dfd4d47eSScott Wood 	kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1185dfd4d47eSScott Wood 	kvm_vcpu_kick(vcpu);
1186dfd4d47eSScott Wood }
1187dfd4d47eSScott Wood 
1188dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1189dfd4d47eSScott Wood {
1190dfd4d47eSScott Wood 	clear_bits(tsr_bits, &vcpu->arch.tsr);
1191dfd4d47eSScott Wood 	update_timer_ints(vcpu);
1192dfd4d47eSScott Wood }
1193dfd4d47eSScott Wood 
1194dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data)
1195dfd4d47eSScott Wood {
1196dfd4d47eSScott Wood 	struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1197dfd4d47eSScott Wood 
1198dfd4d47eSScott Wood 	kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1199dfd4d47eSScott Wood }
1200dfd4d47eSScott Wood 
120194fa9d99SScott Wood void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
120294fa9d99SScott Wood {
1203d30f6e48SScott Wood 	current->thread.kvm_vcpu = vcpu;
120494fa9d99SScott Wood }
120594fa9d99SScott Wood 
120694fa9d99SScott Wood void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
120794fa9d99SScott Wood {
1208d30f6e48SScott Wood 	current->thread.kvm_vcpu = NULL;
120994fa9d99SScott Wood }
121094fa9d99SScott Wood 
12112986b8c7SStephen Rothwell int __init kvmppc_booke_init(void)
1212d9fbd03dSHollis Blanchard {
1213d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
1214d9fbd03dSHollis Blanchard 	unsigned long ivor[16];
1215d9fbd03dSHollis Blanchard 	unsigned long max_ivor = 0;
1216d9fbd03dSHollis Blanchard 	int i;
1217d9fbd03dSHollis Blanchard 
1218d9fbd03dSHollis Blanchard 	/* We install our own exception handlers by hijacking IVPR. IVPR must
1219d9fbd03dSHollis Blanchard 	 * be 16-bit aligned, so we need a 64KB allocation. */
1220d9fbd03dSHollis Blanchard 	kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1221d9fbd03dSHollis Blanchard 	                                         VCPU_SIZE_ORDER);
1222d9fbd03dSHollis Blanchard 	if (!kvmppc_booke_handlers)
1223d9fbd03dSHollis Blanchard 		return -ENOMEM;
1224d9fbd03dSHollis Blanchard 
1225d9fbd03dSHollis Blanchard 	/* XXX make sure our handlers are smaller than Linux's */
1226d9fbd03dSHollis Blanchard 
1227d9fbd03dSHollis Blanchard 	/* Copy our interrupt handlers to match host IVORs. That way we don't
1228d9fbd03dSHollis Blanchard 	 * have to swap the IVORs on every guest/host transition. */
1229d9fbd03dSHollis Blanchard 	ivor[0] = mfspr(SPRN_IVOR0);
1230d9fbd03dSHollis Blanchard 	ivor[1] = mfspr(SPRN_IVOR1);
1231d9fbd03dSHollis Blanchard 	ivor[2] = mfspr(SPRN_IVOR2);
1232d9fbd03dSHollis Blanchard 	ivor[3] = mfspr(SPRN_IVOR3);
1233d9fbd03dSHollis Blanchard 	ivor[4] = mfspr(SPRN_IVOR4);
1234d9fbd03dSHollis Blanchard 	ivor[5] = mfspr(SPRN_IVOR5);
1235d9fbd03dSHollis Blanchard 	ivor[6] = mfspr(SPRN_IVOR6);
1236d9fbd03dSHollis Blanchard 	ivor[7] = mfspr(SPRN_IVOR7);
1237d9fbd03dSHollis Blanchard 	ivor[8] = mfspr(SPRN_IVOR8);
1238d9fbd03dSHollis Blanchard 	ivor[9] = mfspr(SPRN_IVOR9);
1239d9fbd03dSHollis Blanchard 	ivor[10] = mfspr(SPRN_IVOR10);
1240d9fbd03dSHollis Blanchard 	ivor[11] = mfspr(SPRN_IVOR11);
1241d9fbd03dSHollis Blanchard 	ivor[12] = mfspr(SPRN_IVOR12);
1242d9fbd03dSHollis Blanchard 	ivor[13] = mfspr(SPRN_IVOR13);
1243d9fbd03dSHollis Blanchard 	ivor[14] = mfspr(SPRN_IVOR14);
1244d9fbd03dSHollis Blanchard 	ivor[15] = mfspr(SPRN_IVOR15);
1245d9fbd03dSHollis Blanchard 
1246d9fbd03dSHollis Blanchard 	for (i = 0; i < 16; i++) {
1247d9fbd03dSHollis Blanchard 		if (ivor[i] > max_ivor)
1248d9fbd03dSHollis Blanchard 			max_ivor = ivor[i];
1249d9fbd03dSHollis Blanchard 
1250d9fbd03dSHollis Blanchard 		memcpy((void *)kvmppc_booke_handlers + ivor[i],
1251d9fbd03dSHollis Blanchard 		       kvmppc_handlers_start + i * kvmppc_handler_len,
1252d9fbd03dSHollis Blanchard 		       kvmppc_handler_len);
1253d9fbd03dSHollis Blanchard 	}
1254d9fbd03dSHollis Blanchard 	flush_icache_range(kvmppc_booke_handlers,
1255d9fbd03dSHollis Blanchard 	                   kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
1256d30f6e48SScott Wood #endif /* !BOOKE_HV */
1257db93f574SHollis Blanchard 	return 0;
1258d9fbd03dSHollis Blanchard }
1259d9fbd03dSHollis Blanchard 
1260db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void)
1261d9fbd03dSHollis Blanchard {
1262d9fbd03dSHollis Blanchard 	free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1263d9fbd03dSHollis Blanchard 	kvm_exit();
1264d9fbd03dSHollis Blanchard }
1265