xref: /openbmc/linux/arch/powerpc/kvm/booke.c (revision 78accda4f888c77122cf3da6185f905d4677eb07)
1d9fbd03dSHollis Blanchard /*
2d9fbd03dSHollis Blanchard  * This program is free software; you can redistribute it and/or modify
3d9fbd03dSHollis Blanchard  * it under the terms of the GNU General Public License, version 2, as
4d9fbd03dSHollis Blanchard  * published by the Free Software Foundation.
5d9fbd03dSHollis Blanchard  *
6d9fbd03dSHollis Blanchard  * This program is distributed in the hope that it will be useful,
7d9fbd03dSHollis Blanchard  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8d9fbd03dSHollis Blanchard  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9d9fbd03dSHollis Blanchard  * GNU General Public License for more details.
10d9fbd03dSHollis Blanchard  *
11d9fbd03dSHollis Blanchard  * You should have received a copy of the GNU General Public License
12d9fbd03dSHollis Blanchard  * along with this program; if not, write to the Free Software
13d9fbd03dSHollis Blanchard  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14d9fbd03dSHollis Blanchard  *
15d9fbd03dSHollis Blanchard  * Copyright IBM Corp. 2007
164cd35f67SScott Wood  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17d9fbd03dSHollis Blanchard  *
18d9fbd03dSHollis Blanchard  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19d9fbd03dSHollis Blanchard  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20d30f6e48SScott Wood  *          Scott Wood <scottwood@freescale.com>
21d30f6e48SScott Wood  *          Varun Sethi <varun.sethi@freescale.com>
22d9fbd03dSHollis Blanchard  */
23d9fbd03dSHollis Blanchard 
24d9fbd03dSHollis Blanchard #include <linux/errno.h>
25d9fbd03dSHollis Blanchard #include <linux/err.h>
26d9fbd03dSHollis Blanchard #include <linux/kvm_host.h>
275a0e3ad6STejun Heo #include <linux/gfp.h>
28d9fbd03dSHollis Blanchard #include <linux/module.h>
29d9fbd03dSHollis Blanchard #include <linux/vmalloc.h>
30d9fbd03dSHollis Blanchard #include <linux/fs.h>
317924bd41SHollis Blanchard 
32d9fbd03dSHollis Blanchard #include <asm/cputable.h>
33d9fbd03dSHollis Blanchard #include <asm/uaccess.h>
34d9fbd03dSHollis Blanchard #include <asm/kvm_ppc.h>
35d9fbd03dSHollis Blanchard #include <asm/cacheflush.h>
36d30f6e48SScott Wood #include <asm/dbell.h>
37d30f6e48SScott Wood #include <asm/hw_irq.h>
38d30f6e48SScott Wood #include <asm/irq.h>
39b50df19cSMihai Caraman #include <asm/time.h>
40d9fbd03dSHollis Blanchard 
41d30f6e48SScott Wood #include "timing.h"
4275f74f0dSHollis Blanchard #include "booke.h"
4397c95059SAlexander Graf #include "trace.h"
44d9fbd03dSHollis Blanchard 
45d9fbd03dSHollis Blanchard unsigned long kvmppc_booke_handlers;
46d9fbd03dSHollis Blanchard 
47d9fbd03dSHollis Blanchard #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
48d9fbd03dSHollis Blanchard #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
49d9fbd03dSHollis Blanchard 
50d9fbd03dSHollis Blanchard struct kvm_stats_debugfs_item debugfs_entries[] = {
51d9fbd03dSHollis Blanchard 	{ "mmio",       VCPU_STAT(mmio_exits) },
52d9fbd03dSHollis Blanchard 	{ "dcr",        VCPU_STAT(dcr_exits) },
53d9fbd03dSHollis Blanchard 	{ "sig",        VCPU_STAT(signal_exits) },
54d9fbd03dSHollis Blanchard 	{ "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
55d9fbd03dSHollis Blanchard 	{ "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
56d9fbd03dSHollis Blanchard 	{ "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
57d9fbd03dSHollis Blanchard 	{ "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
58d9fbd03dSHollis Blanchard 	{ "sysc",       VCPU_STAT(syscall_exits) },
59d9fbd03dSHollis Blanchard 	{ "isi",        VCPU_STAT(isi_exits) },
60d9fbd03dSHollis Blanchard 	{ "dsi",        VCPU_STAT(dsi_exits) },
61d9fbd03dSHollis Blanchard 	{ "inst_emu",   VCPU_STAT(emulated_inst_exits) },
62d9fbd03dSHollis Blanchard 	{ "dec",        VCPU_STAT(dec_exits) },
63d9fbd03dSHollis Blanchard 	{ "ext_intr",   VCPU_STAT(ext_intr_exits) },
64d9fbd03dSHollis Blanchard 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
65d30f6e48SScott Wood 	{ "doorbell", VCPU_STAT(dbell_exits) },
66d30f6e48SScott Wood 	{ "guest doorbell", VCPU_STAT(gdbell_exits) },
67cf1c5ca4SAlexander Graf 	{ "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
68d9fbd03dSHollis Blanchard 	{ NULL }
69d9fbd03dSHollis Blanchard };
70d9fbd03dSHollis Blanchard 
71d9fbd03dSHollis Blanchard /* TODO: use vcpu_printf() */
72d9fbd03dSHollis Blanchard void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
73d9fbd03dSHollis Blanchard {
74d9fbd03dSHollis Blanchard 	int i;
75d9fbd03dSHollis Blanchard 
76666e7252SAlexander Graf 	printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
775cf8ca22SHollis Blanchard 	printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
78de7906c3SAlexander Graf 	printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
79de7906c3SAlexander Graf 					    vcpu->arch.shared->srr1);
80d9fbd03dSHollis Blanchard 
81d9fbd03dSHollis Blanchard 	printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
82d9fbd03dSHollis Blanchard 
83d9fbd03dSHollis Blanchard 	for (i = 0; i < 32; i += 4) {
845cf8ca22SHollis Blanchard 		printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
858e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i),
868e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+1),
878e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+2),
888e5b26b5SAlexander Graf 		       kvmppc_get_gpr(vcpu, i+3));
89d9fbd03dSHollis Blanchard 	}
90d9fbd03dSHollis Blanchard }
91d9fbd03dSHollis Blanchard 
924cd35f67SScott Wood #ifdef CONFIG_SPE
934cd35f67SScott Wood void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
944cd35f67SScott Wood {
954cd35f67SScott Wood 	preempt_disable();
964cd35f67SScott Wood 	enable_kernel_spe();
974cd35f67SScott Wood 	kvmppc_save_guest_spe(vcpu);
984cd35f67SScott Wood 	vcpu->arch.shadow_msr &= ~MSR_SPE;
994cd35f67SScott Wood 	preempt_enable();
1004cd35f67SScott Wood }
1014cd35f67SScott Wood 
1024cd35f67SScott Wood static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
1034cd35f67SScott Wood {
1044cd35f67SScott Wood 	preempt_disable();
1054cd35f67SScott Wood 	enable_kernel_spe();
1064cd35f67SScott Wood 	kvmppc_load_guest_spe(vcpu);
1074cd35f67SScott Wood 	vcpu->arch.shadow_msr |= MSR_SPE;
1084cd35f67SScott Wood 	preempt_enable();
1094cd35f67SScott Wood }
1104cd35f67SScott Wood 
1114cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
1124cd35f67SScott Wood {
1134cd35f67SScott Wood 	if (vcpu->arch.shared->msr & MSR_SPE) {
1144cd35f67SScott Wood 		if (!(vcpu->arch.shadow_msr & MSR_SPE))
1154cd35f67SScott Wood 			kvmppc_vcpu_enable_spe(vcpu);
1164cd35f67SScott Wood 	} else if (vcpu->arch.shadow_msr & MSR_SPE) {
1174cd35f67SScott Wood 		kvmppc_vcpu_disable_spe(vcpu);
1184cd35f67SScott Wood 	}
1194cd35f67SScott Wood }
1204cd35f67SScott Wood #else
1214cd35f67SScott Wood static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
1224cd35f67SScott Wood {
1234cd35f67SScott Wood }
1244cd35f67SScott Wood #endif
1254cd35f67SScott Wood 
1267a08c274SAlexander Graf static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
1277a08c274SAlexander Graf {
1287a08c274SAlexander Graf #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
1297a08c274SAlexander Graf 	/* We always treat the FP bit as enabled from the host
1307a08c274SAlexander Graf 	   perspective, so only need to adjust the shadow MSR */
1317a08c274SAlexander Graf 	vcpu->arch.shadow_msr &= ~MSR_FP;
1327a08c274SAlexander Graf 	vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
1337a08c274SAlexander Graf #endif
1347a08c274SAlexander Graf }
1357a08c274SAlexander Graf 
136dd9ebf1fSLiu Yu /*
137dd9ebf1fSLiu Yu  * Helper function for "full" MSR writes.  No need to call this if only
138dd9ebf1fSLiu Yu  * EE/CE/ME/DE/RI are changing.
139dd9ebf1fSLiu Yu  */
1404cd35f67SScott Wood void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
1414cd35f67SScott Wood {
142dd9ebf1fSLiu Yu 	u32 old_msr = vcpu->arch.shared->msr;
1434cd35f67SScott Wood 
144d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
145d30f6e48SScott Wood 	new_msr |= MSR_GS;
146d30f6e48SScott Wood #endif
147d30f6e48SScott Wood 
1484cd35f67SScott Wood 	vcpu->arch.shared->msr = new_msr;
1494cd35f67SScott Wood 
150dd9ebf1fSLiu Yu 	kvmppc_mmu_msr_notify(vcpu, old_msr);
1514cd35f67SScott Wood 	kvmppc_vcpu_sync_spe(vcpu);
1527a08c274SAlexander Graf 	kvmppc_vcpu_sync_fpu(vcpu);
1534cd35f67SScott Wood }
1544cd35f67SScott Wood 
155d4cf3892SHollis Blanchard static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
156d4cf3892SHollis Blanchard                                        unsigned int priority)
1579dd921cfSHollis Blanchard {
1586346046cSAlexander Graf 	trace_kvm_booke_queue_irqprio(vcpu, priority);
1599dd921cfSHollis Blanchard 	set_bit(priority, &vcpu->arch.pending_exceptions);
1609dd921cfSHollis Blanchard }
1619dd921cfSHollis Blanchard 
162daf5e271SLiu Yu static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
163daf5e271SLiu Yu                                         ulong dear_flags, ulong esr_flags)
1649dd921cfSHollis Blanchard {
165daf5e271SLiu Yu 	vcpu->arch.queued_dear = dear_flags;
166daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
167daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
168daf5e271SLiu Yu }
169daf5e271SLiu Yu 
170daf5e271SLiu Yu static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
171daf5e271SLiu Yu                                            ulong dear_flags, ulong esr_flags)
172daf5e271SLiu Yu {
173daf5e271SLiu Yu 	vcpu->arch.queued_dear = dear_flags;
174daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
175daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
176daf5e271SLiu Yu }
177daf5e271SLiu Yu 
178daf5e271SLiu Yu static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
179daf5e271SLiu Yu                                            ulong esr_flags)
180daf5e271SLiu Yu {
181daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
182daf5e271SLiu Yu 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
183daf5e271SLiu Yu }
184daf5e271SLiu Yu 
185011da899SAlexander Graf static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
186011da899SAlexander Graf 					ulong esr_flags)
187011da899SAlexander Graf {
188011da899SAlexander Graf 	vcpu->arch.queued_dear = dear_flags;
189011da899SAlexander Graf 	vcpu->arch.queued_esr = esr_flags;
190011da899SAlexander Graf 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
191011da899SAlexander Graf }
192011da899SAlexander Graf 
193daf5e271SLiu Yu void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
194daf5e271SLiu Yu {
195daf5e271SLiu Yu 	vcpu->arch.queued_esr = esr_flags;
196d4cf3892SHollis Blanchard 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
1979dd921cfSHollis Blanchard }
1989dd921cfSHollis Blanchard 
1999dd921cfSHollis Blanchard void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
2009dd921cfSHollis Blanchard {
201d4cf3892SHollis Blanchard 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
2029dd921cfSHollis Blanchard }
2039dd921cfSHollis Blanchard 
2049dd921cfSHollis Blanchard int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
2059dd921cfSHollis Blanchard {
206d4cf3892SHollis Blanchard 	return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
2079dd921cfSHollis Blanchard }
2089dd921cfSHollis Blanchard 
2097706664dSAlexander Graf void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
2107706664dSAlexander Graf {
2117706664dSAlexander Graf 	clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
2127706664dSAlexander Graf }
2137706664dSAlexander Graf 
2149dd921cfSHollis Blanchard void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
2159dd921cfSHollis Blanchard                                 struct kvm_interrupt *irq)
2169dd921cfSHollis Blanchard {
217c5335f17SAlexander Graf 	unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
218c5335f17SAlexander Graf 
219c5335f17SAlexander Graf 	if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
220c5335f17SAlexander Graf 		prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
221c5335f17SAlexander Graf 
222c5335f17SAlexander Graf 	kvmppc_booke_queue_irqprio(vcpu, prio);
2239dd921cfSHollis Blanchard }
2249dd921cfSHollis Blanchard 
2254496f974SAlexander Graf void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
2264496f974SAlexander Graf                                   struct kvm_interrupt *irq)
2274496f974SAlexander Graf {
2284496f974SAlexander Graf 	clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
229c5335f17SAlexander Graf 	clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
2304496f974SAlexander Graf }
2314496f974SAlexander Graf 
232f61c94bbSBharat Bhushan static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
233f61c94bbSBharat Bhushan {
234f61c94bbSBharat Bhushan 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
235f61c94bbSBharat Bhushan }
236f61c94bbSBharat Bhushan 
237f61c94bbSBharat Bhushan static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
238f61c94bbSBharat Bhushan {
239f61c94bbSBharat Bhushan 	clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
240f61c94bbSBharat Bhushan }
241f61c94bbSBharat Bhushan 
242d30f6e48SScott Wood static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
243d30f6e48SScott Wood {
244d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
245d30f6e48SScott Wood 	mtspr(SPRN_GSRR0, srr0);
246d30f6e48SScott Wood 	mtspr(SPRN_GSRR1, srr1);
247d30f6e48SScott Wood #else
248d30f6e48SScott Wood 	vcpu->arch.shared->srr0 = srr0;
249d30f6e48SScott Wood 	vcpu->arch.shared->srr1 = srr1;
250d30f6e48SScott Wood #endif
251d30f6e48SScott Wood }
252d30f6e48SScott Wood 
253d30f6e48SScott Wood static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
254d30f6e48SScott Wood {
255d30f6e48SScott Wood 	vcpu->arch.csrr0 = srr0;
256d30f6e48SScott Wood 	vcpu->arch.csrr1 = srr1;
257d30f6e48SScott Wood }
258d30f6e48SScott Wood 
259d30f6e48SScott Wood static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
260d30f6e48SScott Wood {
261d30f6e48SScott Wood 	if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
262d30f6e48SScott Wood 		vcpu->arch.dsrr0 = srr0;
263d30f6e48SScott Wood 		vcpu->arch.dsrr1 = srr1;
264d30f6e48SScott Wood 	} else {
265d30f6e48SScott Wood 		set_guest_csrr(vcpu, srr0, srr1);
266d30f6e48SScott Wood 	}
267d30f6e48SScott Wood }
268d30f6e48SScott Wood 
269d30f6e48SScott Wood static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
270d30f6e48SScott Wood {
271d30f6e48SScott Wood 	vcpu->arch.mcsrr0 = srr0;
272d30f6e48SScott Wood 	vcpu->arch.mcsrr1 = srr1;
273d30f6e48SScott Wood }
274d30f6e48SScott Wood 
275d30f6e48SScott Wood static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
276d30f6e48SScott Wood {
277d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
278d30f6e48SScott Wood 	return mfspr(SPRN_GDEAR);
279d30f6e48SScott Wood #else
280d30f6e48SScott Wood 	return vcpu->arch.shared->dar;
281d30f6e48SScott Wood #endif
282d30f6e48SScott Wood }
283d30f6e48SScott Wood 
284d30f6e48SScott Wood static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
285d30f6e48SScott Wood {
286d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
287d30f6e48SScott Wood 	mtspr(SPRN_GDEAR, dear);
288d30f6e48SScott Wood #else
289d30f6e48SScott Wood 	vcpu->arch.shared->dar = dear;
290d30f6e48SScott Wood #endif
291d30f6e48SScott Wood }
292d30f6e48SScott Wood 
293d30f6e48SScott Wood static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
294d30f6e48SScott Wood {
295d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
296d30f6e48SScott Wood 	return mfspr(SPRN_GESR);
297d30f6e48SScott Wood #else
298d30f6e48SScott Wood 	return vcpu->arch.shared->esr;
299d30f6e48SScott Wood #endif
300d30f6e48SScott Wood }
301d30f6e48SScott Wood 
302d30f6e48SScott Wood static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
303d30f6e48SScott Wood {
304d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
305d30f6e48SScott Wood 	mtspr(SPRN_GESR, esr);
306d30f6e48SScott Wood #else
307d30f6e48SScott Wood 	vcpu->arch.shared->esr = esr;
308d30f6e48SScott Wood #endif
309d30f6e48SScott Wood }
310d30f6e48SScott Wood 
311324b3e63SAlexander Graf static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
312324b3e63SAlexander Graf {
313324b3e63SAlexander Graf #ifdef CONFIG_KVM_BOOKE_HV
314324b3e63SAlexander Graf 	return mfspr(SPRN_GEPR);
315324b3e63SAlexander Graf #else
316324b3e63SAlexander Graf 	return vcpu->arch.epr;
317324b3e63SAlexander Graf #endif
318324b3e63SAlexander Graf }
319324b3e63SAlexander Graf 
320d4cf3892SHollis Blanchard /* Deliver the interrupt of the corresponding priority, if possible. */
321d4cf3892SHollis Blanchard static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
322d4cf3892SHollis Blanchard                                         unsigned int priority)
323d9fbd03dSHollis Blanchard {
324d4cf3892SHollis Blanchard 	int allowed = 0;
32579300f8cSAlexander Graf 	ulong msr_mask = 0;
3261c810636SAlexander Graf 	bool update_esr = false, update_dear = false, update_epr = false;
3275c6cedf4SAlexander Graf 	ulong crit_raw = vcpu->arch.shared->critical;
3285c6cedf4SAlexander Graf 	ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
3295c6cedf4SAlexander Graf 	bool crit;
330c5335f17SAlexander Graf 	bool keep_irq = false;
331d30f6e48SScott Wood 	enum int_class int_class;
33295e90b43SMihai Caraman 	ulong new_msr = vcpu->arch.shared->msr;
3335c6cedf4SAlexander Graf 
3345c6cedf4SAlexander Graf 	/* Truncate crit indicators in 32 bit mode */
3355c6cedf4SAlexander Graf 	if (!(vcpu->arch.shared->msr & MSR_SF)) {
3365c6cedf4SAlexander Graf 		crit_raw &= 0xffffffff;
3375c6cedf4SAlexander Graf 		crit_r1 &= 0xffffffff;
3385c6cedf4SAlexander Graf 	}
3395c6cedf4SAlexander Graf 
3405c6cedf4SAlexander Graf 	/* Critical section when crit == r1 */
3415c6cedf4SAlexander Graf 	crit = (crit_raw == crit_r1);
3425c6cedf4SAlexander Graf 	/* ... and we're in supervisor mode */
3435c6cedf4SAlexander Graf 	crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
344d9fbd03dSHollis Blanchard 
345c5335f17SAlexander Graf 	if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
346c5335f17SAlexander Graf 		priority = BOOKE_IRQPRIO_EXTERNAL;
347c5335f17SAlexander Graf 		keep_irq = true;
348c5335f17SAlexander Graf 	}
349c5335f17SAlexander Graf 
3501c810636SAlexander Graf 	if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_enabled)
3511c810636SAlexander Graf 		update_epr = true;
3521c810636SAlexander Graf 
353d4cf3892SHollis Blanchard 	switch (priority) {
354d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DTLB_MISS:
355daf5e271SLiu Yu 	case BOOKE_IRQPRIO_DATA_STORAGE:
356011da899SAlexander Graf 	case BOOKE_IRQPRIO_ALIGNMENT:
357daf5e271SLiu Yu 		update_dear = true;
358daf5e271SLiu Yu 		/* fall through */
359daf5e271SLiu Yu 	case BOOKE_IRQPRIO_INST_STORAGE:
360daf5e271SLiu Yu 	case BOOKE_IRQPRIO_PROGRAM:
361daf5e271SLiu Yu 		update_esr = true;
362daf5e271SLiu Yu 		/* fall through */
363d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_ITLB_MISS:
364d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_SYSCALL:
365d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_FP_UNAVAIL:
366bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_UNAVAIL:
367bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_FP_DATA:
368bb3a8a17SHollis Blanchard 	case BOOKE_IRQPRIO_SPE_FP_ROUND:
369d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_AP_UNAVAIL:
370d4cf3892SHollis Blanchard 		allowed = 1;
37179300f8cSAlexander Graf 		msr_mask = MSR_CE | MSR_ME | MSR_DE;
372d30f6e48SScott Wood 		int_class = INT_CLASS_NONCRIT;
373d9fbd03dSHollis Blanchard 		break;
374f61c94bbSBharat Bhushan 	case BOOKE_IRQPRIO_WATCHDOG:
375d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_CRITICAL:
3764ab96919SAlexander Graf 	case BOOKE_IRQPRIO_DBELL_CRIT:
377666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_CE;
378d30f6e48SScott Wood 		allowed = allowed && !crit;
37979300f8cSAlexander Graf 		msr_mask = MSR_ME;
380d30f6e48SScott Wood 		int_class = INT_CLASS_CRIT;
381d9fbd03dSHollis Blanchard 		break;
382d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_MACHINE_CHECK:
383666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_ME;
384d30f6e48SScott Wood 		allowed = allowed && !crit;
385d30f6e48SScott Wood 		int_class = INT_CLASS_MC;
386d9fbd03dSHollis Blanchard 		break;
387d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DECREMENTER:
388d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_FIT:
389dfd4d47eSScott Wood 		keep_irq = true;
390dfd4d47eSScott Wood 		/* fall through */
391dfd4d47eSScott Wood 	case BOOKE_IRQPRIO_EXTERNAL:
3924ab96919SAlexander Graf 	case BOOKE_IRQPRIO_DBELL:
393666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_EE;
3945c6cedf4SAlexander Graf 		allowed = allowed && !crit;
39579300f8cSAlexander Graf 		msr_mask = MSR_CE | MSR_ME | MSR_DE;
396d30f6e48SScott Wood 		int_class = INT_CLASS_NONCRIT;
397d9fbd03dSHollis Blanchard 		break;
398d4cf3892SHollis Blanchard 	case BOOKE_IRQPRIO_DEBUG:
399666e7252SAlexander Graf 		allowed = vcpu->arch.shared->msr & MSR_DE;
400d30f6e48SScott Wood 		allowed = allowed && !crit;
40179300f8cSAlexander Graf 		msr_mask = MSR_ME;
402d30f6e48SScott Wood 		int_class = INT_CLASS_CRIT;
403d9fbd03dSHollis Blanchard 		break;
404d9fbd03dSHollis Blanchard 	}
405d9fbd03dSHollis Blanchard 
406d4cf3892SHollis Blanchard 	if (allowed) {
407d30f6e48SScott Wood 		switch (int_class) {
408d30f6e48SScott Wood 		case INT_CLASS_NONCRIT:
409d30f6e48SScott Wood 			set_guest_srr(vcpu, vcpu->arch.pc,
410d30f6e48SScott Wood 				      vcpu->arch.shared->msr);
411d30f6e48SScott Wood 			break;
412d30f6e48SScott Wood 		case INT_CLASS_CRIT:
413d30f6e48SScott Wood 			set_guest_csrr(vcpu, vcpu->arch.pc,
414d30f6e48SScott Wood 				       vcpu->arch.shared->msr);
415d30f6e48SScott Wood 			break;
416d30f6e48SScott Wood 		case INT_CLASS_DBG:
417d30f6e48SScott Wood 			set_guest_dsrr(vcpu, vcpu->arch.pc,
418d30f6e48SScott Wood 				       vcpu->arch.shared->msr);
419d30f6e48SScott Wood 			break;
420d30f6e48SScott Wood 		case INT_CLASS_MC:
421d30f6e48SScott Wood 			set_guest_mcsrr(vcpu, vcpu->arch.pc,
422d30f6e48SScott Wood 					vcpu->arch.shared->msr);
423d30f6e48SScott Wood 			break;
424d30f6e48SScott Wood 		}
425d30f6e48SScott Wood 
426d4cf3892SHollis Blanchard 		vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
427daf5e271SLiu Yu 		if (update_esr == true)
428d30f6e48SScott Wood 			set_guest_esr(vcpu, vcpu->arch.queued_esr);
429daf5e271SLiu Yu 		if (update_dear == true)
430d30f6e48SScott Wood 			set_guest_dear(vcpu, vcpu->arch.queued_dear);
4311c810636SAlexander Graf 		if (update_epr == true)
4321c810636SAlexander Graf 			kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
43395e90b43SMihai Caraman 
43495e90b43SMihai Caraman 		new_msr &= msr_mask;
43595e90b43SMihai Caraman #if defined(CONFIG_64BIT)
43695e90b43SMihai Caraman 		if (vcpu->arch.epcr & SPRN_EPCR_ICM)
43795e90b43SMihai Caraman 			new_msr |= MSR_CM;
43895e90b43SMihai Caraman #endif
43995e90b43SMihai Caraman 		kvmppc_set_msr(vcpu, new_msr);
440d4cf3892SHollis Blanchard 
441c5335f17SAlexander Graf 		if (!keep_irq)
442d4cf3892SHollis Blanchard 			clear_bit(priority, &vcpu->arch.pending_exceptions);
443d4cf3892SHollis Blanchard 	}
444d4cf3892SHollis Blanchard 
445d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
446d30f6e48SScott Wood 	/*
447d30f6e48SScott Wood 	 * If an interrupt is pending but masked, raise a guest doorbell
448d30f6e48SScott Wood 	 * so that we are notified when the guest enables the relevant
449d30f6e48SScott Wood 	 * MSR bit.
450d30f6e48SScott Wood 	 */
451d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
452d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
453d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
454d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
455d30f6e48SScott Wood 	if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
456d30f6e48SScott Wood 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
457d30f6e48SScott Wood #endif
458d30f6e48SScott Wood 
459d4cf3892SHollis Blanchard 	return allowed;
460d9fbd03dSHollis Blanchard }
461d9fbd03dSHollis Blanchard 
462f61c94bbSBharat Bhushan /*
463f61c94bbSBharat Bhushan  * Return the number of jiffies until the next timeout.  If the timeout is
464f61c94bbSBharat Bhushan  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
465f61c94bbSBharat Bhushan  * because the larger value can break the timer APIs.
466f61c94bbSBharat Bhushan  */
467f61c94bbSBharat Bhushan static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
468f61c94bbSBharat Bhushan {
469f61c94bbSBharat Bhushan 	u64 tb, wdt_tb, wdt_ticks = 0;
470f61c94bbSBharat Bhushan 	u64 nr_jiffies = 0;
471f61c94bbSBharat Bhushan 	u32 period = TCR_GET_WP(vcpu->arch.tcr);
472f61c94bbSBharat Bhushan 
473f61c94bbSBharat Bhushan 	wdt_tb = 1ULL << (63 - period);
474f61c94bbSBharat Bhushan 	tb = get_tb();
475f61c94bbSBharat Bhushan 	/*
476f61c94bbSBharat Bhushan 	 * The watchdog timeout will hapeen when TB bit corresponding
477f61c94bbSBharat Bhushan 	 * to watchdog will toggle from 0 to 1.
478f61c94bbSBharat Bhushan 	 */
479f61c94bbSBharat Bhushan 	if (tb & wdt_tb)
480f61c94bbSBharat Bhushan 		wdt_ticks = wdt_tb;
481f61c94bbSBharat Bhushan 
482f61c94bbSBharat Bhushan 	wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
483f61c94bbSBharat Bhushan 
484f61c94bbSBharat Bhushan 	/* Convert timebase ticks to jiffies */
485f61c94bbSBharat Bhushan 	nr_jiffies = wdt_ticks;
486f61c94bbSBharat Bhushan 
487f61c94bbSBharat Bhushan 	if (do_div(nr_jiffies, tb_ticks_per_jiffy))
488f61c94bbSBharat Bhushan 		nr_jiffies++;
489f61c94bbSBharat Bhushan 
490f61c94bbSBharat Bhushan 	return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
491f61c94bbSBharat Bhushan }
492f61c94bbSBharat Bhushan 
493f61c94bbSBharat Bhushan static void arm_next_watchdog(struct kvm_vcpu *vcpu)
494f61c94bbSBharat Bhushan {
495f61c94bbSBharat Bhushan 	unsigned long nr_jiffies;
496f61c94bbSBharat Bhushan 	unsigned long flags;
497f61c94bbSBharat Bhushan 
498f61c94bbSBharat Bhushan 	/*
499f61c94bbSBharat Bhushan 	 * If TSR_ENW and TSR_WIS are not set then no need to exit to
500f61c94bbSBharat Bhushan 	 * userspace, so clear the KVM_REQ_WATCHDOG request.
501f61c94bbSBharat Bhushan 	 */
502f61c94bbSBharat Bhushan 	if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
503f61c94bbSBharat Bhushan 		clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
504f61c94bbSBharat Bhushan 
505f61c94bbSBharat Bhushan 	spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
506f61c94bbSBharat Bhushan 	nr_jiffies = watchdog_next_timeout(vcpu);
507f61c94bbSBharat Bhushan 	/*
508f61c94bbSBharat Bhushan 	 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
509f61c94bbSBharat Bhushan 	 * then do not run the watchdog timer as this can break timer APIs.
510f61c94bbSBharat Bhushan 	 */
511f61c94bbSBharat Bhushan 	if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
512f61c94bbSBharat Bhushan 		mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
513f61c94bbSBharat Bhushan 	else
514f61c94bbSBharat Bhushan 		del_timer(&vcpu->arch.wdt_timer);
515f61c94bbSBharat Bhushan 	spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
516f61c94bbSBharat Bhushan }
517f61c94bbSBharat Bhushan 
518f61c94bbSBharat Bhushan void kvmppc_watchdog_func(unsigned long data)
519f61c94bbSBharat Bhushan {
520f61c94bbSBharat Bhushan 	struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
521f61c94bbSBharat Bhushan 	u32 tsr, new_tsr;
522f61c94bbSBharat Bhushan 	int final;
523f61c94bbSBharat Bhushan 
524f61c94bbSBharat Bhushan 	do {
525f61c94bbSBharat Bhushan 		new_tsr = tsr = vcpu->arch.tsr;
526f61c94bbSBharat Bhushan 		final = 0;
527f61c94bbSBharat Bhushan 
528f61c94bbSBharat Bhushan 		/* Time out event */
529f61c94bbSBharat Bhushan 		if (tsr & TSR_ENW) {
530f61c94bbSBharat Bhushan 			if (tsr & TSR_WIS)
531f61c94bbSBharat Bhushan 				final = 1;
532f61c94bbSBharat Bhushan 			else
533f61c94bbSBharat Bhushan 				new_tsr = tsr | TSR_WIS;
534f61c94bbSBharat Bhushan 		} else {
535f61c94bbSBharat Bhushan 			new_tsr = tsr | TSR_ENW;
536f61c94bbSBharat Bhushan 		}
537f61c94bbSBharat Bhushan 	} while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
538f61c94bbSBharat Bhushan 
539f61c94bbSBharat Bhushan 	if (new_tsr & TSR_WIS) {
540f61c94bbSBharat Bhushan 		smp_wmb();
541f61c94bbSBharat Bhushan 		kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
542f61c94bbSBharat Bhushan 		kvm_vcpu_kick(vcpu);
543f61c94bbSBharat Bhushan 	}
544f61c94bbSBharat Bhushan 
545f61c94bbSBharat Bhushan 	/*
546f61c94bbSBharat Bhushan 	 * If this is final watchdog expiry and some action is required
547f61c94bbSBharat Bhushan 	 * then exit to userspace.
548f61c94bbSBharat Bhushan 	 */
549f61c94bbSBharat Bhushan 	if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
550f61c94bbSBharat Bhushan 	    vcpu->arch.watchdog_enabled) {
551f61c94bbSBharat Bhushan 		smp_wmb();
552f61c94bbSBharat Bhushan 		kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
553f61c94bbSBharat Bhushan 		kvm_vcpu_kick(vcpu);
554f61c94bbSBharat Bhushan 	}
555f61c94bbSBharat Bhushan 
556f61c94bbSBharat Bhushan 	/*
557f61c94bbSBharat Bhushan 	 * Stop running the watchdog timer after final expiration to
558f61c94bbSBharat Bhushan 	 * prevent the host from being flooded with timers if the
559f61c94bbSBharat Bhushan 	 * guest sets a short period.
560f61c94bbSBharat Bhushan 	 * Timers will resume when TSR/TCR is updated next time.
561f61c94bbSBharat Bhushan 	 */
562f61c94bbSBharat Bhushan 	if (!final)
563f61c94bbSBharat Bhushan 		arm_next_watchdog(vcpu);
564f61c94bbSBharat Bhushan }
565f61c94bbSBharat Bhushan 
566dfd4d47eSScott Wood static void update_timer_ints(struct kvm_vcpu *vcpu)
567dfd4d47eSScott Wood {
568dfd4d47eSScott Wood 	if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
569dfd4d47eSScott Wood 		kvmppc_core_queue_dec(vcpu);
570dfd4d47eSScott Wood 	else
571dfd4d47eSScott Wood 		kvmppc_core_dequeue_dec(vcpu);
572f61c94bbSBharat Bhushan 
573f61c94bbSBharat Bhushan 	if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
574f61c94bbSBharat Bhushan 		kvmppc_core_queue_watchdog(vcpu);
575f61c94bbSBharat Bhushan 	else
576f61c94bbSBharat Bhushan 		kvmppc_core_dequeue_watchdog(vcpu);
577dfd4d47eSScott Wood }
578dfd4d47eSScott Wood 
579c59a6a3eSScott Wood static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
580d9fbd03dSHollis Blanchard {
581d9fbd03dSHollis Blanchard 	unsigned long *pending = &vcpu->arch.pending_exceptions;
582d9fbd03dSHollis Blanchard 	unsigned int priority;
583d9fbd03dSHollis Blanchard 
5849ab80843SHollis Blanchard 	priority = __ffs(*pending);
5858b3a00fcSAlexander Graf 	while (priority < BOOKE_IRQPRIO_MAX) {
586d4cf3892SHollis Blanchard 		if (kvmppc_booke_irqprio_deliver(vcpu, priority))
587d9fbd03dSHollis Blanchard 			break;
588d9fbd03dSHollis Blanchard 
589d9fbd03dSHollis Blanchard 		priority = find_next_bit(pending,
590d9fbd03dSHollis Blanchard 		                         BITS_PER_BYTE * sizeof(*pending),
591d9fbd03dSHollis Blanchard 		                         priority + 1);
592d9fbd03dSHollis Blanchard 	}
59390bba358SAlexander Graf 
59490bba358SAlexander Graf 	/* Tell the guest about our interrupt status */
59529ac26efSScott Wood 	vcpu->arch.shared->int_pending = !!*pending;
596d9fbd03dSHollis Blanchard }
597d9fbd03dSHollis Blanchard 
598c59a6a3eSScott Wood /* Check pending exceptions and deliver one, if possible. */
599a8e4ef84SAlexander Graf int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
600c59a6a3eSScott Wood {
601a8e4ef84SAlexander Graf 	int r = 0;
602c59a6a3eSScott Wood 	WARN_ON_ONCE(!irqs_disabled());
603c59a6a3eSScott Wood 
604c59a6a3eSScott Wood 	kvmppc_core_check_exceptions(vcpu);
605c59a6a3eSScott Wood 
606b8c649a9SAlexander Graf 	if (vcpu->requests) {
607b8c649a9SAlexander Graf 		/* Exception delivery raised request; start over */
608b8c649a9SAlexander Graf 		return 1;
609b8c649a9SAlexander Graf 	}
610b8c649a9SAlexander Graf 
611c59a6a3eSScott Wood 	if (vcpu->arch.shared->msr & MSR_WE) {
612c59a6a3eSScott Wood 		local_irq_enable();
613c59a6a3eSScott Wood 		kvm_vcpu_block(vcpu);
614966cd0f3SAlexander Graf 		clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
615c59a6a3eSScott Wood 		local_irq_disable();
616c59a6a3eSScott Wood 
617c59a6a3eSScott Wood 		kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
618a8e4ef84SAlexander Graf 		r = 1;
619c59a6a3eSScott Wood 	};
620a8e4ef84SAlexander Graf 
621a8e4ef84SAlexander Graf 	return r;
622a8e4ef84SAlexander Graf }
623a8e4ef84SAlexander Graf 
6247c973a2eSAlexander Graf int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
6254ffc6356SAlexander Graf {
6267c973a2eSAlexander Graf 	int r = 1; /* Indicate we want to get back into the guest */
6277c973a2eSAlexander Graf 
6284ffc6356SAlexander Graf 	if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
6294ffc6356SAlexander Graf 		update_timer_ints(vcpu);
630862d31f7SAlexander Graf #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
631862d31f7SAlexander Graf 	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
632862d31f7SAlexander Graf 		kvmppc_core_flush_tlb(vcpu);
633862d31f7SAlexander Graf #endif
6347c973a2eSAlexander Graf 
635f61c94bbSBharat Bhushan 	if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
636f61c94bbSBharat Bhushan 		vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
637f61c94bbSBharat Bhushan 		r = 0;
638f61c94bbSBharat Bhushan 	}
639f61c94bbSBharat Bhushan 
6401c810636SAlexander Graf 	if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
6411c810636SAlexander Graf 		vcpu->run->epr.epr = 0;
6421c810636SAlexander Graf 		vcpu->arch.epr_needed = true;
6431c810636SAlexander Graf 		vcpu->run->exit_reason = KVM_EXIT_EPR;
6441c810636SAlexander Graf 		r = 0;
6451c810636SAlexander Graf 	}
6461c810636SAlexander Graf 
6477c973a2eSAlexander Graf 	return r;
6484ffc6356SAlexander Graf }
6494ffc6356SAlexander Graf 
650df6909e5SPaul Mackerras int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
651df6909e5SPaul Mackerras {
6527ee78855SAlexander Graf 	int ret, s;
6538fae845fSScott Wood #ifdef CONFIG_PPC_FPU
6548fae845fSScott Wood 	unsigned int fpscr;
6558fae845fSScott Wood 	int fpexc_mode;
6568fae845fSScott Wood 	u64 fpr[32];
6578fae845fSScott Wood #endif
658df6909e5SPaul Mackerras 
659af8f38b3SAlexander Graf 	if (!vcpu->arch.sane) {
660af8f38b3SAlexander Graf 		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
661af8f38b3SAlexander Graf 		return -EINVAL;
662af8f38b3SAlexander Graf 	}
663af8f38b3SAlexander Graf 
664df6909e5SPaul Mackerras 	local_irq_disable();
6657ee78855SAlexander Graf 	s = kvmppc_prepare_to_enter(vcpu);
6667ee78855SAlexander Graf 	if (s <= 0) {
66724afa37bSAlexander Graf 		local_irq_enable();
6687ee78855SAlexander Graf 		ret = s;
6691d1ef222SScott Wood 		goto out;
6701d1ef222SScott Wood 	}
671bd2be683SAlexander Graf 	kvmppc_lazy_ee_enable();
6721d1ef222SScott Wood 
673df6909e5SPaul Mackerras 	kvm_guest_enter();
6748fae845fSScott Wood 
6758fae845fSScott Wood #ifdef CONFIG_PPC_FPU
6768fae845fSScott Wood 	/* Save userspace FPU state in stack */
6778fae845fSScott Wood 	enable_kernel_fp();
6788fae845fSScott Wood 	memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
6798fae845fSScott Wood 	fpscr = current->thread.fpscr.val;
6808fae845fSScott Wood 	fpexc_mode = current->thread.fpexc_mode;
6818fae845fSScott Wood 
6828fae845fSScott Wood 	/* Restore guest FPU state to thread */
6838fae845fSScott Wood 	memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
6848fae845fSScott Wood 	current->thread.fpscr.val = vcpu->arch.fpscr;
6858fae845fSScott Wood 
6868fae845fSScott Wood 	/*
6878fae845fSScott Wood 	 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
6888fae845fSScott Wood 	 * as always using the FPU.  Kernel usage of FP (via
6898fae845fSScott Wood 	 * enable_kernel_fp()) in this thread must not occur while
6908fae845fSScott Wood 	 * vcpu->fpu_active is set.
6918fae845fSScott Wood 	 */
6928fae845fSScott Wood 	vcpu->fpu_active = 1;
6938fae845fSScott Wood 
6948fae845fSScott Wood 	kvmppc_load_guest_fp(vcpu);
6958fae845fSScott Wood #endif
6968fae845fSScott Wood 
697df6909e5SPaul Mackerras 	ret = __kvmppc_vcpu_run(kvm_run, vcpu);
6988fae845fSScott Wood 
69924afa37bSAlexander Graf 	/* No need for kvm_guest_exit. It's done in handle_exit.
70024afa37bSAlexander Graf 	   We also get here with interrupts enabled. */
70124afa37bSAlexander Graf 
7028fae845fSScott Wood #ifdef CONFIG_PPC_FPU
7038fae845fSScott Wood 	kvmppc_save_guest_fp(vcpu);
7048fae845fSScott Wood 
7058fae845fSScott Wood 	vcpu->fpu_active = 0;
7068fae845fSScott Wood 
7078fae845fSScott Wood 	/* Save guest FPU state from thread */
7088fae845fSScott Wood 	memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
7098fae845fSScott Wood 	vcpu->arch.fpscr = current->thread.fpscr.val;
7108fae845fSScott Wood 
7118fae845fSScott Wood 	/* Restore userspace FPU state from stack */
7128fae845fSScott Wood 	memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
7138fae845fSScott Wood 	current->thread.fpscr.val = fpscr;
7148fae845fSScott Wood 	current->thread.fpexc_mode = fpexc_mode;
7158fae845fSScott Wood #endif
7168fae845fSScott Wood 
7171d1ef222SScott Wood out:
718d69c6436SAlexander Graf 	vcpu->mode = OUTSIDE_GUEST_MODE;
719df6909e5SPaul Mackerras 	return ret;
720df6909e5SPaul Mackerras }
721df6909e5SPaul Mackerras 
722d30f6e48SScott Wood static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
723d9fbd03dSHollis Blanchard {
724d9fbd03dSHollis Blanchard 	enum emulation_result er;
725d9fbd03dSHollis Blanchard 
726d9fbd03dSHollis Blanchard 	er = kvmppc_emulate_instruction(run, vcpu);
727d9fbd03dSHollis Blanchard 	switch (er) {
728d9fbd03dSHollis Blanchard 	case EMULATE_DONE:
72973e75b41SHollis Blanchard 		/* don't overwrite subtypes, just account kvm_stats */
7307b701591SHollis Blanchard 		kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
731d9fbd03dSHollis Blanchard 		/* Future optimization: only reload non-volatiles if
732d9fbd03dSHollis Blanchard 		 * they were actually modified by emulation. */
733d30f6e48SScott Wood 		return RESUME_GUEST_NV;
734d30f6e48SScott Wood 
735d9fbd03dSHollis Blanchard 	case EMULATE_DO_DCR:
736d9fbd03dSHollis Blanchard 		run->exit_reason = KVM_EXIT_DCR;
737d30f6e48SScott Wood 		return RESUME_HOST;
738d30f6e48SScott Wood 
739d9fbd03dSHollis Blanchard 	case EMULATE_FAIL:
7405cf8ca22SHollis Blanchard 		printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
741d9fbd03dSHollis Blanchard 		       __func__, vcpu->arch.pc, vcpu->arch.last_inst);
742d9fbd03dSHollis Blanchard 		/* For debugging, encode the failing instruction and
743d9fbd03dSHollis Blanchard 		 * report it to userspace. */
744d9fbd03dSHollis Blanchard 		run->hw.hardware_exit_reason = ~0ULL << 32;
745d9fbd03dSHollis Blanchard 		run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
746d1ff5499SAlexander Graf 		kvmppc_core_queue_program(vcpu, ESR_PIL);
747d30f6e48SScott Wood 		return RESUME_HOST;
748d30f6e48SScott Wood 
749d9fbd03dSHollis Blanchard 	default:
750d9fbd03dSHollis Blanchard 		BUG();
751d9fbd03dSHollis Blanchard 	}
752d30f6e48SScott Wood }
753d30f6e48SScott Wood 
7544e642ccbSAlexander Graf static void kvmppc_fill_pt_regs(struct pt_regs *regs)
7554e642ccbSAlexander Graf {
7564e642ccbSAlexander Graf 	ulong r1, ip, msr, lr;
7574e642ccbSAlexander Graf 
7584e642ccbSAlexander Graf 	asm("mr %0, 1" : "=r"(r1));
7594e642ccbSAlexander Graf 	asm("mflr %0" : "=r"(lr));
7604e642ccbSAlexander Graf 	asm("mfmsr %0" : "=r"(msr));
7614e642ccbSAlexander Graf 	asm("bl 1f; 1: mflr %0" : "=r"(ip));
7624e642ccbSAlexander Graf 
7634e642ccbSAlexander Graf 	memset(regs, 0, sizeof(*regs));
7644e642ccbSAlexander Graf 	regs->gpr[1] = r1;
7654e642ccbSAlexander Graf 	regs->nip = ip;
7664e642ccbSAlexander Graf 	regs->msr = msr;
7674e642ccbSAlexander Graf 	regs->link = lr;
7684e642ccbSAlexander Graf }
7694e642ccbSAlexander Graf 
7706328e593SBharat Bhushan /*
7716328e593SBharat Bhushan  * For interrupts needed to be handled by host interrupt handlers,
7726328e593SBharat Bhushan  * corresponding host handler are called from here in similar way
7736328e593SBharat Bhushan  * (but not exact) as they are called from low level handler
7746328e593SBharat Bhushan  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
7756328e593SBharat Bhushan  */
7764e642ccbSAlexander Graf static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
7774e642ccbSAlexander Graf 				     unsigned int exit_nr)
7784e642ccbSAlexander Graf {
7794e642ccbSAlexander Graf 	struct pt_regs regs;
7804e642ccbSAlexander Graf 
7814e642ccbSAlexander Graf 	switch (exit_nr) {
7824e642ccbSAlexander Graf 	case BOOKE_INTERRUPT_EXTERNAL:
7834e642ccbSAlexander Graf 		kvmppc_fill_pt_regs(&regs);
7844e642ccbSAlexander Graf 		do_IRQ(&regs);
7854e642ccbSAlexander Graf 		break;
7864e642ccbSAlexander Graf 	case BOOKE_INTERRUPT_DECREMENTER:
7874e642ccbSAlexander Graf 		kvmppc_fill_pt_regs(&regs);
7884e642ccbSAlexander Graf 		timer_interrupt(&regs);
7894e642ccbSAlexander Graf 		break;
7904e642ccbSAlexander Graf #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
7914e642ccbSAlexander Graf 	case BOOKE_INTERRUPT_DOORBELL:
7924e642ccbSAlexander Graf 		kvmppc_fill_pt_regs(&regs);
7934e642ccbSAlexander Graf 		doorbell_exception(&regs);
7944e642ccbSAlexander Graf 		break;
7954e642ccbSAlexander Graf #endif
7964e642ccbSAlexander Graf 	case BOOKE_INTERRUPT_MACHINE_CHECK:
7974e642ccbSAlexander Graf 		/* FIXME */
7984e642ccbSAlexander Graf 		break;
7997cc1e8eeSAlexander Graf 	case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
8007cc1e8eeSAlexander Graf 		kvmppc_fill_pt_regs(&regs);
8017cc1e8eeSAlexander Graf 		performance_monitor_exception(&regs);
8027cc1e8eeSAlexander Graf 		break;
8036328e593SBharat Bhushan 	case BOOKE_INTERRUPT_WATCHDOG:
8046328e593SBharat Bhushan 		kvmppc_fill_pt_regs(&regs);
8056328e593SBharat Bhushan #ifdef CONFIG_BOOKE_WDT
8066328e593SBharat Bhushan 		WatchdogException(&regs);
8076328e593SBharat Bhushan #else
8086328e593SBharat Bhushan 		unknown_exception(&regs);
8096328e593SBharat Bhushan #endif
8106328e593SBharat Bhushan 		break;
8116328e593SBharat Bhushan 	case BOOKE_INTERRUPT_CRITICAL:
8126328e593SBharat Bhushan 		unknown_exception(&regs);
8136328e593SBharat Bhushan 		break;
8144e642ccbSAlexander Graf 	}
8154e642ccbSAlexander Graf }
8164e642ccbSAlexander Graf 
817d30f6e48SScott Wood /**
818d30f6e48SScott Wood  * kvmppc_handle_exit
819d30f6e48SScott Wood  *
820d30f6e48SScott Wood  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
821d30f6e48SScott Wood  */
822d30f6e48SScott Wood int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
823d30f6e48SScott Wood                        unsigned int exit_nr)
824d30f6e48SScott Wood {
825d30f6e48SScott Wood 	int r = RESUME_HOST;
8267ee78855SAlexander Graf 	int s;
827d30f6e48SScott Wood 
828d30f6e48SScott Wood 	/* update before a new last_exit_type is rewritten */
829d30f6e48SScott Wood 	kvmppc_update_timing_stats(vcpu);
830d30f6e48SScott Wood 
8314e642ccbSAlexander Graf 	/* restart interrupts if they were meant for the host */
8324e642ccbSAlexander Graf 	kvmppc_restart_interrupt(vcpu, exit_nr);
833d30f6e48SScott Wood 
834d30f6e48SScott Wood 	local_irq_enable();
835d30f6e48SScott Wood 
83697c95059SAlexander Graf 	trace_kvm_exit(exit_nr, vcpu);
837706fb730SAlexander Graf 	kvm_guest_exit();
83897c95059SAlexander Graf 
839d30f6e48SScott Wood 	run->exit_reason = KVM_EXIT_UNKNOWN;
840d30f6e48SScott Wood 	run->ready_for_interrupt_injection = 1;
841d30f6e48SScott Wood 
842d30f6e48SScott Wood 	switch (exit_nr) {
843d30f6e48SScott Wood 	case BOOKE_INTERRUPT_MACHINE_CHECK:
844c35c9d84SAlexander Graf 		printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
845c35c9d84SAlexander Graf 		kvmppc_dump_vcpu(vcpu);
846c35c9d84SAlexander Graf 		/* For debugging, send invalid exit reason to user space */
847c35c9d84SAlexander Graf 		run->hw.hardware_exit_reason = ~1ULL << 32;
848c35c9d84SAlexander Graf 		run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
849c35c9d84SAlexander Graf 		r = RESUME_HOST;
850d30f6e48SScott Wood 		break;
851d30f6e48SScott Wood 
852d30f6e48SScott Wood 	case BOOKE_INTERRUPT_EXTERNAL:
853d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
854d30f6e48SScott Wood 		r = RESUME_GUEST;
855d30f6e48SScott Wood 		break;
856d30f6e48SScott Wood 
857d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DECREMENTER:
858d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, DEC_EXITS);
859d30f6e48SScott Wood 		r = RESUME_GUEST;
860d30f6e48SScott Wood 		break;
861d30f6e48SScott Wood 
8626328e593SBharat Bhushan 	case BOOKE_INTERRUPT_WATCHDOG:
8636328e593SBharat Bhushan 		r = RESUME_GUEST;
8646328e593SBharat Bhushan 		break;
8656328e593SBharat Bhushan 
866d30f6e48SScott Wood 	case BOOKE_INTERRUPT_DOORBELL:
867d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, DBELL_EXITS);
868d30f6e48SScott Wood 		r = RESUME_GUEST;
869d30f6e48SScott Wood 		break;
870d30f6e48SScott Wood 
871d30f6e48SScott Wood 	case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
872d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
873d30f6e48SScott Wood 
874d30f6e48SScott Wood 		/*
875d30f6e48SScott Wood 		 * We are here because there is a pending guest interrupt
876d30f6e48SScott Wood 		 * which could not be delivered as MSR_CE or MSR_ME was not
877d30f6e48SScott Wood 		 * set.  Once we break from here we will retry delivery.
878d30f6e48SScott Wood 		 */
879d30f6e48SScott Wood 		r = RESUME_GUEST;
880d30f6e48SScott Wood 		break;
881d30f6e48SScott Wood 
882d30f6e48SScott Wood 	case BOOKE_INTERRUPT_GUEST_DBELL:
883d30f6e48SScott Wood 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
884d30f6e48SScott Wood 
885d30f6e48SScott Wood 		/*
886d30f6e48SScott Wood 		 * We are here because there is a pending guest interrupt
887d30f6e48SScott Wood 		 * which could not be delivered as MSR_EE was not set.  Once
888d30f6e48SScott Wood 		 * we break from here we will retry delivery.
889d30f6e48SScott Wood 		 */
890d30f6e48SScott Wood 		r = RESUME_GUEST;
891d30f6e48SScott Wood 		break;
892d30f6e48SScott Wood 
89395f2e921SAlexander Graf 	case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
89495f2e921SAlexander Graf 		r = RESUME_GUEST;
89595f2e921SAlexander Graf 		break;
89695f2e921SAlexander Graf 
897d30f6e48SScott Wood 	case BOOKE_INTERRUPT_HV_PRIV:
898d30f6e48SScott Wood 		r = emulation_exit(run, vcpu);
899d30f6e48SScott Wood 		break;
900d30f6e48SScott Wood 
901d30f6e48SScott Wood 	case BOOKE_INTERRUPT_PROGRAM:
902d30f6e48SScott Wood 		if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
9030268597cSAlexander Graf 			/*
9040268597cSAlexander Graf 			 * Program traps generated by user-level software must
9050268597cSAlexander Graf 			 * be handled by the guest kernel.
9060268597cSAlexander Graf 			 *
9070268597cSAlexander Graf 			 * In GS mode, hypervisor privileged instructions trap
9080268597cSAlexander Graf 			 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
9090268597cSAlexander Graf 			 * actual program interrupts, handled by the guest.
9100268597cSAlexander Graf 			 */
911d30f6e48SScott Wood 			kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
912d30f6e48SScott Wood 			r = RESUME_GUEST;
913d30f6e48SScott Wood 			kvmppc_account_exit(vcpu, USR_PR_INST);
914d30f6e48SScott Wood 			break;
915d30f6e48SScott Wood 		}
916d30f6e48SScott Wood 
917d30f6e48SScott Wood 		r = emulation_exit(run, vcpu);
918d9fbd03dSHollis Blanchard 		break;
919d9fbd03dSHollis Blanchard 
920d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_FP_UNAVAIL:
921d4cf3892SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
9227b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, FP_UNAVAIL);
923d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
924d9fbd03dSHollis Blanchard 		break;
925d9fbd03dSHollis Blanchard 
9264cd35f67SScott Wood #ifdef CONFIG_SPE
9274cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_UNAVAIL: {
9284cd35f67SScott Wood 		if (vcpu->arch.shared->msr & MSR_SPE)
9294cd35f67SScott Wood 			kvmppc_vcpu_enable_spe(vcpu);
9304cd35f67SScott Wood 		else
9314cd35f67SScott Wood 			kvmppc_booke_queue_irqprio(vcpu,
9324cd35f67SScott Wood 						   BOOKE_IRQPRIO_SPE_UNAVAIL);
933bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
934bb3a8a17SHollis Blanchard 		break;
9354cd35f67SScott Wood 	}
936bb3a8a17SHollis Blanchard 
937bb3a8a17SHollis Blanchard 	case BOOKE_INTERRUPT_SPE_FP_DATA:
938bb3a8a17SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
939bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
940bb3a8a17SHollis Blanchard 		break;
941bb3a8a17SHollis Blanchard 
942bb3a8a17SHollis Blanchard 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
943bb3a8a17SHollis Blanchard 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
944bb3a8a17SHollis Blanchard 		r = RESUME_GUEST;
945bb3a8a17SHollis Blanchard 		break;
9464cd35f67SScott Wood #else
9474cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_UNAVAIL:
9484cd35f67SScott Wood 		/*
9494cd35f67SScott Wood 		 * Guest wants SPE, but host kernel doesn't support it.  Send
9504cd35f67SScott Wood 		 * an "unimplemented operation" program check to the guest.
9514cd35f67SScott Wood 		 */
9524cd35f67SScott Wood 		kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
9534cd35f67SScott Wood 		r = RESUME_GUEST;
9544cd35f67SScott Wood 		break;
9554cd35f67SScott Wood 
9564cd35f67SScott Wood 	/*
9574cd35f67SScott Wood 	 * These really should never happen without CONFIG_SPE,
9584cd35f67SScott Wood 	 * as we should never enable the real MSR[SPE] in the guest.
9594cd35f67SScott Wood 	 */
9604cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_FP_DATA:
9614cd35f67SScott Wood 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
9624cd35f67SScott Wood 		printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
9634cd35f67SScott Wood 		       __func__, exit_nr, vcpu->arch.pc);
9644cd35f67SScott Wood 		run->hw.hardware_exit_reason = exit_nr;
9654cd35f67SScott Wood 		r = RESUME_HOST;
9664cd35f67SScott Wood 		break;
9674cd35f67SScott Wood #endif
968bb3a8a17SHollis Blanchard 
969d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DATA_STORAGE:
970daf5e271SLiu Yu 		kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
971daf5e271SLiu Yu 		                               vcpu->arch.fault_esr);
9727b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, DSI_EXITS);
973d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
974d9fbd03dSHollis Blanchard 		break;
975d9fbd03dSHollis Blanchard 
976d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_INST_STORAGE:
977daf5e271SLiu Yu 		kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
9787b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, ISI_EXITS);
979d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
980d9fbd03dSHollis Blanchard 		break;
981d9fbd03dSHollis Blanchard 
982011da899SAlexander Graf 	case BOOKE_INTERRUPT_ALIGNMENT:
983011da899SAlexander Graf 		kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
984011da899SAlexander Graf 		                            vcpu->arch.fault_esr);
985011da899SAlexander Graf 		r = RESUME_GUEST;
986011da899SAlexander Graf 		break;
987011da899SAlexander Graf 
988d30f6e48SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
989d30f6e48SScott Wood 	case BOOKE_INTERRUPT_HV_SYSCALL:
990d30f6e48SScott Wood 		if (!(vcpu->arch.shared->msr & MSR_PR)) {
991d30f6e48SScott Wood 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
992d30f6e48SScott Wood 		} else {
993d30f6e48SScott Wood 			/*
994d30f6e48SScott Wood 			 * hcall from guest userspace -- send privileged
995d30f6e48SScott Wood 			 * instruction program check.
996d30f6e48SScott Wood 			 */
997d30f6e48SScott Wood 			kvmppc_core_queue_program(vcpu, ESR_PPR);
998d30f6e48SScott Wood 		}
999d30f6e48SScott Wood 
1000d30f6e48SScott Wood 		r = RESUME_GUEST;
1001d30f6e48SScott Wood 		break;
1002d30f6e48SScott Wood #else
1003d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_SYSCALL:
10042a342ed5SAlexander Graf 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
10052a342ed5SAlexander Graf 		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
10062a342ed5SAlexander Graf 			/* KVM PV hypercalls */
10072a342ed5SAlexander Graf 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
10082a342ed5SAlexander Graf 			r = RESUME_GUEST;
10092a342ed5SAlexander Graf 		} else {
10102a342ed5SAlexander Graf 			/* Guest syscalls */
1011d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
10122a342ed5SAlexander Graf 		}
10137b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1014d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
1015d9fbd03dSHollis Blanchard 		break;
1016d30f6e48SScott Wood #endif
1017d9fbd03dSHollis Blanchard 
1018d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DTLB_MISS: {
1019d9fbd03dSHollis Blanchard 		unsigned long eaddr = vcpu->arch.fault_dear;
10207924bd41SHollis Blanchard 		int gtlb_index;
1021475e7cddSHollis Blanchard 		gpa_t gpaddr;
1022d9fbd03dSHollis Blanchard 		gfn_t gfn;
1023d9fbd03dSHollis Blanchard 
1024bf7ca4bdSAlexander Graf #ifdef CONFIG_KVM_E500V2
1025a4cd8b23SScott Wood 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
1026a4cd8b23SScott Wood 		    (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1027a4cd8b23SScott Wood 			kvmppc_map_magic(vcpu);
1028a4cd8b23SScott Wood 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1029a4cd8b23SScott Wood 			r = RESUME_GUEST;
1030a4cd8b23SScott Wood 
1031a4cd8b23SScott Wood 			break;
1032a4cd8b23SScott Wood 		}
1033a4cd8b23SScott Wood #endif
1034a4cd8b23SScott Wood 
1035d9fbd03dSHollis Blanchard 		/* Check the guest TLB. */
1036fa86b8ddSHollis Blanchard 		gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
10377924bd41SHollis Blanchard 		if (gtlb_index < 0) {
1038d9fbd03dSHollis Blanchard 			/* The guest didn't have a mapping for it. */
1039daf5e271SLiu Yu 			kvmppc_core_queue_dtlb_miss(vcpu,
1040daf5e271SLiu Yu 			                            vcpu->arch.fault_dear,
1041daf5e271SLiu Yu 			                            vcpu->arch.fault_esr);
1042b52a638cSHollis Blanchard 			kvmppc_mmu_dtlb_miss(vcpu);
10437b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1044d9fbd03dSHollis Blanchard 			r = RESUME_GUEST;
1045d9fbd03dSHollis Blanchard 			break;
1046d9fbd03dSHollis Blanchard 		}
1047d9fbd03dSHollis Blanchard 
1048be8d1caeSHollis Blanchard 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1049475e7cddSHollis Blanchard 		gfn = gpaddr >> PAGE_SHIFT;
1050d9fbd03dSHollis Blanchard 
1051d9fbd03dSHollis Blanchard 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1052d9fbd03dSHollis Blanchard 			/* The guest TLB had a mapping, but the shadow TLB
1053d9fbd03dSHollis Blanchard 			 * didn't, and it is RAM. This could be because:
1054d9fbd03dSHollis Blanchard 			 * a) the entry is mapping the host kernel, or
1055d9fbd03dSHollis Blanchard 			 * b) the guest used a large mapping which we're faking
1056d9fbd03dSHollis Blanchard 			 * Either way, we need to satisfy the fault without
1057d9fbd03dSHollis Blanchard 			 * invoking the guest. */
105858a96214SHollis Blanchard 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
10597b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1060d9fbd03dSHollis Blanchard 			r = RESUME_GUEST;
1061d9fbd03dSHollis Blanchard 		} else {
1062d9fbd03dSHollis Blanchard 			/* Guest has mapped and accessed a page which is not
1063d9fbd03dSHollis Blanchard 			 * actually RAM. */
1064475e7cddSHollis Blanchard 			vcpu->arch.paddr_accessed = gpaddr;
10656020c0f6SAlexander Graf 			vcpu->arch.vaddr_accessed = eaddr;
1066d9fbd03dSHollis Blanchard 			r = kvmppc_emulate_mmio(run, vcpu);
10677b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, MMIO_EXITS);
1068d9fbd03dSHollis Blanchard 		}
1069d9fbd03dSHollis Blanchard 
1070d9fbd03dSHollis Blanchard 		break;
1071d9fbd03dSHollis Blanchard 	}
1072d9fbd03dSHollis Blanchard 
1073d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_ITLB_MISS: {
1074d9fbd03dSHollis Blanchard 		unsigned long eaddr = vcpu->arch.pc;
107589168618SHollis Blanchard 		gpa_t gpaddr;
1076d9fbd03dSHollis Blanchard 		gfn_t gfn;
10777924bd41SHollis Blanchard 		int gtlb_index;
1078d9fbd03dSHollis Blanchard 
1079d9fbd03dSHollis Blanchard 		r = RESUME_GUEST;
1080d9fbd03dSHollis Blanchard 
1081d9fbd03dSHollis Blanchard 		/* Check the guest TLB. */
1082fa86b8ddSHollis Blanchard 		gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
10837924bd41SHollis Blanchard 		if (gtlb_index < 0) {
1084d9fbd03dSHollis Blanchard 			/* The guest didn't have a mapping for it. */
1085d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1086b52a638cSHollis Blanchard 			kvmppc_mmu_itlb_miss(vcpu);
10877b701591SHollis Blanchard 			kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1088d9fbd03dSHollis Blanchard 			break;
1089d9fbd03dSHollis Blanchard 		}
1090d9fbd03dSHollis Blanchard 
10917b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1092d9fbd03dSHollis Blanchard 
1093be8d1caeSHollis Blanchard 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
109489168618SHollis Blanchard 		gfn = gpaddr >> PAGE_SHIFT;
1095d9fbd03dSHollis Blanchard 
1096d9fbd03dSHollis Blanchard 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1097d9fbd03dSHollis Blanchard 			/* The guest TLB had a mapping, but the shadow TLB
1098d9fbd03dSHollis Blanchard 			 * didn't. This could be because:
1099d9fbd03dSHollis Blanchard 			 * a) the entry is mapping the host kernel, or
1100d9fbd03dSHollis Blanchard 			 * b) the guest used a large mapping which we're faking
1101d9fbd03dSHollis Blanchard 			 * Either way, we need to satisfy the fault without
1102d9fbd03dSHollis Blanchard 			 * invoking the guest. */
110358a96214SHollis Blanchard 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1104d9fbd03dSHollis Blanchard 		} else {
1105d9fbd03dSHollis Blanchard 			/* Guest mapped and leaped at non-RAM! */
1106d4cf3892SHollis Blanchard 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1107d9fbd03dSHollis Blanchard 		}
1108d9fbd03dSHollis Blanchard 
1109d9fbd03dSHollis Blanchard 		break;
1110d9fbd03dSHollis Blanchard 	}
1111d9fbd03dSHollis Blanchard 
1112d9fbd03dSHollis Blanchard 	case BOOKE_INTERRUPT_DEBUG: {
1113d9fbd03dSHollis Blanchard 		u32 dbsr;
1114d9fbd03dSHollis Blanchard 
1115d9fbd03dSHollis Blanchard 		vcpu->arch.pc = mfspr(SPRN_CSRR0);
1116d9fbd03dSHollis Blanchard 
1117d9fbd03dSHollis Blanchard 		/* clear IAC events in DBSR register */
1118d9fbd03dSHollis Blanchard 		dbsr = mfspr(SPRN_DBSR);
1119d9fbd03dSHollis Blanchard 		dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
1120d9fbd03dSHollis Blanchard 		mtspr(SPRN_DBSR, dbsr);
1121d9fbd03dSHollis Blanchard 
1122d9fbd03dSHollis Blanchard 		run->exit_reason = KVM_EXIT_DEBUG;
11237b701591SHollis Blanchard 		kvmppc_account_exit(vcpu, DEBUG_EXITS);
1124d9fbd03dSHollis Blanchard 		r = RESUME_HOST;
1125d9fbd03dSHollis Blanchard 		break;
1126d9fbd03dSHollis Blanchard 	}
1127d9fbd03dSHollis Blanchard 
1128d9fbd03dSHollis Blanchard 	default:
1129d9fbd03dSHollis Blanchard 		printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1130d9fbd03dSHollis Blanchard 		BUG();
1131d9fbd03dSHollis Blanchard 	}
1132d9fbd03dSHollis Blanchard 
1133a8e4ef84SAlexander Graf 	/*
1134a8e4ef84SAlexander Graf 	 * To avoid clobbering exit_reason, only check for signals if we
1135a8e4ef84SAlexander Graf 	 * aren't already exiting to userspace for some other reason.
1136a8e4ef84SAlexander Graf 	 */
113703660ba2SAlexander Graf 	if (!(r & RESUME_HOST)) {
1138d9fbd03dSHollis Blanchard 		local_irq_disable();
11397ee78855SAlexander Graf 		s = kvmppc_prepare_to_enter(vcpu);
11407ee78855SAlexander Graf 		if (s <= 0) {
114124afa37bSAlexander Graf 			local_irq_enable();
11427ee78855SAlexander Graf 			r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
114324afa37bSAlexander Graf 		} else {
1144bd2be683SAlexander Graf 			kvmppc_lazy_ee_enable();
114524afa37bSAlexander Graf 		}
114624afa37bSAlexander Graf 	}
1147706fb730SAlexander Graf 
1148d9fbd03dSHollis Blanchard 	return r;
1149d9fbd03dSHollis Blanchard }
1150d9fbd03dSHollis Blanchard 
1151d26f22c9SBharat Bhushan static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1152d26f22c9SBharat Bhushan {
1153d26f22c9SBharat Bhushan 	u32 old_tsr = vcpu->arch.tsr;
1154d26f22c9SBharat Bhushan 
1155d26f22c9SBharat Bhushan 	vcpu->arch.tsr = new_tsr;
1156d26f22c9SBharat Bhushan 
1157d26f22c9SBharat Bhushan 	if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1158d26f22c9SBharat Bhushan 		arm_next_watchdog(vcpu);
1159d26f22c9SBharat Bhushan 
1160d26f22c9SBharat Bhushan 	update_timer_ints(vcpu);
1161d26f22c9SBharat Bhushan }
1162d26f22c9SBharat Bhushan 
1163d9fbd03dSHollis Blanchard /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1164d9fbd03dSHollis Blanchard int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1165d9fbd03dSHollis Blanchard {
1166082decf2SHollis Blanchard 	int i;
1167af8f38b3SAlexander Graf 	int r;
1168082decf2SHollis Blanchard 
1169d9fbd03dSHollis Blanchard 	vcpu->arch.pc = 0;
1170b5904972SScott Wood 	vcpu->arch.shared->pir = vcpu->vcpu_id;
11718e5b26b5SAlexander Graf 	kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1172d30f6e48SScott Wood 	kvmppc_set_msr(vcpu, 0);
1173d9fbd03dSHollis Blanchard 
1174d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
1175d30f6e48SScott Wood 	vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
1176d9fbd03dSHollis Blanchard 	vcpu->arch.shadow_pid = 1;
1177d30f6e48SScott Wood 	vcpu->arch.shared->msr = 0;
1178d30f6e48SScott Wood #endif
1179d9fbd03dSHollis Blanchard 
1180082decf2SHollis Blanchard 	/* Eye-catching numbers so we know if the guest takes an interrupt
1181082decf2SHollis Blanchard 	 * before it's programmed its own IVPR/IVORs. */
1182d9fbd03dSHollis Blanchard 	vcpu->arch.ivpr = 0x55550000;
1183082decf2SHollis Blanchard 	for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1184082decf2SHollis Blanchard 		vcpu->arch.ivor[i] = 0x7700 | i * 4;
1185d9fbd03dSHollis Blanchard 
118673e75b41SHollis Blanchard 	kvmppc_init_timing_stats(vcpu);
118773e75b41SHollis Blanchard 
1188af8f38b3SAlexander Graf 	r = kvmppc_core_vcpu_setup(vcpu);
1189af8f38b3SAlexander Graf 	kvmppc_sanity_check(vcpu);
1190af8f38b3SAlexander Graf 	return r;
1191d9fbd03dSHollis Blanchard }
1192d9fbd03dSHollis Blanchard 
1193f61c94bbSBharat Bhushan int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1194f61c94bbSBharat Bhushan {
1195f61c94bbSBharat Bhushan 	/* setup watchdog timer once */
1196f61c94bbSBharat Bhushan 	spin_lock_init(&vcpu->arch.wdt_lock);
1197f61c94bbSBharat Bhushan 	setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1198f61c94bbSBharat Bhushan 		    (unsigned long)vcpu);
1199f61c94bbSBharat Bhushan 
1200f61c94bbSBharat Bhushan 	return 0;
1201f61c94bbSBharat Bhushan }
1202f61c94bbSBharat Bhushan 
1203f61c94bbSBharat Bhushan void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1204f61c94bbSBharat Bhushan {
1205f61c94bbSBharat Bhushan 	del_timer_sync(&vcpu->arch.wdt_timer);
1206f61c94bbSBharat Bhushan }
1207f61c94bbSBharat Bhushan 
1208d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1209d9fbd03dSHollis Blanchard {
1210d9fbd03dSHollis Blanchard 	int i;
1211d9fbd03dSHollis Blanchard 
1212d9fbd03dSHollis Blanchard 	regs->pc = vcpu->arch.pc;
1213992b5b29SAlexander Graf 	regs->cr = kvmppc_get_cr(vcpu);
1214d9fbd03dSHollis Blanchard 	regs->ctr = vcpu->arch.ctr;
1215d9fbd03dSHollis Blanchard 	regs->lr = vcpu->arch.lr;
1216992b5b29SAlexander Graf 	regs->xer = kvmppc_get_xer(vcpu);
1217666e7252SAlexander Graf 	regs->msr = vcpu->arch.shared->msr;
1218de7906c3SAlexander Graf 	regs->srr0 = vcpu->arch.shared->srr0;
1219de7906c3SAlexander Graf 	regs->srr1 = vcpu->arch.shared->srr1;
1220d9fbd03dSHollis Blanchard 	regs->pid = vcpu->arch.pid;
1221a73a9599SAlexander Graf 	regs->sprg0 = vcpu->arch.shared->sprg0;
1222a73a9599SAlexander Graf 	regs->sprg1 = vcpu->arch.shared->sprg1;
1223a73a9599SAlexander Graf 	regs->sprg2 = vcpu->arch.shared->sprg2;
1224a73a9599SAlexander Graf 	regs->sprg3 = vcpu->arch.shared->sprg3;
1225b5904972SScott Wood 	regs->sprg4 = vcpu->arch.shared->sprg4;
1226b5904972SScott Wood 	regs->sprg5 = vcpu->arch.shared->sprg5;
1227b5904972SScott Wood 	regs->sprg6 = vcpu->arch.shared->sprg6;
1228b5904972SScott Wood 	regs->sprg7 = vcpu->arch.shared->sprg7;
1229d9fbd03dSHollis Blanchard 
1230d9fbd03dSHollis Blanchard 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
12318e5b26b5SAlexander Graf 		regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1232d9fbd03dSHollis Blanchard 
1233d9fbd03dSHollis Blanchard 	return 0;
1234d9fbd03dSHollis Blanchard }
1235d9fbd03dSHollis Blanchard 
1236d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1237d9fbd03dSHollis Blanchard {
1238d9fbd03dSHollis Blanchard 	int i;
1239d9fbd03dSHollis Blanchard 
1240d9fbd03dSHollis Blanchard 	vcpu->arch.pc = regs->pc;
1241992b5b29SAlexander Graf 	kvmppc_set_cr(vcpu, regs->cr);
1242d9fbd03dSHollis Blanchard 	vcpu->arch.ctr = regs->ctr;
1243d9fbd03dSHollis Blanchard 	vcpu->arch.lr = regs->lr;
1244992b5b29SAlexander Graf 	kvmppc_set_xer(vcpu, regs->xer);
1245b8fd68acSHollis Blanchard 	kvmppc_set_msr(vcpu, regs->msr);
1246de7906c3SAlexander Graf 	vcpu->arch.shared->srr0 = regs->srr0;
1247de7906c3SAlexander Graf 	vcpu->arch.shared->srr1 = regs->srr1;
12485ce941eeSScott Wood 	kvmppc_set_pid(vcpu, regs->pid);
1249a73a9599SAlexander Graf 	vcpu->arch.shared->sprg0 = regs->sprg0;
1250a73a9599SAlexander Graf 	vcpu->arch.shared->sprg1 = regs->sprg1;
1251a73a9599SAlexander Graf 	vcpu->arch.shared->sprg2 = regs->sprg2;
1252a73a9599SAlexander Graf 	vcpu->arch.shared->sprg3 = regs->sprg3;
1253b5904972SScott Wood 	vcpu->arch.shared->sprg4 = regs->sprg4;
1254b5904972SScott Wood 	vcpu->arch.shared->sprg5 = regs->sprg5;
1255b5904972SScott Wood 	vcpu->arch.shared->sprg6 = regs->sprg6;
1256b5904972SScott Wood 	vcpu->arch.shared->sprg7 = regs->sprg7;
1257d9fbd03dSHollis Blanchard 
12588e5b26b5SAlexander Graf 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
12598e5b26b5SAlexander Graf 		kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1260d9fbd03dSHollis Blanchard 
1261d9fbd03dSHollis Blanchard 	return 0;
1262d9fbd03dSHollis Blanchard }
1263d9fbd03dSHollis Blanchard 
12645ce941eeSScott Wood static void get_sregs_base(struct kvm_vcpu *vcpu,
12655ce941eeSScott Wood                            struct kvm_sregs *sregs)
12665ce941eeSScott Wood {
12675ce941eeSScott Wood 	u64 tb = get_tb();
12685ce941eeSScott Wood 
12695ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_BASE;
12705ce941eeSScott Wood 
12715ce941eeSScott Wood 	sregs->u.e.csrr0 = vcpu->arch.csrr0;
12725ce941eeSScott Wood 	sregs->u.e.csrr1 = vcpu->arch.csrr1;
12735ce941eeSScott Wood 	sregs->u.e.mcsr = vcpu->arch.mcsr;
1274d30f6e48SScott Wood 	sregs->u.e.esr = get_guest_esr(vcpu);
1275d30f6e48SScott Wood 	sregs->u.e.dear = get_guest_dear(vcpu);
12765ce941eeSScott Wood 	sregs->u.e.tsr = vcpu->arch.tsr;
12775ce941eeSScott Wood 	sregs->u.e.tcr = vcpu->arch.tcr;
12785ce941eeSScott Wood 	sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
12795ce941eeSScott Wood 	sregs->u.e.tb = tb;
12805ce941eeSScott Wood 	sregs->u.e.vrsave = vcpu->arch.vrsave;
12815ce941eeSScott Wood }
12825ce941eeSScott Wood 
12835ce941eeSScott Wood static int set_sregs_base(struct kvm_vcpu *vcpu,
12845ce941eeSScott Wood                           struct kvm_sregs *sregs)
12855ce941eeSScott Wood {
12865ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
12875ce941eeSScott Wood 		return 0;
12885ce941eeSScott Wood 
12895ce941eeSScott Wood 	vcpu->arch.csrr0 = sregs->u.e.csrr0;
12905ce941eeSScott Wood 	vcpu->arch.csrr1 = sregs->u.e.csrr1;
12915ce941eeSScott Wood 	vcpu->arch.mcsr = sregs->u.e.mcsr;
1292d30f6e48SScott Wood 	set_guest_esr(vcpu, sregs->u.e.esr);
1293d30f6e48SScott Wood 	set_guest_dear(vcpu, sregs->u.e.dear);
12945ce941eeSScott Wood 	vcpu->arch.vrsave = sregs->u.e.vrsave;
1295dfd4d47eSScott Wood 	kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
12965ce941eeSScott Wood 
1297dfd4d47eSScott Wood 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
12985ce941eeSScott Wood 		vcpu->arch.dec = sregs->u.e.dec;
12995ce941eeSScott Wood 		kvmppc_emulate_dec(vcpu);
1300dfd4d47eSScott Wood 	}
13015ce941eeSScott Wood 
1302d26f22c9SBharat Bhushan 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1303d26f22c9SBharat Bhushan 		kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
13045ce941eeSScott Wood 
13055ce941eeSScott Wood 	return 0;
13065ce941eeSScott Wood }
13075ce941eeSScott Wood 
13085ce941eeSScott Wood static void get_sregs_arch206(struct kvm_vcpu *vcpu,
13095ce941eeSScott Wood                               struct kvm_sregs *sregs)
13105ce941eeSScott Wood {
13115ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_ARCH206;
13125ce941eeSScott Wood 
1313841741f2SScott Wood 	sregs->u.e.pir = vcpu->vcpu_id;
13145ce941eeSScott Wood 	sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
13155ce941eeSScott Wood 	sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
13165ce941eeSScott Wood 	sregs->u.e.decar = vcpu->arch.decar;
13175ce941eeSScott Wood 	sregs->u.e.ivpr = vcpu->arch.ivpr;
13185ce941eeSScott Wood }
13195ce941eeSScott Wood 
13205ce941eeSScott Wood static int set_sregs_arch206(struct kvm_vcpu *vcpu,
13215ce941eeSScott Wood                              struct kvm_sregs *sregs)
13225ce941eeSScott Wood {
13235ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
13245ce941eeSScott Wood 		return 0;
13255ce941eeSScott Wood 
1326841741f2SScott Wood 	if (sregs->u.e.pir != vcpu->vcpu_id)
13275ce941eeSScott Wood 		return -EINVAL;
13285ce941eeSScott Wood 
13295ce941eeSScott Wood 	vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
13305ce941eeSScott Wood 	vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
13315ce941eeSScott Wood 	vcpu->arch.decar = sregs->u.e.decar;
13325ce941eeSScott Wood 	vcpu->arch.ivpr = sregs->u.e.ivpr;
13335ce941eeSScott Wood 
13345ce941eeSScott Wood 	return 0;
13355ce941eeSScott Wood }
13365ce941eeSScott Wood 
13375ce941eeSScott Wood void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
13385ce941eeSScott Wood {
13395ce941eeSScott Wood 	sregs->u.e.features |= KVM_SREGS_E_IVOR;
13405ce941eeSScott Wood 
13415ce941eeSScott Wood 	sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
13425ce941eeSScott Wood 	sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
13435ce941eeSScott Wood 	sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
13445ce941eeSScott Wood 	sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
13455ce941eeSScott Wood 	sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
13465ce941eeSScott Wood 	sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
13475ce941eeSScott Wood 	sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
13485ce941eeSScott Wood 	sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
13495ce941eeSScott Wood 	sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
13505ce941eeSScott Wood 	sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
13515ce941eeSScott Wood 	sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
13525ce941eeSScott Wood 	sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
13535ce941eeSScott Wood 	sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
13545ce941eeSScott Wood 	sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
13555ce941eeSScott Wood 	sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
13565ce941eeSScott Wood 	sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
13575ce941eeSScott Wood }
13585ce941eeSScott Wood 
13595ce941eeSScott Wood int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
13605ce941eeSScott Wood {
13615ce941eeSScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
13625ce941eeSScott Wood 		return 0;
13635ce941eeSScott Wood 
13645ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
13655ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
13665ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
13675ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
13685ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
13695ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
13705ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
13715ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
13725ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
13735ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
13745ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
13755ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
13765ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
13775ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
13785ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
13795ce941eeSScott Wood 	vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
13805ce941eeSScott Wood 
13815ce941eeSScott Wood 	return 0;
13825ce941eeSScott Wood }
13835ce941eeSScott Wood 
1384d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1385d9fbd03dSHollis Blanchard                                   struct kvm_sregs *sregs)
1386d9fbd03dSHollis Blanchard {
13875ce941eeSScott Wood 	sregs->pvr = vcpu->arch.pvr;
13885ce941eeSScott Wood 
13895ce941eeSScott Wood 	get_sregs_base(vcpu, sregs);
13905ce941eeSScott Wood 	get_sregs_arch206(vcpu, sregs);
13915ce941eeSScott Wood 	kvmppc_core_get_sregs(vcpu, sregs);
13925ce941eeSScott Wood 	return 0;
1393d9fbd03dSHollis Blanchard }
1394d9fbd03dSHollis Blanchard 
1395d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1396d9fbd03dSHollis Blanchard                                   struct kvm_sregs *sregs)
1397d9fbd03dSHollis Blanchard {
13985ce941eeSScott Wood 	int ret;
13995ce941eeSScott Wood 
14005ce941eeSScott Wood 	if (vcpu->arch.pvr != sregs->pvr)
14015ce941eeSScott Wood 		return -EINVAL;
14025ce941eeSScott Wood 
14035ce941eeSScott Wood 	ret = set_sregs_base(vcpu, sregs);
14045ce941eeSScott Wood 	if (ret < 0)
14055ce941eeSScott Wood 		return ret;
14065ce941eeSScott Wood 
14075ce941eeSScott Wood 	ret = set_sregs_arch206(vcpu, sregs);
14085ce941eeSScott Wood 	if (ret < 0)
14095ce941eeSScott Wood 		return ret;
14105ce941eeSScott Wood 
14115ce941eeSScott Wood 	return kvmppc_core_set_sregs(vcpu, sregs);
1412d9fbd03dSHollis Blanchard }
1413d9fbd03dSHollis Blanchard 
141431f3438eSPaul Mackerras int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
141531f3438eSPaul Mackerras {
14166df8d3fcSBharat Bhushan 	int r = -EINVAL;
14176df8d3fcSBharat Bhushan 
14186df8d3fcSBharat Bhushan 	switch (reg->id) {
14196df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC1:
14206df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC2:
14216df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC3:
14226df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC4: {
14236df8d3fcSBharat Bhushan 		int iac = reg->id - KVM_REG_PPC_IAC1;
14246df8d3fcSBharat Bhushan 		r = copy_to_user((u64 __user *)(long)reg->addr,
14256df8d3fcSBharat Bhushan 				 &vcpu->arch.dbg_reg.iac[iac], sizeof(u64));
14266df8d3fcSBharat Bhushan 		break;
14276df8d3fcSBharat Bhushan 	}
14286df8d3fcSBharat Bhushan 	case KVM_REG_PPC_DAC1:
14296df8d3fcSBharat Bhushan 	case KVM_REG_PPC_DAC2: {
14306df8d3fcSBharat Bhushan 		int dac = reg->id - KVM_REG_PPC_DAC1;
14316df8d3fcSBharat Bhushan 		r = copy_to_user((u64 __user *)(long)reg->addr,
14326df8d3fcSBharat Bhushan 				 &vcpu->arch.dbg_reg.dac[dac], sizeof(u64));
14336df8d3fcSBharat Bhushan 		break;
14346df8d3fcSBharat Bhushan 	}
1435324b3e63SAlexander Graf 	case KVM_REG_PPC_EPR: {
1436324b3e63SAlexander Graf 		u32 epr = get_guest_epr(vcpu);
1437324b3e63SAlexander Graf 		r = put_user(epr, (u32 __user *)(long)reg->addr);
1438324b3e63SAlexander Graf 		break;
1439324b3e63SAlexander Graf 	}
1440352df1deSMihai Caraman #if defined(CONFIG_64BIT)
1441352df1deSMihai Caraman 	case KVM_REG_PPC_EPCR:
1442352df1deSMihai Caraman 		r = put_user(vcpu->arch.epcr, (u32 __user *)(long)reg->addr);
1443352df1deSMihai Caraman 		break;
1444352df1deSMihai Caraman #endif
1445*78accda4SBharat Bhushan 	case KVM_REG_PPC_TCR:
1446*78accda4SBharat Bhushan 		r = put_user(vcpu->arch.tcr, (u32 __user *)(long)reg->addr);
1447*78accda4SBharat Bhushan 		break;
1448*78accda4SBharat Bhushan 	case KVM_REG_PPC_TSR:
1449*78accda4SBharat Bhushan 		r = put_user(vcpu->arch.tsr, (u32 __user *)(long)reg->addr);
1450*78accda4SBharat Bhushan 		break;
14516df8d3fcSBharat Bhushan 	default:
14526df8d3fcSBharat Bhushan 		break;
14536df8d3fcSBharat Bhushan 	}
14546df8d3fcSBharat Bhushan 	return r;
145531f3438eSPaul Mackerras }
145631f3438eSPaul Mackerras 
145731f3438eSPaul Mackerras int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
145831f3438eSPaul Mackerras {
14596df8d3fcSBharat Bhushan 	int r = -EINVAL;
14606df8d3fcSBharat Bhushan 
14616df8d3fcSBharat Bhushan 	switch (reg->id) {
14626df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC1:
14636df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC2:
14646df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC3:
14656df8d3fcSBharat Bhushan 	case KVM_REG_PPC_IAC4: {
14666df8d3fcSBharat Bhushan 		int iac = reg->id - KVM_REG_PPC_IAC1;
14676df8d3fcSBharat Bhushan 		r = copy_from_user(&vcpu->arch.dbg_reg.iac[iac],
14686df8d3fcSBharat Bhushan 			     (u64 __user *)(long)reg->addr, sizeof(u64));
14696df8d3fcSBharat Bhushan 		break;
14706df8d3fcSBharat Bhushan 	}
14716df8d3fcSBharat Bhushan 	case KVM_REG_PPC_DAC1:
14726df8d3fcSBharat Bhushan 	case KVM_REG_PPC_DAC2: {
14736df8d3fcSBharat Bhushan 		int dac = reg->id - KVM_REG_PPC_DAC1;
14746df8d3fcSBharat Bhushan 		r = copy_from_user(&vcpu->arch.dbg_reg.dac[dac],
14756df8d3fcSBharat Bhushan 			     (u64 __user *)(long)reg->addr, sizeof(u64));
14766df8d3fcSBharat Bhushan 		break;
14776df8d3fcSBharat Bhushan 	}
1478324b3e63SAlexander Graf 	case KVM_REG_PPC_EPR: {
1479324b3e63SAlexander Graf 		u32 new_epr;
1480324b3e63SAlexander Graf 		r = get_user(new_epr, (u32 __user *)(long)reg->addr);
1481324b3e63SAlexander Graf 		if (!r)
1482324b3e63SAlexander Graf 			kvmppc_set_epr(vcpu, new_epr);
1483324b3e63SAlexander Graf 		break;
1484324b3e63SAlexander Graf 	}
1485352df1deSMihai Caraman #if defined(CONFIG_64BIT)
1486352df1deSMihai Caraman 	case KVM_REG_PPC_EPCR: {
1487352df1deSMihai Caraman 		u32 new_epcr;
1488352df1deSMihai Caraman 		r = get_user(new_epcr, (u32 __user *)(long)reg->addr);
1489352df1deSMihai Caraman 		if (r == 0)
1490352df1deSMihai Caraman 			kvmppc_set_epcr(vcpu, new_epcr);
1491352df1deSMihai Caraman 		break;
1492352df1deSMihai Caraman 	}
1493352df1deSMihai Caraman #endif
1494*78accda4SBharat Bhushan 	case KVM_REG_PPC_OR_TSR: {
1495*78accda4SBharat Bhushan 		u32 tsr_bits;
1496*78accda4SBharat Bhushan 		r = get_user(tsr_bits, (u32 __user *)(long)reg->addr);
1497*78accda4SBharat Bhushan 		kvmppc_set_tsr_bits(vcpu, tsr_bits);
1498*78accda4SBharat Bhushan 		break;
1499*78accda4SBharat Bhushan 	}
1500*78accda4SBharat Bhushan 	case KVM_REG_PPC_CLEAR_TSR: {
1501*78accda4SBharat Bhushan 		u32 tsr_bits;
1502*78accda4SBharat Bhushan 		r = get_user(tsr_bits, (u32 __user *)(long)reg->addr);
1503*78accda4SBharat Bhushan 		kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1504*78accda4SBharat Bhushan 		break;
1505*78accda4SBharat Bhushan 	}
1506*78accda4SBharat Bhushan 	case KVM_REG_PPC_TSR: {
1507*78accda4SBharat Bhushan 		u32 tsr;
1508*78accda4SBharat Bhushan 		r = get_user(tsr, (u32 __user *)(long)reg->addr);
1509*78accda4SBharat Bhushan 		kvmppc_set_tsr(vcpu, tsr);
1510*78accda4SBharat Bhushan 		break;
1511*78accda4SBharat Bhushan 	}
1512*78accda4SBharat Bhushan 	case KVM_REG_PPC_TCR: {
1513*78accda4SBharat Bhushan 		u32 tcr;
1514*78accda4SBharat Bhushan 		r = get_user(tcr, (u32 __user *)(long)reg->addr);
1515*78accda4SBharat Bhushan 		kvmppc_set_tcr(vcpu, tcr);
1516*78accda4SBharat Bhushan 		break;
1517*78accda4SBharat Bhushan 	}
15186df8d3fcSBharat Bhushan 	default:
15196df8d3fcSBharat Bhushan 		break;
15206df8d3fcSBharat Bhushan 	}
15216df8d3fcSBharat Bhushan 	return r;
152231f3438eSPaul Mackerras }
152331f3438eSPaul Mackerras 
1524d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1525d9fbd03dSHollis Blanchard {
1526d9fbd03dSHollis Blanchard 	return -ENOTSUPP;
1527d9fbd03dSHollis Blanchard }
1528d9fbd03dSHollis Blanchard 
1529d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1530d9fbd03dSHollis Blanchard {
1531d9fbd03dSHollis Blanchard 	return -ENOTSUPP;
1532d9fbd03dSHollis Blanchard }
1533d9fbd03dSHollis Blanchard 
1534d9fbd03dSHollis Blanchard int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1535d9fbd03dSHollis Blanchard                                   struct kvm_translation *tr)
1536d9fbd03dSHollis Blanchard {
153798001d8dSAvi Kivity 	int r;
153898001d8dSAvi Kivity 
153998001d8dSAvi Kivity 	r = kvmppc_core_vcpu_translate(vcpu, tr);
154098001d8dSAvi Kivity 	return r;
1541d9fbd03dSHollis Blanchard }
1542d9fbd03dSHollis Blanchard 
15434e755758SAlexander Graf int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
15444e755758SAlexander Graf {
15454e755758SAlexander Graf 	return -ENOTSUPP;
15464e755758SAlexander Graf }
15474e755758SAlexander Graf 
1548a66b48c3SPaul Mackerras void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
1549a66b48c3SPaul Mackerras 			      struct kvm_memory_slot *dont)
1550a66b48c3SPaul Mackerras {
1551a66b48c3SPaul Mackerras }
1552a66b48c3SPaul Mackerras 
1553a66b48c3SPaul Mackerras int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
1554a66b48c3SPaul Mackerras 			       unsigned long npages)
1555a66b48c3SPaul Mackerras {
1556a66b48c3SPaul Mackerras 	return 0;
1557a66b48c3SPaul Mackerras }
1558a66b48c3SPaul Mackerras 
1559f9e0554dSPaul Mackerras int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1560a66b48c3SPaul Mackerras 				      struct kvm_memory_slot *memslot,
1561f9e0554dSPaul Mackerras 				      struct kvm_userspace_memory_region *mem)
1562f9e0554dSPaul Mackerras {
1563f9e0554dSPaul Mackerras 	return 0;
1564f9e0554dSPaul Mackerras }
1565f9e0554dSPaul Mackerras 
1566f9e0554dSPaul Mackerras void kvmppc_core_commit_memory_region(struct kvm *kvm,
1567dfe49dbdSPaul Mackerras 				struct kvm_userspace_memory_region *mem,
15688482644aSTakuya Yoshikawa 				const struct kvm_memory_slot *old)
1569dfe49dbdSPaul Mackerras {
1570dfe49dbdSPaul Mackerras }
1571dfe49dbdSPaul Mackerras 
1572dfe49dbdSPaul Mackerras void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1573f9e0554dSPaul Mackerras {
1574f9e0554dSPaul Mackerras }
1575f9e0554dSPaul Mackerras 
157638f98824SMihai Caraman void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
157738f98824SMihai Caraman {
157838f98824SMihai Caraman #if defined(CONFIG_64BIT)
157938f98824SMihai Caraman 	vcpu->arch.epcr = new_epcr;
158038f98824SMihai Caraman #ifdef CONFIG_KVM_BOOKE_HV
158138f98824SMihai Caraman 	vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
158238f98824SMihai Caraman 	if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
158338f98824SMihai Caraman 		vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
158438f98824SMihai Caraman #endif
158538f98824SMihai Caraman #endif
158638f98824SMihai Caraman }
158738f98824SMihai Caraman 
1588dfd4d47eSScott Wood void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1589dfd4d47eSScott Wood {
1590dfd4d47eSScott Wood 	vcpu->arch.tcr = new_tcr;
1591f61c94bbSBharat Bhushan 	arm_next_watchdog(vcpu);
1592dfd4d47eSScott Wood 	update_timer_ints(vcpu);
1593dfd4d47eSScott Wood }
1594dfd4d47eSScott Wood 
1595dfd4d47eSScott Wood void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1596dfd4d47eSScott Wood {
1597dfd4d47eSScott Wood 	set_bits(tsr_bits, &vcpu->arch.tsr);
1598dfd4d47eSScott Wood 	smp_wmb();
1599dfd4d47eSScott Wood 	kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1600dfd4d47eSScott Wood 	kvm_vcpu_kick(vcpu);
1601dfd4d47eSScott Wood }
1602dfd4d47eSScott Wood 
1603dfd4d47eSScott Wood void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1604dfd4d47eSScott Wood {
1605dfd4d47eSScott Wood 	clear_bits(tsr_bits, &vcpu->arch.tsr);
1606f61c94bbSBharat Bhushan 
1607f61c94bbSBharat Bhushan 	/*
1608f61c94bbSBharat Bhushan 	 * We may have stopped the watchdog due to
1609f61c94bbSBharat Bhushan 	 * being stuck on final expiration.
1610f61c94bbSBharat Bhushan 	 */
1611f61c94bbSBharat Bhushan 	if (tsr_bits & (TSR_ENW | TSR_WIS))
1612f61c94bbSBharat Bhushan 		arm_next_watchdog(vcpu);
1613f61c94bbSBharat Bhushan 
1614dfd4d47eSScott Wood 	update_timer_ints(vcpu);
1615dfd4d47eSScott Wood }
1616dfd4d47eSScott Wood 
1617dfd4d47eSScott Wood void kvmppc_decrementer_func(unsigned long data)
1618dfd4d47eSScott Wood {
1619dfd4d47eSScott Wood 	struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1620dfd4d47eSScott Wood 
162121bd000aSBharat Bhushan 	if (vcpu->arch.tcr & TCR_ARE) {
162221bd000aSBharat Bhushan 		vcpu->arch.dec = vcpu->arch.decar;
162321bd000aSBharat Bhushan 		kvmppc_emulate_dec(vcpu);
162421bd000aSBharat Bhushan 	}
162521bd000aSBharat Bhushan 
1626dfd4d47eSScott Wood 	kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1627dfd4d47eSScott Wood }
1628dfd4d47eSScott Wood 
162994fa9d99SScott Wood void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
163094fa9d99SScott Wood {
1631a47d72f3SPaul Mackerras 	vcpu->cpu = smp_processor_id();
1632d30f6e48SScott Wood 	current->thread.kvm_vcpu = vcpu;
163394fa9d99SScott Wood }
163494fa9d99SScott Wood 
163594fa9d99SScott Wood void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
163694fa9d99SScott Wood {
1637d30f6e48SScott Wood 	current->thread.kvm_vcpu = NULL;
1638a47d72f3SPaul Mackerras 	vcpu->cpu = -1;
163994fa9d99SScott Wood }
164094fa9d99SScott Wood 
16412986b8c7SStephen Rothwell int __init kvmppc_booke_init(void)
1642d9fbd03dSHollis Blanchard {
1643d30f6e48SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
1644d9fbd03dSHollis Blanchard 	unsigned long ivor[16];
16451d542d9cSBharat Bhushan 	unsigned long *handler = kvmppc_booke_handler_addr;
1646d9fbd03dSHollis Blanchard 	unsigned long max_ivor = 0;
16471d542d9cSBharat Bhushan 	unsigned long handler_len;
1648d9fbd03dSHollis Blanchard 	int i;
1649d9fbd03dSHollis Blanchard 
1650d9fbd03dSHollis Blanchard 	/* We install our own exception handlers by hijacking IVPR. IVPR must
1651d9fbd03dSHollis Blanchard 	 * be 16-bit aligned, so we need a 64KB allocation. */
1652d9fbd03dSHollis Blanchard 	kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1653d9fbd03dSHollis Blanchard 	                                         VCPU_SIZE_ORDER);
1654d9fbd03dSHollis Blanchard 	if (!kvmppc_booke_handlers)
1655d9fbd03dSHollis Blanchard 		return -ENOMEM;
1656d9fbd03dSHollis Blanchard 
1657d9fbd03dSHollis Blanchard 	/* XXX make sure our handlers are smaller than Linux's */
1658d9fbd03dSHollis Blanchard 
1659d9fbd03dSHollis Blanchard 	/* Copy our interrupt handlers to match host IVORs. That way we don't
1660d9fbd03dSHollis Blanchard 	 * have to swap the IVORs on every guest/host transition. */
1661d9fbd03dSHollis Blanchard 	ivor[0] = mfspr(SPRN_IVOR0);
1662d9fbd03dSHollis Blanchard 	ivor[1] = mfspr(SPRN_IVOR1);
1663d9fbd03dSHollis Blanchard 	ivor[2] = mfspr(SPRN_IVOR2);
1664d9fbd03dSHollis Blanchard 	ivor[3] = mfspr(SPRN_IVOR3);
1665d9fbd03dSHollis Blanchard 	ivor[4] = mfspr(SPRN_IVOR4);
1666d9fbd03dSHollis Blanchard 	ivor[5] = mfspr(SPRN_IVOR5);
1667d9fbd03dSHollis Blanchard 	ivor[6] = mfspr(SPRN_IVOR6);
1668d9fbd03dSHollis Blanchard 	ivor[7] = mfspr(SPRN_IVOR7);
1669d9fbd03dSHollis Blanchard 	ivor[8] = mfspr(SPRN_IVOR8);
1670d9fbd03dSHollis Blanchard 	ivor[9] = mfspr(SPRN_IVOR9);
1671d9fbd03dSHollis Blanchard 	ivor[10] = mfspr(SPRN_IVOR10);
1672d9fbd03dSHollis Blanchard 	ivor[11] = mfspr(SPRN_IVOR11);
1673d9fbd03dSHollis Blanchard 	ivor[12] = mfspr(SPRN_IVOR12);
1674d9fbd03dSHollis Blanchard 	ivor[13] = mfspr(SPRN_IVOR13);
1675d9fbd03dSHollis Blanchard 	ivor[14] = mfspr(SPRN_IVOR14);
1676d9fbd03dSHollis Blanchard 	ivor[15] = mfspr(SPRN_IVOR15);
1677d9fbd03dSHollis Blanchard 
1678d9fbd03dSHollis Blanchard 	for (i = 0; i < 16; i++) {
1679d9fbd03dSHollis Blanchard 		if (ivor[i] > max_ivor)
16801d542d9cSBharat Bhushan 			max_ivor = i;
1681d9fbd03dSHollis Blanchard 
16821d542d9cSBharat Bhushan 		handler_len = handler[i + 1] - handler[i];
1683d9fbd03dSHollis Blanchard 		memcpy((void *)kvmppc_booke_handlers + ivor[i],
16841d542d9cSBharat Bhushan 		       (void *)handler[i], handler_len);
1685d9fbd03dSHollis Blanchard 	}
16861d542d9cSBharat Bhushan 
16871d542d9cSBharat Bhushan 	handler_len = handler[max_ivor + 1] - handler[max_ivor];
16881d542d9cSBharat Bhushan 	flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
16891d542d9cSBharat Bhushan 			   ivor[max_ivor] + handler_len);
1690d30f6e48SScott Wood #endif /* !BOOKE_HV */
1691db93f574SHollis Blanchard 	return 0;
1692d9fbd03dSHollis Blanchard }
1693d9fbd03dSHollis Blanchard 
1694db93f574SHollis Blanchard void __exit kvmppc_booke_exit(void)
1695d9fbd03dSHollis Blanchard {
1696d9fbd03dSHollis Blanchard 	free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1697d9fbd03dSHollis Blanchard 	kvm_exit();
1698d9fbd03dSHollis Blanchard }
1699