1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/io.h> 57 #include <asm/kvm_ppc.h> 58 #include <asm/kvm_book3s.h> 59 #include <asm/mmu_context.h> 60 #include <asm/lppaca.h> 61 #include <asm/processor.h> 62 #include <asm/cputhreads.h> 63 #include <asm/page.h> 64 #include <asm/hvcall.h> 65 #include <asm/switch_to.h> 66 #include <asm/smp.h> 67 #include <asm/dbell.h> 68 #include <asm/hmi.h> 69 #include <asm/pnv-pci.h> 70 #include <asm/mmu.h> 71 #include <asm/opal.h> 72 #include <asm/xics.h> 73 #include <asm/xive.h> 74 #include <asm/hw_breakpoint.h> 75 #include <asm/kvm_book3s_uvmem.h> 76 #include <asm/ultravisor.h> 77 #include <asm/dtl.h> 78 79 #include "book3s.h" 80 81 #define CREATE_TRACE_POINTS 82 #include "trace_hv.h" 83 84 /* #define EXIT_DEBUG */ 85 /* #define EXIT_DEBUG_SIMPLE */ 86 /* #define EXIT_DEBUG_INT */ 87 88 /* Used to indicate that a guest page fault needs to be handled */ 89 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 90 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 91 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 92 93 /* Used as a "null" value for timebase values */ 94 #define TB_NIL (~(u64)0) 95 96 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 97 98 static int dynamic_mt_modes = 6; 99 module_param(dynamic_mt_modes, int, 0644); 100 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 101 static int target_smt_mode; 102 module_param(target_smt_mode, int, 0644); 103 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 104 105 static bool indep_threads_mode = true; 106 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 107 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static const struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static inline bool nesting_enabled(struct kvm *kvm) 132 { 133 return kvm->arch.nested_enable && kvm_is_radix(kvm); 134 } 135 136 /* If set, the threads on each CPU core have to be in the same MMU mode */ 137 static bool no_mixing_hpt_and_radix __read_mostly; 138 139 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 140 141 /* 142 * RWMR values for POWER8. These control the rate at which PURR 143 * and SPURR count and should be set according to the number of 144 * online threads in the vcore being run. 145 */ 146 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 147 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 148 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 149 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 150 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 151 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 153 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 154 155 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 156 RWMR_RPA_P8_1THREAD, 157 RWMR_RPA_P8_1THREAD, 158 RWMR_RPA_P8_2THREAD, 159 RWMR_RPA_P8_3THREAD, 160 RWMR_RPA_P8_4THREAD, 161 RWMR_RPA_P8_5THREAD, 162 RWMR_RPA_P8_6THREAD, 163 RWMR_RPA_P8_7THREAD, 164 RWMR_RPA_P8_8THREAD, 165 }; 166 167 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 168 int *ip) 169 { 170 int i = *ip; 171 struct kvm_vcpu *vcpu; 172 173 while (++i < MAX_SMT_THREADS) { 174 vcpu = READ_ONCE(vc->runnable_threads[i]); 175 if (vcpu) { 176 *ip = i; 177 return vcpu; 178 } 179 } 180 return NULL; 181 } 182 183 /* Used to traverse the list of runnable threads for a given vcore */ 184 #define for_each_runnable_thread(i, vcpu, vc) \ 185 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 186 187 static bool kvmppc_ipi_thread(int cpu) 188 { 189 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 190 191 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 192 if (kvmhv_on_pseries()) 193 return false; 194 195 /* On POWER9 we can use msgsnd to IPI any cpu */ 196 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 197 msg |= get_hard_smp_processor_id(cpu); 198 smp_mb(); 199 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 200 return true; 201 } 202 203 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 204 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 205 preempt_disable(); 206 if (cpu_first_thread_sibling(cpu) == 207 cpu_first_thread_sibling(smp_processor_id())) { 208 msg |= cpu_thread_in_core(cpu); 209 smp_mb(); 210 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 211 preempt_enable(); 212 return true; 213 } 214 preempt_enable(); 215 } 216 217 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 218 if (cpu >= 0 && cpu < nr_cpu_ids) { 219 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 220 xics_wake_cpu(cpu); 221 return true; 222 } 223 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 224 return true; 225 } 226 #endif 227 228 return false; 229 } 230 231 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 232 { 233 int cpu; 234 struct rcuwait *waitp; 235 236 waitp = kvm_arch_vcpu_get_wait(vcpu); 237 if (rcuwait_wake_up(waitp)) 238 ++vcpu->stat.halt_wakeup; 239 240 cpu = READ_ONCE(vcpu->arch.thread_cpu); 241 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 242 return; 243 244 /* CPU points to the first thread of the core */ 245 cpu = vcpu->cpu; 246 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 247 smp_send_reschedule(cpu); 248 } 249 250 /* 251 * We use the vcpu_load/put functions to measure stolen time. 252 * Stolen time is counted as time when either the vcpu is able to 253 * run as part of a virtual core, but the task running the vcore 254 * is preempted or sleeping, or when the vcpu needs something done 255 * in the kernel by the task running the vcpu, but that task is 256 * preempted or sleeping. Those two things have to be counted 257 * separately, since one of the vcpu tasks will take on the job 258 * of running the core, and the other vcpu tasks in the vcore will 259 * sleep waiting for it to do that, but that sleep shouldn't count 260 * as stolen time. 261 * 262 * Hence we accumulate stolen time when the vcpu can run as part of 263 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 264 * needs its task to do other things in the kernel (for example, 265 * service a page fault) in busy_stolen. We don't accumulate 266 * stolen time for a vcore when it is inactive, or for a vcpu 267 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 268 * a misnomer; it means that the vcpu task is not executing in 269 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 270 * the kernel. We don't have any way of dividing up that time 271 * between time that the vcpu is genuinely stopped, time that 272 * the task is actively working on behalf of the vcpu, and time 273 * that the task is preempted, so we don't count any of it as 274 * stolen. 275 * 276 * Updates to busy_stolen are protected by arch.tbacct_lock; 277 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 278 * lock. The stolen times are measured in units of timebase ticks. 279 * (Note that the != TB_NIL checks below are purely defensive; 280 * they should never fail.) 281 */ 282 283 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 284 { 285 unsigned long flags; 286 287 spin_lock_irqsave(&vc->stoltb_lock, flags); 288 vc->preempt_tb = mftb(); 289 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 290 } 291 292 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 293 { 294 unsigned long flags; 295 296 spin_lock_irqsave(&vc->stoltb_lock, flags); 297 if (vc->preempt_tb != TB_NIL) { 298 vc->stolen_tb += mftb() - vc->preempt_tb; 299 vc->preempt_tb = TB_NIL; 300 } 301 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 302 } 303 304 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 305 { 306 struct kvmppc_vcore *vc = vcpu->arch.vcore; 307 unsigned long flags; 308 309 /* 310 * We can test vc->runner without taking the vcore lock, 311 * because only this task ever sets vc->runner to this 312 * vcpu, and once it is set to this vcpu, only this task 313 * ever sets it to NULL. 314 */ 315 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 316 kvmppc_core_end_stolen(vc); 317 318 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 319 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 320 vcpu->arch.busy_preempt != TB_NIL) { 321 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 322 vcpu->arch.busy_preempt = TB_NIL; 323 } 324 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 325 } 326 327 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 328 { 329 struct kvmppc_vcore *vc = vcpu->arch.vcore; 330 unsigned long flags; 331 332 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 333 kvmppc_core_start_stolen(vc); 334 335 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 336 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 337 vcpu->arch.busy_preempt = mftb(); 338 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 339 } 340 341 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 342 { 343 vcpu->arch.pvr = pvr; 344 } 345 346 /* Dummy value used in computing PCR value below */ 347 #define PCR_ARCH_31 (PCR_ARCH_300 << 1) 348 349 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 350 { 351 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 352 struct kvmppc_vcore *vc = vcpu->arch.vcore; 353 354 /* We can (emulate) our own architecture version and anything older */ 355 if (cpu_has_feature(CPU_FTR_ARCH_31)) 356 host_pcr_bit = PCR_ARCH_31; 357 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 358 host_pcr_bit = PCR_ARCH_300; 359 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 360 host_pcr_bit = PCR_ARCH_207; 361 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 362 host_pcr_bit = PCR_ARCH_206; 363 else 364 host_pcr_bit = PCR_ARCH_205; 365 366 /* Determine lowest PCR bit needed to run guest in given PVR level */ 367 guest_pcr_bit = host_pcr_bit; 368 if (arch_compat) { 369 switch (arch_compat) { 370 case PVR_ARCH_205: 371 guest_pcr_bit = PCR_ARCH_205; 372 break; 373 case PVR_ARCH_206: 374 case PVR_ARCH_206p: 375 guest_pcr_bit = PCR_ARCH_206; 376 break; 377 case PVR_ARCH_207: 378 guest_pcr_bit = PCR_ARCH_207; 379 break; 380 case PVR_ARCH_300: 381 guest_pcr_bit = PCR_ARCH_300; 382 break; 383 case PVR_ARCH_31: 384 guest_pcr_bit = PCR_ARCH_31; 385 break; 386 default: 387 return -EINVAL; 388 } 389 } 390 391 /* Check requested PCR bits don't exceed our capabilities */ 392 if (guest_pcr_bit > host_pcr_bit) 393 return -EINVAL; 394 395 spin_lock(&vc->lock); 396 vc->arch_compat = arch_compat; 397 /* 398 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 399 * Also set all reserved PCR bits 400 */ 401 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 402 spin_unlock(&vc->lock); 403 404 return 0; 405 } 406 407 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 408 { 409 int r; 410 411 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 412 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 413 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 414 for (r = 0; r < 16; ++r) 415 pr_err("r%2d = %.16lx r%d = %.16lx\n", 416 r, kvmppc_get_gpr(vcpu, r), 417 r+16, kvmppc_get_gpr(vcpu, r+16)); 418 pr_err("ctr = %.16lx lr = %.16lx\n", 419 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 420 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 421 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 422 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 423 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 424 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 425 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 426 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 427 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 428 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 429 pr_err("fault dar = %.16lx dsisr = %.8x\n", 430 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 431 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 432 for (r = 0; r < vcpu->arch.slb_max; ++r) 433 pr_err(" ESID = %.16llx VSID = %.16llx\n", 434 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 435 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 436 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 437 vcpu->arch.last_inst); 438 } 439 440 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 441 { 442 return kvm_get_vcpu_by_id(kvm, id); 443 } 444 445 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 446 { 447 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 448 vpa->yield_count = cpu_to_be32(1); 449 } 450 451 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 452 unsigned long addr, unsigned long len) 453 { 454 /* check address is cacheline aligned */ 455 if (addr & (L1_CACHE_BYTES - 1)) 456 return -EINVAL; 457 spin_lock(&vcpu->arch.vpa_update_lock); 458 if (v->next_gpa != addr || v->len != len) { 459 v->next_gpa = addr; 460 v->len = addr ? len : 0; 461 v->update_pending = 1; 462 } 463 spin_unlock(&vcpu->arch.vpa_update_lock); 464 return 0; 465 } 466 467 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 468 struct reg_vpa { 469 u32 dummy; 470 union { 471 __be16 hword; 472 __be32 word; 473 } length; 474 }; 475 476 static int vpa_is_registered(struct kvmppc_vpa *vpap) 477 { 478 if (vpap->update_pending) 479 return vpap->next_gpa != 0; 480 return vpap->pinned_addr != NULL; 481 } 482 483 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 484 unsigned long flags, 485 unsigned long vcpuid, unsigned long vpa) 486 { 487 struct kvm *kvm = vcpu->kvm; 488 unsigned long len, nb; 489 void *va; 490 struct kvm_vcpu *tvcpu; 491 int err; 492 int subfunc; 493 struct kvmppc_vpa *vpap; 494 495 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 496 if (!tvcpu) 497 return H_PARAMETER; 498 499 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 500 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 501 subfunc == H_VPA_REG_SLB) { 502 /* Registering new area - address must be cache-line aligned */ 503 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 504 return H_PARAMETER; 505 506 /* convert logical addr to kernel addr and read length */ 507 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 508 if (va == NULL) 509 return H_PARAMETER; 510 if (subfunc == H_VPA_REG_VPA) 511 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 512 else 513 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 514 kvmppc_unpin_guest_page(kvm, va, vpa, false); 515 516 /* Check length */ 517 if (len > nb || len < sizeof(struct reg_vpa)) 518 return H_PARAMETER; 519 } else { 520 vpa = 0; 521 len = 0; 522 } 523 524 err = H_PARAMETER; 525 vpap = NULL; 526 spin_lock(&tvcpu->arch.vpa_update_lock); 527 528 switch (subfunc) { 529 case H_VPA_REG_VPA: /* register VPA */ 530 /* 531 * The size of our lppaca is 1kB because of the way we align 532 * it for the guest to avoid crossing a 4kB boundary. We only 533 * use 640 bytes of the structure though, so we should accept 534 * clients that set a size of 640. 535 */ 536 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 537 if (len < sizeof(struct lppaca)) 538 break; 539 vpap = &tvcpu->arch.vpa; 540 err = 0; 541 break; 542 543 case H_VPA_REG_DTL: /* register DTL */ 544 if (len < sizeof(struct dtl_entry)) 545 break; 546 len -= len % sizeof(struct dtl_entry); 547 548 /* Check that they have previously registered a VPA */ 549 err = H_RESOURCE; 550 if (!vpa_is_registered(&tvcpu->arch.vpa)) 551 break; 552 553 vpap = &tvcpu->arch.dtl; 554 err = 0; 555 break; 556 557 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 558 /* Check that they have previously registered a VPA */ 559 err = H_RESOURCE; 560 if (!vpa_is_registered(&tvcpu->arch.vpa)) 561 break; 562 563 vpap = &tvcpu->arch.slb_shadow; 564 err = 0; 565 break; 566 567 case H_VPA_DEREG_VPA: /* deregister VPA */ 568 /* Check they don't still have a DTL or SLB buf registered */ 569 err = H_RESOURCE; 570 if (vpa_is_registered(&tvcpu->arch.dtl) || 571 vpa_is_registered(&tvcpu->arch.slb_shadow)) 572 break; 573 574 vpap = &tvcpu->arch.vpa; 575 err = 0; 576 break; 577 578 case H_VPA_DEREG_DTL: /* deregister DTL */ 579 vpap = &tvcpu->arch.dtl; 580 err = 0; 581 break; 582 583 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 584 vpap = &tvcpu->arch.slb_shadow; 585 err = 0; 586 break; 587 } 588 589 if (vpap) { 590 vpap->next_gpa = vpa; 591 vpap->len = len; 592 vpap->update_pending = 1; 593 } 594 595 spin_unlock(&tvcpu->arch.vpa_update_lock); 596 597 return err; 598 } 599 600 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 601 { 602 struct kvm *kvm = vcpu->kvm; 603 void *va; 604 unsigned long nb; 605 unsigned long gpa; 606 607 /* 608 * We need to pin the page pointed to by vpap->next_gpa, 609 * but we can't call kvmppc_pin_guest_page under the lock 610 * as it does get_user_pages() and down_read(). So we 611 * have to drop the lock, pin the page, then get the lock 612 * again and check that a new area didn't get registered 613 * in the meantime. 614 */ 615 for (;;) { 616 gpa = vpap->next_gpa; 617 spin_unlock(&vcpu->arch.vpa_update_lock); 618 va = NULL; 619 nb = 0; 620 if (gpa) 621 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 622 spin_lock(&vcpu->arch.vpa_update_lock); 623 if (gpa == vpap->next_gpa) 624 break; 625 /* sigh... unpin that one and try again */ 626 if (va) 627 kvmppc_unpin_guest_page(kvm, va, gpa, false); 628 } 629 630 vpap->update_pending = 0; 631 if (va && nb < vpap->len) { 632 /* 633 * If it's now too short, it must be that userspace 634 * has changed the mappings underlying guest memory, 635 * so unregister the region. 636 */ 637 kvmppc_unpin_guest_page(kvm, va, gpa, false); 638 va = NULL; 639 } 640 if (vpap->pinned_addr) 641 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 642 vpap->dirty); 643 vpap->gpa = gpa; 644 vpap->pinned_addr = va; 645 vpap->dirty = false; 646 if (va) 647 vpap->pinned_end = va + vpap->len; 648 } 649 650 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 651 { 652 if (!(vcpu->arch.vpa.update_pending || 653 vcpu->arch.slb_shadow.update_pending || 654 vcpu->arch.dtl.update_pending)) 655 return; 656 657 spin_lock(&vcpu->arch.vpa_update_lock); 658 if (vcpu->arch.vpa.update_pending) { 659 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 660 if (vcpu->arch.vpa.pinned_addr) 661 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 662 } 663 if (vcpu->arch.dtl.update_pending) { 664 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 665 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 666 vcpu->arch.dtl_index = 0; 667 } 668 if (vcpu->arch.slb_shadow.update_pending) 669 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 670 spin_unlock(&vcpu->arch.vpa_update_lock); 671 } 672 673 /* 674 * Return the accumulated stolen time for the vcore up until `now'. 675 * The caller should hold the vcore lock. 676 */ 677 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 678 { 679 u64 p; 680 unsigned long flags; 681 682 spin_lock_irqsave(&vc->stoltb_lock, flags); 683 p = vc->stolen_tb; 684 if (vc->vcore_state != VCORE_INACTIVE && 685 vc->preempt_tb != TB_NIL) 686 p += now - vc->preempt_tb; 687 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 688 return p; 689 } 690 691 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 692 struct kvmppc_vcore *vc) 693 { 694 struct dtl_entry *dt; 695 struct lppaca *vpa; 696 unsigned long stolen; 697 unsigned long core_stolen; 698 u64 now; 699 unsigned long flags; 700 701 dt = vcpu->arch.dtl_ptr; 702 vpa = vcpu->arch.vpa.pinned_addr; 703 now = mftb(); 704 core_stolen = vcore_stolen_time(vc, now); 705 stolen = core_stolen - vcpu->arch.stolen_logged; 706 vcpu->arch.stolen_logged = core_stolen; 707 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 708 stolen += vcpu->arch.busy_stolen; 709 vcpu->arch.busy_stolen = 0; 710 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 711 if (!dt || !vpa) 712 return; 713 memset(dt, 0, sizeof(struct dtl_entry)); 714 dt->dispatch_reason = 7; 715 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 716 dt->timebase = cpu_to_be64(now + vc->tb_offset); 717 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 718 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 719 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 720 ++dt; 721 if (dt == vcpu->arch.dtl.pinned_end) 722 dt = vcpu->arch.dtl.pinned_addr; 723 vcpu->arch.dtl_ptr = dt; 724 /* order writing *dt vs. writing vpa->dtl_idx */ 725 smp_wmb(); 726 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 727 vcpu->arch.dtl.dirty = true; 728 } 729 730 /* See if there is a doorbell interrupt pending for a vcpu */ 731 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 732 { 733 int thr; 734 struct kvmppc_vcore *vc; 735 736 if (vcpu->arch.doorbell_request) 737 return true; 738 /* 739 * Ensure that the read of vcore->dpdes comes after the read 740 * of vcpu->doorbell_request. This barrier matches the 741 * smp_wmb() in kvmppc_guest_entry_inject(). 742 */ 743 smp_rmb(); 744 vc = vcpu->arch.vcore; 745 thr = vcpu->vcpu_id - vc->first_vcpuid; 746 return !!(vc->dpdes & (1 << thr)); 747 } 748 749 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 750 { 751 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 752 return true; 753 if ((!vcpu->arch.vcore->arch_compat) && 754 cpu_has_feature(CPU_FTR_ARCH_207S)) 755 return true; 756 return false; 757 } 758 759 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 760 unsigned long resource, unsigned long value1, 761 unsigned long value2) 762 { 763 switch (resource) { 764 case H_SET_MODE_RESOURCE_SET_CIABR: 765 if (!kvmppc_power8_compatible(vcpu)) 766 return H_P2; 767 if (value2) 768 return H_P4; 769 if (mflags) 770 return H_UNSUPPORTED_FLAG_START; 771 /* Guests can't breakpoint the hypervisor */ 772 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 773 return H_P3; 774 vcpu->arch.ciabr = value1; 775 return H_SUCCESS; 776 case H_SET_MODE_RESOURCE_SET_DAWR0: 777 if (!kvmppc_power8_compatible(vcpu)) 778 return H_P2; 779 if (!ppc_breakpoint_available()) 780 return H_P2; 781 if (mflags) 782 return H_UNSUPPORTED_FLAG_START; 783 if (value2 & DABRX_HYP) 784 return H_P4; 785 vcpu->arch.dawr0 = value1; 786 vcpu->arch.dawrx0 = value2; 787 return H_SUCCESS; 788 case H_SET_MODE_RESOURCE_SET_DAWR1: 789 if (!kvmppc_power8_compatible(vcpu)) 790 return H_P2; 791 if (!ppc_breakpoint_available()) 792 return H_P2; 793 if (!cpu_has_feature(CPU_FTR_DAWR1)) 794 return H_P2; 795 if (!vcpu->kvm->arch.dawr1_enabled) 796 return H_FUNCTION; 797 if (mflags) 798 return H_UNSUPPORTED_FLAG_START; 799 if (value2 & DABRX_HYP) 800 return H_P4; 801 vcpu->arch.dawr1 = value1; 802 vcpu->arch.dawrx1 = value2; 803 return H_SUCCESS; 804 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 805 /* KVM does not support mflags=2 (AIL=2) */ 806 if (mflags != 0 && mflags != 3) 807 return H_UNSUPPORTED_FLAG_START; 808 return H_TOO_HARD; 809 default: 810 return H_TOO_HARD; 811 } 812 } 813 814 /* Copy guest memory in place - must reside within a single memslot */ 815 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 816 unsigned long len) 817 { 818 struct kvm_memory_slot *to_memslot = NULL; 819 struct kvm_memory_slot *from_memslot = NULL; 820 unsigned long to_addr, from_addr; 821 int r; 822 823 /* Get HPA for from address */ 824 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 825 if (!from_memslot) 826 return -EFAULT; 827 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 828 << PAGE_SHIFT)) 829 return -EINVAL; 830 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 831 if (kvm_is_error_hva(from_addr)) 832 return -EFAULT; 833 from_addr |= (from & (PAGE_SIZE - 1)); 834 835 /* Get HPA for to address */ 836 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 837 if (!to_memslot) 838 return -EFAULT; 839 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 840 << PAGE_SHIFT)) 841 return -EINVAL; 842 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 843 if (kvm_is_error_hva(to_addr)) 844 return -EFAULT; 845 to_addr |= (to & (PAGE_SIZE - 1)); 846 847 /* Perform copy */ 848 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 849 len); 850 if (r) 851 return -EFAULT; 852 mark_page_dirty(kvm, to >> PAGE_SHIFT); 853 return 0; 854 } 855 856 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 857 unsigned long dest, unsigned long src) 858 { 859 u64 pg_sz = SZ_4K; /* 4K page size */ 860 u64 pg_mask = SZ_4K - 1; 861 int ret; 862 863 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 864 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 865 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 866 return H_PARAMETER; 867 868 /* dest (and src if copy_page flag set) must be page aligned */ 869 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 870 return H_PARAMETER; 871 872 /* zero and/or copy the page as determined by the flags */ 873 if (flags & H_COPY_PAGE) { 874 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 875 if (ret < 0) 876 return H_PARAMETER; 877 } else if (flags & H_ZERO_PAGE) { 878 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 879 if (ret < 0) 880 return H_PARAMETER; 881 } 882 883 /* We can ignore the remaining flags */ 884 885 return H_SUCCESS; 886 } 887 888 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 889 { 890 struct kvmppc_vcore *vcore = target->arch.vcore; 891 892 /* 893 * We expect to have been called by the real mode handler 894 * (kvmppc_rm_h_confer()) which would have directly returned 895 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 896 * have useful work to do and should not confer) so we don't 897 * recheck that here. 898 */ 899 900 spin_lock(&vcore->lock); 901 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 902 vcore->vcore_state != VCORE_INACTIVE && 903 vcore->runner) 904 target = vcore->runner; 905 spin_unlock(&vcore->lock); 906 907 return kvm_vcpu_yield_to(target); 908 } 909 910 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 911 { 912 int yield_count = 0; 913 struct lppaca *lppaca; 914 915 spin_lock(&vcpu->arch.vpa_update_lock); 916 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 917 if (lppaca) 918 yield_count = be32_to_cpu(lppaca->yield_count); 919 spin_unlock(&vcpu->arch.vpa_update_lock); 920 return yield_count; 921 } 922 923 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 924 { 925 unsigned long req = kvmppc_get_gpr(vcpu, 3); 926 unsigned long target, ret = H_SUCCESS; 927 int yield_count; 928 struct kvm_vcpu *tvcpu; 929 int idx, rc; 930 931 if (req <= MAX_HCALL_OPCODE && 932 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 933 return RESUME_HOST; 934 935 switch (req) { 936 case H_CEDE: 937 break; 938 case H_PROD: 939 target = kvmppc_get_gpr(vcpu, 4); 940 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 941 if (!tvcpu) { 942 ret = H_PARAMETER; 943 break; 944 } 945 tvcpu->arch.prodded = 1; 946 smp_mb(); 947 if (tvcpu->arch.ceded) 948 kvmppc_fast_vcpu_kick_hv(tvcpu); 949 break; 950 case H_CONFER: 951 target = kvmppc_get_gpr(vcpu, 4); 952 if (target == -1) 953 break; 954 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 955 if (!tvcpu) { 956 ret = H_PARAMETER; 957 break; 958 } 959 yield_count = kvmppc_get_gpr(vcpu, 5); 960 if (kvmppc_get_yield_count(tvcpu) != yield_count) 961 break; 962 kvm_arch_vcpu_yield_to(tvcpu); 963 break; 964 case H_REGISTER_VPA: 965 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 966 kvmppc_get_gpr(vcpu, 5), 967 kvmppc_get_gpr(vcpu, 6)); 968 break; 969 case H_RTAS: 970 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 971 return RESUME_HOST; 972 973 idx = srcu_read_lock(&vcpu->kvm->srcu); 974 rc = kvmppc_rtas_hcall(vcpu); 975 srcu_read_unlock(&vcpu->kvm->srcu, idx); 976 977 if (rc == -ENOENT) 978 return RESUME_HOST; 979 else if (rc == 0) 980 break; 981 982 /* Send the error out to userspace via KVM_RUN */ 983 return rc; 984 case H_LOGICAL_CI_LOAD: 985 ret = kvmppc_h_logical_ci_load(vcpu); 986 if (ret == H_TOO_HARD) 987 return RESUME_HOST; 988 break; 989 case H_LOGICAL_CI_STORE: 990 ret = kvmppc_h_logical_ci_store(vcpu); 991 if (ret == H_TOO_HARD) 992 return RESUME_HOST; 993 break; 994 case H_SET_MODE: 995 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 996 kvmppc_get_gpr(vcpu, 5), 997 kvmppc_get_gpr(vcpu, 6), 998 kvmppc_get_gpr(vcpu, 7)); 999 if (ret == H_TOO_HARD) 1000 return RESUME_HOST; 1001 break; 1002 case H_XIRR: 1003 case H_CPPR: 1004 case H_EOI: 1005 case H_IPI: 1006 case H_IPOLL: 1007 case H_XIRR_X: 1008 if (kvmppc_xics_enabled(vcpu)) { 1009 if (xics_on_xive()) { 1010 ret = H_NOT_AVAILABLE; 1011 return RESUME_GUEST; 1012 } 1013 ret = kvmppc_xics_hcall(vcpu, req); 1014 break; 1015 } 1016 return RESUME_HOST; 1017 case H_SET_DABR: 1018 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1019 break; 1020 case H_SET_XDABR: 1021 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1022 kvmppc_get_gpr(vcpu, 5)); 1023 break; 1024 #ifdef CONFIG_SPAPR_TCE_IOMMU 1025 case H_GET_TCE: 1026 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1027 kvmppc_get_gpr(vcpu, 5)); 1028 if (ret == H_TOO_HARD) 1029 return RESUME_HOST; 1030 break; 1031 case H_PUT_TCE: 1032 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1033 kvmppc_get_gpr(vcpu, 5), 1034 kvmppc_get_gpr(vcpu, 6)); 1035 if (ret == H_TOO_HARD) 1036 return RESUME_HOST; 1037 break; 1038 case H_PUT_TCE_INDIRECT: 1039 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1040 kvmppc_get_gpr(vcpu, 5), 1041 kvmppc_get_gpr(vcpu, 6), 1042 kvmppc_get_gpr(vcpu, 7)); 1043 if (ret == H_TOO_HARD) 1044 return RESUME_HOST; 1045 break; 1046 case H_STUFF_TCE: 1047 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1048 kvmppc_get_gpr(vcpu, 5), 1049 kvmppc_get_gpr(vcpu, 6), 1050 kvmppc_get_gpr(vcpu, 7)); 1051 if (ret == H_TOO_HARD) 1052 return RESUME_HOST; 1053 break; 1054 #endif 1055 case H_RANDOM: 1056 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1057 ret = H_HARDWARE; 1058 break; 1059 1060 case H_SET_PARTITION_TABLE: 1061 ret = H_FUNCTION; 1062 if (nesting_enabled(vcpu->kvm)) 1063 ret = kvmhv_set_partition_table(vcpu); 1064 break; 1065 case H_ENTER_NESTED: 1066 ret = H_FUNCTION; 1067 if (!nesting_enabled(vcpu->kvm)) 1068 break; 1069 ret = kvmhv_enter_nested_guest(vcpu); 1070 if (ret == H_INTERRUPT) { 1071 kvmppc_set_gpr(vcpu, 3, 0); 1072 vcpu->arch.hcall_needed = 0; 1073 return -EINTR; 1074 } else if (ret == H_TOO_HARD) { 1075 kvmppc_set_gpr(vcpu, 3, 0); 1076 vcpu->arch.hcall_needed = 0; 1077 return RESUME_HOST; 1078 } 1079 break; 1080 case H_TLB_INVALIDATE: 1081 ret = H_FUNCTION; 1082 if (nesting_enabled(vcpu->kvm)) 1083 ret = kvmhv_do_nested_tlbie(vcpu); 1084 break; 1085 case H_COPY_TOFROM_GUEST: 1086 ret = H_FUNCTION; 1087 if (nesting_enabled(vcpu->kvm)) 1088 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1089 break; 1090 case H_PAGE_INIT: 1091 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1092 kvmppc_get_gpr(vcpu, 5), 1093 kvmppc_get_gpr(vcpu, 6)); 1094 break; 1095 case H_SVM_PAGE_IN: 1096 ret = H_UNSUPPORTED; 1097 if (kvmppc_get_srr1(vcpu) & MSR_S) 1098 ret = kvmppc_h_svm_page_in(vcpu->kvm, 1099 kvmppc_get_gpr(vcpu, 4), 1100 kvmppc_get_gpr(vcpu, 5), 1101 kvmppc_get_gpr(vcpu, 6)); 1102 break; 1103 case H_SVM_PAGE_OUT: 1104 ret = H_UNSUPPORTED; 1105 if (kvmppc_get_srr1(vcpu) & MSR_S) 1106 ret = kvmppc_h_svm_page_out(vcpu->kvm, 1107 kvmppc_get_gpr(vcpu, 4), 1108 kvmppc_get_gpr(vcpu, 5), 1109 kvmppc_get_gpr(vcpu, 6)); 1110 break; 1111 case H_SVM_INIT_START: 1112 ret = H_UNSUPPORTED; 1113 if (kvmppc_get_srr1(vcpu) & MSR_S) 1114 ret = kvmppc_h_svm_init_start(vcpu->kvm); 1115 break; 1116 case H_SVM_INIT_DONE: 1117 ret = H_UNSUPPORTED; 1118 if (kvmppc_get_srr1(vcpu) & MSR_S) 1119 ret = kvmppc_h_svm_init_done(vcpu->kvm); 1120 break; 1121 case H_SVM_INIT_ABORT: 1122 /* 1123 * Even if that call is made by the Ultravisor, the SSR1 value 1124 * is the guest context one, with the secure bit clear as it has 1125 * not yet been secured. So we can't check it here. 1126 * Instead the kvm->arch.secure_guest flag is checked inside 1127 * kvmppc_h_svm_init_abort(). 1128 */ 1129 ret = kvmppc_h_svm_init_abort(vcpu->kvm); 1130 break; 1131 1132 default: 1133 return RESUME_HOST; 1134 } 1135 kvmppc_set_gpr(vcpu, 3, ret); 1136 vcpu->arch.hcall_needed = 0; 1137 return RESUME_GUEST; 1138 } 1139 1140 /* 1141 * Handle H_CEDE in the nested virtualization case where we haven't 1142 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1143 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1144 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1145 */ 1146 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1147 { 1148 vcpu->arch.shregs.msr |= MSR_EE; 1149 vcpu->arch.ceded = 1; 1150 smp_mb(); 1151 if (vcpu->arch.prodded) { 1152 vcpu->arch.prodded = 0; 1153 smp_mb(); 1154 vcpu->arch.ceded = 0; 1155 } 1156 } 1157 1158 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1159 { 1160 switch (cmd) { 1161 case H_CEDE: 1162 case H_PROD: 1163 case H_CONFER: 1164 case H_REGISTER_VPA: 1165 case H_SET_MODE: 1166 case H_LOGICAL_CI_LOAD: 1167 case H_LOGICAL_CI_STORE: 1168 #ifdef CONFIG_KVM_XICS 1169 case H_XIRR: 1170 case H_CPPR: 1171 case H_EOI: 1172 case H_IPI: 1173 case H_IPOLL: 1174 case H_XIRR_X: 1175 #endif 1176 case H_PAGE_INIT: 1177 return 1; 1178 } 1179 1180 /* See if it's in the real-mode table */ 1181 return kvmppc_hcall_impl_hv_realmode(cmd); 1182 } 1183 1184 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1185 { 1186 u32 last_inst; 1187 1188 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1189 EMULATE_DONE) { 1190 /* 1191 * Fetch failed, so return to guest and 1192 * try executing it again. 1193 */ 1194 return RESUME_GUEST; 1195 } 1196 1197 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1198 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1199 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1200 return RESUME_HOST; 1201 } else { 1202 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1203 return RESUME_GUEST; 1204 } 1205 } 1206 1207 static void do_nothing(void *x) 1208 { 1209 } 1210 1211 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1212 { 1213 int thr, cpu, pcpu, nthreads; 1214 struct kvm_vcpu *v; 1215 unsigned long dpdes; 1216 1217 nthreads = vcpu->kvm->arch.emul_smt_mode; 1218 dpdes = 0; 1219 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1220 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1221 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1222 if (!v) 1223 continue; 1224 /* 1225 * If the vcpu is currently running on a physical cpu thread, 1226 * interrupt it in order to pull it out of the guest briefly, 1227 * which will update its vcore->dpdes value. 1228 */ 1229 pcpu = READ_ONCE(v->cpu); 1230 if (pcpu >= 0) 1231 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1232 if (kvmppc_doorbell_pending(v)) 1233 dpdes |= 1 << thr; 1234 } 1235 return dpdes; 1236 } 1237 1238 /* 1239 * On POWER9, emulate doorbell-related instructions in order to 1240 * give the guest the illusion of running on a multi-threaded core. 1241 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1242 * and mfspr DPDES. 1243 */ 1244 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1245 { 1246 u32 inst, rb, thr; 1247 unsigned long arg; 1248 struct kvm *kvm = vcpu->kvm; 1249 struct kvm_vcpu *tvcpu; 1250 1251 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1252 return RESUME_GUEST; 1253 if (get_op(inst) != 31) 1254 return EMULATE_FAIL; 1255 rb = get_rb(inst); 1256 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1257 switch (get_xop(inst)) { 1258 case OP_31_XOP_MSGSNDP: 1259 arg = kvmppc_get_gpr(vcpu, rb); 1260 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1261 break; 1262 arg &= 0x7f; 1263 if (arg >= kvm->arch.emul_smt_mode) 1264 break; 1265 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1266 if (!tvcpu) 1267 break; 1268 if (!tvcpu->arch.doorbell_request) { 1269 tvcpu->arch.doorbell_request = 1; 1270 kvmppc_fast_vcpu_kick_hv(tvcpu); 1271 } 1272 break; 1273 case OP_31_XOP_MSGCLRP: 1274 arg = kvmppc_get_gpr(vcpu, rb); 1275 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1276 break; 1277 vcpu->arch.vcore->dpdes = 0; 1278 vcpu->arch.doorbell_request = 0; 1279 break; 1280 case OP_31_XOP_MFSPR: 1281 switch (get_sprn(inst)) { 1282 case SPRN_TIR: 1283 arg = thr; 1284 break; 1285 case SPRN_DPDES: 1286 arg = kvmppc_read_dpdes(vcpu); 1287 break; 1288 default: 1289 return EMULATE_FAIL; 1290 } 1291 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1292 break; 1293 default: 1294 return EMULATE_FAIL; 1295 } 1296 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1297 return RESUME_GUEST; 1298 } 1299 1300 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1301 struct task_struct *tsk) 1302 { 1303 struct kvm_run *run = vcpu->run; 1304 int r = RESUME_HOST; 1305 1306 vcpu->stat.sum_exits++; 1307 1308 /* 1309 * This can happen if an interrupt occurs in the last stages 1310 * of guest entry or the first stages of guest exit (i.e. after 1311 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1312 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1313 * That can happen due to a bug, or due to a machine check 1314 * occurring at just the wrong time. 1315 */ 1316 if (vcpu->arch.shregs.msr & MSR_HV) { 1317 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1318 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1319 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1320 vcpu->arch.shregs.msr); 1321 kvmppc_dump_regs(vcpu); 1322 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1323 run->hw.hardware_exit_reason = vcpu->arch.trap; 1324 return RESUME_HOST; 1325 } 1326 run->exit_reason = KVM_EXIT_UNKNOWN; 1327 run->ready_for_interrupt_injection = 1; 1328 switch (vcpu->arch.trap) { 1329 /* We're good on these - the host merely wanted to get our attention */ 1330 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1331 vcpu->stat.dec_exits++; 1332 r = RESUME_GUEST; 1333 break; 1334 case BOOK3S_INTERRUPT_EXTERNAL: 1335 case BOOK3S_INTERRUPT_H_DOORBELL: 1336 case BOOK3S_INTERRUPT_H_VIRT: 1337 vcpu->stat.ext_intr_exits++; 1338 r = RESUME_GUEST; 1339 break; 1340 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1341 case BOOK3S_INTERRUPT_HMI: 1342 case BOOK3S_INTERRUPT_PERFMON: 1343 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1344 r = RESUME_GUEST; 1345 break; 1346 case BOOK3S_INTERRUPT_MACHINE_CHECK: { 1347 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1348 DEFAULT_RATELIMIT_BURST); 1349 /* 1350 * Print the MCE event to host console. Ratelimit so the guest 1351 * can't flood the host log. 1352 */ 1353 if (__ratelimit(&rs)) 1354 machine_check_print_event_info(&vcpu->arch.mce_evt,false, true); 1355 1356 /* 1357 * If the guest can do FWNMI, exit to userspace so it can 1358 * deliver a FWNMI to the guest. 1359 * Otherwise we synthesize a machine check for the guest 1360 * so that it knows that the machine check occurred. 1361 */ 1362 if (!vcpu->kvm->arch.fwnmi_enabled) { 1363 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1364 kvmppc_core_queue_machine_check(vcpu, flags); 1365 r = RESUME_GUEST; 1366 break; 1367 } 1368 1369 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1370 run->exit_reason = KVM_EXIT_NMI; 1371 run->hw.hardware_exit_reason = vcpu->arch.trap; 1372 /* Clear out the old NMI status from run->flags */ 1373 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1374 /* Now set the NMI status */ 1375 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1376 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1377 else 1378 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1379 1380 r = RESUME_HOST; 1381 break; 1382 } 1383 case BOOK3S_INTERRUPT_PROGRAM: 1384 { 1385 ulong flags; 1386 /* 1387 * Normally program interrupts are delivered directly 1388 * to the guest by the hardware, but we can get here 1389 * as a result of a hypervisor emulation interrupt 1390 * (e40) getting turned into a 700 by BML RTAS. 1391 */ 1392 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1393 kvmppc_core_queue_program(vcpu, flags); 1394 r = RESUME_GUEST; 1395 break; 1396 } 1397 case BOOK3S_INTERRUPT_SYSCALL: 1398 { 1399 /* hcall - punt to userspace */ 1400 int i; 1401 1402 /* hypercall with MSR_PR has already been handled in rmode, 1403 * and never reaches here. 1404 */ 1405 1406 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1407 for (i = 0; i < 9; ++i) 1408 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1409 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1410 vcpu->arch.hcall_needed = 1; 1411 r = RESUME_HOST; 1412 break; 1413 } 1414 /* 1415 * We get these next two if the guest accesses a page which it thinks 1416 * it has mapped but which is not actually present, either because 1417 * it is for an emulated I/O device or because the corresonding 1418 * host page has been paged out. Any other HDSI/HISI interrupts 1419 * have been handled already. 1420 */ 1421 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1422 r = RESUME_PAGE_FAULT; 1423 break; 1424 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1425 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1426 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1427 DSISR_SRR1_MATCH_64S; 1428 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1429 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1430 r = RESUME_PAGE_FAULT; 1431 break; 1432 /* 1433 * This occurs if the guest executes an illegal instruction. 1434 * If the guest debug is disabled, generate a program interrupt 1435 * to the guest. If guest debug is enabled, we need to check 1436 * whether the instruction is a software breakpoint instruction. 1437 * Accordingly return to Guest or Host. 1438 */ 1439 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1440 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1441 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1442 swab32(vcpu->arch.emul_inst) : 1443 vcpu->arch.emul_inst; 1444 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1445 r = kvmppc_emulate_debug_inst(vcpu); 1446 } else { 1447 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1448 r = RESUME_GUEST; 1449 } 1450 break; 1451 /* 1452 * This occurs if the guest (kernel or userspace), does something that 1453 * is prohibited by HFSCR. 1454 * On POWER9, this could be a doorbell instruction that we need 1455 * to emulate. 1456 * Otherwise, we just generate a program interrupt to the guest. 1457 */ 1458 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1459 r = EMULATE_FAIL; 1460 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1461 cpu_has_feature(CPU_FTR_ARCH_300)) 1462 r = kvmppc_emulate_doorbell_instr(vcpu); 1463 if (r == EMULATE_FAIL) { 1464 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1465 r = RESUME_GUEST; 1466 } 1467 break; 1468 1469 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1470 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1471 /* 1472 * This occurs for various TM-related instructions that 1473 * we need to emulate on POWER9 DD2.2. We have already 1474 * handled the cases where the guest was in real-suspend 1475 * mode and was transitioning to transactional state. 1476 */ 1477 r = kvmhv_p9_tm_emulation(vcpu); 1478 break; 1479 #endif 1480 1481 case BOOK3S_INTERRUPT_HV_RM_HARD: 1482 r = RESUME_PASSTHROUGH; 1483 break; 1484 default: 1485 kvmppc_dump_regs(vcpu); 1486 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1487 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1488 vcpu->arch.shregs.msr); 1489 run->hw.hardware_exit_reason = vcpu->arch.trap; 1490 r = RESUME_HOST; 1491 break; 1492 } 1493 1494 return r; 1495 } 1496 1497 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1498 { 1499 int r; 1500 int srcu_idx; 1501 1502 vcpu->stat.sum_exits++; 1503 1504 /* 1505 * This can happen if an interrupt occurs in the last stages 1506 * of guest entry or the first stages of guest exit (i.e. after 1507 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1508 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1509 * That can happen due to a bug, or due to a machine check 1510 * occurring at just the wrong time. 1511 */ 1512 if (vcpu->arch.shregs.msr & MSR_HV) { 1513 pr_emerg("KVM trap in HV mode while nested!\n"); 1514 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1515 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1516 vcpu->arch.shregs.msr); 1517 kvmppc_dump_regs(vcpu); 1518 return RESUME_HOST; 1519 } 1520 switch (vcpu->arch.trap) { 1521 /* We're good on these - the host merely wanted to get our attention */ 1522 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1523 vcpu->stat.dec_exits++; 1524 r = RESUME_GUEST; 1525 break; 1526 case BOOK3S_INTERRUPT_EXTERNAL: 1527 vcpu->stat.ext_intr_exits++; 1528 r = RESUME_HOST; 1529 break; 1530 case BOOK3S_INTERRUPT_H_DOORBELL: 1531 case BOOK3S_INTERRUPT_H_VIRT: 1532 vcpu->stat.ext_intr_exits++; 1533 r = RESUME_GUEST; 1534 break; 1535 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1536 case BOOK3S_INTERRUPT_HMI: 1537 case BOOK3S_INTERRUPT_PERFMON: 1538 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1539 r = RESUME_GUEST; 1540 break; 1541 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1542 { 1543 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1544 DEFAULT_RATELIMIT_BURST); 1545 /* Pass the machine check to the L1 guest */ 1546 r = RESUME_HOST; 1547 /* Print the MCE event to host console. */ 1548 if (__ratelimit(&rs)) 1549 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1550 break; 1551 } 1552 /* 1553 * We get these next two if the guest accesses a page which it thinks 1554 * it has mapped but which is not actually present, either because 1555 * it is for an emulated I/O device or because the corresonding 1556 * host page has been paged out. 1557 */ 1558 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1559 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1560 r = kvmhv_nested_page_fault(vcpu); 1561 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1562 break; 1563 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1564 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1565 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1566 DSISR_SRR1_MATCH_64S; 1567 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1568 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1569 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1570 r = kvmhv_nested_page_fault(vcpu); 1571 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1572 break; 1573 1574 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1575 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1576 /* 1577 * This occurs for various TM-related instructions that 1578 * we need to emulate on POWER9 DD2.2. We have already 1579 * handled the cases where the guest was in real-suspend 1580 * mode and was transitioning to transactional state. 1581 */ 1582 r = kvmhv_p9_tm_emulation(vcpu); 1583 break; 1584 #endif 1585 1586 case BOOK3S_INTERRUPT_HV_RM_HARD: 1587 vcpu->arch.trap = 0; 1588 r = RESUME_GUEST; 1589 if (!xics_on_xive()) 1590 kvmppc_xics_rm_complete(vcpu, 0); 1591 break; 1592 default: 1593 r = RESUME_HOST; 1594 break; 1595 } 1596 1597 return r; 1598 } 1599 1600 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1601 struct kvm_sregs *sregs) 1602 { 1603 int i; 1604 1605 memset(sregs, 0, sizeof(struct kvm_sregs)); 1606 sregs->pvr = vcpu->arch.pvr; 1607 for (i = 0; i < vcpu->arch.slb_max; i++) { 1608 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1609 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1610 } 1611 1612 return 0; 1613 } 1614 1615 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1616 struct kvm_sregs *sregs) 1617 { 1618 int i, j; 1619 1620 /* Only accept the same PVR as the host's, since we can't spoof it */ 1621 if (sregs->pvr != vcpu->arch.pvr) 1622 return -EINVAL; 1623 1624 j = 0; 1625 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1626 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1627 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1628 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1629 ++j; 1630 } 1631 } 1632 vcpu->arch.slb_max = j; 1633 1634 return 0; 1635 } 1636 1637 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1638 bool preserve_top32) 1639 { 1640 struct kvm *kvm = vcpu->kvm; 1641 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1642 u64 mask; 1643 1644 spin_lock(&vc->lock); 1645 /* 1646 * If ILE (interrupt little-endian) has changed, update the 1647 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1648 */ 1649 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1650 struct kvm_vcpu *vcpu; 1651 int i; 1652 1653 kvm_for_each_vcpu(i, vcpu, kvm) { 1654 if (vcpu->arch.vcore != vc) 1655 continue; 1656 if (new_lpcr & LPCR_ILE) 1657 vcpu->arch.intr_msr |= MSR_LE; 1658 else 1659 vcpu->arch.intr_msr &= ~MSR_LE; 1660 } 1661 } 1662 1663 /* 1664 * Userspace can only modify DPFD (default prefetch depth), 1665 * ILE (interrupt little-endian) and TC (translation control). 1666 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1667 */ 1668 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1669 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1670 mask |= LPCR_AIL; 1671 /* 1672 * On POWER9, allow userspace to enable large decrementer for the 1673 * guest, whether or not the host has it enabled. 1674 */ 1675 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1676 mask |= LPCR_LD; 1677 1678 /* Broken 32-bit version of LPCR must not clear top bits */ 1679 if (preserve_top32) 1680 mask &= 0xFFFFFFFF; 1681 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1682 spin_unlock(&vc->lock); 1683 } 1684 1685 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1686 union kvmppc_one_reg *val) 1687 { 1688 int r = 0; 1689 long int i; 1690 1691 switch (id) { 1692 case KVM_REG_PPC_DEBUG_INST: 1693 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1694 break; 1695 case KVM_REG_PPC_HIOR: 1696 *val = get_reg_val(id, 0); 1697 break; 1698 case KVM_REG_PPC_DABR: 1699 *val = get_reg_val(id, vcpu->arch.dabr); 1700 break; 1701 case KVM_REG_PPC_DABRX: 1702 *val = get_reg_val(id, vcpu->arch.dabrx); 1703 break; 1704 case KVM_REG_PPC_DSCR: 1705 *val = get_reg_val(id, vcpu->arch.dscr); 1706 break; 1707 case KVM_REG_PPC_PURR: 1708 *val = get_reg_val(id, vcpu->arch.purr); 1709 break; 1710 case KVM_REG_PPC_SPURR: 1711 *val = get_reg_val(id, vcpu->arch.spurr); 1712 break; 1713 case KVM_REG_PPC_AMR: 1714 *val = get_reg_val(id, vcpu->arch.amr); 1715 break; 1716 case KVM_REG_PPC_UAMOR: 1717 *val = get_reg_val(id, vcpu->arch.uamor); 1718 break; 1719 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 1720 i = id - KVM_REG_PPC_MMCR0; 1721 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1722 break; 1723 case KVM_REG_PPC_MMCR2: 1724 *val = get_reg_val(id, vcpu->arch.mmcr[2]); 1725 break; 1726 case KVM_REG_PPC_MMCRA: 1727 *val = get_reg_val(id, vcpu->arch.mmcra); 1728 break; 1729 case KVM_REG_PPC_MMCRS: 1730 *val = get_reg_val(id, vcpu->arch.mmcrs); 1731 break; 1732 case KVM_REG_PPC_MMCR3: 1733 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 1734 break; 1735 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1736 i = id - KVM_REG_PPC_PMC1; 1737 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1738 break; 1739 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1740 i = id - KVM_REG_PPC_SPMC1; 1741 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1742 break; 1743 case KVM_REG_PPC_SIAR: 1744 *val = get_reg_val(id, vcpu->arch.siar); 1745 break; 1746 case KVM_REG_PPC_SDAR: 1747 *val = get_reg_val(id, vcpu->arch.sdar); 1748 break; 1749 case KVM_REG_PPC_SIER: 1750 *val = get_reg_val(id, vcpu->arch.sier[0]); 1751 break; 1752 case KVM_REG_PPC_SIER2: 1753 *val = get_reg_val(id, vcpu->arch.sier[1]); 1754 break; 1755 case KVM_REG_PPC_SIER3: 1756 *val = get_reg_val(id, vcpu->arch.sier[2]); 1757 break; 1758 case KVM_REG_PPC_IAMR: 1759 *val = get_reg_val(id, vcpu->arch.iamr); 1760 break; 1761 case KVM_REG_PPC_PSPB: 1762 *val = get_reg_val(id, vcpu->arch.pspb); 1763 break; 1764 case KVM_REG_PPC_DPDES: 1765 /* 1766 * On POWER9, where we are emulating msgsndp etc., 1767 * we return 1 bit for each vcpu, which can come from 1768 * either vcore->dpdes or doorbell_request. 1769 * On POWER8, doorbell_request is 0. 1770 */ 1771 *val = get_reg_val(id, vcpu->arch.vcore->dpdes | 1772 vcpu->arch.doorbell_request); 1773 break; 1774 case KVM_REG_PPC_VTB: 1775 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1776 break; 1777 case KVM_REG_PPC_DAWR: 1778 *val = get_reg_val(id, vcpu->arch.dawr0); 1779 break; 1780 case KVM_REG_PPC_DAWRX: 1781 *val = get_reg_val(id, vcpu->arch.dawrx0); 1782 break; 1783 case KVM_REG_PPC_DAWR1: 1784 *val = get_reg_val(id, vcpu->arch.dawr1); 1785 break; 1786 case KVM_REG_PPC_DAWRX1: 1787 *val = get_reg_val(id, vcpu->arch.dawrx1); 1788 break; 1789 case KVM_REG_PPC_CIABR: 1790 *val = get_reg_val(id, vcpu->arch.ciabr); 1791 break; 1792 case KVM_REG_PPC_CSIGR: 1793 *val = get_reg_val(id, vcpu->arch.csigr); 1794 break; 1795 case KVM_REG_PPC_TACR: 1796 *val = get_reg_val(id, vcpu->arch.tacr); 1797 break; 1798 case KVM_REG_PPC_TCSCR: 1799 *val = get_reg_val(id, vcpu->arch.tcscr); 1800 break; 1801 case KVM_REG_PPC_PID: 1802 *val = get_reg_val(id, vcpu->arch.pid); 1803 break; 1804 case KVM_REG_PPC_ACOP: 1805 *val = get_reg_val(id, vcpu->arch.acop); 1806 break; 1807 case KVM_REG_PPC_WORT: 1808 *val = get_reg_val(id, vcpu->arch.wort); 1809 break; 1810 case KVM_REG_PPC_TIDR: 1811 *val = get_reg_val(id, vcpu->arch.tid); 1812 break; 1813 case KVM_REG_PPC_PSSCR: 1814 *val = get_reg_val(id, vcpu->arch.psscr); 1815 break; 1816 case KVM_REG_PPC_VPA_ADDR: 1817 spin_lock(&vcpu->arch.vpa_update_lock); 1818 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1819 spin_unlock(&vcpu->arch.vpa_update_lock); 1820 break; 1821 case KVM_REG_PPC_VPA_SLB: 1822 spin_lock(&vcpu->arch.vpa_update_lock); 1823 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1824 val->vpaval.length = vcpu->arch.slb_shadow.len; 1825 spin_unlock(&vcpu->arch.vpa_update_lock); 1826 break; 1827 case KVM_REG_PPC_VPA_DTL: 1828 spin_lock(&vcpu->arch.vpa_update_lock); 1829 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1830 val->vpaval.length = vcpu->arch.dtl.len; 1831 spin_unlock(&vcpu->arch.vpa_update_lock); 1832 break; 1833 case KVM_REG_PPC_TB_OFFSET: 1834 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1835 break; 1836 case KVM_REG_PPC_LPCR: 1837 case KVM_REG_PPC_LPCR_64: 1838 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1839 break; 1840 case KVM_REG_PPC_PPR: 1841 *val = get_reg_val(id, vcpu->arch.ppr); 1842 break; 1843 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1844 case KVM_REG_PPC_TFHAR: 1845 *val = get_reg_val(id, vcpu->arch.tfhar); 1846 break; 1847 case KVM_REG_PPC_TFIAR: 1848 *val = get_reg_val(id, vcpu->arch.tfiar); 1849 break; 1850 case KVM_REG_PPC_TEXASR: 1851 *val = get_reg_val(id, vcpu->arch.texasr); 1852 break; 1853 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1854 i = id - KVM_REG_PPC_TM_GPR0; 1855 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1856 break; 1857 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1858 { 1859 int j; 1860 i = id - KVM_REG_PPC_TM_VSR0; 1861 if (i < 32) 1862 for (j = 0; j < TS_FPRWIDTH; j++) 1863 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1864 else { 1865 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1866 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1867 else 1868 r = -ENXIO; 1869 } 1870 break; 1871 } 1872 case KVM_REG_PPC_TM_CR: 1873 *val = get_reg_val(id, vcpu->arch.cr_tm); 1874 break; 1875 case KVM_REG_PPC_TM_XER: 1876 *val = get_reg_val(id, vcpu->arch.xer_tm); 1877 break; 1878 case KVM_REG_PPC_TM_LR: 1879 *val = get_reg_val(id, vcpu->arch.lr_tm); 1880 break; 1881 case KVM_REG_PPC_TM_CTR: 1882 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1883 break; 1884 case KVM_REG_PPC_TM_FPSCR: 1885 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1886 break; 1887 case KVM_REG_PPC_TM_AMR: 1888 *val = get_reg_val(id, vcpu->arch.amr_tm); 1889 break; 1890 case KVM_REG_PPC_TM_PPR: 1891 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1892 break; 1893 case KVM_REG_PPC_TM_VRSAVE: 1894 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1895 break; 1896 case KVM_REG_PPC_TM_VSCR: 1897 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1898 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1899 else 1900 r = -ENXIO; 1901 break; 1902 case KVM_REG_PPC_TM_DSCR: 1903 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1904 break; 1905 case KVM_REG_PPC_TM_TAR: 1906 *val = get_reg_val(id, vcpu->arch.tar_tm); 1907 break; 1908 #endif 1909 case KVM_REG_PPC_ARCH_COMPAT: 1910 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1911 break; 1912 case KVM_REG_PPC_DEC_EXPIRY: 1913 *val = get_reg_val(id, vcpu->arch.dec_expires + 1914 vcpu->arch.vcore->tb_offset); 1915 break; 1916 case KVM_REG_PPC_ONLINE: 1917 *val = get_reg_val(id, vcpu->arch.online); 1918 break; 1919 case KVM_REG_PPC_PTCR: 1920 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1921 break; 1922 default: 1923 r = -EINVAL; 1924 break; 1925 } 1926 1927 return r; 1928 } 1929 1930 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1931 union kvmppc_one_reg *val) 1932 { 1933 int r = 0; 1934 long int i; 1935 unsigned long addr, len; 1936 1937 switch (id) { 1938 case KVM_REG_PPC_HIOR: 1939 /* Only allow this to be set to zero */ 1940 if (set_reg_val(id, *val)) 1941 r = -EINVAL; 1942 break; 1943 case KVM_REG_PPC_DABR: 1944 vcpu->arch.dabr = set_reg_val(id, *val); 1945 break; 1946 case KVM_REG_PPC_DABRX: 1947 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1948 break; 1949 case KVM_REG_PPC_DSCR: 1950 vcpu->arch.dscr = set_reg_val(id, *val); 1951 break; 1952 case KVM_REG_PPC_PURR: 1953 vcpu->arch.purr = set_reg_val(id, *val); 1954 break; 1955 case KVM_REG_PPC_SPURR: 1956 vcpu->arch.spurr = set_reg_val(id, *val); 1957 break; 1958 case KVM_REG_PPC_AMR: 1959 vcpu->arch.amr = set_reg_val(id, *val); 1960 break; 1961 case KVM_REG_PPC_UAMOR: 1962 vcpu->arch.uamor = set_reg_val(id, *val); 1963 break; 1964 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 1965 i = id - KVM_REG_PPC_MMCR0; 1966 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1967 break; 1968 case KVM_REG_PPC_MMCR2: 1969 vcpu->arch.mmcr[2] = set_reg_val(id, *val); 1970 break; 1971 case KVM_REG_PPC_MMCRA: 1972 vcpu->arch.mmcra = set_reg_val(id, *val); 1973 break; 1974 case KVM_REG_PPC_MMCRS: 1975 vcpu->arch.mmcrs = set_reg_val(id, *val); 1976 break; 1977 case KVM_REG_PPC_MMCR3: 1978 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 1979 break; 1980 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1981 i = id - KVM_REG_PPC_PMC1; 1982 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1983 break; 1984 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1985 i = id - KVM_REG_PPC_SPMC1; 1986 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1987 break; 1988 case KVM_REG_PPC_SIAR: 1989 vcpu->arch.siar = set_reg_val(id, *val); 1990 break; 1991 case KVM_REG_PPC_SDAR: 1992 vcpu->arch.sdar = set_reg_val(id, *val); 1993 break; 1994 case KVM_REG_PPC_SIER: 1995 vcpu->arch.sier[0] = set_reg_val(id, *val); 1996 break; 1997 case KVM_REG_PPC_SIER2: 1998 vcpu->arch.sier[1] = set_reg_val(id, *val); 1999 break; 2000 case KVM_REG_PPC_SIER3: 2001 vcpu->arch.sier[2] = set_reg_val(id, *val); 2002 break; 2003 case KVM_REG_PPC_IAMR: 2004 vcpu->arch.iamr = set_reg_val(id, *val); 2005 break; 2006 case KVM_REG_PPC_PSPB: 2007 vcpu->arch.pspb = set_reg_val(id, *val); 2008 break; 2009 case KVM_REG_PPC_DPDES: 2010 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 2011 break; 2012 case KVM_REG_PPC_VTB: 2013 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 2014 break; 2015 case KVM_REG_PPC_DAWR: 2016 vcpu->arch.dawr0 = set_reg_val(id, *val); 2017 break; 2018 case KVM_REG_PPC_DAWRX: 2019 vcpu->arch.dawrx0 = set_reg_val(id, *val) & ~DAWRX_HYP; 2020 break; 2021 case KVM_REG_PPC_DAWR1: 2022 vcpu->arch.dawr1 = set_reg_val(id, *val); 2023 break; 2024 case KVM_REG_PPC_DAWRX1: 2025 vcpu->arch.dawrx1 = set_reg_val(id, *val) & ~DAWRX_HYP; 2026 break; 2027 case KVM_REG_PPC_CIABR: 2028 vcpu->arch.ciabr = set_reg_val(id, *val); 2029 /* Don't allow setting breakpoints in hypervisor code */ 2030 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 2031 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 2032 break; 2033 case KVM_REG_PPC_CSIGR: 2034 vcpu->arch.csigr = set_reg_val(id, *val); 2035 break; 2036 case KVM_REG_PPC_TACR: 2037 vcpu->arch.tacr = set_reg_val(id, *val); 2038 break; 2039 case KVM_REG_PPC_TCSCR: 2040 vcpu->arch.tcscr = set_reg_val(id, *val); 2041 break; 2042 case KVM_REG_PPC_PID: 2043 vcpu->arch.pid = set_reg_val(id, *val); 2044 break; 2045 case KVM_REG_PPC_ACOP: 2046 vcpu->arch.acop = set_reg_val(id, *val); 2047 break; 2048 case KVM_REG_PPC_WORT: 2049 vcpu->arch.wort = set_reg_val(id, *val); 2050 break; 2051 case KVM_REG_PPC_TIDR: 2052 vcpu->arch.tid = set_reg_val(id, *val); 2053 break; 2054 case KVM_REG_PPC_PSSCR: 2055 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2056 break; 2057 case KVM_REG_PPC_VPA_ADDR: 2058 addr = set_reg_val(id, *val); 2059 r = -EINVAL; 2060 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2061 vcpu->arch.dtl.next_gpa)) 2062 break; 2063 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2064 break; 2065 case KVM_REG_PPC_VPA_SLB: 2066 addr = val->vpaval.addr; 2067 len = val->vpaval.length; 2068 r = -EINVAL; 2069 if (addr && !vcpu->arch.vpa.next_gpa) 2070 break; 2071 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2072 break; 2073 case KVM_REG_PPC_VPA_DTL: 2074 addr = val->vpaval.addr; 2075 len = val->vpaval.length; 2076 r = -EINVAL; 2077 if (addr && (len < sizeof(struct dtl_entry) || 2078 !vcpu->arch.vpa.next_gpa)) 2079 break; 2080 len -= len % sizeof(struct dtl_entry); 2081 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2082 break; 2083 case KVM_REG_PPC_TB_OFFSET: 2084 /* round up to multiple of 2^24 */ 2085 vcpu->arch.vcore->tb_offset = 2086 ALIGN(set_reg_val(id, *val), 1UL << 24); 2087 break; 2088 case KVM_REG_PPC_LPCR: 2089 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2090 break; 2091 case KVM_REG_PPC_LPCR_64: 2092 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2093 break; 2094 case KVM_REG_PPC_PPR: 2095 vcpu->arch.ppr = set_reg_val(id, *val); 2096 break; 2097 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2098 case KVM_REG_PPC_TFHAR: 2099 vcpu->arch.tfhar = set_reg_val(id, *val); 2100 break; 2101 case KVM_REG_PPC_TFIAR: 2102 vcpu->arch.tfiar = set_reg_val(id, *val); 2103 break; 2104 case KVM_REG_PPC_TEXASR: 2105 vcpu->arch.texasr = set_reg_val(id, *val); 2106 break; 2107 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2108 i = id - KVM_REG_PPC_TM_GPR0; 2109 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2110 break; 2111 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2112 { 2113 int j; 2114 i = id - KVM_REG_PPC_TM_VSR0; 2115 if (i < 32) 2116 for (j = 0; j < TS_FPRWIDTH; j++) 2117 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2118 else 2119 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2120 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2121 else 2122 r = -ENXIO; 2123 break; 2124 } 2125 case KVM_REG_PPC_TM_CR: 2126 vcpu->arch.cr_tm = set_reg_val(id, *val); 2127 break; 2128 case KVM_REG_PPC_TM_XER: 2129 vcpu->arch.xer_tm = set_reg_val(id, *val); 2130 break; 2131 case KVM_REG_PPC_TM_LR: 2132 vcpu->arch.lr_tm = set_reg_val(id, *val); 2133 break; 2134 case KVM_REG_PPC_TM_CTR: 2135 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2136 break; 2137 case KVM_REG_PPC_TM_FPSCR: 2138 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2139 break; 2140 case KVM_REG_PPC_TM_AMR: 2141 vcpu->arch.amr_tm = set_reg_val(id, *val); 2142 break; 2143 case KVM_REG_PPC_TM_PPR: 2144 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2145 break; 2146 case KVM_REG_PPC_TM_VRSAVE: 2147 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2148 break; 2149 case KVM_REG_PPC_TM_VSCR: 2150 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2151 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2152 else 2153 r = - ENXIO; 2154 break; 2155 case KVM_REG_PPC_TM_DSCR: 2156 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2157 break; 2158 case KVM_REG_PPC_TM_TAR: 2159 vcpu->arch.tar_tm = set_reg_val(id, *val); 2160 break; 2161 #endif 2162 case KVM_REG_PPC_ARCH_COMPAT: 2163 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2164 break; 2165 case KVM_REG_PPC_DEC_EXPIRY: 2166 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2167 vcpu->arch.vcore->tb_offset; 2168 break; 2169 case KVM_REG_PPC_ONLINE: 2170 i = set_reg_val(id, *val); 2171 if (i && !vcpu->arch.online) 2172 atomic_inc(&vcpu->arch.vcore->online_count); 2173 else if (!i && vcpu->arch.online) 2174 atomic_dec(&vcpu->arch.vcore->online_count); 2175 vcpu->arch.online = i; 2176 break; 2177 case KVM_REG_PPC_PTCR: 2178 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2179 break; 2180 default: 2181 r = -EINVAL; 2182 break; 2183 } 2184 2185 return r; 2186 } 2187 2188 /* 2189 * On POWER9, threads are independent and can be in different partitions. 2190 * Therefore we consider each thread to be a subcore. 2191 * There is a restriction that all threads have to be in the same 2192 * MMU mode (radix or HPT), unfortunately, but since we only support 2193 * HPT guests on a HPT host so far, that isn't an impediment yet. 2194 */ 2195 static int threads_per_vcore(struct kvm *kvm) 2196 { 2197 if (kvm->arch.threads_indep) 2198 return 1; 2199 return threads_per_subcore; 2200 } 2201 2202 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2203 { 2204 struct kvmppc_vcore *vcore; 2205 2206 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2207 2208 if (vcore == NULL) 2209 return NULL; 2210 2211 spin_lock_init(&vcore->lock); 2212 spin_lock_init(&vcore->stoltb_lock); 2213 rcuwait_init(&vcore->wait); 2214 vcore->preempt_tb = TB_NIL; 2215 vcore->lpcr = kvm->arch.lpcr; 2216 vcore->first_vcpuid = id; 2217 vcore->kvm = kvm; 2218 INIT_LIST_HEAD(&vcore->preempt_list); 2219 2220 return vcore; 2221 } 2222 2223 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2224 static struct debugfs_timings_element { 2225 const char *name; 2226 size_t offset; 2227 } timings[] = { 2228 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2229 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2230 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2231 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2232 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2233 }; 2234 2235 #define N_TIMINGS (ARRAY_SIZE(timings)) 2236 2237 struct debugfs_timings_state { 2238 struct kvm_vcpu *vcpu; 2239 unsigned int buflen; 2240 char buf[N_TIMINGS * 100]; 2241 }; 2242 2243 static int debugfs_timings_open(struct inode *inode, struct file *file) 2244 { 2245 struct kvm_vcpu *vcpu = inode->i_private; 2246 struct debugfs_timings_state *p; 2247 2248 p = kzalloc(sizeof(*p), GFP_KERNEL); 2249 if (!p) 2250 return -ENOMEM; 2251 2252 kvm_get_kvm(vcpu->kvm); 2253 p->vcpu = vcpu; 2254 file->private_data = p; 2255 2256 return nonseekable_open(inode, file); 2257 } 2258 2259 static int debugfs_timings_release(struct inode *inode, struct file *file) 2260 { 2261 struct debugfs_timings_state *p = file->private_data; 2262 2263 kvm_put_kvm(p->vcpu->kvm); 2264 kfree(p); 2265 return 0; 2266 } 2267 2268 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2269 size_t len, loff_t *ppos) 2270 { 2271 struct debugfs_timings_state *p = file->private_data; 2272 struct kvm_vcpu *vcpu = p->vcpu; 2273 char *s, *buf_end; 2274 struct kvmhv_tb_accumulator tb; 2275 u64 count; 2276 loff_t pos; 2277 ssize_t n; 2278 int i, loops; 2279 bool ok; 2280 2281 if (!p->buflen) { 2282 s = p->buf; 2283 buf_end = s + sizeof(p->buf); 2284 for (i = 0; i < N_TIMINGS; ++i) { 2285 struct kvmhv_tb_accumulator *acc; 2286 2287 acc = (struct kvmhv_tb_accumulator *) 2288 ((unsigned long)vcpu + timings[i].offset); 2289 ok = false; 2290 for (loops = 0; loops < 1000; ++loops) { 2291 count = acc->seqcount; 2292 if (!(count & 1)) { 2293 smp_rmb(); 2294 tb = *acc; 2295 smp_rmb(); 2296 if (count == acc->seqcount) { 2297 ok = true; 2298 break; 2299 } 2300 } 2301 udelay(1); 2302 } 2303 if (!ok) 2304 snprintf(s, buf_end - s, "%s: stuck\n", 2305 timings[i].name); 2306 else 2307 snprintf(s, buf_end - s, 2308 "%s: %llu %llu %llu %llu\n", 2309 timings[i].name, count / 2, 2310 tb_to_ns(tb.tb_total), 2311 tb_to_ns(tb.tb_min), 2312 tb_to_ns(tb.tb_max)); 2313 s += strlen(s); 2314 } 2315 p->buflen = s - p->buf; 2316 } 2317 2318 pos = *ppos; 2319 if (pos >= p->buflen) 2320 return 0; 2321 if (len > p->buflen - pos) 2322 len = p->buflen - pos; 2323 n = copy_to_user(buf, p->buf + pos, len); 2324 if (n) { 2325 if (n == len) 2326 return -EFAULT; 2327 len -= n; 2328 } 2329 *ppos = pos + len; 2330 return len; 2331 } 2332 2333 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2334 size_t len, loff_t *ppos) 2335 { 2336 return -EACCES; 2337 } 2338 2339 static const struct file_operations debugfs_timings_ops = { 2340 .owner = THIS_MODULE, 2341 .open = debugfs_timings_open, 2342 .release = debugfs_timings_release, 2343 .read = debugfs_timings_read, 2344 .write = debugfs_timings_write, 2345 .llseek = generic_file_llseek, 2346 }; 2347 2348 /* Create a debugfs directory for the vcpu */ 2349 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2350 { 2351 char buf[16]; 2352 struct kvm *kvm = vcpu->kvm; 2353 2354 snprintf(buf, sizeof(buf), "vcpu%u", id); 2355 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2356 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2357 &debugfs_timings_ops); 2358 } 2359 2360 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2361 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2362 { 2363 } 2364 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2365 2366 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2367 { 2368 int err; 2369 int core; 2370 struct kvmppc_vcore *vcore; 2371 struct kvm *kvm; 2372 unsigned int id; 2373 2374 kvm = vcpu->kvm; 2375 id = vcpu->vcpu_id; 2376 2377 vcpu->arch.shared = &vcpu->arch.shregs; 2378 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2379 /* 2380 * The shared struct is never shared on HV, 2381 * so we can always use host endianness 2382 */ 2383 #ifdef __BIG_ENDIAN__ 2384 vcpu->arch.shared_big_endian = true; 2385 #else 2386 vcpu->arch.shared_big_endian = false; 2387 #endif 2388 #endif 2389 vcpu->arch.mmcr[0] = MMCR0_FC; 2390 vcpu->arch.ctrl = CTRL_RUNLATCH; 2391 /* default to host PVR, since we can't spoof it */ 2392 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2393 spin_lock_init(&vcpu->arch.vpa_update_lock); 2394 spin_lock_init(&vcpu->arch.tbacct_lock); 2395 vcpu->arch.busy_preempt = TB_NIL; 2396 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2397 2398 /* 2399 * Set the default HFSCR for the guest from the host value. 2400 * This value is only used on POWER9. 2401 * On POWER9, we want to virtualize the doorbell facility, so we 2402 * don't set the HFSCR_MSGP bit, and that causes those instructions 2403 * to trap and then we emulate them. 2404 */ 2405 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2406 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP | HFSCR_PREFIX; 2407 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2408 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2409 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2410 vcpu->arch.hfscr |= HFSCR_TM; 2411 } 2412 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2413 vcpu->arch.hfscr |= HFSCR_TM; 2414 2415 kvmppc_mmu_book3s_hv_init(vcpu); 2416 2417 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2418 2419 init_waitqueue_head(&vcpu->arch.cpu_run); 2420 2421 mutex_lock(&kvm->lock); 2422 vcore = NULL; 2423 err = -EINVAL; 2424 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2425 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2426 pr_devel("KVM: VCPU ID too high\n"); 2427 core = KVM_MAX_VCORES; 2428 } else { 2429 BUG_ON(kvm->arch.smt_mode != 1); 2430 core = kvmppc_pack_vcpu_id(kvm, id); 2431 } 2432 } else { 2433 core = id / kvm->arch.smt_mode; 2434 } 2435 if (core < KVM_MAX_VCORES) { 2436 vcore = kvm->arch.vcores[core]; 2437 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2438 pr_devel("KVM: collision on id %u", id); 2439 vcore = NULL; 2440 } else if (!vcore) { 2441 /* 2442 * Take mmu_setup_lock for mutual exclusion 2443 * with kvmppc_update_lpcr(). 2444 */ 2445 err = -ENOMEM; 2446 vcore = kvmppc_vcore_create(kvm, 2447 id & ~(kvm->arch.smt_mode - 1)); 2448 mutex_lock(&kvm->arch.mmu_setup_lock); 2449 kvm->arch.vcores[core] = vcore; 2450 kvm->arch.online_vcores++; 2451 mutex_unlock(&kvm->arch.mmu_setup_lock); 2452 } 2453 } 2454 mutex_unlock(&kvm->lock); 2455 2456 if (!vcore) 2457 return err; 2458 2459 spin_lock(&vcore->lock); 2460 ++vcore->num_threads; 2461 spin_unlock(&vcore->lock); 2462 vcpu->arch.vcore = vcore; 2463 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2464 vcpu->arch.thread_cpu = -1; 2465 vcpu->arch.prev_cpu = -1; 2466 2467 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2468 kvmppc_sanity_check(vcpu); 2469 2470 debugfs_vcpu_init(vcpu, id); 2471 2472 return 0; 2473 } 2474 2475 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2476 unsigned long flags) 2477 { 2478 int err; 2479 int esmt = 0; 2480 2481 if (flags) 2482 return -EINVAL; 2483 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2484 return -EINVAL; 2485 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2486 /* 2487 * On POWER8 (or POWER7), the threading mode is "strict", 2488 * so we pack smt_mode vcpus per vcore. 2489 */ 2490 if (smt_mode > threads_per_subcore) 2491 return -EINVAL; 2492 } else { 2493 /* 2494 * On POWER9, the threading mode is "loose", 2495 * so each vcpu gets its own vcore. 2496 */ 2497 esmt = smt_mode; 2498 smt_mode = 1; 2499 } 2500 mutex_lock(&kvm->lock); 2501 err = -EBUSY; 2502 if (!kvm->arch.online_vcores) { 2503 kvm->arch.smt_mode = smt_mode; 2504 kvm->arch.emul_smt_mode = esmt; 2505 err = 0; 2506 } 2507 mutex_unlock(&kvm->lock); 2508 2509 return err; 2510 } 2511 2512 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2513 { 2514 if (vpa->pinned_addr) 2515 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2516 vpa->dirty); 2517 } 2518 2519 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2520 { 2521 spin_lock(&vcpu->arch.vpa_update_lock); 2522 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2523 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2524 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2525 spin_unlock(&vcpu->arch.vpa_update_lock); 2526 } 2527 2528 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2529 { 2530 /* Indicate we want to get back into the guest */ 2531 return 1; 2532 } 2533 2534 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2535 { 2536 unsigned long dec_nsec, now; 2537 2538 now = get_tb(); 2539 if (now > vcpu->arch.dec_expires) { 2540 /* decrementer has already gone negative */ 2541 kvmppc_core_queue_dec(vcpu); 2542 kvmppc_core_prepare_to_enter(vcpu); 2543 return; 2544 } 2545 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2546 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2547 vcpu->arch.timer_running = 1; 2548 } 2549 2550 extern int __kvmppc_vcore_entry(void); 2551 2552 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2553 struct kvm_vcpu *vcpu) 2554 { 2555 u64 now; 2556 2557 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2558 return; 2559 spin_lock_irq(&vcpu->arch.tbacct_lock); 2560 now = mftb(); 2561 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2562 vcpu->arch.stolen_logged; 2563 vcpu->arch.busy_preempt = now; 2564 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2565 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2566 --vc->n_runnable; 2567 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2568 } 2569 2570 static int kvmppc_grab_hwthread(int cpu) 2571 { 2572 struct paca_struct *tpaca; 2573 long timeout = 10000; 2574 2575 tpaca = paca_ptrs[cpu]; 2576 2577 /* Ensure the thread won't go into the kernel if it wakes */ 2578 tpaca->kvm_hstate.kvm_vcpu = NULL; 2579 tpaca->kvm_hstate.kvm_vcore = NULL; 2580 tpaca->kvm_hstate.napping = 0; 2581 smp_wmb(); 2582 tpaca->kvm_hstate.hwthread_req = 1; 2583 2584 /* 2585 * If the thread is already executing in the kernel (e.g. handling 2586 * a stray interrupt), wait for it to get back to nap mode. 2587 * The smp_mb() is to ensure that our setting of hwthread_req 2588 * is visible before we look at hwthread_state, so if this 2589 * races with the code at system_reset_pSeries and the thread 2590 * misses our setting of hwthread_req, we are sure to see its 2591 * setting of hwthread_state, and vice versa. 2592 */ 2593 smp_mb(); 2594 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2595 if (--timeout <= 0) { 2596 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2597 return -EBUSY; 2598 } 2599 udelay(1); 2600 } 2601 return 0; 2602 } 2603 2604 static void kvmppc_release_hwthread(int cpu) 2605 { 2606 struct paca_struct *tpaca; 2607 2608 tpaca = paca_ptrs[cpu]; 2609 tpaca->kvm_hstate.hwthread_req = 0; 2610 tpaca->kvm_hstate.kvm_vcpu = NULL; 2611 tpaca->kvm_hstate.kvm_vcore = NULL; 2612 tpaca->kvm_hstate.kvm_split_mode = NULL; 2613 } 2614 2615 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2616 { 2617 struct kvm_nested_guest *nested = vcpu->arch.nested; 2618 cpumask_t *cpu_in_guest; 2619 int i; 2620 2621 cpu = cpu_first_thread_sibling(cpu); 2622 if (nested) { 2623 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2624 cpu_in_guest = &nested->cpu_in_guest; 2625 } else { 2626 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2627 cpu_in_guest = &kvm->arch.cpu_in_guest; 2628 } 2629 /* 2630 * Make sure setting of bit in need_tlb_flush precedes 2631 * testing of cpu_in_guest bits. The matching barrier on 2632 * the other side is the first smp_mb() in kvmppc_run_core(). 2633 */ 2634 smp_mb(); 2635 for (i = 0; i < threads_per_core; ++i) 2636 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2637 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2638 } 2639 2640 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2641 { 2642 struct kvm_nested_guest *nested = vcpu->arch.nested; 2643 struct kvm *kvm = vcpu->kvm; 2644 int prev_cpu; 2645 2646 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2647 return; 2648 2649 if (nested) 2650 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2651 else 2652 prev_cpu = vcpu->arch.prev_cpu; 2653 2654 /* 2655 * With radix, the guest can do TLB invalidations itself, 2656 * and it could choose to use the local form (tlbiel) if 2657 * it is invalidating a translation that has only ever been 2658 * used on one vcpu. However, that doesn't mean it has 2659 * only ever been used on one physical cpu, since vcpus 2660 * can move around between pcpus. To cope with this, when 2661 * a vcpu moves from one pcpu to another, we need to tell 2662 * any vcpus running on the same core as this vcpu previously 2663 * ran to flush the TLB. The TLB is shared between threads, 2664 * so we use a single bit in .need_tlb_flush for all 4 threads. 2665 */ 2666 if (prev_cpu != pcpu) { 2667 if (prev_cpu >= 0 && 2668 cpu_first_thread_sibling(prev_cpu) != 2669 cpu_first_thread_sibling(pcpu)) 2670 radix_flush_cpu(kvm, prev_cpu, vcpu); 2671 if (nested) 2672 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2673 else 2674 vcpu->arch.prev_cpu = pcpu; 2675 } 2676 } 2677 2678 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2679 { 2680 int cpu; 2681 struct paca_struct *tpaca; 2682 struct kvm *kvm = vc->kvm; 2683 2684 cpu = vc->pcpu; 2685 if (vcpu) { 2686 if (vcpu->arch.timer_running) { 2687 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2688 vcpu->arch.timer_running = 0; 2689 } 2690 cpu += vcpu->arch.ptid; 2691 vcpu->cpu = vc->pcpu; 2692 vcpu->arch.thread_cpu = cpu; 2693 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2694 } 2695 tpaca = paca_ptrs[cpu]; 2696 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2697 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2698 tpaca->kvm_hstate.fake_suspend = 0; 2699 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2700 smp_wmb(); 2701 tpaca->kvm_hstate.kvm_vcore = vc; 2702 if (cpu != smp_processor_id()) 2703 kvmppc_ipi_thread(cpu); 2704 } 2705 2706 static void kvmppc_wait_for_nap(int n_threads) 2707 { 2708 int cpu = smp_processor_id(); 2709 int i, loops; 2710 2711 if (n_threads <= 1) 2712 return; 2713 for (loops = 0; loops < 1000000; ++loops) { 2714 /* 2715 * Check if all threads are finished. 2716 * We set the vcore pointer when starting a thread 2717 * and the thread clears it when finished, so we look 2718 * for any threads that still have a non-NULL vcore ptr. 2719 */ 2720 for (i = 1; i < n_threads; ++i) 2721 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2722 break; 2723 if (i == n_threads) { 2724 HMT_medium(); 2725 return; 2726 } 2727 HMT_low(); 2728 } 2729 HMT_medium(); 2730 for (i = 1; i < n_threads; ++i) 2731 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2732 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2733 } 2734 2735 /* 2736 * Check that we are on thread 0 and that any other threads in 2737 * this core are off-line. Then grab the threads so they can't 2738 * enter the kernel. 2739 */ 2740 static int on_primary_thread(void) 2741 { 2742 int cpu = smp_processor_id(); 2743 int thr; 2744 2745 /* Are we on a primary subcore? */ 2746 if (cpu_thread_in_subcore(cpu)) 2747 return 0; 2748 2749 thr = 0; 2750 while (++thr < threads_per_subcore) 2751 if (cpu_online(cpu + thr)) 2752 return 0; 2753 2754 /* Grab all hw threads so they can't go into the kernel */ 2755 for (thr = 1; thr < threads_per_subcore; ++thr) { 2756 if (kvmppc_grab_hwthread(cpu + thr)) { 2757 /* Couldn't grab one; let the others go */ 2758 do { 2759 kvmppc_release_hwthread(cpu + thr); 2760 } while (--thr > 0); 2761 return 0; 2762 } 2763 } 2764 return 1; 2765 } 2766 2767 /* 2768 * A list of virtual cores for each physical CPU. 2769 * These are vcores that could run but their runner VCPU tasks are 2770 * (or may be) preempted. 2771 */ 2772 struct preempted_vcore_list { 2773 struct list_head list; 2774 spinlock_t lock; 2775 }; 2776 2777 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2778 2779 static void init_vcore_lists(void) 2780 { 2781 int cpu; 2782 2783 for_each_possible_cpu(cpu) { 2784 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2785 spin_lock_init(&lp->lock); 2786 INIT_LIST_HEAD(&lp->list); 2787 } 2788 } 2789 2790 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2791 { 2792 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2793 2794 vc->vcore_state = VCORE_PREEMPT; 2795 vc->pcpu = smp_processor_id(); 2796 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2797 spin_lock(&lp->lock); 2798 list_add_tail(&vc->preempt_list, &lp->list); 2799 spin_unlock(&lp->lock); 2800 } 2801 2802 /* Start accumulating stolen time */ 2803 kvmppc_core_start_stolen(vc); 2804 } 2805 2806 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2807 { 2808 struct preempted_vcore_list *lp; 2809 2810 kvmppc_core_end_stolen(vc); 2811 if (!list_empty(&vc->preempt_list)) { 2812 lp = &per_cpu(preempted_vcores, vc->pcpu); 2813 spin_lock(&lp->lock); 2814 list_del_init(&vc->preempt_list); 2815 spin_unlock(&lp->lock); 2816 } 2817 vc->vcore_state = VCORE_INACTIVE; 2818 } 2819 2820 /* 2821 * This stores information about the virtual cores currently 2822 * assigned to a physical core. 2823 */ 2824 struct core_info { 2825 int n_subcores; 2826 int max_subcore_threads; 2827 int total_threads; 2828 int subcore_threads[MAX_SUBCORES]; 2829 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2830 }; 2831 2832 /* 2833 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2834 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2835 */ 2836 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2837 2838 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2839 { 2840 memset(cip, 0, sizeof(*cip)); 2841 cip->n_subcores = 1; 2842 cip->max_subcore_threads = vc->num_threads; 2843 cip->total_threads = vc->num_threads; 2844 cip->subcore_threads[0] = vc->num_threads; 2845 cip->vc[0] = vc; 2846 } 2847 2848 static bool subcore_config_ok(int n_subcores, int n_threads) 2849 { 2850 /* 2851 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2852 * split-core mode, with one thread per subcore. 2853 */ 2854 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2855 return n_subcores <= 4 && n_threads == 1; 2856 2857 /* On POWER8, can only dynamically split if unsplit to begin with */ 2858 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2859 return false; 2860 if (n_subcores > MAX_SUBCORES) 2861 return false; 2862 if (n_subcores > 1) { 2863 if (!(dynamic_mt_modes & 2)) 2864 n_subcores = 4; 2865 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2866 return false; 2867 } 2868 2869 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2870 } 2871 2872 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2873 { 2874 vc->entry_exit_map = 0; 2875 vc->in_guest = 0; 2876 vc->napping_threads = 0; 2877 vc->conferring_threads = 0; 2878 vc->tb_offset_applied = 0; 2879 } 2880 2881 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2882 { 2883 int n_threads = vc->num_threads; 2884 int sub; 2885 2886 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2887 return false; 2888 2889 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2890 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2891 return false; 2892 2893 if (n_threads < cip->max_subcore_threads) 2894 n_threads = cip->max_subcore_threads; 2895 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2896 return false; 2897 cip->max_subcore_threads = n_threads; 2898 2899 sub = cip->n_subcores; 2900 ++cip->n_subcores; 2901 cip->total_threads += vc->num_threads; 2902 cip->subcore_threads[sub] = vc->num_threads; 2903 cip->vc[sub] = vc; 2904 init_vcore_to_run(vc); 2905 list_del_init(&vc->preempt_list); 2906 2907 return true; 2908 } 2909 2910 /* 2911 * Work out whether it is possible to piggyback the execution of 2912 * vcore *pvc onto the execution of the other vcores described in *cip. 2913 */ 2914 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2915 int target_threads) 2916 { 2917 if (cip->total_threads + pvc->num_threads > target_threads) 2918 return false; 2919 2920 return can_dynamic_split(pvc, cip); 2921 } 2922 2923 static void prepare_threads(struct kvmppc_vcore *vc) 2924 { 2925 int i; 2926 struct kvm_vcpu *vcpu; 2927 2928 for_each_runnable_thread(i, vcpu, vc) { 2929 if (signal_pending(vcpu->arch.run_task)) 2930 vcpu->arch.ret = -EINTR; 2931 else if (no_mixing_hpt_and_radix && 2932 kvm_is_radix(vc->kvm) != radix_enabled()) 2933 vcpu->arch.ret = -EINVAL; 2934 else if (vcpu->arch.vpa.update_pending || 2935 vcpu->arch.slb_shadow.update_pending || 2936 vcpu->arch.dtl.update_pending) 2937 vcpu->arch.ret = RESUME_GUEST; 2938 else 2939 continue; 2940 kvmppc_remove_runnable(vc, vcpu); 2941 wake_up(&vcpu->arch.cpu_run); 2942 } 2943 } 2944 2945 static void collect_piggybacks(struct core_info *cip, int target_threads) 2946 { 2947 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2948 struct kvmppc_vcore *pvc, *vcnext; 2949 2950 spin_lock(&lp->lock); 2951 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2952 if (!spin_trylock(&pvc->lock)) 2953 continue; 2954 prepare_threads(pvc); 2955 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 2956 list_del_init(&pvc->preempt_list); 2957 if (pvc->runner == NULL) { 2958 pvc->vcore_state = VCORE_INACTIVE; 2959 kvmppc_core_end_stolen(pvc); 2960 } 2961 spin_unlock(&pvc->lock); 2962 continue; 2963 } 2964 if (!can_piggyback(pvc, cip, target_threads)) { 2965 spin_unlock(&pvc->lock); 2966 continue; 2967 } 2968 kvmppc_core_end_stolen(pvc); 2969 pvc->vcore_state = VCORE_PIGGYBACK; 2970 if (cip->total_threads >= target_threads) 2971 break; 2972 } 2973 spin_unlock(&lp->lock); 2974 } 2975 2976 static bool recheck_signals_and_mmu(struct core_info *cip) 2977 { 2978 int sub, i; 2979 struct kvm_vcpu *vcpu; 2980 struct kvmppc_vcore *vc; 2981 2982 for (sub = 0; sub < cip->n_subcores; ++sub) { 2983 vc = cip->vc[sub]; 2984 if (!vc->kvm->arch.mmu_ready) 2985 return true; 2986 for_each_runnable_thread(i, vcpu, vc) 2987 if (signal_pending(vcpu->arch.run_task)) 2988 return true; 2989 } 2990 return false; 2991 } 2992 2993 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2994 { 2995 int still_running = 0, i; 2996 u64 now; 2997 long ret; 2998 struct kvm_vcpu *vcpu; 2999 3000 spin_lock(&vc->lock); 3001 now = get_tb(); 3002 for_each_runnable_thread(i, vcpu, vc) { 3003 /* 3004 * It's safe to unlock the vcore in the loop here, because 3005 * for_each_runnable_thread() is safe against removal of 3006 * the vcpu, and the vcore state is VCORE_EXITING here, 3007 * so any vcpus becoming runnable will have their arch.trap 3008 * set to zero and can't actually run in the guest. 3009 */ 3010 spin_unlock(&vc->lock); 3011 /* cancel pending dec exception if dec is positive */ 3012 if (now < vcpu->arch.dec_expires && 3013 kvmppc_core_pending_dec(vcpu)) 3014 kvmppc_core_dequeue_dec(vcpu); 3015 3016 trace_kvm_guest_exit(vcpu); 3017 3018 ret = RESUME_GUEST; 3019 if (vcpu->arch.trap) 3020 ret = kvmppc_handle_exit_hv(vcpu, 3021 vcpu->arch.run_task); 3022 3023 vcpu->arch.ret = ret; 3024 vcpu->arch.trap = 0; 3025 3026 spin_lock(&vc->lock); 3027 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 3028 if (vcpu->arch.pending_exceptions) 3029 kvmppc_core_prepare_to_enter(vcpu); 3030 if (vcpu->arch.ceded) 3031 kvmppc_set_timer(vcpu); 3032 else 3033 ++still_running; 3034 } else { 3035 kvmppc_remove_runnable(vc, vcpu); 3036 wake_up(&vcpu->arch.cpu_run); 3037 } 3038 } 3039 if (!is_master) { 3040 if (still_running > 0) { 3041 kvmppc_vcore_preempt(vc); 3042 } else if (vc->runner) { 3043 vc->vcore_state = VCORE_PREEMPT; 3044 kvmppc_core_start_stolen(vc); 3045 } else { 3046 vc->vcore_state = VCORE_INACTIVE; 3047 } 3048 if (vc->n_runnable > 0 && vc->runner == NULL) { 3049 /* make sure there's a candidate runner awake */ 3050 i = -1; 3051 vcpu = next_runnable_thread(vc, &i); 3052 wake_up(&vcpu->arch.cpu_run); 3053 } 3054 } 3055 spin_unlock(&vc->lock); 3056 } 3057 3058 /* 3059 * Clear core from the list of active host cores as we are about to 3060 * enter the guest. Only do this if it is the primary thread of the 3061 * core (not if a subcore) that is entering the guest. 3062 */ 3063 static inline int kvmppc_clear_host_core(unsigned int cpu) 3064 { 3065 int core; 3066 3067 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3068 return 0; 3069 /* 3070 * Memory barrier can be omitted here as we will do a smp_wmb() 3071 * later in kvmppc_start_thread and we need ensure that state is 3072 * visible to other CPUs only after we enter guest. 3073 */ 3074 core = cpu >> threads_shift; 3075 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3076 return 0; 3077 } 3078 3079 /* 3080 * Advertise this core as an active host core since we exited the guest 3081 * Only need to do this if it is the primary thread of the core that is 3082 * exiting. 3083 */ 3084 static inline int kvmppc_set_host_core(unsigned int cpu) 3085 { 3086 int core; 3087 3088 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3089 return 0; 3090 3091 /* 3092 * Memory barrier can be omitted here because we do a spin_unlock 3093 * immediately after this which provides the memory barrier. 3094 */ 3095 core = cpu >> threads_shift; 3096 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3097 return 0; 3098 } 3099 3100 static void set_irq_happened(int trap) 3101 { 3102 switch (trap) { 3103 case BOOK3S_INTERRUPT_EXTERNAL: 3104 local_paca->irq_happened |= PACA_IRQ_EE; 3105 break; 3106 case BOOK3S_INTERRUPT_H_DOORBELL: 3107 local_paca->irq_happened |= PACA_IRQ_DBELL; 3108 break; 3109 case BOOK3S_INTERRUPT_HMI: 3110 local_paca->irq_happened |= PACA_IRQ_HMI; 3111 break; 3112 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3113 replay_system_reset(); 3114 break; 3115 } 3116 } 3117 3118 /* 3119 * Run a set of guest threads on a physical core. 3120 * Called with vc->lock held. 3121 */ 3122 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3123 { 3124 struct kvm_vcpu *vcpu; 3125 int i; 3126 int srcu_idx; 3127 struct core_info core_info; 3128 struct kvmppc_vcore *pvc; 3129 struct kvm_split_mode split_info, *sip; 3130 int split, subcore_size, active; 3131 int sub; 3132 bool thr0_done; 3133 unsigned long cmd_bit, stat_bit; 3134 int pcpu, thr; 3135 int target_threads; 3136 int controlled_threads; 3137 int trap; 3138 bool is_power8; 3139 3140 /* 3141 * Remove from the list any threads that have a signal pending 3142 * or need a VPA update done 3143 */ 3144 prepare_threads(vc); 3145 3146 /* if the runner is no longer runnable, let the caller pick a new one */ 3147 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3148 return; 3149 3150 /* 3151 * Initialize *vc. 3152 */ 3153 init_vcore_to_run(vc); 3154 vc->preempt_tb = TB_NIL; 3155 3156 /* 3157 * Number of threads that we will be controlling: the same as 3158 * the number of threads per subcore, except on POWER9, 3159 * where it's 1 because the threads are (mostly) independent. 3160 */ 3161 controlled_threads = threads_per_vcore(vc->kvm); 3162 3163 /* 3164 * Make sure we are running on primary threads, and that secondary 3165 * threads are offline. Also check if the number of threads in this 3166 * guest are greater than the current system threads per guest. 3167 * On POWER9, we need to be not in independent-threads mode if 3168 * this is a HPT guest on a radix host machine where the 3169 * CPU threads may not be in different MMU modes. 3170 */ 3171 if ((controlled_threads > 1) && 3172 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) { 3173 for_each_runnable_thread(i, vcpu, vc) { 3174 vcpu->arch.ret = -EBUSY; 3175 kvmppc_remove_runnable(vc, vcpu); 3176 wake_up(&vcpu->arch.cpu_run); 3177 } 3178 goto out; 3179 } 3180 3181 /* 3182 * See if we could run any other vcores on the physical core 3183 * along with this one. 3184 */ 3185 init_core_info(&core_info, vc); 3186 pcpu = smp_processor_id(); 3187 target_threads = controlled_threads; 3188 if (target_smt_mode && target_smt_mode < target_threads) 3189 target_threads = target_smt_mode; 3190 if (vc->num_threads < target_threads) 3191 collect_piggybacks(&core_info, target_threads); 3192 3193 /* 3194 * On radix, arrange for TLB flushing if necessary. 3195 * This has to be done before disabling interrupts since 3196 * it uses smp_call_function(). 3197 */ 3198 pcpu = smp_processor_id(); 3199 if (kvm_is_radix(vc->kvm)) { 3200 for (sub = 0; sub < core_info.n_subcores; ++sub) 3201 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3202 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3203 } 3204 3205 /* 3206 * Hard-disable interrupts, and check resched flag and signals. 3207 * If we need to reschedule or deliver a signal, clean up 3208 * and return without going into the guest(s). 3209 * If the mmu_ready flag has been cleared, don't go into the 3210 * guest because that means a HPT resize operation is in progress. 3211 */ 3212 local_irq_disable(); 3213 hard_irq_disable(); 3214 if (lazy_irq_pending() || need_resched() || 3215 recheck_signals_and_mmu(&core_info)) { 3216 local_irq_enable(); 3217 vc->vcore_state = VCORE_INACTIVE; 3218 /* Unlock all except the primary vcore */ 3219 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3220 pvc = core_info.vc[sub]; 3221 /* Put back on to the preempted vcores list */ 3222 kvmppc_vcore_preempt(pvc); 3223 spin_unlock(&pvc->lock); 3224 } 3225 for (i = 0; i < controlled_threads; ++i) 3226 kvmppc_release_hwthread(pcpu + i); 3227 return; 3228 } 3229 3230 kvmppc_clear_host_core(pcpu); 3231 3232 /* Decide on micro-threading (split-core) mode */ 3233 subcore_size = threads_per_subcore; 3234 cmd_bit = stat_bit = 0; 3235 split = core_info.n_subcores; 3236 sip = NULL; 3237 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3238 && !cpu_has_feature(CPU_FTR_ARCH_300); 3239 3240 if (split > 1) { 3241 sip = &split_info; 3242 memset(&split_info, 0, sizeof(split_info)); 3243 for (sub = 0; sub < core_info.n_subcores; ++sub) 3244 split_info.vc[sub] = core_info.vc[sub]; 3245 3246 if (is_power8) { 3247 if (split == 2 && (dynamic_mt_modes & 2)) { 3248 cmd_bit = HID0_POWER8_1TO2LPAR; 3249 stat_bit = HID0_POWER8_2LPARMODE; 3250 } else { 3251 split = 4; 3252 cmd_bit = HID0_POWER8_1TO4LPAR; 3253 stat_bit = HID0_POWER8_4LPARMODE; 3254 } 3255 subcore_size = MAX_SMT_THREADS / split; 3256 split_info.rpr = mfspr(SPRN_RPR); 3257 split_info.pmmar = mfspr(SPRN_PMMAR); 3258 split_info.ldbar = mfspr(SPRN_LDBAR); 3259 split_info.subcore_size = subcore_size; 3260 } else { 3261 split_info.subcore_size = 1; 3262 } 3263 3264 /* order writes to split_info before kvm_split_mode pointer */ 3265 smp_wmb(); 3266 } 3267 3268 for (thr = 0; thr < controlled_threads; ++thr) { 3269 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3270 3271 paca->kvm_hstate.napping = 0; 3272 paca->kvm_hstate.kvm_split_mode = sip; 3273 } 3274 3275 /* Initiate micro-threading (split-core) on POWER8 if required */ 3276 if (cmd_bit) { 3277 unsigned long hid0 = mfspr(SPRN_HID0); 3278 3279 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3280 mb(); 3281 mtspr(SPRN_HID0, hid0); 3282 isync(); 3283 for (;;) { 3284 hid0 = mfspr(SPRN_HID0); 3285 if (hid0 & stat_bit) 3286 break; 3287 cpu_relax(); 3288 } 3289 } 3290 3291 /* 3292 * On POWER8, set RWMR register. 3293 * Since it only affects PURR and SPURR, it doesn't affect 3294 * the host, so we don't save/restore the host value. 3295 */ 3296 if (is_power8) { 3297 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3298 int n_online = atomic_read(&vc->online_count); 3299 3300 /* 3301 * Use the 8-thread value if we're doing split-core 3302 * or if the vcore's online count looks bogus. 3303 */ 3304 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3305 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3306 rwmr_val = p8_rwmr_values[n_online]; 3307 mtspr(SPRN_RWMR, rwmr_val); 3308 } 3309 3310 /* Start all the threads */ 3311 active = 0; 3312 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3313 thr = is_power8 ? subcore_thread_map[sub] : sub; 3314 thr0_done = false; 3315 active |= 1 << thr; 3316 pvc = core_info.vc[sub]; 3317 pvc->pcpu = pcpu + thr; 3318 for_each_runnable_thread(i, vcpu, pvc) { 3319 kvmppc_start_thread(vcpu, pvc); 3320 kvmppc_create_dtl_entry(vcpu, pvc); 3321 trace_kvm_guest_enter(vcpu); 3322 if (!vcpu->arch.ptid) 3323 thr0_done = true; 3324 active |= 1 << (thr + vcpu->arch.ptid); 3325 } 3326 /* 3327 * We need to start the first thread of each subcore 3328 * even if it doesn't have a vcpu. 3329 */ 3330 if (!thr0_done) 3331 kvmppc_start_thread(NULL, pvc); 3332 } 3333 3334 /* 3335 * Ensure that split_info.do_nap is set after setting 3336 * the vcore pointer in the PACA of the secondaries. 3337 */ 3338 smp_mb(); 3339 3340 /* 3341 * When doing micro-threading, poke the inactive threads as well. 3342 * This gets them to the nap instruction after kvm_do_nap, 3343 * which reduces the time taken to unsplit later. 3344 */ 3345 if (cmd_bit) { 3346 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3347 for (thr = 1; thr < threads_per_subcore; ++thr) 3348 if (!(active & (1 << thr))) 3349 kvmppc_ipi_thread(pcpu + thr); 3350 } 3351 3352 vc->vcore_state = VCORE_RUNNING; 3353 preempt_disable(); 3354 3355 trace_kvmppc_run_core(vc, 0); 3356 3357 for (sub = 0; sub < core_info.n_subcores; ++sub) 3358 spin_unlock(&core_info.vc[sub]->lock); 3359 3360 guest_enter_irqoff(); 3361 3362 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3363 3364 this_cpu_disable_ftrace(); 3365 3366 /* 3367 * Interrupts will be enabled once we get into the guest, 3368 * so tell lockdep that we're about to enable interrupts. 3369 */ 3370 trace_hardirqs_on(); 3371 3372 trap = __kvmppc_vcore_entry(); 3373 3374 trace_hardirqs_off(); 3375 3376 this_cpu_enable_ftrace(); 3377 3378 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3379 3380 set_irq_happened(trap); 3381 3382 spin_lock(&vc->lock); 3383 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3384 vc->vcore_state = VCORE_EXITING; 3385 3386 /* wait for secondary threads to finish writing their state to memory */ 3387 kvmppc_wait_for_nap(controlled_threads); 3388 3389 /* Return to whole-core mode if we split the core earlier */ 3390 if (cmd_bit) { 3391 unsigned long hid0 = mfspr(SPRN_HID0); 3392 unsigned long loops = 0; 3393 3394 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3395 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3396 mb(); 3397 mtspr(SPRN_HID0, hid0); 3398 isync(); 3399 for (;;) { 3400 hid0 = mfspr(SPRN_HID0); 3401 if (!(hid0 & stat_bit)) 3402 break; 3403 cpu_relax(); 3404 ++loops; 3405 } 3406 split_info.do_nap = 0; 3407 } 3408 3409 kvmppc_set_host_core(pcpu); 3410 3411 local_irq_enable(); 3412 guest_exit(); 3413 3414 /* Let secondaries go back to the offline loop */ 3415 for (i = 0; i < controlled_threads; ++i) { 3416 kvmppc_release_hwthread(pcpu + i); 3417 if (sip && sip->napped[i]) 3418 kvmppc_ipi_thread(pcpu + i); 3419 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3420 } 3421 3422 spin_unlock(&vc->lock); 3423 3424 /* make sure updates to secondary vcpu structs are visible now */ 3425 smp_mb(); 3426 3427 preempt_enable(); 3428 3429 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3430 pvc = core_info.vc[sub]; 3431 post_guest_process(pvc, pvc == vc); 3432 } 3433 3434 spin_lock(&vc->lock); 3435 3436 out: 3437 vc->vcore_state = VCORE_INACTIVE; 3438 trace_kvmppc_run_core(vc, 1); 3439 } 3440 3441 /* 3442 * Load up hypervisor-mode registers on P9. 3443 */ 3444 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3445 unsigned long lpcr) 3446 { 3447 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3448 s64 hdec; 3449 u64 tb, purr, spurr; 3450 int trap; 3451 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3452 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3453 unsigned long host_dawr0 = mfspr(SPRN_DAWR0); 3454 unsigned long host_dawrx0 = mfspr(SPRN_DAWRX0); 3455 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3456 unsigned long host_pidr = mfspr(SPRN_PID); 3457 unsigned long host_dawr1 = 0; 3458 unsigned long host_dawrx1 = 0; 3459 3460 if (cpu_has_feature(CPU_FTR_DAWR1)) { 3461 host_dawr1 = mfspr(SPRN_DAWR1); 3462 host_dawrx1 = mfspr(SPRN_DAWRX1); 3463 } 3464 3465 /* 3466 * P8 and P9 suppress the HDEC exception when LPCR[HDICE] = 0, 3467 * so set HDICE before writing HDEC. 3468 */ 3469 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr | LPCR_HDICE); 3470 isync(); 3471 3472 hdec = time_limit - mftb(); 3473 if (hdec < 0) { 3474 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3475 isync(); 3476 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3477 } 3478 mtspr(SPRN_HDEC, hdec); 3479 3480 if (vc->tb_offset) { 3481 u64 new_tb = mftb() + vc->tb_offset; 3482 mtspr(SPRN_TBU40, new_tb); 3483 tb = mftb(); 3484 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3485 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3486 vc->tb_offset_applied = vc->tb_offset; 3487 } 3488 3489 if (vc->pcr) 3490 mtspr(SPRN_PCR, vc->pcr | PCR_MASK); 3491 mtspr(SPRN_DPDES, vc->dpdes); 3492 mtspr(SPRN_VTB, vc->vtb); 3493 3494 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3495 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3496 mtspr(SPRN_PURR, vcpu->arch.purr); 3497 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3498 3499 if (dawr_enabled()) { 3500 mtspr(SPRN_DAWR0, vcpu->arch.dawr0); 3501 mtspr(SPRN_DAWRX0, vcpu->arch.dawrx0); 3502 if (cpu_has_feature(CPU_FTR_DAWR1)) { 3503 mtspr(SPRN_DAWR1, vcpu->arch.dawr1); 3504 mtspr(SPRN_DAWRX1, vcpu->arch.dawrx1); 3505 } 3506 } 3507 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3508 mtspr(SPRN_IC, vcpu->arch.ic); 3509 mtspr(SPRN_PID, vcpu->arch.pid); 3510 3511 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3512 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3513 3514 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3515 3516 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3517 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3518 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3519 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3520 3521 mtspr(SPRN_AMOR, ~0UL); 3522 3523 mtspr(SPRN_LPCR, lpcr); 3524 isync(); 3525 3526 kvmppc_xive_push_vcpu(vcpu); 3527 3528 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3529 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3530 3531 trap = __kvmhv_vcpu_entry_p9(vcpu); 3532 3533 /* Advance host PURR/SPURR by the amount used by guest */ 3534 purr = mfspr(SPRN_PURR); 3535 spurr = mfspr(SPRN_SPURR); 3536 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3537 purr - vcpu->arch.purr); 3538 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3539 spurr - vcpu->arch.spurr); 3540 vcpu->arch.purr = purr; 3541 vcpu->arch.spurr = spurr; 3542 3543 vcpu->arch.ic = mfspr(SPRN_IC); 3544 vcpu->arch.pid = mfspr(SPRN_PID); 3545 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3546 3547 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3548 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3549 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3550 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3551 3552 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */ 3553 mtspr(SPRN_PSSCR, host_psscr | 3554 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3555 mtspr(SPRN_HFSCR, host_hfscr); 3556 mtspr(SPRN_CIABR, host_ciabr); 3557 mtspr(SPRN_DAWR0, host_dawr0); 3558 mtspr(SPRN_DAWRX0, host_dawrx0); 3559 if (cpu_has_feature(CPU_FTR_DAWR1)) { 3560 mtspr(SPRN_DAWR1, host_dawr1); 3561 mtspr(SPRN_DAWRX1, host_dawrx1); 3562 } 3563 mtspr(SPRN_PID, host_pidr); 3564 3565 /* 3566 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3567 * case we interrupted the guest between a tlbie and a ptesync. 3568 */ 3569 asm volatile("eieio; tlbsync; ptesync"); 3570 3571 /* 3572 * cp_abort is required if the processor supports local copy-paste 3573 * to clear the copy buffer that was under control of the guest. 3574 */ 3575 if (cpu_has_feature(CPU_FTR_ARCH_31)) 3576 asm volatile(PPC_CP_ABORT); 3577 3578 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3579 isync(); 3580 3581 vc->dpdes = mfspr(SPRN_DPDES); 3582 vc->vtb = mfspr(SPRN_VTB); 3583 mtspr(SPRN_DPDES, 0); 3584 if (vc->pcr) 3585 mtspr(SPRN_PCR, PCR_MASK); 3586 3587 if (vc->tb_offset_applied) { 3588 u64 new_tb = mftb() - vc->tb_offset_applied; 3589 mtspr(SPRN_TBU40, new_tb); 3590 tb = mftb(); 3591 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3592 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3593 vc->tb_offset_applied = 0; 3594 } 3595 3596 mtspr(SPRN_HDEC, 0x7fffffff); 3597 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3598 3599 return trap; 3600 } 3601 3602 /* 3603 * Virtual-mode guest entry for POWER9 and later when the host and 3604 * guest are both using the radix MMU. The LPIDR has already been set. 3605 */ 3606 static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3607 unsigned long lpcr) 3608 { 3609 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3610 unsigned long host_dscr = mfspr(SPRN_DSCR); 3611 unsigned long host_tidr = mfspr(SPRN_TIDR); 3612 unsigned long host_iamr = mfspr(SPRN_IAMR); 3613 unsigned long host_amr = mfspr(SPRN_AMR); 3614 unsigned long host_fscr = mfspr(SPRN_FSCR); 3615 s64 dec; 3616 u64 tb; 3617 int trap, save_pmu; 3618 3619 dec = mfspr(SPRN_DEC); 3620 tb = mftb(); 3621 if (dec < 0) 3622 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3623 local_paca->kvm_hstate.dec_expires = dec + tb; 3624 if (local_paca->kvm_hstate.dec_expires < time_limit) 3625 time_limit = local_paca->kvm_hstate.dec_expires; 3626 3627 vcpu->arch.ceded = 0; 3628 3629 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3630 3631 kvmppc_subcore_enter_guest(); 3632 3633 vc->entry_exit_map = 1; 3634 vc->in_guest = 1; 3635 3636 if (vcpu->arch.vpa.pinned_addr) { 3637 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3638 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3639 lp->yield_count = cpu_to_be32(yield_count); 3640 vcpu->arch.vpa.dirty = 1; 3641 } 3642 3643 if (cpu_has_feature(CPU_FTR_TM) || 3644 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3645 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3646 3647 kvmhv_load_guest_pmu(vcpu); 3648 3649 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3650 load_fp_state(&vcpu->arch.fp); 3651 #ifdef CONFIG_ALTIVEC 3652 load_vr_state(&vcpu->arch.vr); 3653 #endif 3654 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3655 3656 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3657 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3658 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3659 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3660 mtspr(SPRN_TAR, vcpu->arch.tar); 3661 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3662 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3663 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3664 mtspr(SPRN_WORT, vcpu->arch.wort); 3665 mtspr(SPRN_TIDR, vcpu->arch.tid); 3666 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3667 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3668 mtspr(SPRN_AMR, vcpu->arch.amr); 3669 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3670 3671 if (!(vcpu->arch.ctrl & 1)) 3672 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3673 3674 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3675 3676 if (kvmhv_on_pseries()) { 3677 /* 3678 * We need to save and restore the guest visible part of the 3679 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3680 * doesn't do this for us. Note only required if pseries since 3681 * this is done in kvmhv_load_hv_regs_and_go() below otherwise. 3682 */ 3683 unsigned long host_psscr; 3684 /* call our hypervisor to load up HV regs and go */ 3685 struct hv_guest_state hvregs; 3686 3687 host_psscr = mfspr(SPRN_PSSCR_PR); 3688 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3689 kvmhv_save_hv_regs(vcpu, &hvregs); 3690 hvregs.lpcr = lpcr; 3691 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3692 hvregs.version = HV_GUEST_STATE_VERSION; 3693 if (vcpu->arch.nested) { 3694 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3695 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3696 } else { 3697 hvregs.lpid = vcpu->kvm->arch.lpid; 3698 hvregs.vcpu_token = vcpu->vcpu_id; 3699 } 3700 hvregs.hdec_expiry = time_limit; 3701 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3702 __pa(&vcpu->arch.regs)); 3703 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3704 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3705 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3706 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3707 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3708 mtspr(SPRN_PSSCR_PR, host_psscr); 3709 3710 /* H_CEDE has to be handled now, not later */ 3711 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3712 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3713 kvmppc_nested_cede(vcpu); 3714 kvmppc_set_gpr(vcpu, 3, 0); 3715 trap = 0; 3716 } 3717 } else { 3718 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3719 } 3720 3721 vcpu->arch.slb_max = 0; 3722 dec = mfspr(SPRN_DEC); 3723 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 3724 dec = (s32) dec; 3725 tb = mftb(); 3726 vcpu->arch.dec_expires = dec + tb; 3727 vcpu->cpu = -1; 3728 vcpu->arch.thread_cpu = -1; 3729 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3730 3731 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3732 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3733 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3734 vcpu->arch.tar = mfspr(SPRN_TAR); 3735 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3736 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3737 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3738 vcpu->arch.wort = mfspr(SPRN_WORT); 3739 vcpu->arch.tid = mfspr(SPRN_TIDR); 3740 vcpu->arch.amr = mfspr(SPRN_AMR); 3741 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3742 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3743 3744 mtspr(SPRN_PSPB, 0); 3745 mtspr(SPRN_WORT, 0); 3746 mtspr(SPRN_UAMOR, 0); 3747 mtspr(SPRN_DSCR, host_dscr); 3748 mtspr(SPRN_TIDR, host_tidr); 3749 mtspr(SPRN_IAMR, host_iamr); 3750 mtspr(SPRN_PSPB, 0); 3751 3752 if (host_amr != vcpu->arch.amr) 3753 mtspr(SPRN_AMR, host_amr); 3754 3755 if (host_fscr != vcpu->arch.fscr) 3756 mtspr(SPRN_FSCR, host_fscr); 3757 3758 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3759 store_fp_state(&vcpu->arch.fp); 3760 #ifdef CONFIG_ALTIVEC 3761 store_vr_state(&vcpu->arch.vr); 3762 #endif 3763 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3764 3765 if (cpu_has_feature(CPU_FTR_TM) || 3766 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3767 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3768 3769 save_pmu = 1; 3770 if (vcpu->arch.vpa.pinned_addr) { 3771 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3772 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3773 lp->yield_count = cpu_to_be32(yield_count); 3774 vcpu->arch.vpa.dirty = 1; 3775 save_pmu = lp->pmcregs_in_use; 3776 } 3777 /* Must save pmu if this guest is capable of running nested guests */ 3778 save_pmu |= nesting_enabled(vcpu->kvm); 3779 3780 kvmhv_save_guest_pmu(vcpu, save_pmu); 3781 3782 vc->entry_exit_map = 0x101; 3783 vc->in_guest = 0; 3784 3785 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3786 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso); 3787 3788 kvmhv_load_host_pmu(); 3789 3790 kvmppc_subcore_exit_guest(); 3791 3792 return trap; 3793 } 3794 3795 /* 3796 * Wait for some other vcpu thread to execute us, and 3797 * wake us up when we need to handle something in the host. 3798 */ 3799 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3800 struct kvm_vcpu *vcpu, int wait_state) 3801 { 3802 DEFINE_WAIT(wait); 3803 3804 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3805 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3806 spin_unlock(&vc->lock); 3807 schedule(); 3808 spin_lock(&vc->lock); 3809 } 3810 finish_wait(&vcpu->arch.cpu_run, &wait); 3811 } 3812 3813 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3814 { 3815 if (!halt_poll_ns_grow) 3816 return; 3817 3818 vc->halt_poll_ns *= halt_poll_ns_grow; 3819 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 3820 vc->halt_poll_ns = halt_poll_ns_grow_start; 3821 } 3822 3823 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3824 { 3825 if (halt_poll_ns_shrink == 0) 3826 vc->halt_poll_ns = 0; 3827 else 3828 vc->halt_poll_ns /= halt_poll_ns_shrink; 3829 } 3830 3831 #ifdef CONFIG_KVM_XICS 3832 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3833 { 3834 if (!xics_on_xive()) 3835 return false; 3836 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3837 vcpu->arch.xive_saved_state.cppr; 3838 } 3839 #else 3840 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3841 { 3842 return false; 3843 } 3844 #endif /* CONFIG_KVM_XICS */ 3845 3846 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3847 { 3848 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3849 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3850 return true; 3851 3852 return false; 3853 } 3854 3855 /* 3856 * Check to see if any of the runnable vcpus on the vcore have pending 3857 * exceptions or are no longer ceded 3858 */ 3859 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3860 { 3861 struct kvm_vcpu *vcpu; 3862 int i; 3863 3864 for_each_runnable_thread(i, vcpu, vc) { 3865 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3866 return 1; 3867 } 3868 3869 return 0; 3870 } 3871 3872 /* 3873 * All the vcpus in this vcore are idle, so wait for a decrementer 3874 * or external interrupt to one of the vcpus. vc->lock is held. 3875 */ 3876 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3877 { 3878 ktime_t cur, start_poll, start_wait; 3879 int do_sleep = 1; 3880 u64 block_ns; 3881 3882 /* Poll for pending exceptions and ceded state */ 3883 cur = start_poll = ktime_get(); 3884 if (vc->halt_poll_ns) { 3885 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3886 ++vc->runner->stat.halt_attempted_poll; 3887 3888 vc->vcore_state = VCORE_POLLING; 3889 spin_unlock(&vc->lock); 3890 3891 do { 3892 if (kvmppc_vcore_check_block(vc)) { 3893 do_sleep = 0; 3894 break; 3895 } 3896 cur = ktime_get(); 3897 } while (single_task_running() && ktime_before(cur, stop)); 3898 3899 spin_lock(&vc->lock); 3900 vc->vcore_state = VCORE_INACTIVE; 3901 3902 if (!do_sleep) { 3903 ++vc->runner->stat.halt_successful_poll; 3904 goto out; 3905 } 3906 } 3907 3908 prepare_to_rcuwait(&vc->wait); 3909 set_current_state(TASK_INTERRUPTIBLE); 3910 if (kvmppc_vcore_check_block(vc)) { 3911 finish_rcuwait(&vc->wait); 3912 do_sleep = 0; 3913 /* If we polled, count this as a successful poll */ 3914 if (vc->halt_poll_ns) 3915 ++vc->runner->stat.halt_successful_poll; 3916 goto out; 3917 } 3918 3919 start_wait = ktime_get(); 3920 3921 vc->vcore_state = VCORE_SLEEPING; 3922 trace_kvmppc_vcore_blocked(vc, 0); 3923 spin_unlock(&vc->lock); 3924 schedule(); 3925 finish_rcuwait(&vc->wait); 3926 spin_lock(&vc->lock); 3927 vc->vcore_state = VCORE_INACTIVE; 3928 trace_kvmppc_vcore_blocked(vc, 1); 3929 ++vc->runner->stat.halt_successful_wait; 3930 3931 cur = ktime_get(); 3932 3933 out: 3934 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3935 3936 /* Attribute wait time */ 3937 if (do_sleep) { 3938 vc->runner->stat.halt_wait_ns += 3939 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3940 /* Attribute failed poll time */ 3941 if (vc->halt_poll_ns) 3942 vc->runner->stat.halt_poll_fail_ns += 3943 ktime_to_ns(start_wait) - 3944 ktime_to_ns(start_poll); 3945 } else { 3946 /* Attribute successful poll time */ 3947 if (vc->halt_poll_ns) 3948 vc->runner->stat.halt_poll_success_ns += 3949 ktime_to_ns(cur) - 3950 ktime_to_ns(start_poll); 3951 } 3952 3953 /* Adjust poll time */ 3954 if (halt_poll_ns) { 3955 if (block_ns <= vc->halt_poll_ns) 3956 ; 3957 /* We slept and blocked for longer than the max halt time */ 3958 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3959 shrink_halt_poll_ns(vc); 3960 /* We slept and our poll time is too small */ 3961 else if (vc->halt_poll_ns < halt_poll_ns && 3962 block_ns < halt_poll_ns) 3963 grow_halt_poll_ns(vc); 3964 if (vc->halt_poll_ns > halt_poll_ns) 3965 vc->halt_poll_ns = halt_poll_ns; 3966 } else 3967 vc->halt_poll_ns = 0; 3968 3969 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3970 } 3971 3972 /* 3973 * This never fails for a radix guest, as none of the operations it does 3974 * for a radix guest can fail or have a way to report failure. 3975 * kvmhv_run_single_vcpu() relies on this fact. 3976 */ 3977 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3978 { 3979 int r = 0; 3980 struct kvm *kvm = vcpu->kvm; 3981 3982 mutex_lock(&kvm->arch.mmu_setup_lock); 3983 if (!kvm->arch.mmu_ready) { 3984 if (!kvm_is_radix(kvm)) 3985 r = kvmppc_hv_setup_htab_rma(vcpu); 3986 if (!r) { 3987 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3988 kvmppc_setup_partition_table(kvm); 3989 kvm->arch.mmu_ready = 1; 3990 } 3991 } 3992 mutex_unlock(&kvm->arch.mmu_setup_lock); 3993 return r; 3994 } 3995 3996 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 3997 { 3998 struct kvm_run *run = vcpu->run; 3999 int n_ceded, i, r; 4000 struct kvmppc_vcore *vc; 4001 struct kvm_vcpu *v; 4002 4003 trace_kvmppc_run_vcpu_enter(vcpu); 4004 4005 run->exit_reason = 0; 4006 vcpu->arch.ret = RESUME_GUEST; 4007 vcpu->arch.trap = 0; 4008 kvmppc_update_vpas(vcpu); 4009 4010 /* 4011 * Synchronize with other threads in this virtual core 4012 */ 4013 vc = vcpu->arch.vcore; 4014 spin_lock(&vc->lock); 4015 vcpu->arch.ceded = 0; 4016 vcpu->arch.run_task = current; 4017 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4018 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4019 vcpu->arch.busy_preempt = TB_NIL; 4020 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 4021 ++vc->n_runnable; 4022 4023 /* 4024 * This happens the first time this is called for a vcpu. 4025 * If the vcore is already running, we may be able to start 4026 * this thread straight away and have it join in. 4027 */ 4028 if (!signal_pending(current)) { 4029 if ((vc->vcore_state == VCORE_PIGGYBACK || 4030 vc->vcore_state == VCORE_RUNNING) && 4031 !VCORE_IS_EXITING(vc)) { 4032 kvmppc_create_dtl_entry(vcpu, vc); 4033 kvmppc_start_thread(vcpu, vc); 4034 trace_kvm_guest_enter(vcpu); 4035 } else if (vc->vcore_state == VCORE_SLEEPING) { 4036 rcuwait_wake_up(&vc->wait); 4037 } 4038 4039 } 4040 4041 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4042 !signal_pending(current)) { 4043 /* See if the MMU is ready to go */ 4044 if (!vcpu->kvm->arch.mmu_ready) { 4045 spin_unlock(&vc->lock); 4046 r = kvmhv_setup_mmu(vcpu); 4047 spin_lock(&vc->lock); 4048 if (r) { 4049 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4050 run->fail_entry. 4051 hardware_entry_failure_reason = 0; 4052 vcpu->arch.ret = r; 4053 break; 4054 } 4055 } 4056 4057 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4058 kvmppc_vcore_end_preempt(vc); 4059 4060 if (vc->vcore_state != VCORE_INACTIVE) { 4061 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4062 continue; 4063 } 4064 for_each_runnable_thread(i, v, vc) { 4065 kvmppc_core_prepare_to_enter(v); 4066 if (signal_pending(v->arch.run_task)) { 4067 kvmppc_remove_runnable(vc, v); 4068 v->stat.signal_exits++; 4069 v->run->exit_reason = KVM_EXIT_INTR; 4070 v->arch.ret = -EINTR; 4071 wake_up(&v->arch.cpu_run); 4072 } 4073 } 4074 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4075 break; 4076 n_ceded = 0; 4077 for_each_runnable_thread(i, v, vc) { 4078 if (!kvmppc_vcpu_woken(v)) 4079 n_ceded += v->arch.ceded; 4080 else 4081 v->arch.ceded = 0; 4082 } 4083 vc->runner = vcpu; 4084 if (n_ceded == vc->n_runnable) { 4085 kvmppc_vcore_blocked(vc); 4086 } else if (need_resched()) { 4087 kvmppc_vcore_preempt(vc); 4088 /* Let something else run */ 4089 cond_resched_lock(&vc->lock); 4090 if (vc->vcore_state == VCORE_PREEMPT) 4091 kvmppc_vcore_end_preempt(vc); 4092 } else { 4093 kvmppc_run_core(vc); 4094 } 4095 vc->runner = NULL; 4096 } 4097 4098 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4099 (vc->vcore_state == VCORE_RUNNING || 4100 vc->vcore_state == VCORE_EXITING || 4101 vc->vcore_state == VCORE_PIGGYBACK)) 4102 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4103 4104 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4105 kvmppc_vcore_end_preempt(vc); 4106 4107 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4108 kvmppc_remove_runnable(vc, vcpu); 4109 vcpu->stat.signal_exits++; 4110 run->exit_reason = KVM_EXIT_INTR; 4111 vcpu->arch.ret = -EINTR; 4112 } 4113 4114 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4115 /* Wake up some vcpu to run the core */ 4116 i = -1; 4117 v = next_runnable_thread(vc, &i); 4118 wake_up(&v->arch.cpu_run); 4119 } 4120 4121 trace_kvmppc_run_vcpu_exit(vcpu); 4122 spin_unlock(&vc->lock); 4123 return vcpu->arch.ret; 4124 } 4125 4126 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4127 unsigned long lpcr) 4128 { 4129 struct kvm_run *run = vcpu->run; 4130 int trap, r, pcpu; 4131 int srcu_idx, lpid; 4132 struct kvmppc_vcore *vc; 4133 struct kvm *kvm = vcpu->kvm; 4134 struct kvm_nested_guest *nested = vcpu->arch.nested; 4135 4136 trace_kvmppc_run_vcpu_enter(vcpu); 4137 4138 run->exit_reason = 0; 4139 vcpu->arch.ret = RESUME_GUEST; 4140 vcpu->arch.trap = 0; 4141 4142 vc = vcpu->arch.vcore; 4143 vcpu->arch.ceded = 0; 4144 vcpu->arch.run_task = current; 4145 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4146 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4147 vcpu->arch.busy_preempt = TB_NIL; 4148 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4149 vc->runnable_threads[0] = vcpu; 4150 vc->n_runnable = 1; 4151 vc->runner = vcpu; 4152 4153 /* See if the MMU is ready to go */ 4154 if (!kvm->arch.mmu_ready) 4155 kvmhv_setup_mmu(vcpu); 4156 4157 if (need_resched()) 4158 cond_resched(); 4159 4160 kvmppc_update_vpas(vcpu); 4161 4162 init_vcore_to_run(vc); 4163 vc->preempt_tb = TB_NIL; 4164 4165 preempt_disable(); 4166 pcpu = smp_processor_id(); 4167 vc->pcpu = pcpu; 4168 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4169 4170 local_irq_disable(); 4171 hard_irq_disable(); 4172 if (signal_pending(current)) 4173 goto sigpend; 4174 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4175 goto out; 4176 4177 if (!nested) { 4178 kvmppc_core_prepare_to_enter(vcpu); 4179 if (vcpu->arch.doorbell_request) { 4180 vc->dpdes = 1; 4181 smp_wmb(); 4182 vcpu->arch.doorbell_request = 0; 4183 } 4184 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4185 &vcpu->arch.pending_exceptions)) 4186 lpcr |= LPCR_MER; 4187 } else if (vcpu->arch.pending_exceptions || 4188 vcpu->arch.doorbell_request || 4189 xive_interrupt_pending(vcpu)) { 4190 vcpu->arch.ret = RESUME_HOST; 4191 goto out; 4192 } 4193 4194 kvmppc_clear_host_core(pcpu); 4195 4196 local_paca->kvm_hstate.napping = 0; 4197 local_paca->kvm_hstate.kvm_split_mode = NULL; 4198 kvmppc_start_thread(vcpu, vc); 4199 kvmppc_create_dtl_entry(vcpu, vc); 4200 trace_kvm_guest_enter(vcpu); 4201 4202 vc->vcore_state = VCORE_RUNNING; 4203 trace_kvmppc_run_core(vc, 0); 4204 4205 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4206 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid; 4207 mtspr(SPRN_LPID, lpid); 4208 isync(); 4209 kvmppc_check_need_tlb_flush(kvm, pcpu, nested); 4210 } 4211 4212 guest_enter_irqoff(); 4213 4214 srcu_idx = srcu_read_lock(&kvm->srcu); 4215 4216 this_cpu_disable_ftrace(); 4217 4218 /* Tell lockdep that we're about to enable interrupts */ 4219 trace_hardirqs_on(); 4220 4221 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4222 vcpu->arch.trap = trap; 4223 4224 trace_hardirqs_off(); 4225 4226 this_cpu_enable_ftrace(); 4227 4228 srcu_read_unlock(&kvm->srcu, srcu_idx); 4229 4230 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4231 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4232 isync(); 4233 } 4234 4235 set_irq_happened(trap); 4236 4237 kvmppc_set_host_core(pcpu); 4238 4239 local_irq_enable(); 4240 guest_exit(); 4241 4242 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4243 4244 preempt_enable(); 4245 4246 /* 4247 * cancel pending decrementer exception if DEC is now positive, or if 4248 * entering a nested guest in which case the decrementer is now owned 4249 * by L2 and the L1 decrementer is provided in hdec_expires 4250 */ 4251 if (kvmppc_core_pending_dec(vcpu) && 4252 ((get_tb() < vcpu->arch.dec_expires) || 4253 (trap == BOOK3S_INTERRUPT_SYSCALL && 4254 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4255 kvmppc_core_dequeue_dec(vcpu); 4256 4257 trace_kvm_guest_exit(vcpu); 4258 r = RESUME_GUEST; 4259 if (trap) { 4260 if (!nested) 4261 r = kvmppc_handle_exit_hv(vcpu, current); 4262 else 4263 r = kvmppc_handle_nested_exit(vcpu); 4264 } 4265 vcpu->arch.ret = r; 4266 4267 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4268 !kvmppc_vcpu_woken(vcpu)) { 4269 kvmppc_set_timer(vcpu); 4270 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4271 if (signal_pending(current)) { 4272 vcpu->stat.signal_exits++; 4273 run->exit_reason = KVM_EXIT_INTR; 4274 vcpu->arch.ret = -EINTR; 4275 break; 4276 } 4277 spin_lock(&vc->lock); 4278 kvmppc_vcore_blocked(vc); 4279 spin_unlock(&vc->lock); 4280 } 4281 } 4282 vcpu->arch.ceded = 0; 4283 4284 vc->vcore_state = VCORE_INACTIVE; 4285 trace_kvmppc_run_core(vc, 1); 4286 4287 done: 4288 kvmppc_remove_runnable(vc, vcpu); 4289 trace_kvmppc_run_vcpu_exit(vcpu); 4290 4291 return vcpu->arch.ret; 4292 4293 sigpend: 4294 vcpu->stat.signal_exits++; 4295 run->exit_reason = KVM_EXIT_INTR; 4296 vcpu->arch.ret = -EINTR; 4297 out: 4298 local_irq_enable(); 4299 preempt_enable(); 4300 goto done; 4301 } 4302 4303 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 4304 { 4305 struct kvm_run *run = vcpu->run; 4306 int r; 4307 int srcu_idx; 4308 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4309 unsigned long user_tar = 0; 4310 unsigned int user_vrsave; 4311 struct kvm *kvm; 4312 4313 if (!vcpu->arch.sane) { 4314 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4315 return -EINVAL; 4316 } 4317 4318 /* 4319 * Don't allow entry with a suspended transaction, because 4320 * the guest entry/exit code will lose it. 4321 * If the guest has TM enabled, save away their TM-related SPRs 4322 * (they will get restored by the TM unavailable interrupt). 4323 */ 4324 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4325 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4326 (current->thread.regs->msr & MSR_TM)) { 4327 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4328 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4329 run->fail_entry.hardware_entry_failure_reason = 0; 4330 return -EINVAL; 4331 } 4332 /* Enable TM so we can read the TM SPRs */ 4333 mtmsr(mfmsr() | MSR_TM); 4334 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4335 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4336 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4337 current->thread.regs->msr &= ~MSR_TM; 4338 } 4339 #endif 4340 4341 /* 4342 * Force online to 1 for the sake of old userspace which doesn't 4343 * set it. 4344 */ 4345 if (!vcpu->arch.online) { 4346 atomic_inc(&vcpu->arch.vcore->online_count); 4347 vcpu->arch.online = 1; 4348 } 4349 4350 kvmppc_core_prepare_to_enter(vcpu); 4351 4352 /* No need to go into the guest when all we'll do is come back out */ 4353 if (signal_pending(current)) { 4354 run->exit_reason = KVM_EXIT_INTR; 4355 return -EINTR; 4356 } 4357 4358 kvm = vcpu->kvm; 4359 atomic_inc(&kvm->arch.vcpus_running); 4360 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4361 smp_mb(); 4362 4363 flush_all_to_thread(current); 4364 4365 /* Save userspace EBB and other register values */ 4366 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4367 ebb_regs[0] = mfspr(SPRN_EBBHR); 4368 ebb_regs[1] = mfspr(SPRN_EBBRR); 4369 ebb_regs[2] = mfspr(SPRN_BESCR); 4370 user_tar = mfspr(SPRN_TAR); 4371 } 4372 user_vrsave = mfspr(SPRN_VRSAVE); 4373 4374 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 4375 vcpu->arch.pgdir = kvm->mm->pgd; 4376 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4377 4378 do { 4379 /* 4380 * The TLB prefetch bug fixup is only in the kvmppc_run_vcpu 4381 * path, which also handles hash and dependent threads mode. 4382 */ 4383 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4384 !cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) 4385 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 4386 vcpu->arch.vcore->lpcr); 4387 else 4388 r = kvmppc_run_vcpu(vcpu); 4389 4390 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4391 !(vcpu->arch.shregs.msr & MSR_PR)) { 4392 trace_kvm_hcall_enter(vcpu); 4393 r = kvmppc_pseries_do_hcall(vcpu); 4394 trace_kvm_hcall_exit(vcpu, r); 4395 kvmppc_core_prepare_to_enter(vcpu); 4396 } else if (r == RESUME_PAGE_FAULT) { 4397 srcu_idx = srcu_read_lock(&kvm->srcu); 4398 r = kvmppc_book3s_hv_page_fault(vcpu, 4399 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4400 srcu_read_unlock(&kvm->srcu, srcu_idx); 4401 } else if (r == RESUME_PASSTHROUGH) { 4402 if (WARN_ON(xics_on_xive())) 4403 r = H_SUCCESS; 4404 else 4405 r = kvmppc_xics_rm_complete(vcpu, 0); 4406 } 4407 } while (is_kvmppc_resume_guest(r)); 4408 4409 /* Restore userspace EBB and other register values */ 4410 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4411 mtspr(SPRN_EBBHR, ebb_regs[0]); 4412 mtspr(SPRN_EBBRR, ebb_regs[1]); 4413 mtspr(SPRN_BESCR, ebb_regs[2]); 4414 mtspr(SPRN_TAR, user_tar); 4415 mtspr(SPRN_FSCR, current->thread.fscr); 4416 } 4417 mtspr(SPRN_VRSAVE, user_vrsave); 4418 4419 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4420 atomic_dec(&kvm->arch.vcpus_running); 4421 return r; 4422 } 4423 4424 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4425 int shift, int sllp) 4426 { 4427 (*sps)->page_shift = shift; 4428 (*sps)->slb_enc = sllp; 4429 (*sps)->enc[0].page_shift = shift; 4430 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4431 /* 4432 * Add 16MB MPSS support (may get filtered out by userspace) 4433 */ 4434 if (shift != 24) { 4435 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4436 if (penc != -1) { 4437 (*sps)->enc[1].page_shift = 24; 4438 (*sps)->enc[1].pte_enc = penc; 4439 } 4440 } 4441 (*sps)++; 4442 } 4443 4444 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4445 struct kvm_ppc_smmu_info *info) 4446 { 4447 struct kvm_ppc_one_seg_page_size *sps; 4448 4449 /* 4450 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4451 * POWER7 doesn't support keys for instruction accesses, 4452 * POWER8 and POWER9 do. 4453 */ 4454 info->data_keys = 32; 4455 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4456 4457 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4458 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4459 info->slb_size = 32; 4460 4461 /* We only support these sizes for now, and no muti-size segments */ 4462 sps = &info->sps[0]; 4463 kvmppc_add_seg_page_size(&sps, 12, 0); 4464 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4465 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4466 4467 /* If running as a nested hypervisor, we don't support HPT guests */ 4468 if (kvmhv_on_pseries()) 4469 info->flags |= KVM_PPC_NO_HASH; 4470 4471 return 0; 4472 } 4473 4474 /* 4475 * Get (and clear) the dirty memory log for a memory slot. 4476 */ 4477 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4478 struct kvm_dirty_log *log) 4479 { 4480 struct kvm_memslots *slots; 4481 struct kvm_memory_slot *memslot; 4482 int i, r; 4483 unsigned long n; 4484 unsigned long *buf, *p; 4485 struct kvm_vcpu *vcpu; 4486 4487 mutex_lock(&kvm->slots_lock); 4488 4489 r = -EINVAL; 4490 if (log->slot >= KVM_USER_MEM_SLOTS) 4491 goto out; 4492 4493 slots = kvm_memslots(kvm); 4494 memslot = id_to_memslot(slots, log->slot); 4495 r = -ENOENT; 4496 if (!memslot || !memslot->dirty_bitmap) 4497 goto out; 4498 4499 /* 4500 * Use second half of bitmap area because both HPT and radix 4501 * accumulate bits in the first half. 4502 */ 4503 n = kvm_dirty_bitmap_bytes(memslot); 4504 buf = memslot->dirty_bitmap + n / sizeof(long); 4505 memset(buf, 0, n); 4506 4507 if (kvm_is_radix(kvm)) 4508 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4509 else 4510 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4511 if (r) 4512 goto out; 4513 4514 /* 4515 * We accumulate dirty bits in the first half of the 4516 * memslot's dirty_bitmap area, for when pages are paged 4517 * out or modified by the host directly. Pick up these 4518 * bits and add them to the map. 4519 */ 4520 p = memslot->dirty_bitmap; 4521 for (i = 0; i < n / sizeof(long); ++i) 4522 buf[i] |= xchg(&p[i], 0); 4523 4524 /* Harvest dirty bits from VPA and DTL updates */ 4525 /* Note: we never modify the SLB shadow buffer areas */ 4526 kvm_for_each_vcpu(i, vcpu, kvm) { 4527 spin_lock(&vcpu->arch.vpa_update_lock); 4528 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4529 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4530 spin_unlock(&vcpu->arch.vpa_update_lock); 4531 } 4532 4533 r = -EFAULT; 4534 if (copy_to_user(log->dirty_bitmap, buf, n)) 4535 goto out; 4536 4537 r = 0; 4538 out: 4539 mutex_unlock(&kvm->slots_lock); 4540 return r; 4541 } 4542 4543 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4544 { 4545 vfree(slot->arch.rmap); 4546 slot->arch.rmap = NULL; 4547 } 4548 4549 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4550 struct kvm_memory_slot *slot, 4551 const struct kvm_userspace_memory_region *mem, 4552 enum kvm_mr_change change) 4553 { 4554 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4555 4556 if (change == KVM_MR_CREATE) { 4557 slot->arch.rmap = vzalloc(array_size(npages, 4558 sizeof(*slot->arch.rmap))); 4559 if (!slot->arch.rmap) 4560 return -ENOMEM; 4561 } 4562 4563 return 0; 4564 } 4565 4566 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4567 const struct kvm_userspace_memory_region *mem, 4568 const struct kvm_memory_slot *old, 4569 const struct kvm_memory_slot *new, 4570 enum kvm_mr_change change) 4571 { 4572 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4573 4574 /* 4575 * If we are making a new memslot, it might make 4576 * some address that was previously cached as emulated 4577 * MMIO be no longer emulated MMIO, so invalidate 4578 * all the caches of emulated MMIO translations. 4579 */ 4580 if (npages) 4581 atomic64_inc(&kvm->arch.mmio_update); 4582 4583 /* 4584 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4585 * have already called kvm_arch_flush_shadow_memslot() to 4586 * flush shadow mappings. For KVM_MR_CREATE we have no 4587 * previous mappings. So the only case to handle is 4588 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4589 * has been changed. 4590 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4591 * to get rid of any THP PTEs in the partition-scoped page tables 4592 * so we can track dirtiness at the page level; we flush when 4593 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4594 * using THP PTEs. 4595 */ 4596 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4597 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4598 kvmppc_radix_flush_memslot(kvm, old); 4599 /* 4600 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4601 */ 4602 if (!kvm->arch.secure_guest) 4603 return; 4604 4605 switch (change) { 4606 case KVM_MR_CREATE: 4607 /* 4608 * @TODO kvmppc_uvmem_memslot_create() can fail and 4609 * return error. Fix this. 4610 */ 4611 kvmppc_uvmem_memslot_create(kvm, new); 4612 break; 4613 case KVM_MR_DELETE: 4614 kvmppc_uvmem_memslot_delete(kvm, old); 4615 break; 4616 default: 4617 /* TODO: Handle KVM_MR_MOVE */ 4618 break; 4619 } 4620 } 4621 4622 /* 4623 * Update LPCR values in kvm->arch and in vcores. 4624 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4625 * of kvm->arch.lpcr update). 4626 */ 4627 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4628 { 4629 long int i; 4630 u32 cores_done = 0; 4631 4632 if ((kvm->arch.lpcr & mask) == lpcr) 4633 return; 4634 4635 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4636 4637 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4638 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4639 if (!vc) 4640 continue; 4641 spin_lock(&vc->lock); 4642 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4643 spin_unlock(&vc->lock); 4644 if (++cores_done >= kvm->arch.online_vcores) 4645 break; 4646 } 4647 } 4648 4649 void kvmppc_setup_partition_table(struct kvm *kvm) 4650 { 4651 unsigned long dw0, dw1; 4652 4653 if (!kvm_is_radix(kvm)) { 4654 /* PS field - page size for VRMA */ 4655 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4656 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4657 /* HTABSIZE and HTABORG fields */ 4658 dw0 |= kvm->arch.sdr1; 4659 4660 /* Second dword as set by userspace */ 4661 dw1 = kvm->arch.process_table; 4662 } else { 4663 dw0 = PATB_HR | radix__get_tree_size() | 4664 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4665 dw1 = PATB_GR | kvm->arch.process_table; 4666 } 4667 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4668 } 4669 4670 /* 4671 * Set up HPT (hashed page table) and RMA (real-mode area). 4672 * Must be called with kvm->arch.mmu_setup_lock held. 4673 */ 4674 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4675 { 4676 int err = 0; 4677 struct kvm *kvm = vcpu->kvm; 4678 unsigned long hva; 4679 struct kvm_memory_slot *memslot; 4680 struct vm_area_struct *vma; 4681 unsigned long lpcr = 0, senc; 4682 unsigned long psize, porder; 4683 int srcu_idx; 4684 4685 /* Allocate hashed page table (if not done already) and reset it */ 4686 if (!kvm->arch.hpt.virt) { 4687 int order = KVM_DEFAULT_HPT_ORDER; 4688 struct kvm_hpt_info info; 4689 4690 err = kvmppc_allocate_hpt(&info, order); 4691 /* If we get here, it means userspace didn't specify a 4692 * size explicitly. So, try successively smaller 4693 * sizes if the default failed. */ 4694 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4695 err = kvmppc_allocate_hpt(&info, order); 4696 4697 if (err < 0) { 4698 pr_err("KVM: Couldn't alloc HPT\n"); 4699 goto out; 4700 } 4701 4702 kvmppc_set_hpt(kvm, &info); 4703 } 4704 4705 /* Look up the memslot for guest physical address 0 */ 4706 srcu_idx = srcu_read_lock(&kvm->srcu); 4707 memslot = gfn_to_memslot(kvm, 0); 4708 4709 /* We must have some memory at 0 by now */ 4710 err = -EINVAL; 4711 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4712 goto out_srcu; 4713 4714 /* Look up the VMA for the start of this memory slot */ 4715 hva = memslot->userspace_addr; 4716 mmap_read_lock(kvm->mm); 4717 vma = find_vma(kvm->mm, hva); 4718 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4719 goto up_out; 4720 4721 psize = vma_kernel_pagesize(vma); 4722 4723 mmap_read_unlock(kvm->mm); 4724 4725 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4726 if (psize >= 0x1000000) 4727 psize = 0x1000000; 4728 else if (psize >= 0x10000) 4729 psize = 0x10000; 4730 else 4731 psize = 0x1000; 4732 porder = __ilog2(psize); 4733 4734 senc = slb_pgsize_encoding(psize); 4735 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4736 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4737 /* Create HPTEs in the hash page table for the VRMA */ 4738 kvmppc_map_vrma(vcpu, memslot, porder); 4739 4740 /* Update VRMASD field in the LPCR */ 4741 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4742 /* the -4 is to account for senc values starting at 0x10 */ 4743 lpcr = senc << (LPCR_VRMASD_SH - 4); 4744 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4745 } 4746 4747 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4748 smp_wmb(); 4749 err = 0; 4750 out_srcu: 4751 srcu_read_unlock(&kvm->srcu, srcu_idx); 4752 out: 4753 return err; 4754 4755 up_out: 4756 mmap_read_unlock(kvm->mm); 4757 goto out_srcu; 4758 } 4759 4760 /* 4761 * Must be called with kvm->arch.mmu_setup_lock held and 4762 * mmu_ready = 0 and no vcpus running. 4763 */ 4764 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4765 { 4766 if (nesting_enabled(kvm)) 4767 kvmhv_release_all_nested(kvm); 4768 kvmppc_rmap_reset(kvm); 4769 kvm->arch.process_table = 0; 4770 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4771 spin_lock(&kvm->mmu_lock); 4772 kvm->arch.radix = 0; 4773 spin_unlock(&kvm->mmu_lock); 4774 kvmppc_free_radix(kvm); 4775 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4776 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4777 return 0; 4778 } 4779 4780 /* 4781 * Must be called with kvm->arch.mmu_setup_lock held and 4782 * mmu_ready = 0 and no vcpus running. 4783 */ 4784 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4785 { 4786 int err; 4787 4788 err = kvmppc_init_vm_radix(kvm); 4789 if (err) 4790 return err; 4791 kvmppc_rmap_reset(kvm); 4792 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4793 spin_lock(&kvm->mmu_lock); 4794 kvm->arch.radix = 1; 4795 spin_unlock(&kvm->mmu_lock); 4796 kvmppc_free_hpt(&kvm->arch.hpt); 4797 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4798 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4799 return 0; 4800 } 4801 4802 #ifdef CONFIG_KVM_XICS 4803 /* 4804 * Allocate a per-core structure for managing state about which cores are 4805 * running in the host versus the guest and for exchanging data between 4806 * real mode KVM and CPU running in the host. 4807 * This is only done for the first VM. 4808 * The allocated structure stays even if all VMs have stopped. 4809 * It is only freed when the kvm-hv module is unloaded. 4810 * It's OK for this routine to fail, we just don't support host 4811 * core operations like redirecting H_IPI wakeups. 4812 */ 4813 void kvmppc_alloc_host_rm_ops(void) 4814 { 4815 struct kvmppc_host_rm_ops *ops; 4816 unsigned long l_ops; 4817 int cpu, core; 4818 int size; 4819 4820 /* Not the first time here ? */ 4821 if (kvmppc_host_rm_ops_hv != NULL) 4822 return; 4823 4824 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4825 if (!ops) 4826 return; 4827 4828 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4829 ops->rm_core = kzalloc(size, GFP_KERNEL); 4830 4831 if (!ops->rm_core) { 4832 kfree(ops); 4833 return; 4834 } 4835 4836 cpus_read_lock(); 4837 4838 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4839 if (!cpu_online(cpu)) 4840 continue; 4841 4842 core = cpu >> threads_shift; 4843 ops->rm_core[core].rm_state.in_host = 1; 4844 } 4845 4846 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4847 4848 /* 4849 * Make the contents of the kvmppc_host_rm_ops structure visible 4850 * to other CPUs before we assign it to the global variable. 4851 * Do an atomic assignment (no locks used here), but if someone 4852 * beats us to it, just free our copy and return. 4853 */ 4854 smp_wmb(); 4855 l_ops = (unsigned long) ops; 4856 4857 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4858 cpus_read_unlock(); 4859 kfree(ops->rm_core); 4860 kfree(ops); 4861 return; 4862 } 4863 4864 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4865 "ppc/kvm_book3s:prepare", 4866 kvmppc_set_host_core, 4867 kvmppc_clear_host_core); 4868 cpus_read_unlock(); 4869 } 4870 4871 void kvmppc_free_host_rm_ops(void) 4872 { 4873 if (kvmppc_host_rm_ops_hv) { 4874 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4875 kfree(kvmppc_host_rm_ops_hv->rm_core); 4876 kfree(kvmppc_host_rm_ops_hv); 4877 kvmppc_host_rm_ops_hv = NULL; 4878 } 4879 } 4880 #endif 4881 4882 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4883 { 4884 unsigned long lpcr, lpid; 4885 char buf[32]; 4886 int ret; 4887 4888 mutex_init(&kvm->arch.uvmem_lock); 4889 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 4890 mutex_init(&kvm->arch.mmu_setup_lock); 4891 4892 /* Allocate the guest's logical partition ID */ 4893 4894 lpid = kvmppc_alloc_lpid(); 4895 if ((long)lpid < 0) 4896 return -ENOMEM; 4897 kvm->arch.lpid = lpid; 4898 4899 kvmppc_alloc_host_rm_ops(); 4900 4901 kvmhv_vm_nested_init(kvm); 4902 4903 /* 4904 * Since we don't flush the TLB when tearing down a VM, 4905 * and this lpid might have previously been used, 4906 * make sure we flush on each core before running the new VM. 4907 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4908 * does this flush for us. 4909 */ 4910 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4911 cpumask_setall(&kvm->arch.need_tlb_flush); 4912 4913 /* Start out with the default set of hcalls enabled */ 4914 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4915 sizeof(kvm->arch.enabled_hcalls)); 4916 4917 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4918 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4919 4920 /* Init LPCR for virtual RMA mode */ 4921 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4922 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4923 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4924 lpcr &= LPCR_PECE | LPCR_LPES; 4925 } else { 4926 lpcr = 0; 4927 } 4928 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4929 LPCR_VPM0 | LPCR_VPM1; 4930 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4931 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4932 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4933 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4934 lpcr |= LPCR_ONL; 4935 /* 4936 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4937 * Set HVICE bit to enable hypervisor virtualization interrupts. 4938 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4939 * be unnecessary but better safe than sorry in case we re-enable 4940 * EE in HV mode with this LPCR still set) 4941 */ 4942 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4943 lpcr &= ~LPCR_VPM0; 4944 lpcr |= LPCR_HVICE | LPCR_HEIC; 4945 4946 /* 4947 * If xive is enabled, we route 0x500 interrupts directly 4948 * to the guest. 4949 */ 4950 if (xics_on_xive()) 4951 lpcr |= LPCR_LPES; 4952 } 4953 4954 /* 4955 * If the host uses radix, the guest starts out as radix. 4956 */ 4957 if (radix_enabled()) { 4958 kvm->arch.radix = 1; 4959 kvm->arch.mmu_ready = 1; 4960 lpcr &= ~LPCR_VPM1; 4961 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4962 ret = kvmppc_init_vm_radix(kvm); 4963 if (ret) { 4964 kvmppc_free_lpid(kvm->arch.lpid); 4965 return ret; 4966 } 4967 kvmppc_setup_partition_table(kvm); 4968 } 4969 4970 kvm->arch.lpcr = lpcr; 4971 4972 /* Initialization for future HPT resizes */ 4973 kvm->arch.resize_hpt = NULL; 4974 4975 /* 4976 * Work out how many sets the TLB has, for the use of 4977 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4978 */ 4979 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 4980 /* 4981 * P10 will flush all the congruence class with a single tlbiel 4982 */ 4983 kvm->arch.tlb_sets = 1; 4984 } else if (radix_enabled()) 4985 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4986 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4987 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4988 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4989 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4990 else 4991 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4992 4993 /* 4994 * Track that we now have a HV mode VM active. This blocks secondary 4995 * CPU threads from coming online. 4996 * On POWER9, we only need to do this if the "indep_threads_mode" 4997 * module parameter has been set to N. 4998 */ 4999 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5000 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 5001 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 5002 kvm->arch.threads_indep = true; 5003 } else { 5004 kvm->arch.threads_indep = indep_threads_mode; 5005 } 5006 } 5007 if (!kvm->arch.threads_indep) 5008 kvm_hv_vm_activated(); 5009 5010 /* 5011 * Initialize smt_mode depending on processor. 5012 * POWER8 and earlier have to use "strict" threading, where 5013 * all vCPUs in a vcore have to run on the same (sub)core, 5014 * whereas on POWER9 the threads can each run a different 5015 * guest. 5016 */ 5017 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5018 kvm->arch.smt_mode = threads_per_subcore; 5019 else 5020 kvm->arch.smt_mode = 1; 5021 kvm->arch.emul_smt_mode = 1; 5022 5023 /* 5024 * Create a debugfs directory for the VM 5025 */ 5026 snprintf(buf, sizeof(buf), "vm%d", current->pid); 5027 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 5028 kvmppc_mmu_debugfs_init(kvm); 5029 if (radix_enabled()) 5030 kvmhv_radix_debugfs_init(kvm); 5031 5032 return 0; 5033 } 5034 5035 static void kvmppc_free_vcores(struct kvm *kvm) 5036 { 5037 long int i; 5038 5039 for (i = 0; i < KVM_MAX_VCORES; ++i) 5040 kfree(kvm->arch.vcores[i]); 5041 kvm->arch.online_vcores = 0; 5042 } 5043 5044 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 5045 { 5046 debugfs_remove_recursive(kvm->arch.debugfs_dir); 5047 5048 if (!kvm->arch.threads_indep) 5049 kvm_hv_vm_deactivated(); 5050 5051 kvmppc_free_vcores(kvm); 5052 5053 5054 if (kvm_is_radix(kvm)) 5055 kvmppc_free_radix(kvm); 5056 else 5057 kvmppc_free_hpt(&kvm->arch.hpt); 5058 5059 /* Perform global invalidation and return lpid to the pool */ 5060 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5061 if (nesting_enabled(kvm)) 5062 kvmhv_release_all_nested(kvm); 5063 kvm->arch.process_table = 0; 5064 if (kvm->arch.secure_guest) 5065 uv_svm_terminate(kvm->arch.lpid); 5066 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5067 } 5068 5069 kvmppc_free_lpid(kvm->arch.lpid); 5070 5071 kvmppc_free_pimap(kvm); 5072 } 5073 5074 /* We don't need to emulate any privileged instructions or dcbz */ 5075 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5076 unsigned int inst, int *advance) 5077 { 5078 return EMULATE_FAIL; 5079 } 5080 5081 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5082 ulong spr_val) 5083 { 5084 return EMULATE_FAIL; 5085 } 5086 5087 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5088 ulong *spr_val) 5089 { 5090 return EMULATE_FAIL; 5091 } 5092 5093 static int kvmppc_core_check_processor_compat_hv(void) 5094 { 5095 if (cpu_has_feature(CPU_FTR_HVMODE) && 5096 cpu_has_feature(CPU_FTR_ARCH_206)) 5097 return 0; 5098 5099 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5100 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5101 return 0; 5102 5103 return -EIO; 5104 } 5105 5106 #ifdef CONFIG_KVM_XICS 5107 5108 void kvmppc_free_pimap(struct kvm *kvm) 5109 { 5110 kfree(kvm->arch.pimap); 5111 } 5112 5113 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5114 { 5115 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5116 } 5117 5118 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5119 { 5120 struct irq_desc *desc; 5121 struct kvmppc_irq_map *irq_map; 5122 struct kvmppc_passthru_irqmap *pimap; 5123 struct irq_chip *chip; 5124 int i, rc = 0; 5125 5126 if (!kvm_irq_bypass) 5127 return 1; 5128 5129 desc = irq_to_desc(host_irq); 5130 if (!desc) 5131 return -EIO; 5132 5133 mutex_lock(&kvm->lock); 5134 5135 pimap = kvm->arch.pimap; 5136 if (pimap == NULL) { 5137 /* First call, allocate structure to hold IRQ map */ 5138 pimap = kvmppc_alloc_pimap(); 5139 if (pimap == NULL) { 5140 mutex_unlock(&kvm->lock); 5141 return -ENOMEM; 5142 } 5143 kvm->arch.pimap = pimap; 5144 } 5145 5146 /* 5147 * For now, we only support interrupts for which the EOI operation 5148 * is an OPAL call followed by a write to XIRR, since that's 5149 * what our real-mode EOI code does, or a XIVE interrupt 5150 */ 5151 chip = irq_data_get_irq_chip(&desc->irq_data); 5152 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 5153 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5154 host_irq, guest_gsi); 5155 mutex_unlock(&kvm->lock); 5156 return -ENOENT; 5157 } 5158 5159 /* 5160 * See if we already have an entry for this guest IRQ number. 5161 * If it's mapped to a hardware IRQ number, that's an error, 5162 * otherwise re-use this entry. 5163 */ 5164 for (i = 0; i < pimap->n_mapped; i++) { 5165 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5166 if (pimap->mapped[i].r_hwirq) { 5167 mutex_unlock(&kvm->lock); 5168 return -EINVAL; 5169 } 5170 break; 5171 } 5172 } 5173 5174 if (i == KVMPPC_PIRQ_MAPPED) { 5175 mutex_unlock(&kvm->lock); 5176 return -EAGAIN; /* table is full */ 5177 } 5178 5179 irq_map = &pimap->mapped[i]; 5180 5181 irq_map->v_hwirq = guest_gsi; 5182 irq_map->desc = desc; 5183 5184 /* 5185 * Order the above two stores before the next to serialize with 5186 * the KVM real mode handler. 5187 */ 5188 smp_wmb(); 5189 irq_map->r_hwirq = desc->irq_data.hwirq; 5190 5191 if (i == pimap->n_mapped) 5192 pimap->n_mapped++; 5193 5194 if (xics_on_xive()) 5195 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5196 else 5197 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5198 if (rc) 5199 irq_map->r_hwirq = 0; 5200 5201 mutex_unlock(&kvm->lock); 5202 5203 return 0; 5204 } 5205 5206 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5207 { 5208 struct irq_desc *desc; 5209 struct kvmppc_passthru_irqmap *pimap; 5210 int i, rc = 0; 5211 5212 if (!kvm_irq_bypass) 5213 return 0; 5214 5215 desc = irq_to_desc(host_irq); 5216 if (!desc) 5217 return -EIO; 5218 5219 mutex_lock(&kvm->lock); 5220 if (!kvm->arch.pimap) 5221 goto unlock; 5222 5223 pimap = kvm->arch.pimap; 5224 5225 for (i = 0; i < pimap->n_mapped; i++) { 5226 if (guest_gsi == pimap->mapped[i].v_hwirq) 5227 break; 5228 } 5229 5230 if (i == pimap->n_mapped) { 5231 mutex_unlock(&kvm->lock); 5232 return -ENODEV; 5233 } 5234 5235 if (xics_on_xive()) 5236 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5237 else 5238 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5239 5240 /* invalidate the entry (what do do on error from the above ?) */ 5241 pimap->mapped[i].r_hwirq = 0; 5242 5243 /* 5244 * We don't free this structure even when the count goes to 5245 * zero. The structure is freed when we destroy the VM. 5246 */ 5247 unlock: 5248 mutex_unlock(&kvm->lock); 5249 return rc; 5250 } 5251 5252 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5253 struct irq_bypass_producer *prod) 5254 { 5255 int ret = 0; 5256 struct kvm_kernel_irqfd *irqfd = 5257 container_of(cons, struct kvm_kernel_irqfd, consumer); 5258 5259 irqfd->producer = prod; 5260 5261 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5262 if (ret) 5263 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5264 prod->irq, irqfd->gsi, ret); 5265 5266 return ret; 5267 } 5268 5269 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5270 struct irq_bypass_producer *prod) 5271 { 5272 int ret; 5273 struct kvm_kernel_irqfd *irqfd = 5274 container_of(cons, struct kvm_kernel_irqfd, consumer); 5275 5276 irqfd->producer = NULL; 5277 5278 /* 5279 * When producer of consumer is unregistered, we change back to 5280 * default external interrupt handling mode - KVM real mode 5281 * will switch back to host. 5282 */ 5283 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5284 if (ret) 5285 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5286 prod->irq, irqfd->gsi, ret); 5287 } 5288 #endif 5289 5290 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5291 unsigned int ioctl, unsigned long arg) 5292 { 5293 struct kvm *kvm __maybe_unused = filp->private_data; 5294 void __user *argp = (void __user *)arg; 5295 long r; 5296 5297 switch (ioctl) { 5298 5299 case KVM_PPC_ALLOCATE_HTAB: { 5300 u32 htab_order; 5301 5302 /* If we're a nested hypervisor, we currently only support radix */ 5303 if (kvmhv_on_pseries()) { 5304 r = -EOPNOTSUPP; 5305 break; 5306 } 5307 5308 r = -EFAULT; 5309 if (get_user(htab_order, (u32 __user *)argp)) 5310 break; 5311 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5312 if (r) 5313 break; 5314 r = 0; 5315 break; 5316 } 5317 5318 case KVM_PPC_GET_HTAB_FD: { 5319 struct kvm_get_htab_fd ghf; 5320 5321 r = -EFAULT; 5322 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5323 break; 5324 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5325 break; 5326 } 5327 5328 case KVM_PPC_RESIZE_HPT_PREPARE: { 5329 struct kvm_ppc_resize_hpt rhpt; 5330 5331 r = -EFAULT; 5332 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5333 break; 5334 5335 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5336 break; 5337 } 5338 5339 case KVM_PPC_RESIZE_HPT_COMMIT: { 5340 struct kvm_ppc_resize_hpt rhpt; 5341 5342 r = -EFAULT; 5343 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5344 break; 5345 5346 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5347 break; 5348 } 5349 5350 default: 5351 r = -ENOTTY; 5352 } 5353 5354 return r; 5355 } 5356 5357 /* 5358 * List of hcall numbers to enable by default. 5359 * For compatibility with old userspace, we enable by default 5360 * all hcalls that were implemented before the hcall-enabling 5361 * facility was added. Note this list should not include H_RTAS. 5362 */ 5363 static unsigned int default_hcall_list[] = { 5364 H_REMOVE, 5365 H_ENTER, 5366 H_READ, 5367 H_PROTECT, 5368 H_BULK_REMOVE, 5369 H_GET_TCE, 5370 H_PUT_TCE, 5371 H_SET_DABR, 5372 H_SET_XDABR, 5373 H_CEDE, 5374 H_PROD, 5375 H_CONFER, 5376 H_REGISTER_VPA, 5377 #ifdef CONFIG_KVM_XICS 5378 H_EOI, 5379 H_CPPR, 5380 H_IPI, 5381 H_IPOLL, 5382 H_XIRR, 5383 H_XIRR_X, 5384 #endif 5385 0 5386 }; 5387 5388 static void init_default_hcalls(void) 5389 { 5390 int i; 5391 unsigned int hcall; 5392 5393 for (i = 0; default_hcall_list[i]; ++i) { 5394 hcall = default_hcall_list[i]; 5395 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5396 __set_bit(hcall / 4, default_enabled_hcalls); 5397 } 5398 } 5399 5400 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5401 { 5402 unsigned long lpcr; 5403 int radix; 5404 int err; 5405 5406 /* If not on a POWER9, reject it */ 5407 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5408 return -ENODEV; 5409 5410 /* If any unknown flags set, reject it */ 5411 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5412 return -EINVAL; 5413 5414 /* GR (guest radix) bit in process_table field must match */ 5415 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5416 if (!!(cfg->process_table & PATB_GR) != radix) 5417 return -EINVAL; 5418 5419 /* Process table size field must be reasonable, i.e. <= 24 */ 5420 if ((cfg->process_table & PRTS_MASK) > 24) 5421 return -EINVAL; 5422 5423 /* We can change a guest to/from radix now, if the host is radix */ 5424 if (radix && !radix_enabled()) 5425 return -EINVAL; 5426 5427 /* If we're a nested hypervisor, we currently only support radix */ 5428 if (kvmhv_on_pseries() && !radix) 5429 return -EINVAL; 5430 5431 mutex_lock(&kvm->arch.mmu_setup_lock); 5432 if (radix != kvm_is_radix(kvm)) { 5433 if (kvm->arch.mmu_ready) { 5434 kvm->arch.mmu_ready = 0; 5435 /* order mmu_ready vs. vcpus_running */ 5436 smp_mb(); 5437 if (atomic_read(&kvm->arch.vcpus_running)) { 5438 kvm->arch.mmu_ready = 1; 5439 err = -EBUSY; 5440 goto out_unlock; 5441 } 5442 } 5443 if (radix) 5444 err = kvmppc_switch_mmu_to_radix(kvm); 5445 else 5446 err = kvmppc_switch_mmu_to_hpt(kvm); 5447 if (err) 5448 goto out_unlock; 5449 } 5450 5451 kvm->arch.process_table = cfg->process_table; 5452 kvmppc_setup_partition_table(kvm); 5453 5454 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5455 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5456 err = 0; 5457 5458 out_unlock: 5459 mutex_unlock(&kvm->arch.mmu_setup_lock); 5460 return err; 5461 } 5462 5463 static int kvmhv_enable_nested(struct kvm *kvm) 5464 { 5465 if (!nested) 5466 return -EPERM; 5467 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5468 return -ENODEV; 5469 5470 /* kvm == NULL means the caller is testing if the capability exists */ 5471 if (kvm) 5472 kvm->arch.nested_enable = true; 5473 return 0; 5474 } 5475 5476 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5477 int size) 5478 { 5479 int rc = -EINVAL; 5480 5481 if (kvmhv_vcpu_is_radix(vcpu)) { 5482 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5483 5484 if (rc > 0) 5485 rc = -EINVAL; 5486 } 5487 5488 /* For now quadrants are the only way to access nested guest memory */ 5489 if (rc && vcpu->arch.nested) 5490 rc = -EAGAIN; 5491 5492 return rc; 5493 } 5494 5495 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5496 int size) 5497 { 5498 int rc = -EINVAL; 5499 5500 if (kvmhv_vcpu_is_radix(vcpu)) { 5501 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5502 5503 if (rc > 0) 5504 rc = -EINVAL; 5505 } 5506 5507 /* For now quadrants are the only way to access nested guest memory */ 5508 if (rc && vcpu->arch.nested) 5509 rc = -EAGAIN; 5510 5511 return rc; 5512 } 5513 5514 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5515 { 5516 unpin_vpa(kvm, vpa); 5517 vpa->gpa = 0; 5518 vpa->pinned_addr = NULL; 5519 vpa->dirty = false; 5520 vpa->update_pending = 0; 5521 } 5522 5523 /* 5524 * Enable a guest to become a secure VM, or test whether 5525 * that could be enabled. 5526 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5527 * tested (kvm == NULL) or enabled (kvm != NULL). 5528 */ 5529 static int kvmhv_enable_svm(struct kvm *kvm) 5530 { 5531 if (!kvmppc_uvmem_available()) 5532 return -EINVAL; 5533 if (kvm) 5534 kvm->arch.svm_enabled = 1; 5535 return 0; 5536 } 5537 5538 /* 5539 * IOCTL handler to turn off secure mode of guest 5540 * 5541 * - Release all device pages 5542 * - Issue ucall to terminate the guest on the UV side 5543 * - Unpin the VPA pages. 5544 * - Reinit the partition scoped page tables 5545 */ 5546 static int kvmhv_svm_off(struct kvm *kvm) 5547 { 5548 struct kvm_vcpu *vcpu; 5549 int mmu_was_ready; 5550 int srcu_idx; 5551 int ret = 0; 5552 int i; 5553 5554 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5555 return ret; 5556 5557 mutex_lock(&kvm->arch.mmu_setup_lock); 5558 mmu_was_ready = kvm->arch.mmu_ready; 5559 if (kvm->arch.mmu_ready) { 5560 kvm->arch.mmu_ready = 0; 5561 /* order mmu_ready vs. vcpus_running */ 5562 smp_mb(); 5563 if (atomic_read(&kvm->arch.vcpus_running)) { 5564 kvm->arch.mmu_ready = 1; 5565 ret = -EBUSY; 5566 goto out; 5567 } 5568 } 5569 5570 srcu_idx = srcu_read_lock(&kvm->srcu); 5571 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5572 struct kvm_memory_slot *memslot; 5573 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5574 5575 if (!slots) 5576 continue; 5577 5578 kvm_for_each_memslot(memslot, slots) { 5579 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5580 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5581 } 5582 } 5583 srcu_read_unlock(&kvm->srcu, srcu_idx); 5584 5585 ret = uv_svm_terminate(kvm->arch.lpid); 5586 if (ret != U_SUCCESS) { 5587 ret = -EINVAL; 5588 goto out; 5589 } 5590 5591 /* 5592 * When secure guest is reset, all the guest pages are sent 5593 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5594 * chance to run and unpin their VPA pages. Unpinning of all 5595 * VPA pages is done here explicitly so that VPA pages 5596 * can be migrated to the secure side. 5597 * 5598 * This is required to for the secure SMP guest to reboot 5599 * correctly. 5600 */ 5601 kvm_for_each_vcpu(i, vcpu, kvm) { 5602 spin_lock(&vcpu->arch.vpa_update_lock); 5603 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5604 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5605 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5606 spin_unlock(&vcpu->arch.vpa_update_lock); 5607 } 5608 5609 kvmppc_setup_partition_table(kvm); 5610 kvm->arch.secure_guest = 0; 5611 kvm->arch.mmu_ready = mmu_was_ready; 5612 out: 5613 mutex_unlock(&kvm->arch.mmu_setup_lock); 5614 return ret; 5615 } 5616 5617 static int kvmhv_enable_dawr1(struct kvm *kvm) 5618 { 5619 if (!cpu_has_feature(CPU_FTR_DAWR1)) 5620 return -ENODEV; 5621 5622 /* kvm == NULL means the caller is testing if the capability exists */ 5623 if (kvm) 5624 kvm->arch.dawr1_enabled = true; 5625 return 0; 5626 } 5627 5628 static bool kvmppc_hash_v3_possible(void) 5629 { 5630 if (radix_enabled() && no_mixing_hpt_and_radix) 5631 return false; 5632 5633 return cpu_has_feature(CPU_FTR_ARCH_300) && 5634 cpu_has_feature(CPU_FTR_HVMODE); 5635 } 5636 5637 static struct kvmppc_ops kvm_ops_hv = { 5638 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5639 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5640 .get_one_reg = kvmppc_get_one_reg_hv, 5641 .set_one_reg = kvmppc_set_one_reg_hv, 5642 .vcpu_load = kvmppc_core_vcpu_load_hv, 5643 .vcpu_put = kvmppc_core_vcpu_put_hv, 5644 .inject_interrupt = kvmppc_inject_interrupt_hv, 5645 .set_msr = kvmppc_set_msr_hv, 5646 .vcpu_run = kvmppc_vcpu_run_hv, 5647 .vcpu_create = kvmppc_core_vcpu_create_hv, 5648 .vcpu_free = kvmppc_core_vcpu_free_hv, 5649 .check_requests = kvmppc_core_check_requests_hv, 5650 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5651 .flush_memslot = kvmppc_core_flush_memslot_hv, 5652 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5653 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5654 .unmap_hva_range = kvm_unmap_hva_range_hv, 5655 .age_hva = kvm_age_hva_hv, 5656 .test_age_hva = kvm_test_age_hva_hv, 5657 .set_spte_hva = kvm_set_spte_hva_hv, 5658 .free_memslot = kvmppc_core_free_memslot_hv, 5659 .init_vm = kvmppc_core_init_vm_hv, 5660 .destroy_vm = kvmppc_core_destroy_vm_hv, 5661 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5662 .emulate_op = kvmppc_core_emulate_op_hv, 5663 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5664 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5665 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5666 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5667 .hcall_implemented = kvmppc_hcall_impl_hv, 5668 #ifdef CONFIG_KVM_XICS 5669 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5670 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5671 #endif 5672 .configure_mmu = kvmhv_configure_mmu, 5673 .get_rmmu_info = kvmhv_get_rmmu_info, 5674 .set_smt_mode = kvmhv_set_smt_mode, 5675 .enable_nested = kvmhv_enable_nested, 5676 .load_from_eaddr = kvmhv_load_from_eaddr, 5677 .store_to_eaddr = kvmhv_store_to_eaddr, 5678 .enable_svm = kvmhv_enable_svm, 5679 .svm_off = kvmhv_svm_off, 5680 .enable_dawr1 = kvmhv_enable_dawr1, 5681 .hash_v3_possible = kvmppc_hash_v3_possible, 5682 }; 5683 5684 static int kvm_init_subcore_bitmap(void) 5685 { 5686 int i, j; 5687 int nr_cores = cpu_nr_cores(); 5688 struct sibling_subcore_state *sibling_subcore_state; 5689 5690 for (i = 0; i < nr_cores; i++) { 5691 int first_cpu = i * threads_per_core; 5692 int node = cpu_to_node(first_cpu); 5693 5694 /* Ignore if it is already allocated. */ 5695 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5696 continue; 5697 5698 sibling_subcore_state = 5699 kzalloc_node(sizeof(struct sibling_subcore_state), 5700 GFP_KERNEL, node); 5701 if (!sibling_subcore_state) 5702 return -ENOMEM; 5703 5704 5705 for (j = 0; j < threads_per_core; j++) { 5706 int cpu = first_cpu + j; 5707 5708 paca_ptrs[cpu]->sibling_subcore_state = 5709 sibling_subcore_state; 5710 } 5711 } 5712 return 0; 5713 } 5714 5715 static int kvmppc_radix_possible(void) 5716 { 5717 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5718 } 5719 5720 static int kvmppc_book3s_init_hv(void) 5721 { 5722 int r; 5723 5724 if (!tlbie_capable) { 5725 pr_err("KVM-HV: Host does not support TLBIE\n"); 5726 return -ENODEV; 5727 } 5728 5729 /* 5730 * FIXME!! Do we need to check on all cpus ? 5731 */ 5732 r = kvmppc_core_check_processor_compat_hv(); 5733 if (r < 0) 5734 return -ENODEV; 5735 5736 r = kvmhv_nested_init(); 5737 if (r) 5738 return r; 5739 5740 r = kvm_init_subcore_bitmap(); 5741 if (r) 5742 return r; 5743 5744 /* 5745 * We need a way of accessing the XICS interrupt controller, 5746 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5747 * indirectly, via OPAL. 5748 */ 5749 #ifdef CONFIG_SMP 5750 if (!xics_on_xive() && !kvmhv_on_pseries() && 5751 !local_paca->kvm_hstate.xics_phys) { 5752 struct device_node *np; 5753 5754 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5755 if (!np) { 5756 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5757 return -ENODEV; 5758 } 5759 /* presence of intc confirmed - node can be dropped again */ 5760 of_node_put(np); 5761 } 5762 #endif 5763 5764 kvm_ops_hv.owner = THIS_MODULE; 5765 kvmppc_hv_ops = &kvm_ops_hv; 5766 5767 init_default_hcalls(); 5768 5769 init_vcore_lists(); 5770 5771 r = kvmppc_mmu_hv_init(); 5772 if (r) 5773 return r; 5774 5775 if (kvmppc_radix_possible()) 5776 r = kvmppc_radix_init(); 5777 5778 /* 5779 * POWER9 chips before version 2.02 can't have some threads in 5780 * HPT mode and some in radix mode on the same core. 5781 */ 5782 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5783 unsigned int pvr = mfspr(SPRN_PVR); 5784 if ((pvr >> 16) == PVR_POWER9 && 5785 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5786 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5787 no_mixing_hpt_and_radix = true; 5788 } 5789 5790 r = kvmppc_uvmem_init(); 5791 if (r < 0) 5792 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 5793 5794 return r; 5795 } 5796 5797 static void kvmppc_book3s_exit_hv(void) 5798 { 5799 kvmppc_uvmem_free(); 5800 kvmppc_free_host_rm_ops(); 5801 if (kvmppc_radix_possible()) 5802 kvmppc_radix_exit(); 5803 kvmppc_hv_ops = NULL; 5804 kvmhv_nested_exit(); 5805 } 5806 5807 module_init(kvmppc_book3s_init_hv); 5808 module_exit(kvmppc_book3s_exit_hv); 5809 MODULE_LICENSE("GPL"); 5810 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5811 MODULE_ALIAS("devname:kvm"); 5812