1 /* 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * and Paul Mackerras (paulus@samba.org) 11 */ 12 13 /* 14 * This file handles the architecture-dependent parts of hardware exceptions 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/stddef.h> 22 #include <linux/unistd.h> 23 #include <linux/ptrace.h> 24 #include <linux/user.h> 25 #include <linux/interrupt.h> 26 #include <linux/init.h> 27 #include <linux/module.h> 28 #include <linux/prctl.h> 29 #include <linux/delay.h> 30 #include <linux/kprobes.h> 31 #include <linux/kexec.h> 32 #include <linux/backlight.h> 33 #include <linux/bug.h> 34 #include <linux/kdebug.h> 35 #include <linux/debugfs.h> 36 37 #include <asm/emulated_ops.h> 38 #include <asm/pgtable.h> 39 #include <asm/uaccess.h> 40 #include <asm/system.h> 41 #include <asm/io.h> 42 #include <asm/machdep.h> 43 #include <asm/rtas.h> 44 #include <asm/pmc.h> 45 #ifdef CONFIG_PPC32 46 #include <asm/reg.h> 47 #endif 48 #ifdef CONFIG_PMAC_BACKLIGHT 49 #include <asm/backlight.h> 50 #endif 51 #ifdef CONFIG_PPC64 52 #include <asm/firmware.h> 53 #include <asm/processor.h> 54 #endif 55 #include <asm/kexec.h> 56 #include <asm/ppc-opcode.h> 57 #ifdef CONFIG_FSL_BOOKE 58 #include <asm/dbell.h> 59 #endif 60 61 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 62 int (*__debugger)(struct pt_regs *regs) __read_mostly; 63 int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly; 64 int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly; 65 int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly; 66 int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly; 67 int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly; 68 int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly; 69 70 EXPORT_SYMBOL(__debugger); 71 EXPORT_SYMBOL(__debugger_ipi); 72 EXPORT_SYMBOL(__debugger_bpt); 73 EXPORT_SYMBOL(__debugger_sstep); 74 EXPORT_SYMBOL(__debugger_iabr_match); 75 EXPORT_SYMBOL(__debugger_dabr_match); 76 EXPORT_SYMBOL(__debugger_fault_handler); 77 #endif 78 79 /* 80 * Trap & Exception support 81 */ 82 83 #ifdef CONFIG_PMAC_BACKLIGHT 84 static void pmac_backlight_unblank(void) 85 { 86 mutex_lock(&pmac_backlight_mutex); 87 if (pmac_backlight) { 88 struct backlight_properties *props; 89 90 props = &pmac_backlight->props; 91 props->brightness = props->max_brightness; 92 props->power = FB_BLANK_UNBLANK; 93 backlight_update_status(pmac_backlight); 94 } 95 mutex_unlock(&pmac_backlight_mutex); 96 } 97 #else 98 static inline void pmac_backlight_unblank(void) { } 99 #endif 100 101 int die(const char *str, struct pt_regs *regs, long err) 102 { 103 static struct { 104 raw_spinlock_t lock; 105 u32 lock_owner; 106 int lock_owner_depth; 107 } die = { 108 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock), 109 .lock_owner = -1, 110 .lock_owner_depth = 0 111 }; 112 static int die_counter; 113 unsigned long flags; 114 115 if (debugger(regs)) 116 return 1; 117 118 oops_enter(); 119 120 if (die.lock_owner != raw_smp_processor_id()) { 121 console_verbose(); 122 raw_spin_lock_irqsave(&die.lock, flags); 123 die.lock_owner = smp_processor_id(); 124 die.lock_owner_depth = 0; 125 bust_spinlocks(1); 126 if (machine_is(powermac)) 127 pmac_backlight_unblank(); 128 } else { 129 local_save_flags(flags); 130 } 131 132 if (++die.lock_owner_depth < 3) { 133 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 134 #ifdef CONFIG_PREEMPT 135 printk("PREEMPT "); 136 #endif 137 #ifdef CONFIG_SMP 138 printk("SMP NR_CPUS=%d ", NR_CPUS); 139 #endif 140 #ifdef CONFIG_DEBUG_PAGEALLOC 141 printk("DEBUG_PAGEALLOC "); 142 #endif 143 #ifdef CONFIG_NUMA 144 printk("NUMA "); 145 #endif 146 printk("%s\n", ppc_md.name ? ppc_md.name : ""); 147 148 sysfs_printk_last_file(); 149 if (notify_die(DIE_OOPS, str, regs, err, 255, 150 SIGSEGV) == NOTIFY_STOP) 151 return 1; 152 153 print_modules(); 154 show_regs(regs); 155 } else { 156 printk("Recursive die() failure, output suppressed\n"); 157 } 158 159 bust_spinlocks(0); 160 die.lock_owner = -1; 161 add_taint(TAINT_DIE); 162 raw_spin_unlock_irqrestore(&die.lock, flags); 163 164 if (kexec_should_crash(current) || 165 kexec_sr_activated(smp_processor_id())) 166 crash_kexec(regs); 167 crash_kexec_secondary(regs); 168 169 if (in_interrupt()) 170 panic("Fatal exception in interrupt"); 171 172 if (panic_on_oops) 173 panic("Fatal exception"); 174 175 oops_exit(); 176 do_exit(err); 177 178 return 0; 179 } 180 181 void user_single_step_siginfo(struct task_struct *tsk, 182 struct pt_regs *regs, siginfo_t *info) 183 { 184 memset(info, 0, sizeof(*info)); 185 info->si_signo = SIGTRAP; 186 info->si_code = TRAP_TRACE; 187 info->si_addr = (void __user *)regs->nip; 188 } 189 190 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 191 { 192 siginfo_t info; 193 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \ 194 "at %08lx nip %08lx lr %08lx code %x\n"; 195 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \ 196 "at %016lx nip %016lx lr %016lx code %x\n"; 197 198 if (!user_mode(regs)) { 199 if (die("Exception in kernel mode", regs, signr)) 200 return; 201 } else if (show_unhandled_signals && 202 unhandled_signal(current, signr) && 203 printk_ratelimit()) { 204 printk(regs->msr & MSR_SF ? fmt64 : fmt32, 205 current->comm, current->pid, signr, 206 addr, regs->nip, regs->link, code); 207 } 208 209 memset(&info, 0, sizeof(info)); 210 info.si_signo = signr; 211 info.si_code = code; 212 info.si_addr = (void __user *) addr; 213 force_sig_info(signr, &info, current); 214 } 215 216 #ifdef CONFIG_PPC64 217 void system_reset_exception(struct pt_regs *regs) 218 { 219 /* See if any machine dependent calls */ 220 if (ppc_md.system_reset_exception) { 221 if (ppc_md.system_reset_exception(regs)) 222 return; 223 } 224 225 #ifdef CONFIG_KEXEC 226 cpu_set(smp_processor_id(), cpus_in_sr); 227 #endif 228 229 die("System Reset", regs, SIGABRT); 230 231 /* 232 * Some CPUs when released from the debugger will execute this path. 233 * These CPUs entered the debugger via a soft-reset. If the CPU was 234 * hung before entering the debugger it will return to the hung 235 * state when exiting this function. This causes a problem in 236 * kdump since the hung CPU(s) will not respond to the IPI sent 237 * from kdump. To prevent the problem we call crash_kexec_secondary() 238 * here. If a kdump had not been initiated or we exit the debugger 239 * with the "exit and recover" command (x) crash_kexec_secondary() 240 * will return after 5ms and the CPU returns to its previous state. 241 */ 242 crash_kexec_secondary(regs); 243 244 /* Must die if the interrupt is not recoverable */ 245 if (!(regs->msr & MSR_RI)) 246 panic("Unrecoverable System Reset"); 247 248 /* What should we do here? We could issue a shutdown or hard reset. */ 249 } 250 #endif 251 252 /* 253 * I/O accesses can cause machine checks on powermacs. 254 * Check if the NIP corresponds to the address of a sync 255 * instruction for which there is an entry in the exception 256 * table. 257 * Note that the 601 only takes a machine check on TEA 258 * (transfer error ack) signal assertion, and does not 259 * set any of the top 16 bits of SRR1. 260 * -- paulus. 261 */ 262 static inline int check_io_access(struct pt_regs *regs) 263 { 264 #ifdef CONFIG_PPC32 265 unsigned long msr = regs->msr; 266 const struct exception_table_entry *entry; 267 unsigned int *nip = (unsigned int *)regs->nip; 268 269 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 270 && (entry = search_exception_tables(regs->nip)) != NULL) { 271 /* 272 * Check that it's a sync instruction, or somewhere 273 * in the twi; isync; nop sequence that inb/inw/inl uses. 274 * As the address is in the exception table 275 * we should be able to read the instr there. 276 * For the debug message, we look at the preceding 277 * load or store. 278 */ 279 if (*nip == 0x60000000) /* nop */ 280 nip -= 2; 281 else if (*nip == 0x4c00012c) /* isync */ 282 --nip; 283 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 284 /* sync or twi */ 285 unsigned int rb; 286 287 --nip; 288 rb = (*nip >> 11) & 0x1f; 289 printk(KERN_DEBUG "%s bad port %lx at %p\n", 290 (*nip & 0x100)? "OUT to": "IN from", 291 regs->gpr[rb] - _IO_BASE, nip); 292 regs->msr |= MSR_RI; 293 regs->nip = entry->fixup; 294 return 1; 295 } 296 } 297 #endif /* CONFIG_PPC32 */ 298 return 0; 299 } 300 301 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 302 /* On 4xx, the reason for the machine check or program exception 303 is in the ESR. */ 304 #define get_reason(regs) ((regs)->dsisr) 305 #ifndef CONFIG_FSL_BOOKE 306 #define get_mc_reason(regs) ((regs)->dsisr) 307 #else 308 #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK) 309 #endif 310 #define REASON_FP ESR_FP 311 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 312 #define REASON_PRIVILEGED ESR_PPR 313 #define REASON_TRAP ESR_PTR 314 315 /* single-step stuff */ 316 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 317 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 318 319 #else 320 /* On non-4xx, the reason for the machine check or program 321 exception is in the MSR. */ 322 #define get_reason(regs) ((regs)->msr) 323 #define get_mc_reason(regs) ((regs)->msr) 324 #define REASON_FP 0x100000 325 #define REASON_ILLEGAL 0x80000 326 #define REASON_PRIVILEGED 0x40000 327 #define REASON_TRAP 0x20000 328 329 #define single_stepping(regs) ((regs)->msr & MSR_SE) 330 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 331 #endif 332 333 #if defined(CONFIG_4xx) 334 int machine_check_4xx(struct pt_regs *regs) 335 { 336 unsigned long reason = get_mc_reason(regs); 337 338 if (reason & ESR_IMCP) { 339 printk("Instruction"); 340 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 341 } else 342 printk("Data"); 343 printk(" machine check in kernel mode.\n"); 344 345 return 0; 346 } 347 348 int machine_check_440A(struct pt_regs *regs) 349 { 350 unsigned long reason = get_mc_reason(regs); 351 352 printk("Machine check in kernel mode.\n"); 353 if (reason & ESR_IMCP){ 354 printk("Instruction Synchronous Machine Check exception\n"); 355 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 356 } 357 else { 358 u32 mcsr = mfspr(SPRN_MCSR); 359 if (mcsr & MCSR_IB) 360 printk("Instruction Read PLB Error\n"); 361 if (mcsr & MCSR_DRB) 362 printk("Data Read PLB Error\n"); 363 if (mcsr & MCSR_DWB) 364 printk("Data Write PLB Error\n"); 365 if (mcsr & MCSR_TLBP) 366 printk("TLB Parity Error\n"); 367 if (mcsr & MCSR_ICP){ 368 flush_instruction_cache(); 369 printk("I-Cache Parity Error\n"); 370 } 371 if (mcsr & MCSR_DCSP) 372 printk("D-Cache Search Parity Error\n"); 373 if (mcsr & MCSR_DCFP) 374 printk("D-Cache Flush Parity Error\n"); 375 if (mcsr & MCSR_IMPE) 376 printk("Machine Check exception is imprecise\n"); 377 378 /* Clear MCSR */ 379 mtspr(SPRN_MCSR, mcsr); 380 } 381 return 0; 382 } 383 #elif defined(CONFIG_E500) 384 int machine_check_e500(struct pt_regs *regs) 385 { 386 unsigned long reason = get_mc_reason(regs); 387 388 printk("Machine check in kernel mode.\n"); 389 printk("Caused by (from MCSR=%lx): ", reason); 390 391 if (reason & MCSR_MCP) 392 printk("Machine Check Signal\n"); 393 if (reason & MCSR_ICPERR) 394 printk("Instruction Cache Parity Error\n"); 395 if (reason & MCSR_DCP_PERR) 396 printk("Data Cache Push Parity Error\n"); 397 if (reason & MCSR_DCPERR) 398 printk("Data Cache Parity Error\n"); 399 if (reason & MCSR_BUS_IAERR) 400 printk("Bus - Instruction Address Error\n"); 401 if (reason & MCSR_BUS_RAERR) 402 printk("Bus - Read Address Error\n"); 403 if (reason & MCSR_BUS_WAERR) 404 printk("Bus - Write Address Error\n"); 405 if (reason & MCSR_BUS_IBERR) 406 printk("Bus - Instruction Data Error\n"); 407 if (reason & MCSR_BUS_RBERR) 408 printk("Bus - Read Data Bus Error\n"); 409 if (reason & MCSR_BUS_WBERR) 410 printk("Bus - Read Data Bus Error\n"); 411 if (reason & MCSR_BUS_IPERR) 412 printk("Bus - Instruction Parity Error\n"); 413 if (reason & MCSR_BUS_RPERR) 414 printk("Bus - Read Parity Error\n"); 415 416 return 0; 417 } 418 #elif defined(CONFIG_E200) 419 int machine_check_e200(struct pt_regs *regs) 420 { 421 unsigned long reason = get_mc_reason(regs); 422 423 printk("Machine check in kernel mode.\n"); 424 printk("Caused by (from MCSR=%lx): ", reason); 425 426 if (reason & MCSR_MCP) 427 printk("Machine Check Signal\n"); 428 if (reason & MCSR_CP_PERR) 429 printk("Cache Push Parity Error\n"); 430 if (reason & MCSR_CPERR) 431 printk("Cache Parity Error\n"); 432 if (reason & MCSR_EXCP_ERR) 433 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 434 if (reason & MCSR_BUS_IRERR) 435 printk("Bus - Read Bus Error on instruction fetch\n"); 436 if (reason & MCSR_BUS_DRERR) 437 printk("Bus - Read Bus Error on data load\n"); 438 if (reason & MCSR_BUS_WRERR) 439 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 440 441 return 0; 442 } 443 #else 444 int machine_check_generic(struct pt_regs *regs) 445 { 446 unsigned long reason = get_mc_reason(regs); 447 448 printk("Machine check in kernel mode.\n"); 449 printk("Caused by (from SRR1=%lx): ", reason); 450 switch (reason & 0x601F0000) { 451 case 0x80000: 452 printk("Machine check signal\n"); 453 break; 454 case 0: /* for 601 */ 455 case 0x40000: 456 case 0x140000: /* 7450 MSS error and TEA */ 457 printk("Transfer error ack signal\n"); 458 break; 459 case 0x20000: 460 printk("Data parity error signal\n"); 461 break; 462 case 0x10000: 463 printk("Address parity error signal\n"); 464 break; 465 case 0x20000000: 466 printk("L1 Data Cache error\n"); 467 break; 468 case 0x40000000: 469 printk("L1 Instruction Cache error\n"); 470 break; 471 case 0x00100000: 472 printk("L2 data cache parity error\n"); 473 break; 474 default: 475 printk("Unknown values in msr\n"); 476 } 477 return 0; 478 } 479 #endif /* everything else */ 480 481 void machine_check_exception(struct pt_regs *regs) 482 { 483 int recover = 0; 484 485 __get_cpu_var(irq_stat).mce_exceptions++; 486 487 /* See if any machine dependent calls. In theory, we would want 488 * to call the CPU first, and call the ppc_md. one if the CPU 489 * one returns a positive number. However there is existing code 490 * that assumes the board gets a first chance, so let's keep it 491 * that way for now and fix things later. --BenH. 492 */ 493 if (ppc_md.machine_check_exception) 494 recover = ppc_md.machine_check_exception(regs); 495 else if (cur_cpu_spec->machine_check) 496 recover = cur_cpu_spec->machine_check(regs); 497 498 if (recover > 0) 499 return; 500 501 if (user_mode(regs)) { 502 regs->msr |= MSR_RI; 503 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 504 return; 505 } 506 507 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 508 /* the qspan pci read routines can cause machine checks -- Cort 509 * 510 * yuck !!! that totally needs to go away ! There are better ways 511 * to deal with that than having a wart in the mcheck handler. 512 * -- BenH 513 */ 514 bad_page_fault(regs, regs->dar, SIGBUS); 515 return; 516 #endif 517 518 if (debugger_fault_handler(regs)) { 519 regs->msr |= MSR_RI; 520 return; 521 } 522 523 if (check_io_access(regs)) 524 return; 525 526 if (debugger_fault_handler(regs)) 527 return; 528 die("Machine check", regs, SIGBUS); 529 530 /* Must die if the interrupt is not recoverable */ 531 if (!(regs->msr & MSR_RI)) 532 panic("Unrecoverable Machine check"); 533 } 534 535 void SMIException(struct pt_regs *regs) 536 { 537 die("System Management Interrupt", regs, SIGABRT); 538 } 539 540 void unknown_exception(struct pt_regs *regs) 541 { 542 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 543 regs->nip, regs->msr, regs->trap); 544 545 _exception(SIGTRAP, regs, 0, 0); 546 } 547 548 void instruction_breakpoint_exception(struct pt_regs *regs) 549 { 550 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 551 5, SIGTRAP) == NOTIFY_STOP) 552 return; 553 if (debugger_iabr_match(regs)) 554 return; 555 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 556 } 557 558 void RunModeException(struct pt_regs *regs) 559 { 560 _exception(SIGTRAP, regs, 0, 0); 561 } 562 563 void __kprobes single_step_exception(struct pt_regs *regs) 564 { 565 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 566 567 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 568 5, SIGTRAP) == NOTIFY_STOP) 569 return; 570 if (debugger_sstep(regs)) 571 return; 572 573 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 574 } 575 576 /* 577 * After we have successfully emulated an instruction, we have to 578 * check if the instruction was being single-stepped, and if so, 579 * pretend we got a single-step exception. This was pointed out 580 * by Kumar Gala. -- paulus 581 */ 582 static void emulate_single_step(struct pt_regs *regs) 583 { 584 if (single_stepping(regs)) { 585 clear_single_step(regs); 586 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 587 } 588 } 589 590 static inline int __parse_fpscr(unsigned long fpscr) 591 { 592 int ret = 0; 593 594 /* Invalid operation */ 595 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 596 ret = FPE_FLTINV; 597 598 /* Overflow */ 599 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 600 ret = FPE_FLTOVF; 601 602 /* Underflow */ 603 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 604 ret = FPE_FLTUND; 605 606 /* Divide by zero */ 607 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 608 ret = FPE_FLTDIV; 609 610 /* Inexact result */ 611 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 612 ret = FPE_FLTRES; 613 614 return ret; 615 } 616 617 static void parse_fpe(struct pt_regs *regs) 618 { 619 int code = 0; 620 621 flush_fp_to_thread(current); 622 623 code = __parse_fpscr(current->thread.fpscr.val); 624 625 _exception(SIGFPE, regs, code, regs->nip); 626 } 627 628 /* 629 * Illegal instruction emulation support. Originally written to 630 * provide the PVR to user applications using the mfspr rd, PVR. 631 * Return non-zero if we can't emulate, or -EFAULT if the associated 632 * memory access caused an access fault. Return zero on success. 633 * 634 * There are a couple of ways to do this, either "decode" the instruction 635 * or directly match lots of bits. In this case, matching lots of 636 * bits is faster and easier. 637 * 638 */ 639 static int emulate_string_inst(struct pt_regs *regs, u32 instword) 640 { 641 u8 rT = (instword >> 21) & 0x1f; 642 u8 rA = (instword >> 16) & 0x1f; 643 u8 NB_RB = (instword >> 11) & 0x1f; 644 u32 num_bytes; 645 unsigned long EA; 646 int pos = 0; 647 648 /* Early out if we are an invalid form of lswx */ 649 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX) 650 if ((rT == rA) || (rT == NB_RB)) 651 return -EINVAL; 652 653 EA = (rA == 0) ? 0 : regs->gpr[rA]; 654 655 switch (instword & PPC_INST_STRING_MASK) { 656 case PPC_INST_LSWX: 657 case PPC_INST_STSWX: 658 EA += NB_RB; 659 num_bytes = regs->xer & 0x7f; 660 break; 661 case PPC_INST_LSWI: 662 case PPC_INST_STSWI: 663 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 664 break; 665 default: 666 return -EINVAL; 667 } 668 669 while (num_bytes != 0) 670 { 671 u8 val; 672 u32 shift = 8 * (3 - (pos & 0x3)); 673 674 switch ((instword & PPC_INST_STRING_MASK)) { 675 case PPC_INST_LSWX: 676 case PPC_INST_LSWI: 677 if (get_user(val, (u8 __user *)EA)) 678 return -EFAULT; 679 /* first time updating this reg, 680 * zero it out */ 681 if (pos == 0) 682 regs->gpr[rT] = 0; 683 regs->gpr[rT] |= val << shift; 684 break; 685 case PPC_INST_STSWI: 686 case PPC_INST_STSWX: 687 val = regs->gpr[rT] >> shift; 688 if (put_user(val, (u8 __user *)EA)) 689 return -EFAULT; 690 break; 691 } 692 /* move EA to next address */ 693 EA += 1; 694 num_bytes--; 695 696 /* manage our position within the register */ 697 if (++pos == 4) { 698 pos = 0; 699 if (++rT == 32) 700 rT = 0; 701 } 702 } 703 704 return 0; 705 } 706 707 static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword) 708 { 709 u32 ra,rs; 710 unsigned long tmp; 711 712 ra = (instword >> 16) & 0x1f; 713 rs = (instword >> 21) & 0x1f; 714 715 tmp = regs->gpr[rs]; 716 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL); 717 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL); 718 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL; 719 regs->gpr[ra] = tmp; 720 721 return 0; 722 } 723 724 static int emulate_isel(struct pt_regs *regs, u32 instword) 725 { 726 u8 rT = (instword >> 21) & 0x1f; 727 u8 rA = (instword >> 16) & 0x1f; 728 u8 rB = (instword >> 11) & 0x1f; 729 u8 BC = (instword >> 6) & 0x1f; 730 u8 bit; 731 unsigned long tmp; 732 733 tmp = (rA == 0) ? 0 : regs->gpr[rA]; 734 bit = (regs->ccr >> (31 - BC)) & 0x1; 735 736 regs->gpr[rT] = bit ? tmp : regs->gpr[rB]; 737 738 return 0; 739 } 740 741 static int emulate_instruction(struct pt_regs *regs) 742 { 743 u32 instword; 744 u32 rd; 745 746 if (!user_mode(regs) || (regs->msr & MSR_LE)) 747 return -EINVAL; 748 CHECK_FULL_REGS(regs); 749 750 if (get_user(instword, (u32 __user *)(regs->nip))) 751 return -EFAULT; 752 753 /* Emulate the mfspr rD, PVR. */ 754 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) { 755 PPC_WARN_EMULATED(mfpvr, regs); 756 rd = (instword >> 21) & 0x1f; 757 regs->gpr[rd] = mfspr(SPRN_PVR); 758 return 0; 759 } 760 761 /* Emulating the dcba insn is just a no-op. */ 762 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) { 763 PPC_WARN_EMULATED(dcba, regs); 764 return 0; 765 } 766 767 /* Emulate the mcrxr insn. */ 768 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) { 769 int shift = (instword >> 21) & 0x1c; 770 unsigned long msk = 0xf0000000UL >> shift; 771 772 PPC_WARN_EMULATED(mcrxr, regs); 773 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 774 regs->xer &= ~0xf0000000UL; 775 return 0; 776 } 777 778 /* Emulate load/store string insn. */ 779 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) { 780 PPC_WARN_EMULATED(string, regs); 781 return emulate_string_inst(regs, instword); 782 } 783 784 /* Emulate the popcntb (Population Count Bytes) instruction. */ 785 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) { 786 PPC_WARN_EMULATED(popcntb, regs); 787 return emulate_popcntb_inst(regs, instword); 788 } 789 790 /* Emulate isel (Integer Select) instruction */ 791 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) { 792 PPC_WARN_EMULATED(isel, regs); 793 return emulate_isel(regs, instword); 794 } 795 796 return -EINVAL; 797 } 798 799 int is_valid_bugaddr(unsigned long addr) 800 { 801 return is_kernel_addr(addr); 802 } 803 804 void __kprobes program_check_exception(struct pt_regs *regs) 805 { 806 unsigned int reason = get_reason(regs); 807 extern int do_mathemu(struct pt_regs *regs); 808 809 /* We can now get here via a FP Unavailable exception if the core 810 * has no FPU, in that case the reason flags will be 0 */ 811 812 if (reason & REASON_FP) { 813 /* IEEE FP exception */ 814 parse_fpe(regs); 815 return; 816 } 817 if (reason & REASON_TRAP) { 818 /* Debugger is first in line to stop recursive faults in 819 * rcu_lock, notify_die, or atomic_notifier_call_chain */ 820 if (debugger_bpt(regs)) 821 return; 822 823 /* trap exception */ 824 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 825 == NOTIFY_STOP) 826 return; 827 828 if (!(regs->msr & MSR_PR) && /* not user-mode */ 829 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) { 830 regs->nip += 4; 831 return; 832 } 833 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 834 return; 835 } 836 837 local_irq_enable(); 838 839 #ifdef CONFIG_MATH_EMULATION 840 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 841 * but there seems to be a hardware bug on the 405GP (RevD) 842 * that means ESR is sometimes set incorrectly - either to 843 * ESR_DST (!?) or 0. In the process of chasing this with the 844 * hardware people - not sure if it can happen on any illegal 845 * instruction or only on FP instructions, whether there is a 846 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 847 switch (do_mathemu(regs)) { 848 case 0: 849 emulate_single_step(regs); 850 return; 851 case 1: { 852 int code = 0; 853 code = __parse_fpscr(current->thread.fpscr.val); 854 _exception(SIGFPE, regs, code, regs->nip); 855 return; 856 } 857 case -EFAULT: 858 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 859 return; 860 } 861 /* fall through on any other errors */ 862 #endif /* CONFIG_MATH_EMULATION */ 863 864 /* Try to emulate it if we should. */ 865 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 866 switch (emulate_instruction(regs)) { 867 case 0: 868 regs->nip += 4; 869 emulate_single_step(regs); 870 return; 871 case -EFAULT: 872 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 873 return; 874 } 875 } 876 877 if (reason & REASON_PRIVILEGED) 878 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 879 else 880 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 881 } 882 883 void alignment_exception(struct pt_regs *regs) 884 { 885 int sig, code, fixed = 0; 886 887 /* we don't implement logging of alignment exceptions */ 888 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 889 fixed = fix_alignment(regs); 890 891 if (fixed == 1) { 892 regs->nip += 4; /* skip over emulated instruction */ 893 emulate_single_step(regs); 894 return; 895 } 896 897 /* Operand address was bad */ 898 if (fixed == -EFAULT) { 899 sig = SIGSEGV; 900 code = SEGV_ACCERR; 901 } else { 902 sig = SIGBUS; 903 code = BUS_ADRALN; 904 } 905 if (user_mode(regs)) 906 _exception(sig, regs, code, regs->dar); 907 else 908 bad_page_fault(regs, regs->dar, sig); 909 } 910 911 void StackOverflow(struct pt_regs *regs) 912 { 913 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 914 current, regs->gpr[1]); 915 debugger(regs); 916 show_regs(regs); 917 panic("kernel stack overflow"); 918 } 919 920 void nonrecoverable_exception(struct pt_regs *regs) 921 { 922 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 923 regs->nip, regs->msr); 924 debugger(regs); 925 die("nonrecoverable exception", regs, SIGKILL); 926 } 927 928 void trace_syscall(struct pt_regs *regs) 929 { 930 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 931 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0], 932 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 933 } 934 935 void kernel_fp_unavailable_exception(struct pt_regs *regs) 936 { 937 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 938 "%lx at %lx\n", regs->trap, regs->nip); 939 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 940 } 941 942 void altivec_unavailable_exception(struct pt_regs *regs) 943 { 944 if (user_mode(regs)) { 945 /* A user program has executed an altivec instruction, 946 but this kernel doesn't support altivec. */ 947 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 948 return; 949 } 950 951 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 952 "%lx at %lx\n", regs->trap, regs->nip); 953 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 954 } 955 956 void vsx_unavailable_exception(struct pt_regs *regs) 957 { 958 if (user_mode(regs)) { 959 /* A user program has executed an vsx instruction, 960 but this kernel doesn't support vsx. */ 961 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 962 return; 963 } 964 965 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception " 966 "%lx at %lx\n", regs->trap, regs->nip); 967 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT); 968 } 969 970 void performance_monitor_exception(struct pt_regs *regs) 971 { 972 __get_cpu_var(irq_stat).pmu_irqs++; 973 974 perf_irq(regs); 975 } 976 977 #ifdef CONFIG_8xx 978 void SoftwareEmulation(struct pt_regs *regs) 979 { 980 extern int do_mathemu(struct pt_regs *); 981 extern int Soft_emulate_8xx(struct pt_regs *); 982 #if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU) 983 int errcode; 984 #endif 985 986 CHECK_FULL_REGS(regs); 987 988 if (!user_mode(regs)) { 989 debugger(regs); 990 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 991 } 992 993 #ifdef CONFIG_MATH_EMULATION 994 errcode = do_mathemu(regs); 995 if (errcode >= 0) 996 PPC_WARN_EMULATED(math, regs); 997 998 switch (errcode) { 999 case 0: 1000 emulate_single_step(regs); 1001 return; 1002 case 1: { 1003 int code = 0; 1004 code = __parse_fpscr(current->thread.fpscr.val); 1005 _exception(SIGFPE, regs, code, regs->nip); 1006 return; 1007 } 1008 case -EFAULT: 1009 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 1010 return; 1011 default: 1012 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1013 return; 1014 } 1015 1016 #elif defined(CONFIG_8XX_MINIMAL_FPEMU) 1017 errcode = Soft_emulate_8xx(regs); 1018 if (errcode >= 0) 1019 PPC_WARN_EMULATED(8xx, regs); 1020 1021 switch (errcode) { 1022 case 0: 1023 emulate_single_step(regs); 1024 return; 1025 case 1: 1026 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1027 return; 1028 case -EFAULT: 1029 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 1030 return; 1031 } 1032 #else 1033 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1034 #endif 1035 } 1036 #endif /* CONFIG_8xx */ 1037 1038 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1039 static void handle_debug(struct pt_regs *regs, unsigned long debug_status) 1040 { 1041 int changed = 0; 1042 /* 1043 * Determine the cause of the debug event, clear the 1044 * event flags and send a trap to the handler. Torez 1045 */ 1046 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { 1047 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W); 1048 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1049 current->thread.dbcr2 &= ~DBCR2_DAC12MODE; 1050 #endif 1051 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT, 1052 5); 1053 changed |= 0x01; 1054 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) { 1055 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W); 1056 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT, 1057 6); 1058 changed |= 0x01; 1059 } else if (debug_status & DBSR_IAC1) { 1060 current->thread.dbcr0 &= ~DBCR0_IAC1; 1061 dbcr_iac_range(current) &= ~DBCR_IAC12MODE; 1062 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT, 1063 1); 1064 changed |= 0x01; 1065 } else if (debug_status & DBSR_IAC2) { 1066 current->thread.dbcr0 &= ~DBCR0_IAC2; 1067 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT, 1068 2); 1069 changed |= 0x01; 1070 } else if (debug_status & DBSR_IAC3) { 1071 current->thread.dbcr0 &= ~DBCR0_IAC3; 1072 dbcr_iac_range(current) &= ~DBCR_IAC34MODE; 1073 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT, 1074 3); 1075 changed |= 0x01; 1076 } else if (debug_status & DBSR_IAC4) { 1077 current->thread.dbcr0 &= ~DBCR0_IAC4; 1078 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT, 1079 4); 1080 changed |= 0x01; 1081 } 1082 /* 1083 * At the point this routine was called, the MSR(DE) was turned off. 1084 * Check all other debug flags and see if that bit needs to be turned 1085 * back on or not. 1086 */ 1087 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1)) 1088 regs->msr |= MSR_DE; 1089 else 1090 /* Make sure the IDM flag is off */ 1091 current->thread.dbcr0 &= ~DBCR0_IDM; 1092 1093 if (changed & 0x01) 1094 mtspr(SPRN_DBCR0, current->thread.dbcr0); 1095 } 1096 1097 void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) 1098 { 1099 current->thread.dbsr = debug_status; 1100 1101 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while 1102 * on server, it stops on the target of the branch. In order to simulate 1103 * the server behaviour, we thus restart right away with a single step 1104 * instead of stopping here when hitting a BT 1105 */ 1106 if (debug_status & DBSR_BT) { 1107 regs->msr &= ~MSR_DE; 1108 1109 /* Disable BT */ 1110 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT); 1111 /* Clear the BT event */ 1112 mtspr(SPRN_DBSR, DBSR_BT); 1113 1114 /* Do the single step trick only when coming from userspace */ 1115 if (user_mode(regs)) { 1116 current->thread.dbcr0 &= ~DBCR0_BT; 1117 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; 1118 regs->msr |= MSR_DE; 1119 return; 1120 } 1121 1122 if (notify_die(DIE_SSTEP, "block_step", regs, 5, 1123 5, SIGTRAP) == NOTIFY_STOP) { 1124 return; 1125 } 1126 if (debugger_sstep(regs)) 1127 return; 1128 } else if (debug_status & DBSR_IC) { /* Instruction complete */ 1129 regs->msr &= ~MSR_DE; 1130 1131 /* Disable instruction completion */ 1132 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 1133 /* Clear the instruction completion event */ 1134 mtspr(SPRN_DBSR, DBSR_IC); 1135 1136 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 1137 5, SIGTRAP) == NOTIFY_STOP) { 1138 return; 1139 } 1140 1141 if (debugger_sstep(regs)) 1142 return; 1143 1144 if (user_mode(regs)) { 1145 current->thread.dbcr0 &= ~DBCR0_IC; 1146 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1147 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, 1148 current->thread.dbcr1)) 1149 regs->msr |= MSR_DE; 1150 else 1151 /* Make sure the IDM bit is off */ 1152 current->thread.dbcr0 &= ~DBCR0_IDM; 1153 #endif 1154 } 1155 1156 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 1157 } else 1158 handle_debug(regs, debug_status); 1159 } 1160 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 1161 1162 #if !defined(CONFIG_TAU_INT) 1163 void TAUException(struct pt_regs *regs) 1164 { 1165 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 1166 regs->nip, regs->msr, regs->trap, print_tainted()); 1167 } 1168 #endif /* CONFIG_INT_TAU */ 1169 1170 #ifdef CONFIG_ALTIVEC 1171 void altivec_assist_exception(struct pt_regs *regs) 1172 { 1173 int err; 1174 1175 if (!user_mode(regs)) { 1176 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 1177 " at %lx\n", regs->nip); 1178 die("Kernel VMX/Altivec assist exception", regs, SIGILL); 1179 } 1180 1181 flush_altivec_to_thread(current); 1182 1183 PPC_WARN_EMULATED(altivec, regs); 1184 err = emulate_altivec(regs); 1185 if (err == 0) { 1186 regs->nip += 4; /* skip emulated instruction */ 1187 emulate_single_step(regs); 1188 return; 1189 } 1190 1191 if (err == -EFAULT) { 1192 /* got an error reading the instruction */ 1193 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1194 } else { 1195 /* didn't recognize the instruction */ 1196 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 1197 if (printk_ratelimit()) 1198 printk(KERN_ERR "Unrecognized altivec instruction " 1199 "in %s at %lx\n", current->comm, regs->nip); 1200 current->thread.vscr.u[3] |= 0x10000; 1201 } 1202 } 1203 #endif /* CONFIG_ALTIVEC */ 1204 1205 #ifdef CONFIG_VSX 1206 void vsx_assist_exception(struct pt_regs *regs) 1207 { 1208 if (!user_mode(regs)) { 1209 printk(KERN_EMERG "VSX assist exception in kernel mode" 1210 " at %lx\n", regs->nip); 1211 die("Kernel VSX assist exception", regs, SIGILL); 1212 } 1213 1214 flush_vsx_to_thread(current); 1215 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip); 1216 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1217 } 1218 #endif /* CONFIG_VSX */ 1219 1220 #ifdef CONFIG_FSL_BOOKE 1221 1222 void doorbell_exception(struct pt_regs *regs) 1223 { 1224 #ifdef CONFIG_SMP 1225 int cpu = smp_processor_id(); 1226 int msg; 1227 1228 if (num_online_cpus() < 2) 1229 return; 1230 1231 for (msg = 0; msg < 4; msg++) 1232 if (test_and_clear_bit(msg, &dbell_smp_message[cpu])) 1233 smp_message_recv(msg); 1234 #else 1235 printk(KERN_WARNING "Received doorbell on non-smp system\n"); 1236 #endif 1237 } 1238 1239 void CacheLockingException(struct pt_regs *regs, unsigned long address, 1240 unsigned long error_code) 1241 { 1242 /* We treat cache locking instructions from the user 1243 * as priv ops, in the future we could try to do 1244 * something smarter 1245 */ 1246 if (error_code & (ESR_DLK|ESR_ILK)) 1247 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 1248 return; 1249 } 1250 #endif /* CONFIG_FSL_BOOKE */ 1251 1252 #ifdef CONFIG_SPE 1253 void SPEFloatingPointException(struct pt_regs *regs) 1254 { 1255 extern int do_spe_mathemu(struct pt_regs *regs); 1256 unsigned long spefscr; 1257 int fpexc_mode; 1258 int code = 0; 1259 int err; 1260 1261 preempt_disable(); 1262 if (regs->msr & MSR_SPE) 1263 giveup_spe(current); 1264 preempt_enable(); 1265 1266 spefscr = current->thread.spefscr; 1267 fpexc_mode = current->thread.fpexc_mode; 1268 1269 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1270 code = FPE_FLTOVF; 1271 } 1272 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1273 code = FPE_FLTUND; 1274 } 1275 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1276 code = FPE_FLTDIV; 1277 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1278 code = FPE_FLTINV; 1279 } 1280 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1281 code = FPE_FLTRES; 1282 1283 err = do_spe_mathemu(regs); 1284 if (err == 0) { 1285 regs->nip += 4; /* skip emulated instruction */ 1286 emulate_single_step(regs); 1287 return; 1288 } 1289 1290 if (err == -EFAULT) { 1291 /* got an error reading the instruction */ 1292 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1293 } else if (err == -EINVAL) { 1294 /* didn't recognize the instruction */ 1295 printk(KERN_ERR "unrecognized spe instruction " 1296 "in %s at %lx\n", current->comm, regs->nip); 1297 } else { 1298 _exception(SIGFPE, regs, code, regs->nip); 1299 } 1300 1301 return; 1302 } 1303 1304 void SPEFloatingPointRoundException(struct pt_regs *regs) 1305 { 1306 extern int speround_handler(struct pt_regs *regs); 1307 int err; 1308 1309 preempt_disable(); 1310 if (regs->msr & MSR_SPE) 1311 giveup_spe(current); 1312 preempt_enable(); 1313 1314 regs->nip -= 4; 1315 err = speround_handler(regs); 1316 if (err == 0) { 1317 regs->nip += 4; /* skip emulated instruction */ 1318 emulate_single_step(regs); 1319 return; 1320 } 1321 1322 if (err == -EFAULT) { 1323 /* got an error reading the instruction */ 1324 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1325 } else if (err == -EINVAL) { 1326 /* didn't recognize the instruction */ 1327 printk(KERN_ERR "unrecognized spe instruction " 1328 "in %s at %lx\n", current->comm, regs->nip); 1329 } else { 1330 _exception(SIGFPE, regs, 0, regs->nip); 1331 return; 1332 } 1333 } 1334 #endif 1335 1336 /* 1337 * We enter here if we get an unrecoverable exception, that is, one 1338 * that happened at a point where the RI (recoverable interrupt) bit 1339 * in the MSR is 0. This indicates that SRR0/1 are live, and that 1340 * we therefore lost state by taking this exception. 1341 */ 1342 void unrecoverable_exception(struct pt_regs *regs) 1343 { 1344 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1345 regs->trap, regs->nip); 1346 die("Unrecoverable exception", regs, SIGABRT); 1347 } 1348 1349 #ifdef CONFIG_BOOKE_WDT 1350 /* 1351 * Default handler for a Watchdog exception, 1352 * spins until a reboot occurs 1353 */ 1354 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 1355 { 1356 /* Generic WatchdogHandler, implement your own */ 1357 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 1358 return; 1359 } 1360 1361 void WatchdogException(struct pt_regs *regs) 1362 { 1363 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 1364 WatchdogHandler(regs); 1365 } 1366 #endif 1367 1368 /* 1369 * We enter here if we discover during exception entry that we are 1370 * running in supervisor mode with a userspace value in the stack pointer. 1371 */ 1372 void kernel_bad_stack(struct pt_regs *regs) 1373 { 1374 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1375 regs->gpr[1], regs->nip); 1376 die("Bad kernel stack pointer", regs, SIGABRT); 1377 } 1378 1379 void __init trap_init(void) 1380 { 1381 } 1382 1383 1384 #ifdef CONFIG_PPC_EMULATED_STATS 1385 1386 #define WARN_EMULATED_SETUP(type) .type = { .name = #type } 1387 1388 struct ppc_emulated ppc_emulated = { 1389 #ifdef CONFIG_ALTIVEC 1390 WARN_EMULATED_SETUP(altivec), 1391 #endif 1392 WARN_EMULATED_SETUP(dcba), 1393 WARN_EMULATED_SETUP(dcbz), 1394 WARN_EMULATED_SETUP(fp_pair), 1395 WARN_EMULATED_SETUP(isel), 1396 WARN_EMULATED_SETUP(mcrxr), 1397 WARN_EMULATED_SETUP(mfpvr), 1398 WARN_EMULATED_SETUP(multiple), 1399 WARN_EMULATED_SETUP(popcntb), 1400 WARN_EMULATED_SETUP(spe), 1401 WARN_EMULATED_SETUP(string), 1402 WARN_EMULATED_SETUP(unaligned), 1403 #ifdef CONFIG_MATH_EMULATION 1404 WARN_EMULATED_SETUP(math), 1405 #elif defined(CONFIG_8XX_MINIMAL_FPEMU) 1406 WARN_EMULATED_SETUP(8xx), 1407 #endif 1408 #ifdef CONFIG_VSX 1409 WARN_EMULATED_SETUP(vsx), 1410 #endif 1411 }; 1412 1413 u32 ppc_warn_emulated; 1414 1415 void ppc_warn_emulated_print(const char *type) 1416 { 1417 if (printk_ratelimit()) 1418 pr_warning("%s used emulated %s instruction\n", current->comm, 1419 type); 1420 } 1421 1422 static int __init ppc_warn_emulated_init(void) 1423 { 1424 struct dentry *dir, *d; 1425 unsigned int i; 1426 struct ppc_emulated_entry *entries = (void *)&ppc_emulated; 1427 1428 if (!powerpc_debugfs_root) 1429 return -ENODEV; 1430 1431 dir = debugfs_create_dir("emulated_instructions", 1432 powerpc_debugfs_root); 1433 if (!dir) 1434 return -ENOMEM; 1435 1436 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir, 1437 &ppc_warn_emulated); 1438 if (!d) 1439 goto fail; 1440 1441 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) { 1442 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir, 1443 (u32 *)&entries[i].val.counter); 1444 if (!d) 1445 goto fail; 1446 } 1447 1448 return 0; 1449 1450 fail: 1451 debugfs_remove_recursive(dir); 1452 return -ENOMEM; 1453 } 1454 1455 device_initcall(ppc_warn_emulated_init); 1456 1457 #endif /* CONFIG_PPC_EMULATED_STATS */ 1458