1 /* 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * and Paul Mackerras (paulus@samba.org) 11 */ 12 13 /* 14 * This file handles the architecture-dependent parts of hardware exceptions 15 */ 16 17 #include <linux/config.h> 18 #include <linux/errno.h> 19 #include <linux/sched.h> 20 #include <linux/kernel.h> 21 #include <linux/mm.h> 22 #include <linux/stddef.h> 23 #include <linux/unistd.h> 24 #include <linux/ptrace.h> 25 #include <linux/slab.h> 26 #include <linux/user.h> 27 #include <linux/a.out.h> 28 #include <linux/interrupt.h> 29 #include <linux/init.h> 30 #include <linux/module.h> 31 #include <linux/prctl.h> 32 #include <linux/delay.h> 33 #include <linux/kprobes.h> 34 #include <asm/kdebug.h> 35 36 #include <asm/pgtable.h> 37 #include <asm/uaccess.h> 38 #include <asm/system.h> 39 #include <asm/io.h> 40 #ifdef CONFIG_PPC32 41 #include <asm/reg.h> 42 #include <asm/xmon.h> 43 #ifdef CONFIG_PMAC_BACKLIGHT 44 #include <asm/backlight.h> 45 #endif 46 #include <asm/perfmon.h> 47 #endif 48 #ifdef CONFIG_PPC64 49 #include <asm/processor.h> 50 #include <asm/ppcdebug.h> 51 #include <asm/rtas.h> 52 #include <asm/systemcfg.h> 53 #include <asm/machdep.h> 54 #include <asm/pmc.h> 55 #endif 56 57 #ifdef CONFIG_DEBUGGER 58 int (*__debugger)(struct pt_regs *regs); 59 int (*__debugger_ipi)(struct pt_regs *regs); 60 int (*__debugger_bpt)(struct pt_regs *regs); 61 int (*__debugger_sstep)(struct pt_regs *regs); 62 int (*__debugger_iabr_match)(struct pt_regs *regs); 63 int (*__debugger_dabr_match)(struct pt_regs *regs); 64 int (*__debugger_fault_handler)(struct pt_regs *regs); 65 66 EXPORT_SYMBOL(__debugger); 67 EXPORT_SYMBOL(__debugger_ipi); 68 EXPORT_SYMBOL(__debugger_bpt); 69 EXPORT_SYMBOL(__debugger_sstep); 70 EXPORT_SYMBOL(__debugger_iabr_match); 71 EXPORT_SYMBOL(__debugger_dabr_match); 72 EXPORT_SYMBOL(__debugger_fault_handler); 73 #endif 74 75 struct notifier_block *powerpc_die_chain; 76 static DEFINE_SPINLOCK(die_notifier_lock); 77 78 int register_die_notifier(struct notifier_block *nb) 79 { 80 int err = 0; 81 unsigned long flags; 82 83 spin_lock_irqsave(&die_notifier_lock, flags); 84 err = notifier_chain_register(&powerpc_die_chain, nb); 85 spin_unlock_irqrestore(&die_notifier_lock, flags); 86 return err; 87 } 88 89 /* 90 * Trap & Exception support 91 */ 92 93 static DEFINE_SPINLOCK(die_lock); 94 95 int die(const char *str, struct pt_regs *regs, long err) 96 { 97 static int die_counter; 98 int nl = 0; 99 100 if (debugger(regs)) 101 return 1; 102 103 console_verbose(); 104 spin_lock_irq(&die_lock); 105 bust_spinlocks(1); 106 #ifdef CONFIG_PMAC_BACKLIGHT 107 if (_machine == _MACH_Pmac) { 108 set_backlight_enable(1); 109 set_backlight_level(BACKLIGHT_MAX); 110 } 111 #endif 112 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 113 #ifdef CONFIG_PREEMPT 114 printk("PREEMPT "); 115 nl = 1; 116 #endif 117 #ifdef CONFIG_SMP 118 printk("SMP NR_CPUS=%d ", NR_CPUS); 119 nl = 1; 120 #endif 121 #ifdef CONFIG_DEBUG_PAGEALLOC 122 printk("DEBUG_PAGEALLOC "); 123 nl = 1; 124 #endif 125 #ifdef CONFIG_NUMA 126 printk("NUMA "); 127 nl = 1; 128 #endif 129 #ifdef CONFIG_PPC64 130 switch (systemcfg->platform) { 131 case PLATFORM_PSERIES: 132 printk("PSERIES "); 133 nl = 1; 134 break; 135 case PLATFORM_PSERIES_LPAR: 136 printk("PSERIES LPAR "); 137 nl = 1; 138 break; 139 case PLATFORM_ISERIES_LPAR: 140 printk("ISERIES LPAR "); 141 nl = 1; 142 break; 143 case PLATFORM_POWERMAC: 144 printk("POWERMAC "); 145 nl = 1; 146 break; 147 case PLATFORM_BPA: 148 printk("BPA "); 149 nl = 1; 150 break; 151 } 152 #endif 153 if (nl) 154 printk("\n"); 155 print_modules(); 156 show_regs(regs); 157 bust_spinlocks(0); 158 spin_unlock_irq(&die_lock); 159 160 if (in_interrupt()) 161 panic("Fatal exception in interrupt"); 162 163 if (panic_on_oops) { 164 #ifdef CONFIG_PPC64 165 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); 166 ssleep(5); 167 #endif 168 panic("Fatal exception"); 169 } 170 do_exit(err); 171 172 return 0; 173 } 174 175 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 176 { 177 siginfo_t info; 178 179 if (!user_mode(regs)) { 180 if (die("Exception in kernel mode", regs, signr)) 181 return; 182 } 183 184 memset(&info, 0, sizeof(info)); 185 info.si_signo = signr; 186 info.si_code = code; 187 info.si_addr = (void __user *) addr; 188 force_sig_info(signr, &info, current); 189 190 /* 191 * Init gets no signals that it doesn't have a handler for. 192 * That's all very well, but if it has caused a synchronous 193 * exception and we ignore the resulting signal, it will just 194 * generate the same exception over and over again and we get 195 * nowhere. Better to kill it and let the kernel panic. 196 */ 197 if (current->pid == 1) { 198 __sighandler_t handler; 199 200 spin_lock_irq(¤t->sighand->siglock); 201 handler = current->sighand->action[signr-1].sa.sa_handler; 202 spin_unlock_irq(¤t->sighand->siglock); 203 if (handler == SIG_DFL) { 204 /* init has generated a synchronous exception 205 and it doesn't have a handler for the signal */ 206 printk(KERN_CRIT "init has generated signal %d " 207 "but has no handler for it\n", signr); 208 do_exit(signr); 209 } 210 } 211 } 212 213 #ifdef CONFIG_PPC64 214 void system_reset_exception(struct pt_regs *regs) 215 { 216 /* See if any machine dependent calls */ 217 if (ppc_md.system_reset_exception) 218 ppc_md.system_reset_exception(regs); 219 220 die("System Reset", regs, SIGABRT); 221 222 /* Must die if the interrupt is not recoverable */ 223 if (!(regs->msr & MSR_RI)) 224 panic("Unrecoverable System Reset"); 225 226 /* What should we do here? We could issue a shutdown or hard reset. */ 227 } 228 #endif 229 230 /* 231 * I/O accesses can cause machine checks on powermacs. 232 * Check if the NIP corresponds to the address of a sync 233 * instruction for which there is an entry in the exception 234 * table. 235 * Note that the 601 only takes a machine check on TEA 236 * (transfer error ack) signal assertion, and does not 237 * set any of the top 16 bits of SRR1. 238 * -- paulus. 239 */ 240 static inline int check_io_access(struct pt_regs *regs) 241 { 242 #ifdef CONFIG_PPC_PMAC 243 unsigned long msr = regs->msr; 244 const struct exception_table_entry *entry; 245 unsigned int *nip = (unsigned int *)regs->nip; 246 247 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 248 && (entry = search_exception_tables(regs->nip)) != NULL) { 249 /* 250 * Check that it's a sync instruction, or somewhere 251 * in the twi; isync; nop sequence that inb/inw/inl uses. 252 * As the address is in the exception table 253 * we should be able to read the instr there. 254 * For the debug message, we look at the preceding 255 * load or store. 256 */ 257 if (*nip == 0x60000000) /* nop */ 258 nip -= 2; 259 else if (*nip == 0x4c00012c) /* isync */ 260 --nip; 261 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 262 /* sync or twi */ 263 unsigned int rb; 264 265 --nip; 266 rb = (*nip >> 11) & 0x1f; 267 printk(KERN_DEBUG "%s bad port %lx at %p\n", 268 (*nip & 0x100)? "OUT to": "IN from", 269 regs->gpr[rb] - _IO_BASE, nip); 270 regs->msr |= MSR_RI; 271 regs->nip = entry->fixup; 272 return 1; 273 } 274 } 275 #endif /* CONFIG_PPC_PMAC */ 276 return 0; 277 } 278 279 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 280 281 /* On 4xx, the reason for the machine check or program exception 282 is in the ESR. */ 283 #define get_reason(regs) ((regs)->dsisr) 284 #ifndef CONFIG_FSL_BOOKE 285 #define get_mc_reason(regs) ((regs)->dsisr) 286 #else 287 #define get_mc_reason(regs) (mfspr(SPRN_MCSR)) 288 #endif 289 #define REASON_FP ESR_FP 290 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 291 #define REASON_PRIVILEGED ESR_PPR 292 #define REASON_TRAP ESR_PTR 293 294 /* single-step stuff */ 295 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 296 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 297 298 #else 299 300 /* On non-4xx, the reason for the machine check or program 301 exception is in the MSR. */ 302 #define get_reason(regs) ((regs)->msr) 303 #define get_mc_reason(regs) ((regs)->msr) 304 #define REASON_FP 0x100000 305 #define REASON_ILLEGAL 0x80000 306 #define REASON_PRIVILEGED 0x40000 307 #define REASON_TRAP 0x20000 308 309 #define single_stepping(regs) ((regs)->msr & MSR_SE) 310 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 311 #endif 312 313 /* 314 * This is "fall-back" implementation for configurations 315 * which don't provide platform-specific machine check info 316 */ 317 void __attribute__ ((weak)) 318 platform_machine_check(struct pt_regs *regs) 319 { 320 } 321 322 void machine_check_exception(struct pt_regs *regs) 323 { 324 #ifdef CONFIG_PPC64 325 int recover = 0; 326 327 /* See if any machine dependent calls */ 328 if (ppc_md.machine_check_exception) 329 recover = ppc_md.machine_check_exception(regs); 330 331 if (recover) 332 return; 333 #else 334 unsigned long reason = get_mc_reason(regs); 335 336 if (user_mode(regs)) { 337 regs->msr |= MSR_RI; 338 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 339 return; 340 } 341 342 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 343 /* the qspan pci read routines can cause machine checks -- Cort */ 344 bad_page_fault(regs, regs->dar, SIGBUS); 345 return; 346 #endif 347 348 if (debugger_fault_handler(regs)) { 349 regs->msr |= MSR_RI; 350 return; 351 } 352 353 if (check_io_access(regs)) 354 return; 355 356 #if defined(CONFIG_4xx) && !defined(CONFIG_440A) 357 if (reason & ESR_IMCP) { 358 printk("Instruction"); 359 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 360 } else 361 printk("Data"); 362 printk(" machine check in kernel mode.\n"); 363 #elif defined(CONFIG_440A) 364 printk("Machine check in kernel mode.\n"); 365 if (reason & ESR_IMCP){ 366 printk("Instruction Synchronous Machine Check exception\n"); 367 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 368 } 369 else { 370 u32 mcsr = mfspr(SPRN_MCSR); 371 if (mcsr & MCSR_IB) 372 printk("Instruction Read PLB Error\n"); 373 if (mcsr & MCSR_DRB) 374 printk("Data Read PLB Error\n"); 375 if (mcsr & MCSR_DWB) 376 printk("Data Write PLB Error\n"); 377 if (mcsr & MCSR_TLBP) 378 printk("TLB Parity Error\n"); 379 if (mcsr & MCSR_ICP){ 380 flush_instruction_cache(); 381 printk("I-Cache Parity Error\n"); 382 } 383 if (mcsr & MCSR_DCSP) 384 printk("D-Cache Search Parity Error\n"); 385 if (mcsr & MCSR_DCFP) 386 printk("D-Cache Flush Parity Error\n"); 387 if (mcsr & MCSR_IMPE) 388 printk("Machine Check exception is imprecise\n"); 389 390 /* Clear MCSR */ 391 mtspr(SPRN_MCSR, mcsr); 392 } 393 #elif defined (CONFIG_E500) 394 printk("Machine check in kernel mode.\n"); 395 printk("Caused by (from MCSR=%lx): ", reason); 396 397 if (reason & MCSR_MCP) 398 printk("Machine Check Signal\n"); 399 if (reason & MCSR_ICPERR) 400 printk("Instruction Cache Parity Error\n"); 401 if (reason & MCSR_DCP_PERR) 402 printk("Data Cache Push Parity Error\n"); 403 if (reason & MCSR_DCPERR) 404 printk("Data Cache Parity Error\n"); 405 if (reason & MCSR_GL_CI) 406 printk("Guarded Load or Cache-Inhibited stwcx.\n"); 407 if (reason & MCSR_BUS_IAERR) 408 printk("Bus - Instruction Address Error\n"); 409 if (reason & MCSR_BUS_RAERR) 410 printk("Bus - Read Address Error\n"); 411 if (reason & MCSR_BUS_WAERR) 412 printk("Bus - Write Address Error\n"); 413 if (reason & MCSR_BUS_IBERR) 414 printk("Bus - Instruction Data Error\n"); 415 if (reason & MCSR_BUS_RBERR) 416 printk("Bus - Read Data Bus Error\n"); 417 if (reason & MCSR_BUS_WBERR) 418 printk("Bus - Read Data Bus Error\n"); 419 if (reason & MCSR_BUS_IPERR) 420 printk("Bus - Instruction Parity Error\n"); 421 if (reason & MCSR_BUS_RPERR) 422 printk("Bus - Read Parity Error\n"); 423 #elif defined (CONFIG_E200) 424 printk("Machine check in kernel mode.\n"); 425 printk("Caused by (from MCSR=%lx): ", reason); 426 427 if (reason & MCSR_MCP) 428 printk("Machine Check Signal\n"); 429 if (reason & MCSR_CP_PERR) 430 printk("Cache Push Parity Error\n"); 431 if (reason & MCSR_CPERR) 432 printk("Cache Parity Error\n"); 433 if (reason & MCSR_EXCP_ERR) 434 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 435 if (reason & MCSR_BUS_IRERR) 436 printk("Bus - Read Bus Error on instruction fetch\n"); 437 if (reason & MCSR_BUS_DRERR) 438 printk("Bus - Read Bus Error on data load\n"); 439 if (reason & MCSR_BUS_WRERR) 440 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 441 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 442 printk("Machine check in kernel mode.\n"); 443 printk("Caused by (from SRR1=%lx): ", reason); 444 switch (reason & 0x601F0000) { 445 case 0x80000: 446 printk("Machine check signal\n"); 447 break; 448 case 0: /* for 601 */ 449 case 0x40000: 450 case 0x140000: /* 7450 MSS error and TEA */ 451 printk("Transfer error ack signal\n"); 452 break; 453 case 0x20000: 454 printk("Data parity error signal\n"); 455 break; 456 case 0x10000: 457 printk("Address parity error signal\n"); 458 break; 459 case 0x20000000: 460 printk("L1 Data Cache error\n"); 461 break; 462 case 0x40000000: 463 printk("L1 Instruction Cache error\n"); 464 break; 465 case 0x00100000: 466 printk("L2 data cache parity error\n"); 467 break; 468 default: 469 printk("Unknown values in msr\n"); 470 } 471 #endif /* CONFIG_4xx */ 472 473 /* 474 * Optional platform-provided routine to print out 475 * additional info, e.g. bus error registers. 476 */ 477 platform_machine_check(regs); 478 #endif /* CONFIG_PPC32 */ 479 480 if (debugger_fault_handler(regs)) 481 return; 482 die("Machine check", regs, SIGBUS); 483 484 /* Must die if the interrupt is not recoverable */ 485 if (!(regs->msr & MSR_RI)) 486 panic("Unrecoverable Machine check"); 487 } 488 489 #ifdef CONFIG_PPC32 490 void SMIException(struct pt_regs *regs) 491 { 492 die("System Management Interrupt", regs, SIGABRT); 493 } 494 #endif 495 496 void unknown_exception(struct pt_regs *regs) 497 { 498 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 499 regs->nip, regs->msr, regs->trap); 500 501 _exception(SIGTRAP, regs, 0, 0); 502 } 503 504 void instruction_breakpoint_exception(struct pt_regs *regs) 505 { 506 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 507 5, SIGTRAP) == NOTIFY_STOP) 508 return; 509 if (debugger_iabr_match(regs)) 510 return; 511 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 512 } 513 514 #ifdef CONFIG_PPC32 515 void RunModeException(struct pt_regs *regs) 516 { 517 _exception(SIGTRAP, regs, 0, 0); 518 } 519 #endif 520 521 void __kprobes single_step_exception(struct pt_regs *regs) 522 { 523 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 524 525 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 526 5, SIGTRAP) == NOTIFY_STOP) 527 return; 528 if (debugger_sstep(regs)) 529 return; 530 531 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 532 } 533 534 /* 535 * After we have successfully emulated an instruction, we have to 536 * check if the instruction was being single-stepped, and if so, 537 * pretend we got a single-step exception. This was pointed out 538 * by Kumar Gala. -- paulus 539 */ 540 static void emulate_single_step(struct pt_regs *regs) 541 { 542 if (single_stepping(regs)) { 543 clear_single_step(regs); 544 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 545 single_step_exception(regs); 546 } 547 } 548 549 static void parse_fpe(struct pt_regs *regs) 550 { 551 int code = 0; 552 unsigned long fpscr; 553 554 flush_fp_to_thread(current); 555 556 fpscr = current->thread.fpscr; 557 558 /* Invalid operation */ 559 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 560 code = FPE_FLTINV; 561 562 /* Overflow */ 563 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 564 code = FPE_FLTOVF; 565 566 /* Underflow */ 567 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 568 code = FPE_FLTUND; 569 570 /* Divide by zero */ 571 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 572 code = FPE_FLTDIV; 573 574 /* Inexact result */ 575 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 576 code = FPE_FLTRES; 577 578 _exception(SIGFPE, regs, code, regs->nip); 579 } 580 581 /* 582 * Illegal instruction emulation support. Originally written to 583 * provide the PVR to user applications using the mfspr rd, PVR. 584 * Return non-zero if we can't emulate, or -EFAULT if the associated 585 * memory access caused an access fault. Return zero on success. 586 * 587 * There are a couple of ways to do this, either "decode" the instruction 588 * or directly match lots of bits. In this case, matching lots of 589 * bits is faster and easier. 590 */ 591 #define INST_MFSPR_PVR 0x7c1f42a6 592 #define INST_MFSPR_PVR_MASK 0xfc1fffff 593 594 #define INST_DCBA 0x7c0005ec 595 #define INST_DCBA_MASK 0x7c0007fe 596 597 #define INST_MCRXR 0x7c000400 598 #define INST_MCRXR_MASK 0x7c0007fe 599 600 #ifdef CONFIG_PPC32 601 602 #define INST_STRING 0x7c00042a 603 #define INST_STRING_MASK 0x7c0007fe 604 #define INST_STRING_GEN_MASK 0x7c00067e 605 #define INST_LSWI 0x7c0004aa 606 #define INST_LSWX 0x7c00042a 607 #define INST_STSWI 0x7c0005aa 608 #define INST_STSWX 0x7c00052a 609 610 static int emulate_string_inst(struct pt_regs *regs, u32 instword) 611 { 612 u8 rT = (instword >> 21) & 0x1f; 613 u8 rA = (instword >> 16) & 0x1f; 614 u8 NB_RB = (instword >> 11) & 0x1f; 615 u32 num_bytes; 616 unsigned long EA; 617 int pos = 0; 618 619 /* Early out if we are an invalid form of lswx */ 620 if ((instword & INST_STRING_MASK) == INST_LSWX) 621 if ((rT == rA) || (rT == NB_RB)) 622 return -EINVAL; 623 624 EA = (rA == 0) ? 0 : regs->gpr[rA]; 625 626 switch (instword & INST_STRING_MASK) { 627 case INST_LSWX: 628 case INST_STSWX: 629 EA += NB_RB; 630 num_bytes = regs->xer & 0x7f; 631 break; 632 case INST_LSWI: 633 case INST_STSWI: 634 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 635 break; 636 default: 637 return -EINVAL; 638 } 639 640 while (num_bytes != 0) 641 { 642 u8 val; 643 u32 shift = 8 * (3 - (pos & 0x3)); 644 645 switch ((instword & INST_STRING_MASK)) { 646 case INST_LSWX: 647 case INST_LSWI: 648 if (get_user(val, (u8 __user *)EA)) 649 return -EFAULT; 650 /* first time updating this reg, 651 * zero it out */ 652 if (pos == 0) 653 regs->gpr[rT] = 0; 654 regs->gpr[rT] |= val << shift; 655 break; 656 case INST_STSWI: 657 case INST_STSWX: 658 val = regs->gpr[rT] >> shift; 659 if (put_user(val, (u8 __user *)EA)) 660 return -EFAULT; 661 break; 662 } 663 /* move EA to next address */ 664 EA += 1; 665 num_bytes--; 666 667 /* manage our position within the register */ 668 if (++pos == 4) { 669 pos = 0; 670 if (++rT == 32) 671 rT = 0; 672 } 673 } 674 675 return 0; 676 } 677 #endif /* CONFIG_PPC32 */ 678 679 static int emulate_instruction(struct pt_regs *regs) 680 { 681 u32 instword; 682 u32 rd; 683 684 if (!user_mode(regs)) 685 return -EINVAL; 686 CHECK_FULL_REGS(regs); 687 688 if (get_user(instword, (u32 __user *)(regs->nip))) 689 return -EFAULT; 690 691 /* Emulate the mfspr rD, PVR. */ 692 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { 693 rd = (instword >> 21) & 0x1f; 694 regs->gpr[rd] = mfspr(SPRN_PVR); 695 return 0; 696 } 697 698 /* Emulating the dcba insn is just a no-op. */ 699 if ((instword & INST_DCBA_MASK) == INST_DCBA) 700 return 0; 701 702 /* Emulate the mcrxr insn. */ 703 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { 704 unsigned int shift = (instword >> 21) & 0x1c; 705 unsigned long msk = 0xf0000000UL >> shift; 706 #ifdef CONFIG_PPC64 707 static int warned; 708 709 if (!warned) { 710 printk(KERN_WARNING 711 "process %d (%s) uses obsolete 'mcrxr' insn\n", 712 current->pid, current->comm); 713 warned = 1; 714 } 715 #endif 716 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 717 regs->xer &= ~0xf0000000UL; 718 return 0; 719 } 720 721 #ifdef CONFIG_PPC32 722 /* Emulate load/store string insn. */ 723 if ((instword & INST_STRING_GEN_MASK) == INST_STRING) 724 return emulate_string_inst(regs, instword); 725 #endif 726 727 return -EINVAL; 728 } 729 730 /* 731 * Look through the list of trap instructions that are used for BUG(), 732 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know 733 * that the exception was caused by a trap instruction of some kind. 734 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0 735 * otherwise. 736 */ 737 extern struct bug_entry __start___bug_table[], __stop___bug_table[]; 738 739 #ifndef CONFIG_MODULES 740 #define module_find_bug(x) NULL 741 #endif 742 743 struct bug_entry *find_bug(unsigned long bugaddr) 744 { 745 struct bug_entry *bug; 746 747 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug) 748 if (bugaddr == bug->bug_addr) 749 return bug; 750 return module_find_bug(bugaddr); 751 } 752 753 static int check_bug_trap(struct pt_regs *regs) 754 { 755 struct bug_entry *bug; 756 unsigned long addr; 757 758 if (regs->msr & MSR_PR) 759 return 0; /* not in kernel */ 760 addr = regs->nip; /* address of trap instruction */ 761 if (addr < PAGE_OFFSET) 762 return 0; 763 bug = find_bug(regs->nip); 764 if (bug == NULL) 765 return 0; 766 if (bug->line & BUG_WARNING_TRAP) { 767 /* this is a WARN_ON rather than BUG/BUG_ON */ 768 #ifdef CONFIG_XMON 769 xmon_printf(KERN_ERR "Badness in %s at %s:%d\n", 770 bug->function, bug->file, 771 bug->line & ~BUG_WARNING_TRAP); 772 #endif 773 printk(KERN_ERR "Badness in %s at %s:%d\n", 774 bug->function, bug->file, 775 bug->line & ~BUG_WARNING_TRAP); 776 #ifdef CONFIG_PPC32 777 dump_stack(); 778 #else 779 show_stack(current, (void *)regs->gpr[1]); 780 #endif 781 return 1; 782 } 783 #if defined(CONFIG_PPC32) && defined(CONFIG_XMON) 784 xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n", 785 bug->function, bug->file, bug->line); 786 xmon(regs); 787 #endif 788 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n", 789 bug->function, bug->file, bug->line); 790 791 return 0; 792 } 793 794 void __kprobes program_check_exception(struct pt_regs *regs) 795 { 796 unsigned int reason = get_reason(regs); 797 extern int do_mathemu(struct pt_regs *regs); 798 799 #ifdef CONFIG_MATH_EMULATION 800 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 801 * but there seems to be a hardware bug on the 405GP (RevD) 802 * that means ESR is sometimes set incorrectly - either to 803 * ESR_DST (!?) or 0. In the process of chasing this with the 804 * hardware people - not sure if it can happen on any illegal 805 * instruction or only on FP instructions, whether there is a 806 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 807 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) { 808 emulate_single_step(regs); 809 return; 810 } 811 #endif /* CONFIG_MATH_EMULATION */ 812 813 if (reason & REASON_FP) { 814 /* IEEE FP exception */ 815 parse_fpe(regs); 816 return; 817 } 818 if (reason & REASON_TRAP) { 819 /* trap exception */ 820 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 821 == NOTIFY_STOP) 822 return; 823 if (debugger_bpt(regs)) 824 return; 825 if (check_bug_trap(regs)) { 826 regs->nip += 4; 827 return; 828 } 829 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 830 return; 831 } 832 833 /* Try to emulate it if we should. */ 834 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 835 switch (emulate_instruction(regs)) { 836 case 0: 837 regs->nip += 4; 838 emulate_single_step(regs); 839 return; 840 case -EFAULT: 841 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 842 return; 843 } 844 } 845 846 if (reason & REASON_PRIVILEGED) 847 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 848 else 849 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 850 } 851 852 void alignment_exception(struct pt_regs *regs) 853 { 854 int fixed; 855 856 fixed = fix_alignment(regs); 857 858 if (fixed == 1) { 859 regs->nip += 4; /* skip over emulated instruction */ 860 emulate_single_step(regs); 861 return; 862 } 863 864 /* Operand address was bad */ 865 if (fixed == -EFAULT) { 866 if (user_mode(regs)) 867 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar); 868 else 869 /* Search exception table */ 870 bad_page_fault(regs, regs->dar, SIGSEGV); 871 return; 872 } 873 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar); 874 } 875 876 #ifdef CONFIG_PPC32 877 void StackOverflow(struct pt_regs *regs) 878 { 879 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 880 current, regs->gpr[1]); 881 debugger(regs); 882 show_regs(regs); 883 panic("kernel stack overflow"); 884 } 885 886 void nonrecoverable_exception(struct pt_regs *regs) 887 { 888 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 889 regs->nip, regs->msr); 890 debugger(regs); 891 die("nonrecoverable exception", regs, SIGKILL); 892 } 893 894 void trace_syscall(struct pt_regs *regs) 895 { 896 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 897 current, current->pid, regs->nip, regs->link, regs->gpr[0], 898 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 899 } 900 #endif /* CONFIG_PPC32 */ 901 902 void kernel_fp_unavailable_exception(struct pt_regs *regs) 903 { 904 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 905 "%lx at %lx\n", regs->trap, regs->nip); 906 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 907 } 908 909 void altivec_unavailable_exception(struct pt_regs *regs) 910 { 911 #if !defined(CONFIG_ALTIVEC) 912 if (user_mode(regs)) { 913 /* A user program has executed an altivec instruction, 914 but this kernel doesn't support altivec. */ 915 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 916 return; 917 } 918 #endif 919 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 920 "%lx at %lx\n", regs->trap, regs->nip); 921 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 922 } 923 924 #ifdef CONFIG_PPC64 925 extern perf_irq_t perf_irq; 926 #endif 927 928 #if defined(CONFIG_PPC64) || defined(CONFIG_E500) 929 void performance_monitor_exception(struct pt_regs *regs) 930 { 931 perf_irq(regs); 932 } 933 #endif 934 935 #ifdef CONFIG_8xx 936 void SoftwareEmulation(struct pt_regs *regs) 937 { 938 extern int do_mathemu(struct pt_regs *); 939 extern int Soft_emulate_8xx(struct pt_regs *); 940 int errcode; 941 942 CHECK_FULL_REGS(regs); 943 944 if (!user_mode(regs)) { 945 debugger(regs); 946 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 947 } 948 949 #ifdef CONFIG_MATH_EMULATION 950 errcode = do_mathemu(regs); 951 #else 952 errcode = Soft_emulate_8xx(regs); 953 #endif 954 if (errcode) { 955 if (errcode > 0) 956 _exception(SIGFPE, regs, 0, 0); 957 else if (errcode == -EFAULT) 958 _exception(SIGSEGV, regs, 0, 0); 959 else 960 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 961 } else 962 emulate_single_step(regs); 963 } 964 #endif /* CONFIG_8xx */ 965 966 #ifdef CONFIG_PPC32 967 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 968 969 void DebugException(struct pt_regs *regs, unsigned long debug_status) 970 { 971 if (debug_status & DBSR_IC) { /* instruction completion */ 972 regs->msr &= ~MSR_DE; 973 if (user_mode(regs)) { 974 current->thread.dbcr0 &= ~DBCR0_IC; 975 } else { 976 /* Disable instruction completion */ 977 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 978 /* Clear the instruction completion event */ 979 mtspr(SPRN_DBSR, DBSR_IC); 980 if (debugger_sstep(regs)) 981 return; 982 } 983 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 984 } 985 } 986 #endif /* CONFIG_4xx || CONFIG_BOOKE */ 987 988 #if !defined(CONFIG_TAU_INT) 989 void TAUException(struct pt_regs *regs) 990 { 991 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 992 regs->nip, regs->msr, regs->trap, print_tainted()); 993 } 994 #endif /* CONFIG_INT_TAU */ 995 #endif /* CONFIG_PPC32*/ 996 997 #ifdef CONFIG_ALTIVEC 998 void altivec_assist_exception(struct pt_regs *regs) 999 { 1000 int err; 1001 1002 if (!user_mode(regs)) { 1003 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 1004 " at %lx\n", regs->nip); 1005 die("Kernel VMX/Altivec assist exception", regs, SIGILL); 1006 } 1007 1008 flush_altivec_to_thread(current); 1009 1010 err = emulate_altivec(regs); 1011 if (err == 0) { 1012 regs->nip += 4; /* skip emulated instruction */ 1013 emulate_single_step(regs); 1014 return; 1015 } 1016 1017 if (err == -EFAULT) { 1018 /* got an error reading the instruction */ 1019 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1020 } else { 1021 /* didn't recognize the instruction */ 1022 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 1023 if (printk_ratelimit()) 1024 printk(KERN_ERR "Unrecognized altivec instruction " 1025 "in %s at %lx\n", current->comm, regs->nip); 1026 current->thread.vscr.u[3] |= 0x10000; 1027 } 1028 } 1029 #endif /* CONFIG_ALTIVEC */ 1030 1031 #ifdef CONFIG_FSL_BOOKE 1032 void CacheLockingException(struct pt_regs *regs, unsigned long address, 1033 unsigned long error_code) 1034 { 1035 /* We treat cache locking instructions from the user 1036 * as priv ops, in the future we could try to do 1037 * something smarter 1038 */ 1039 if (error_code & (ESR_DLK|ESR_ILK)) 1040 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 1041 return; 1042 } 1043 #endif /* CONFIG_FSL_BOOKE */ 1044 1045 #ifdef CONFIG_SPE 1046 void SPEFloatingPointException(struct pt_regs *regs) 1047 { 1048 unsigned long spefscr; 1049 int fpexc_mode; 1050 int code = 0; 1051 1052 spefscr = current->thread.spefscr; 1053 fpexc_mode = current->thread.fpexc_mode; 1054 1055 /* Hardware does not neccessarily set sticky 1056 * underflow/overflow/invalid flags */ 1057 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1058 code = FPE_FLTOVF; 1059 spefscr |= SPEFSCR_FOVFS; 1060 } 1061 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1062 code = FPE_FLTUND; 1063 spefscr |= SPEFSCR_FUNFS; 1064 } 1065 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1066 code = FPE_FLTDIV; 1067 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1068 code = FPE_FLTINV; 1069 spefscr |= SPEFSCR_FINVS; 1070 } 1071 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1072 code = FPE_FLTRES; 1073 1074 current->thread.spefscr = spefscr; 1075 1076 _exception(SIGFPE, regs, code, regs->nip); 1077 return; 1078 } 1079 #endif 1080 1081 /* 1082 * We enter here if we get an unrecoverable exception, that is, one 1083 * that happened at a point where the RI (recoverable interrupt) bit 1084 * in the MSR is 0. This indicates that SRR0/1 are live, and that 1085 * we therefore lost state by taking this exception. 1086 */ 1087 void unrecoverable_exception(struct pt_regs *regs) 1088 { 1089 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1090 regs->trap, regs->nip); 1091 die("Unrecoverable exception", regs, SIGABRT); 1092 } 1093 1094 #ifdef CONFIG_BOOKE_WDT 1095 /* 1096 * Default handler for a Watchdog exception, 1097 * spins until a reboot occurs 1098 */ 1099 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 1100 { 1101 /* Generic WatchdogHandler, implement your own */ 1102 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 1103 return; 1104 } 1105 1106 void WatchdogException(struct pt_regs *regs) 1107 { 1108 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 1109 WatchdogHandler(regs); 1110 } 1111 #endif 1112 1113 /* 1114 * We enter here if we discover during exception entry that we are 1115 * running in supervisor mode with a userspace value in the stack pointer. 1116 */ 1117 void kernel_bad_stack(struct pt_regs *regs) 1118 { 1119 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1120 regs->gpr[1], regs->nip); 1121 die("Bad kernel stack pointer", regs, SIGABRT); 1122 } 1123 1124 void __init trap_init(void) 1125 { 1126 } 1127