114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 314cf11afSPaul Mackerras * 414cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 514cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 614cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 714cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 814cf11afSPaul Mackerras * 914cf11afSPaul Mackerras * Modified by Cort Dougan (cort@cs.nmt.edu) 1014cf11afSPaul Mackerras * and Paul Mackerras (paulus@samba.org) 1114cf11afSPaul Mackerras */ 1214cf11afSPaul Mackerras 1314cf11afSPaul Mackerras /* 1414cf11afSPaul Mackerras * This file handles the architecture-dependent parts of hardware exceptions 1514cf11afSPaul Mackerras */ 1614cf11afSPaul Mackerras 1714cf11afSPaul Mackerras #include <linux/errno.h> 1814cf11afSPaul Mackerras #include <linux/sched.h> 1914cf11afSPaul Mackerras #include <linux/kernel.h> 2014cf11afSPaul Mackerras #include <linux/mm.h> 2114cf11afSPaul Mackerras #include <linux/stddef.h> 2214cf11afSPaul Mackerras #include <linux/unistd.h> 238dad3f92SPaul Mackerras #include <linux/ptrace.h> 2414cf11afSPaul Mackerras #include <linux/slab.h> 2514cf11afSPaul Mackerras #include <linux/user.h> 2614cf11afSPaul Mackerras #include <linux/a.out.h> 2714cf11afSPaul Mackerras #include <linux/interrupt.h> 2814cf11afSPaul Mackerras #include <linux/init.h> 2914cf11afSPaul Mackerras #include <linux/module.h> 308dad3f92SPaul Mackerras #include <linux/prctl.h> 3114cf11afSPaul Mackerras #include <linux/delay.h> 3214cf11afSPaul Mackerras #include <linux/kprobes.h> 33cc532915SMichael Ellerman #include <linux/kexec.h> 345474c120SMichael Hanselmann #include <linux/backlight.h> 3573c9ceabSJeremy Fitzhardinge #include <linux/bug.h> 3614cf11afSPaul Mackerras 3786417780SPaul Mackerras #include <asm/kdebug.h> 3814cf11afSPaul Mackerras #include <asm/pgtable.h> 3914cf11afSPaul Mackerras #include <asm/uaccess.h> 4014cf11afSPaul Mackerras #include <asm/system.h> 4114cf11afSPaul Mackerras #include <asm/io.h> 4286417780SPaul Mackerras #include <asm/machdep.h> 4386417780SPaul Mackerras #include <asm/rtas.h> 44f7f6f4feSDavid Gibson #include <asm/pmc.h> 45dc1c1ca3SStephen Rothwell #ifdef CONFIG_PPC32 4614cf11afSPaul Mackerras #include <asm/reg.h> 4786417780SPaul Mackerras #endif 4814cf11afSPaul Mackerras #ifdef CONFIG_PMAC_BACKLIGHT 4914cf11afSPaul Mackerras #include <asm/backlight.h> 5014cf11afSPaul Mackerras #endif 51dc1c1ca3SStephen Rothwell #ifdef CONFIG_PPC64 5286417780SPaul Mackerras #include <asm/firmware.h> 53dc1c1ca3SStephen Rothwell #include <asm/processor.h> 54dc1c1ca3SStephen Rothwell #endif 55c0ce7d08SDavid Wilder #include <asm/kexec.h> 56dc1c1ca3SStephen Rothwell 5714cf11afSPaul Mackerras #ifdef CONFIG_DEBUGGER 5814cf11afSPaul Mackerras int (*__debugger)(struct pt_regs *regs); 5914cf11afSPaul Mackerras int (*__debugger_ipi)(struct pt_regs *regs); 6014cf11afSPaul Mackerras int (*__debugger_bpt)(struct pt_regs *regs); 6114cf11afSPaul Mackerras int (*__debugger_sstep)(struct pt_regs *regs); 6214cf11afSPaul Mackerras int (*__debugger_iabr_match)(struct pt_regs *regs); 6314cf11afSPaul Mackerras int (*__debugger_dabr_match)(struct pt_regs *regs); 6414cf11afSPaul Mackerras int (*__debugger_fault_handler)(struct pt_regs *regs); 6514cf11afSPaul Mackerras 6614cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger); 6714cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_ipi); 6814cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_bpt); 6914cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_sstep); 7014cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_iabr_match); 7114cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_dabr_match); 7214cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_fault_handler); 7314cf11afSPaul Mackerras #endif 7414cf11afSPaul Mackerras 75e041c683SAlan Stern ATOMIC_NOTIFIER_HEAD(powerpc_die_chain); 7614cf11afSPaul Mackerras 7714cf11afSPaul Mackerras int register_die_notifier(struct notifier_block *nb) 7814cf11afSPaul Mackerras { 79e041c683SAlan Stern return atomic_notifier_chain_register(&powerpc_die_chain, nb); 8014cf11afSPaul Mackerras } 81e041c683SAlan Stern EXPORT_SYMBOL(register_die_notifier); 82e041c683SAlan Stern 83e041c683SAlan Stern int unregister_die_notifier(struct notifier_block *nb) 84e041c683SAlan Stern { 85e041c683SAlan Stern return atomic_notifier_chain_unregister(&powerpc_die_chain, nb); 86e041c683SAlan Stern } 87e041c683SAlan Stern EXPORT_SYMBOL(unregister_die_notifier); 8814cf11afSPaul Mackerras 8914cf11afSPaul Mackerras /* 9014cf11afSPaul Mackerras * Trap & Exception support 9114cf11afSPaul Mackerras */ 9214cf11afSPaul Mackerras 9314cf11afSPaul Mackerras static DEFINE_SPINLOCK(die_lock); 9414cf11afSPaul Mackerras 9514cf11afSPaul Mackerras int die(const char *str, struct pt_regs *regs, long err) 9614cf11afSPaul Mackerras { 97c0ce7d08SDavid Wilder static int die_counter; 9814cf11afSPaul Mackerras 9914cf11afSPaul Mackerras if (debugger(regs)) 10014cf11afSPaul Mackerras return 1; 10114cf11afSPaul Mackerras 10214cf11afSPaul Mackerras console_verbose(); 10314cf11afSPaul Mackerras spin_lock_irq(&die_lock); 10414cf11afSPaul Mackerras bust_spinlocks(1); 1058dad3f92SPaul Mackerras #ifdef CONFIG_PMAC_BACKLIGHT 1065474c120SMichael Hanselmann mutex_lock(&pmac_backlight_mutex); 1075474c120SMichael Hanselmann if (machine_is(powermac) && pmac_backlight) { 1085474c120SMichael Hanselmann struct backlight_properties *props; 1095474c120SMichael Hanselmann 1105474c120SMichael Hanselmann props = pmac_backlight->props; 1115474c120SMichael Hanselmann props->brightness = props->max_brightness; 1125474c120SMichael Hanselmann props->power = FB_BLANK_UNBLANK; 113*28ee086dSRichard Purdie backlight_update_status(pmac_backlight); 11414cf11afSPaul Mackerras } 1155474c120SMichael Hanselmann mutex_unlock(&pmac_backlight_mutex); 11614cf11afSPaul Mackerras #endif 11714cf11afSPaul Mackerras printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 11814cf11afSPaul Mackerras #ifdef CONFIG_PREEMPT 11914cf11afSPaul Mackerras printk("PREEMPT "); 12014cf11afSPaul Mackerras #endif 12114cf11afSPaul Mackerras #ifdef CONFIG_SMP 12214cf11afSPaul Mackerras printk("SMP NR_CPUS=%d ", NR_CPUS); 12314cf11afSPaul Mackerras #endif 12414cf11afSPaul Mackerras #ifdef CONFIG_DEBUG_PAGEALLOC 12514cf11afSPaul Mackerras printk("DEBUG_PAGEALLOC "); 12614cf11afSPaul Mackerras #endif 12714cf11afSPaul Mackerras #ifdef CONFIG_NUMA 12814cf11afSPaul Mackerras printk("NUMA "); 12914cf11afSPaul Mackerras #endif 130e8222502SBenjamin Herrenschmidt printk("%s\n", ppc_md.name ? "" : ppc_md.name); 131e8222502SBenjamin Herrenschmidt 13214cf11afSPaul Mackerras print_modules(); 13314cf11afSPaul Mackerras show_regs(regs); 13414cf11afSPaul Mackerras bust_spinlocks(0); 135c0ce7d08SDavid Wilder spin_unlock_irq(&die_lock); 136cc532915SMichael Ellerman 137c0ce7d08SDavid Wilder if (kexec_should_crash(current) || 138c0ce7d08SDavid Wilder kexec_sr_activated(smp_processor_id())) 139cc532915SMichael Ellerman crash_kexec(regs); 140c0ce7d08SDavid Wilder crash_kexec_secondary(regs); 14114cf11afSPaul Mackerras 14214cf11afSPaul Mackerras if (in_interrupt()) 14314cf11afSPaul Mackerras panic("Fatal exception in interrupt"); 14414cf11afSPaul Mackerras 145cea6a4baSHorms if (panic_on_oops) 146012c437dSHorms panic("Fatal exception"); 147cea6a4baSHorms 14814cf11afSPaul Mackerras do_exit(err); 14914cf11afSPaul Mackerras 15014cf11afSPaul Mackerras return 0; 15114cf11afSPaul Mackerras } 15214cf11afSPaul Mackerras 15314cf11afSPaul Mackerras void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 15414cf11afSPaul Mackerras { 15514cf11afSPaul Mackerras siginfo_t info; 15614cf11afSPaul Mackerras 15714cf11afSPaul Mackerras if (!user_mode(regs)) { 15814cf11afSPaul Mackerras if (die("Exception in kernel mode", regs, signr)) 15914cf11afSPaul Mackerras return; 16014cf11afSPaul Mackerras } 16114cf11afSPaul Mackerras 16214cf11afSPaul Mackerras memset(&info, 0, sizeof(info)); 16314cf11afSPaul Mackerras info.si_signo = signr; 16414cf11afSPaul Mackerras info.si_code = code; 16514cf11afSPaul Mackerras info.si_addr = (void __user *) addr; 16614cf11afSPaul Mackerras force_sig_info(signr, &info, current); 16714cf11afSPaul Mackerras 16814cf11afSPaul Mackerras /* 16914cf11afSPaul Mackerras * Init gets no signals that it doesn't have a handler for. 17014cf11afSPaul Mackerras * That's all very well, but if it has caused a synchronous 17114cf11afSPaul Mackerras * exception and we ignore the resulting signal, it will just 17214cf11afSPaul Mackerras * generate the same exception over and over again and we get 17314cf11afSPaul Mackerras * nowhere. Better to kill it and let the kernel panic. 17414cf11afSPaul Mackerras */ 17560bccbedSAkinobu Mita if (is_init(current)) { 17614cf11afSPaul Mackerras __sighandler_t handler; 17714cf11afSPaul Mackerras 17814cf11afSPaul Mackerras spin_lock_irq(¤t->sighand->siglock); 17914cf11afSPaul Mackerras handler = current->sighand->action[signr-1].sa.sa_handler; 18014cf11afSPaul Mackerras spin_unlock_irq(¤t->sighand->siglock); 18114cf11afSPaul Mackerras if (handler == SIG_DFL) { 18214cf11afSPaul Mackerras /* init has generated a synchronous exception 18314cf11afSPaul Mackerras and it doesn't have a handler for the signal */ 18414cf11afSPaul Mackerras printk(KERN_CRIT "init has generated signal %d " 18514cf11afSPaul Mackerras "but has no handler for it\n", signr); 18614cf11afSPaul Mackerras do_exit(signr); 18714cf11afSPaul Mackerras } 18814cf11afSPaul Mackerras } 18914cf11afSPaul Mackerras } 19014cf11afSPaul Mackerras 19114cf11afSPaul Mackerras #ifdef CONFIG_PPC64 19214cf11afSPaul Mackerras void system_reset_exception(struct pt_regs *regs) 19314cf11afSPaul Mackerras { 19414cf11afSPaul Mackerras /* See if any machine dependent calls */ 195c902be71SArnd Bergmann if (ppc_md.system_reset_exception) { 196c902be71SArnd Bergmann if (ppc_md.system_reset_exception(regs)) 197c902be71SArnd Bergmann return; 198c902be71SArnd Bergmann } 19914cf11afSPaul Mackerras 200c0ce7d08SDavid Wilder #ifdef CONFIG_KEXEC 201c0ce7d08SDavid Wilder cpu_set(smp_processor_id(), cpus_in_sr); 202c0ce7d08SDavid Wilder #endif 203c0ce7d08SDavid Wilder 2048dad3f92SPaul Mackerras die("System Reset", regs, SIGABRT); 20514cf11afSPaul Mackerras 206eac8392fSDavid Wilder /* 207eac8392fSDavid Wilder * Some CPUs when released from the debugger will execute this path. 208eac8392fSDavid Wilder * These CPUs entered the debugger via a soft-reset. If the CPU was 209eac8392fSDavid Wilder * hung before entering the debugger it will return to the hung 210eac8392fSDavid Wilder * state when exiting this function. This causes a problem in 211eac8392fSDavid Wilder * kdump since the hung CPU(s) will not respond to the IPI sent 212eac8392fSDavid Wilder * from kdump. To prevent the problem we call crash_kexec_secondary() 213eac8392fSDavid Wilder * here. If a kdump had not been initiated or we exit the debugger 214eac8392fSDavid Wilder * with the "exit and recover" command (x) crash_kexec_secondary() 215eac8392fSDavid Wilder * will return after 5ms and the CPU returns to its previous state. 216eac8392fSDavid Wilder */ 217eac8392fSDavid Wilder crash_kexec_secondary(regs); 218eac8392fSDavid Wilder 21914cf11afSPaul Mackerras /* Must die if the interrupt is not recoverable */ 22014cf11afSPaul Mackerras if (!(regs->msr & MSR_RI)) 22114cf11afSPaul Mackerras panic("Unrecoverable System Reset"); 22214cf11afSPaul Mackerras 22314cf11afSPaul Mackerras /* What should we do here? We could issue a shutdown or hard reset. */ 22414cf11afSPaul Mackerras } 22514cf11afSPaul Mackerras #endif 22614cf11afSPaul Mackerras 22714cf11afSPaul Mackerras /* 22814cf11afSPaul Mackerras * I/O accesses can cause machine checks on powermacs. 22914cf11afSPaul Mackerras * Check if the NIP corresponds to the address of a sync 23014cf11afSPaul Mackerras * instruction for which there is an entry in the exception 23114cf11afSPaul Mackerras * table. 23214cf11afSPaul Mackerras * Note that the 601 only takes a machine check on TEA 23314cf11afSPaul Mackerras * (transfer error ack) signal assertion, and does not 23414cf11afSPaul Mackerras * set any of the top 16 bits of SRR1. 23514cf11afSPaul Mackerras * -- paulus. 23614cf11afSPaul Mackerras */ 23714cf11afSPaul Mackerras static inline int check_io_access(struct pt_regs *regs) 23814cf11afSPaul Mackerras { 23968a64357SBenjamin Herrenschmidt #ifdef CONFIG_PPC32 24014cf11afSPaul Mackerras unsigned long msr = regs->msr; 24114cf11afSPaul Mackerras const struct exception_table_entry *entry; 24214cf11afSPaul Mackerras unsigned int *nip = (unsigned int *)regs->nip; 24314cf11afSPaul Mackerras 24414cf11afSPaul Mackerras if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 24514cf11afSPaul Mackerras && (entry = search_exception_tables(regs->nip)) != NULL) { 24614cf11afSPaul Mackerras /* 24714cf11afSPaul Mackerras * Check that it's a sync instruction, or somewhere 24814cf11afSPaul Mackerras * in the twi; isync; nop sequence that inb/inw/inl uses. 24914cf11afSPaul Mackerras * As the address is in the exception table 25014cf11afSPaul Mackerras * we should be able to read the instr there. 25114cf11afSPaul Mackerras * For the debug message, we look at the preceding 25214cf11afSPaul Mackerras * load or store. 25314cf11afSPaul Mackerras */ 25414cf11afSPaul Mackerras if (*nip == 0x60000000) /* nop */ 25514cf11afSPaul Mackerras nip -= 2; 25614cf11afSPaul Mackerras else if (*nip == 0x4c00012c) /* isync */ 25714cf11afSPaul Mackerras --nip; 25814cf11afSPaul Mackerras if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 25914cf11afSPaul Mackerras /* sync or twi */ 26014cf11afSPaul Mackerras unsigned int rb; 26114cf11afSPaul Mackerras 26214cf11afSPaul Mackerras --nip; 26314cf11afSPaul Mackerras rb = (*nip >> 11) & 0x1f; 26414cf11afSPaul Mackerras printk(KERN_DEBUG "%s bad port %lx at %p\n", 26514cf11afSPaul Mackerras (*nip & 0x100)? "OUT to": "IN from", 26614cf11afSPaul Mackerras regs->gpr[rb] - _IO_BASE, nip); 26714cf11afSPaul Mackerras regs->msr |= MSR_RI; 26814cf11afSPaul Mackerras regs->nip = entry->fixup; 26914cf11afSPaul Mackerras return 1; 27014cf11afSPaul Mackerras } 27114cf11afSPaul Mackerras } 27268a64357SBenjamin Herrenschmidt #endif /* CONFIG_PPC32 */ 27314cf11afSPaul Mackerras return 0; 27414cf11afSPaul Mackerras } 27514cf11afSPaul Mackerras 27614cf11afSPaul Mackerras #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 27714cf11afSPaul Mackerras /* On 4xx, the reason for the machine check or program exception 27814cf11afSPaul Mackerras is in the ESR. */ 27914cf11afSPaul Mackerras #define get_reason(regs) ((regs)->dsisr) 28014cf11afSPaul Mackerras #ifndef CONFIG_FSL_BOOKE 28114cf11afSPaul Mackerras #define get_mc_reason(regs) ((regs)->dsisr) 28214cf11afSPaul Mackerras #else 28314cf11afSPaul Mackerras #define get_mc_reason(regs) (mfspr(SPRN_MCSR)) 28414cf11afSPaul Mackerras #endif 28514cf11afSPaul Mackerras #define REASON_FP ESR_FP 28614cf11afSPaul Mackerras #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 28714cf11afSPaul Mackerras #define REASON_PRIVILEGED ESR_PPR 28814cf11afSPaul Mackerras #define REASON_TRAP ESR_PTR 28914cf11afSPaul Mackerras 29014cf11afSPaul Mackerras /* single-step stuff */ 29114cf11afSPaul Mackerras #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 29214cf11afSPaul Mackerras #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 29314cf11afSPaul Mackerras 29414cf11afSPaul Mackerras #else 29514cf11afSPaul Mackerras /* On non-4xx, the reason for the machine check or program 29614cf11afSPaul Mackerras exception is in the MSR. */ 29714cf11afSPaul Mackerras #define get_reason(regs) ((regs)->msr) 29814cf11afSPaul Mackerras #define get_mc_reason(regs) ((regs)->msr) 29914cf11afSPaul Mackerras #define REASON_FP 0x100000 30014cf11afSPaul Mackerras #define REASON_ILLEGAL 0x80000 30114cf11afSPaul Mackerras #define REASON_PRIVILEGED 0x40000 30214cf11afSPaul Mackerras #define REASON_TRAP 0x20000 30314cf11afSPaul Mackerras 30414cf11afSPaul Mackerras #define single_stepping(regs) ((regs)->msr & MSR_SE) 30514cf11afSPaul Mackerras #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 30614cf11afSPaul Mackerras #endif 30714cf11afSPaul Mackerras 30814cf11afSPaul Mackerras /* 30914cf11afSPaul Mackerras * This is "fall-back" implementation for configurations 31014cf11afSPaul Mackerras * which don't provide platform-specific machine check info 31114cf11afSPaul Mackerras */ 31214cf11afSPaul Mackerras void __attribute__ ((weak)) 31314cf11afSPaul Mackerras platform_machine_check(struct pt_regs *regs) 31414cf11afSPaul Mackerras { 31514cf11afSPaul Mackerras } 31614cf11afSPaul Mackerras 317dc1c1ca3SStephen Rothwell void machine_check_exception(struct pt_regs *regs) 31814cf11afSPaul Mackerras { 31914cf11afSPaul Mackerras int recover = 0; 3201a6a4ffeSKumar Gala unsigned long reason = get_mc_reason(regs); 32114cf11afSPaul Mackerras 32214cf11afSPaul Mackerras /* See if any machine dependent calls */ 32314cf11afSPaul Mackerras if (ppc_md.machine_check_exception) 32414cf11afSPaul Mackerras recover = ppc_md.machine_check_exception(regs); 32514cf11afSPaul Mackerras 32614cf11afSPaul Mackerras if (recover) 32714cf11afSPaul Mackerras return; 32814cf11afSPaul Mackerras 32914cf11afSPaul Mackerras if (user_mode(regs)) { 33014cf11afSPaul Mackerras regs->msr |= MSR_RI; 33114cf11afSPaul Mackerras _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 33214cf11afSPaul Mackerras return; 33314cf11afSPaul Mackerras } 33414cf11afSPaul Mackerras 33514cf11afSPaul Mackerras #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 33614cf11afSPaul Mackerras /* the qspan pci read routines can cause machine checks -- Cort */ 33714cf11afSPaul Mackerras bad_page_fault(regs, regs->dar, SIGBUS); 33814cf11afSPaul Mackerras return; 33914cf11afSPaul Mackerras #endif 34014cf11afSPaul Mackerras 34114cf11afSPaul Mackerras if (debugger_fault_handler(regs)) { 34214cf11afSPaul Mackerras regs->msr |= MSR_RI; 34314cf11afSPaul Mackerras return; 34414cf11afSPaul Mackerras } 34514cf11afSPaul Mackerras 34614cf11afSPaul Mackerras if (check_io_access(regs)) 34714cf11afSPaul Mackerras return; 34814cf11afSPaul Mackerras 34914cf11afSPaul Mackerras #if defined(CONFIG_4xx) && !defined(CONFIG_440A) 35014cf11afSPaul Mackerras if (reason & ESR_IMCP) { 35114cf11afSPaul Mackerras printk("Instruction"); 35214cf11afSPaul Mackerras mtspr(SPRN_ESR, reason & ~ESR_IMCP); 35314cf11afSPaul Mackerras } else 35414cf11afSPaul Mackerras printk("Data"); 35514cf11afSPaul Mackerras printk(" machine check in kernel mode.\n"); 35614cf11afSPaul Mackerras #elif defined(CONFIG_440A) 35714cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 35814cf11afSPaul Mackerras if (reason & ESR_IMCP){ 35914cf11afSPaul Mackerras printk("Instruction Synchronous Machine Check exception\n"); 36014cf11afSPaul Mackerras mtspr(SPRN_ESR, reason & ~ESR_IMCP); 36114cf11afSPaul Mackerras } 36214cf11afSPaul Mackerras else { 36314cf11afSPaul Mackerras u32 mcsr = mfspr(SPRN_MCSR); 36414cf11afSPaul Mackerras if (mcsr & MCSR_IB) 36514cf11afSPaul Mackerras printk("Instruction Read PLB Error\n"); 36614cf11afSPaul Mackerras if (mcsr & MCSR_DRB) 36714cf11afSPaul Mackerras printk("Data Read PLB Error\n"); 36814cf11afSPaul Mackerras if (mcsr & MCSR_DWB) 36914cf11afSPaul Mackerras printk("Data Write PLB Error\n"); 37014cf11afSPaul Mackerras if (mcsr & MCSR_TLBP) 37114cf11afSPaul Mackerras printk("TLB Parity Error\n"); 37214cf11afSPaul Mackerras if (mcsr & MCSR_ICP){ 37314cf11afSPaul Mackerras flush_instruction_cache(); 37414cf11afSPaul Mackerras printk("I-Cache Parity Error\n"); 37514cf11afSPaul Mackerras } 37614cf11afSPaul Mackerras if (mcsr & MCSR_DCSP) 37714cf11afSPaul Mackerras printk("D-Cache Search Parity Error\n"); 37814cf11afSPaul Mackerras if (mcsr & MCSR_DCFP) 37914cf11afSPaul Mackerras printk("D-Cache Flush Parity Error\n"); 38014cf11afSPaul Mackerras if (mcsr & MCSR_IMPE) 38114cf11afSPaul Mackerras printk("Machine Check exception is imprecise\n"); 38214cf11afSPaul Mackerras 38314cf11afSPaul Mackerras /* Clear MCSR */ 38414cf11afSPaul Mackerras mtspr(SPRN_MCSR, mcsr); 38514cf11afSPaul Mackerras } 38614cf11afSPaul Mackerras #elif defined (CONFIG_E500) 38714cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 38814cf11afSPaul Mackerras printk("Caused by (from MCSR=%lx): ", reason); 38914cf11afSPaul Mackerras 39014cf11afSPaul Mackerras if (reason & MCSR_MCP) 39114cf11afSPaul Mackerras printk("Machine Check Signal\n"); 39214cf11afSPaul Mackerras if (reason & MCSR_ICPERR) 39314cf11afSPaul Mackerras printk("Instruction Cache Parity Error\n"); 39414cf11afSPaul Mackerras if (reason & MCSR_DCP_PERR) 39514cf11afSPaul Mackerras printk("Data Cache Push Parity Error\n"); 39614cf11afSPaul Mackerras if (reason & MCSR_DCPERR) 39714cf11afSPaul Mackerras printk("Data Cache Parity Error\n"); 39814cf11afSPaul Mackerras if (reason & MCSR_GL_CI) 39914cf11afSPaul Mackerras printk("Guarded Load or Cache-Inhibited stwcx.\n"); 40014cf11afSPaul Mackerras if (reason & MCSR_BUS_IAERR) 40114cf11afSPaul Mackerras printk("Bus - Instruction Address Error\n"); 40214cf11afSPaul Mackerras if (reason & MCSR_BUS_RAERR) 40314cf11afSPaul Mackerras printk("Bus - Read Address Error\n"); 40414cf11afSPaul Mackerras if (reason & MCSR_BUS_WAERR) 40514cf11afSPaul Mackerras printk("Bus - Write Address Error\n"); 40614cf11afSPaul Mackerras if (reason & MCSR_BUS_IBERR) 40714cf11afSPaul Mackerras printk("Bus - Instruction Data Error\n"); 40814cf11afSPaul Mackerras if (reason & MCSR_BUS_RBERR) 40914cf11afSPaul Mackerras printk("Bus - Read Data Bus Error\n"); 41014cf11afSPaul Mackerras if (reason & MCSR_BUS_WBERR) 41114cf11afSPaul Mackerras printk("Bus - Read Data Bus Error\n"); 41214cf11afSPaul Mackerras if (reason & MCSR_BUS_IPERR) 41314cf11afSPaul Mackerras printk("Bus - Instruction Parity Error\n"); 41414cf11afSPaul Mackerras if (reason & MCSR_BUS_RPERR) 41514cf11afSPaul Mackerras printk("Bus - Read Parity Error\n"); 41614cf11afSPaul Mackerras #elif defined (CONFIG_E200) 41714cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 41814cf11afSPaul Mackerras printk("Caused by (from MCSR=%lx): ", reason); 41914cf11afSPaul Mackerras 42014cf11afSPaul Mackerras if (reason & MCSR_MCP) 42114cf11afSPaul Mackerras printk("Machine Check Signal\n"); 42214cf11afSPaul Mackerras if (reason & MCSR_CP_PERR) 42314cf11afSPaul Mackerras printk("Cache Push Parity Error\n"); 42414cf11afSPaul Mackerras if (reason & MCSR_CPERR) 42514cf11afSPaul Mackerras printk("Cache Parity Error\n"); 42614cf11afSPaul Mackerras if (reason & MCSR_EXCP_ERR) 42714cf11afSPaul Mackerras printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 42814cf11afSPaul Mackerras if (reason & MCSR_BUS_IRERR) 42914cf11afSPaul Mackerras printk("Bus - Read Bus Error on instruction fetch\n"); 43014cf11afSPaul Mackerras if (reason & MCSR_BUS_DRERR) 43114cf11afSPaul Mackerras printk("Bus - Read Bus Error on data load\n"); 43214cf11afSPaul Mackerras if (reason & MCSR_BUS_WRERR) 43314cf11afSPaul Mackerras printk("Bus - Write Bus Error on buffered store or cache line push\n"); 43414cf11afSPaul Mackerras #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 43514cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 43614cf11afSPaul Mackerras printk("Caused by (from SRR1=%lx): ", reason); 43714cf11afSPaul Mackerras switch (reason & 0x601F0000) { 43814cf11afSPaul Mackerras case 0x80000: 43914cf11afSPaul Mackerras printk("Machine check signal\n"); 44014cf11afSPaul Mackerras break; 44114cf11afSPaul Mackerras case 0: /* for 601 */ 44214cf11afSPaul Mackerras case 0x40000: 44314cf11afSPaul Mackerras case 0x140000: /* 7450 MSS error and TEA */ 44414cf11afSPaul Mackerras printk("Transfer error ack signal\n"); 44514cf11afSPaul Mackerras break; 44614cf11afSPaul Mackerras case 0x20000: 44714cf11afSPaul Mackerras printk("Data parity error signal\n"); 44814cf11afSPaul Mackerras break; 44914cf11afSPaul Mackerras case 0x10000: 45014cf11afSPaul Mackerras printk("Address parity error signal\n"); 45114cf11afSPaul Mackerras break; 45214cf11afSPaul Mackerras case 0x20000000: 45314cf11afSPaul Mackerras printk("L1 Data Cache error\n"); 45414cf11afSPaul Mackerras break; 45514cf11afSPaul Mackerras case 0x40000000: 45614cf11afSPaul Mackerras printk("L1 Instruction Cache error\n"); 45714cf11afSPaul Mackerras break; 45814cf11afSPaul Mackerras case 0x00100000: 45914cf11afSPaul Mackerras printk("L2 data cache parity error\n"); 46014cf11afSPaul Mackerras break; 46114cf11afSPaul Mackerras default: 46214cf11afSPaul Mackerras printk("Unknown values in msr\n"); 46314cf11afSPaul Mackerras } 46414cf11afSPaul Mackerras #endif /* CONFIG_4xx */ 46514cf11afSPaul Mackerras 46614cf11afSPaul Mackerras /* 46714cf11afSPaul Mackerras * Optional platform-provided routine to print out 46814cf11afSPaul Mackerras * additional info, e.g. bus error registers. 46914cf11afSPaul Mackerras */ 47014cf11afSPaul Mackerras platform_machine_check(regs); 47114cf11afSPaul Mackerras 47214cf11afSPaul Mackerras if (debugger_fault_handler(regs)) 47314cf11afSPaul Mackerras return; 4748dad3f92SPaul Mackerras die("Machine check", regs, SIGBUS); 47514cf11afSPaul Mackerras 47614cf11afSPaul Mackerras /* Must die if the interrupt is not recoverable */ 47714cf11afSPaul Mackerras if (!(regs->msr & MSR_RI)) 47814cf11afSPaul Mackerras panic("Unrecoverable Machine check"); 47914cf11afSPaul Mackerras } 48014cf11afSPaul Mackerras 48114cf11afSPaul Mackerras void SMIException(struct pt_regs *regs) 48214cf11afSPaul Mackerras { 48314cf11afSPaul Mackerras die("System Management Interrupt", regs, SIGABRT); 48414cf11afSPaul Mackerras } 48514cf11afSPaul Mackerras 486dc1c1ca3SStephen Rothwell void unknown_exception(struct pt_regs *regs) 48714cf11afSPaul Mackerras { 48814cf11afSPaul Mackerras printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 48914cf11afSPaul Mackerras regs->nip, regs->msr, regs->trap); 49014cf11afSPaul Mackerras 49114cf11afSPaul Mackerras _exception(SIGTRAP, regs, 0, 0); 49214cf11afSPaul Mackerras } 49314cf11afSPaul Mackerras 494dc1c1ca3SStephen Rothwell void instruction_breakpoint_exception(struct pt_regs *regs) 49514cf11afSPaul Mackerras { 49614cf11afSPaul Mackerras if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 49714cf11afSPaul Mackerras 5, SIGTRAP) == NOTIFY_STOP) 49814cf11afSPaul Mackerras return; 49914cf11afSPaul Mackerras if (debugger_iabr_match(regs)) 50014cf11afSPaul Mackerras return; 50114cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 50214cf11afSPaul Mackerras } 50314cf11afSPaul Mackerras 50414cf11afSPaul Mackerras void RunModeException(struct pt_regs *regs) 50514cf11afSPaul Mackerras { 50614cf11afSPaul Mackerras _exception(SIGTRAP, regs, 0, 0); 50714cf11afSPaul Mackerras } 50814cf11afSPaul Mackerras 5098dad3f92SPaul Mackerras void __kprobes single_step_exception(struct pt_regs *regs) 51014cf11afSPaul Mackerras { 51114cf11afSPaul Mackerras regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 51214cf11afSPaul Mackerras 51314cf11afSPaul Mackerras if (notify_die(DIE_SSTEP, "single_step", regs, 5, 51414cf11afSPaul Mackerras 5, SIGTRAP) == NOTIFY_STOP) 51514cf11afSPaul Mackerras return; 51614cf11afSPaul Mackerras if (debugger_sstep(regs)) 51714cf11afSPaul Mackerras return; 51814cf11afSPaul Mackerras 51914cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 52014cf11afSPaul Mackerras } 52114cf11afSPaul Mackerras 52214cf11afSPaul Mackerras /* 52314cf11afSPaul Mackerras * After we have successfully emulated an instruction, we have to 52414cf11afSPaul Mackerras * check if the instruction was being single-stepped, and if so, 52514cf11afSPaul Mackerras * pretend we got a single-step exception. This was pointed out 52614cf11afSPaul Mackerras * by Kumar Gala. -- paulus 52714cf11afSPaul Mackerras */ 5288dad3f92SPaul Mackerras static void emulate_single_step(struct pt_regs *regs) 52914cf11afSPaul Mackerras { 53014cf11afSPaul Mackerras if (single_stepping(regs)) { 53114cf11afSPaul Mackerras clear_single_step(regs); 53214cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_TRACE, 0); 53314cf11afSPaul Mackerras } 53414cf11afSPaul Mackerras } 53514cf11afSPaul Mackerras 5365fad293bSKumar Gala static inline int __parse_fpscr(unsigned long fpscr) 537dc1c1ca3SStephen Rothwell { 5385fad293bSKumar Gala int ret = 0; 539dc1c1ca3SStephen Rothwell 540dc1c1ca3SStephen Rothwell /* Invalid operation */ 541dc1c1ca3SStephen Rothwell if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 5425fad293bSKumar Gala ret = FPE_FLTINV; 543dc1c1ca3SStephen Rothwell 544dc1c1ca3SStephen Rothwell /* Overflow */ 545dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 5465fad293bSKumar Gala ret = FPE_FLTOVF; 547dc1c1ca3SStephen Rothwell 548dc1c1ca3SStephen Rothwell /* Underflow */ 549dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 5505fad293bSKumar Gala ret = FPE_FLTUND; 551dc1c1ca3SStephen Rothwell 552dc1c1ca3SStephen Rothwell /* Divide by zero */ 553dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 5545fad293bSKumar Gala ret = FPE_FLTDIV; 555dc1c1ca3SStephen Rothwell 556dc1c1ca3SStephen Rothwell /* Inexact result */ 557dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 5585fad293bSKumar Gala ret = FPE_FLTRES; 5595fad293bSKumar Gala 5605fad293bSKumar Gala return ret; 5615fad293bSKumar Gala } 5625fad293bSKumar Gala 5635fad293bSKumar Gala static void parse_fpe(struct pt_regs *regs) 5645fad293bSKumar Gala { 5655fad293bSKumar Gala int code = 0; 5665fad293bSKumar Gala 5675fad293bSKumar Gala flush_fp_to_thread(current); 5685fad293bSKumar Gala 5695fad293bSKumar Gala code = __parse_fpscr(current->thread.fpscr.val); 570dc1c1ca3SStephen Rothwell 571dc1c1ca3SStephen Rothwell _exception(SIGFPE, regs, code, regs->nip); 572dc1c1ca3SStephen Rothwell } 573dc1c1ca3SStephen Rothwell 574dc1c1ca3SStephen Rothwell /* 575dc1c1ca3SStephen Rothwell * Illegal instruction emulation support. Originally written to 57614cf11afSPaul Mackerras * provide the PVR to user applications using the mfspr rd, PVR. 57714cf11afSPaul Mackerras * Return non-zero if we can't emulate, or -EFAULT if the associated 57814cf11afSPaul Mackerras * memory access caused an access fault. Return zero on success. 57914cf11afSPaul Mackerras * 58014cf11afSPaul Mackerras * There are a couple of ways to do this, either "decode" the instruction 58114cf11afSPaul Mackerras * or directly match lots of bits. In this case, matching lots of 58214cf11afSPaul Mackerras * bits is faster and easier. 58386417780SPaul Mackerras * 58414cf11afSPaul Mackerras */ 58514cf11afSPaul Mackerras #define INST_MFSPR_PVR 0x7c1f42a6 58614cf11afSPaul Mackerras #define INST_MFSPR_PVR_MASK 0xfc1fffff 58714cf11afSPaul Mackerras 58814cf11afSPaul Mackerras #define INST_DCBA 0x7c0005ec 58987589f08SPaul Mackerras #define INST_DCBA_MASK 0xfc0007fe 59014cf11afSPaul Mackerras 59114cf11afSPaul Mackerras #define INST_MCRXR 0x7c000400 59287589f08SPaul Mackerras #define INST_MCRXR_MASK 0xfc0007fe 59314cf11afSPaul Mackerras 59414cf11afSPaul Mackerras #define INST_STRING 0x7c00042a 59587589f08SPaul Mackerras #define INST_STRING_MASK 0xfc0007fe 59687589f08SPaul Mackerras #define INST_STRING_GEN_MASK 0xfc00067e 59714cf11afSPaul Mackerras #define INST_LSWI 0x7c0004aa 59814cf11afSPaul Mackerras #define INST_LSWX 0x7c00042a 59914cf11afSPaul Mackerras #define INST_STSWI 0x7c0005aa 60014cf11afSPaul Mackerras #define INST_STSWX 0x7c00052a 60114cf11afSPaul Mackerras 602c3412dcbSWill Schmidt #define INST_POPCNTB 0x7c0000f4 603c3412dcbSWill Schmidt #define INST_POPCNTB_MASK 0xfc0007fe 604c3412dcbSWill Schmidt 60514cf11afSPaul Mackerras static int emulate_string_inst(struct pt_regs *regs, u32 instword) 60614cf11afSPaul Mackerras { 60714cf11afSPaul Mackerras u8 rT = (instword >> 21) & 0x1f; 60814cf11afSPaul Mackerras u8 rA = (instword >> 16) & 0x1f; 60914cf11afSPaul Mackerras u8 NB_RB = (instword >> 11) & 0x1f; 61014cf11afSPaul Mackerras u32 num_bytes; 61114cf11afSPaul Mackerras unsigned long EA; 61214cf11afSPaul Mackerras int pos = 0; 61314cf11afSPaul Mackerras 61414cf11afSPaul Mackerras /* Early out if we are an invalid form of lswx */ 61514cf11afSPaul Mackerras if ((instword & INST_STRING_MASK) == INST_LSWX) 61614cf11afSPaul Mackerras if ((rT == rA) || (rT == NB_RB)) 61714cf11afSPaul Mackerras return -EINVAL; 61814cf11afSPaul Mackerras 61914cf11afSPaul Mackerras EA = (rA == 0) ? 0 : regs->gpr[rA]; 62014cf11afSPaul Mackerras 62114cf11afSPaul Mackerras switch (instword & INST_STRING_MASK) { 62214cf11afSPaul Mackerras case INST_LSWX: 62314cf11afSPaul Mackerras case INST_STSWX: 62414cf11afSPaul Mackerras EA += NB_RB; 62514cf11afSPaul Mackerras num_bytes = regs->xer & 0x7f; 62614cf11afSPaul Mackerras break; 62714cf11afSPaul Mackerras case INST_LSWI: 62814cf11afSPaul Mackerras case INST_STSWI: 62914cf11afSPaul Mackerras num_bytes = (NB_RB == 0) ? 32 : NB_RB; 63014cf11afSPaul Mackerras break; 63114cf11afSPaul Mackerras default: 63214cf11afSPaul Mackerras return -EINVAL; 63314cf11afSPaul Mackerras } 63414cf11afSPaul Mackerras 63514cf11afSPaul Mackerras while (num_bytes != 0) 63614cf11afSPaul Mackerras { 63714cf11afSPaul Mackerras u8 val; 63814cf11afSPaul Mackerras u32 shift = 8 * (3 - (pos & 0x3)); 63914cf11afSPaul Mackerras 64014cf11afSPaul Mackerras switch ((instword & INST_STRING_MASK)) { 64114cf11afSPaul Mackerras case INST_LSWX: 64214cf11afSPaul Mackerras case INST_LSWI: 64314cf11afSPaul Mackerras if (get_user(val, (u8 __user *)EA)) 64414cf11afSPaul Mackerras return -EFAULT; 64514cf11afSPaul Mackerras /* first time updating this reg, 64614cf11afSPaul Mackerras * zero it out */ 64714cf11afSPaul Mackerras if (pos == 0) 64814cf11afSPaul Mackerras regs->gpr[rT] = 0; 64914cf11afSPaul Mackerras regs->gpr[rT] |= val << shift; 65014cf11afSPaul Mackerras break; 65114cf11afSPaul Mackerras case INST_STSWI: 65214cf11afSPaul Mackerras case INST_STSWX: 65314cf11afSPaul Mackerras val = regs->gpr[rT] >> shift; 65414cf11afSPaul Mackerras if (put_user(val, (u8 __user *)EA)) 65514cf11afSPaul Mackerras return -EFAULT; 65614cf11afSPaul Mackerras break; 65714cf11afSPaul Mackerras } 65814cf11afSPaul Mackerras /* move EA to next address */ 65914cf11afSPaul Mackerras EA += 1; 66014cf11afSPaul Mackerras num_bytes--; 66114cf11afSPaul Mackerras 66214cf11afSPaul Mackerras /* manage our position within the register */ 66314cf11afSPaul Mackerras if (++pos == 4) { 66414cf11afSPaul Mackerras pos = 0; 66514cf11afSPaul Mackerras if (++rT == 32) 66614cf11afSPaul Mackerras rT = 0; 66714cf11afSPaul Mackerras } 66814cf11afSPaul Mackerras } 66914cf11afSPaul Mackerras 67014cf11afSPaul Mackerras return 0; 67114cf11afSPaul Mackerras } 67214cf11afSPaul Mackerras 673c3412dcbSWill Schmidt static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword) 674c3412dcbSWill Schmidt { 675c3412dcbSWill Schmidt u32 ra,rs; 676c3412dcbSWill Schmidt unsigned long tmp; 677c3412dcbSWill Schmidt 678c3412dcbSWill Schmidt ra = (instword >> 16) & 0x1f; 679c3412dcbSWill Schmidt rs = (instword >> 21) & 0x1f; 680c3412dcbSWill Schmidt 681c3412dcbSWill Schmidt tmp = regs->gpr[rs]; 682c3412dcbSWill Schmidt tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL); 683c3412dcbSWill Schmidt tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL); 684c3412dcbSWill Schmidt tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL; 685c3412dcbSWill Schmidt regs->gpr[ra] = tmp; 686c3412dcbSWill Schmidt 687c3412dcbSWill Schmidt return 0; 688c3412dcbSWill Schmidt } 689c3412dcbSWill Schmidt 69014cf11afSPaul Mackerras static int emulate_instruction(struct pt_regs *regs) 69114cf11afSPaul Mackerras { 69214cf11afSPaul Mackerras u32 instword; 69314cf11afSPaul Mackerras u32 rd; 69414cf11afSPaul Mackerras 695fab5db97SPaul Mackerras if (!user_mode(regs) || (regs->msr & MSR_LE)) 69614cf11afSPaul Mackerras return -EINVAL; 69714cf11afSPaul Mackerras CHECK_FULL_REGS(regs); 69814cf11afSPaul Mackerras 69914cf11afSPaul Mackerras if (get_user(instword, (u32 __user *)(regs->nip))) 70014cf11afSPaul Mackerras return -EFAULT; 70114cf11afSPaul Mackerras 70214cf11afSPaul Mackerras /* Emulate the mfspr rD, PVR. */ 70314cf11afSPaul Mackerras if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { 70414cf11afSPaul Mackerras rd = (instword >> 21) & 0x1f; 70514cf11afSPaul Mackerras regs->gpr[rd] = mfspr(SPRN_PVR); 70614cf11afSPaul Mackerras return 0; 70714cf11afSPaul Mackerras } 70814cf11afSPaul Mackerras 70914cf11afSPaul Mackerras /* Emulating the dcba insn is just a no-op. */ 7108dad3f92SPaul Mackerras if ((instword & INST_DCBA_MASK) == INST_DCBA) 71114cf11afSPaul Mackerras return 0; 71214cf11afSPaul Mackerras 71314cf11afSPaul Mackerras /* Emulate the mcrxr insn. */ 71414cf11afSPaul Mackerras if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { 71586417780SPaul Mackerras int shift = (instword >> 21) & 0x1c; 71614cf11afSPaul Mackerras unsigned long msk = 0xf0000000UL >> shift; 71714cf11afSPaul Mackerras 71814cf11afSPaul Mackerras regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 71914cf11afSPaul Mackerras regs->xer &= ~0xf0000000UL; 72014cf11afSPaul Mackerras return 0; 72114cf11afSPaul Mackerras } 72214cf11afSPaul Mackerras 72314cf11afSPaul Mackerras /* Emulate load/store string insn. */ 72414cf11afSPaul Mackerras if ((instword & INST_STRING_GEN_MASK) == INST_STRING) 72514cf11afSPaul Mackerras return emulate_string_inst(regs, instword); 72614cf11afSPaul Mackerras 727c3412dcbSWill Schmidt /* Emulate the popcntb (Population Count Bytes) instruction. */ 728c3412dcbSWill Schmidt if ((instword & INST_POPCNTB_MASK) == INST_POPCNTB) { 729c3412dcbSWill Schmidt return emulate_popcntb_inst(regs, instword); 730c3412dcbSWill Schmidt } 731c3412dcbSWill Schmidt 73214cf11afSPaul Mackerras return -EINVAL; 73314cf11afSPaul Mackerras } 73414cf11afSPaul Mackerras 73573c9ceabSJeremy Fitzhardinge int is_valid_bugaddr(unsigned long addr) 73614cf11afSPaul Mackerras { 73773c9ceabSJeremy Fitzhardinge return is_kernel_addr(addr); 73814cf11afSPaul Mackerras } 73914cf11afSPaul Mackerras 7408dad3f92SPaul Mackerras void __kprobes program_check_exception(struct pt_regs *regs) 74114cf11afSPaul Mackerras { 74214cf11afSPaul Mackerras unsigned int reason = get_reason(regs); 74314cf11afSPaul Mackerras extern int do_mathemu(struct pt_regs *regs); 74414cf11afSPaul Mackerras 745aa42c69cSKim Phillips /* We can now get here via a FP Unavailable exception if the core 74604903a30SKumar Gala * has no FPU, in that case the reason flags will be 0 */ 74714cf11afSPaul Mackerras 74814cf11afSPaul Mackerras if (reason & REASON_FP) { 74914cf11afSPaul Mackerras /* IEEE FP exception */ 750dc1c1ca3SStephen Rothwell parse_fpe(regs); 7518dad3f92SPaul Mackerras return; 7528dad3f92SPaul Mackerras } 7538dad3f92SPaul Mackerras if (reason & REASON_TRAP) { 75414cf11afSPaul Mackerras /* trap exception */ 755dc1c1ca3SStephen Rothwell if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 756dc1c1ca3SStephen Rothwell == NOTIFY_STOP) 757dc1c1ca3SStephen Rothwell return; 75814cf11afSPaul Mackerras if (debugger_bpt(regs)) 75914cf11afSPaul Mackerras return; 76073c9ceabSJeremy Fitzhardinge 76173c9ceabSJeremy Fitzhardinge if (!(regs->msr & MSR_PR) && /* not user-mode */ 76273c9ceabSJeremy Fitzhardinge report_bug(regs->nip) == BUG_TRAP_TYPE_WARN) { 76314cf11afSPaul Mackerras regs->nip += 4; 76414cf11afSPaul Mackerras return; 76514cf11afSPaul Mackerras } 7668dad3f92SPaul Mackerras _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 7678dad3f92SPaul Mackerras return; 7688dad3f92SPaul Mackerras } 7698dad3f92SPaul Mackerras 770cd8a5673SPaul Mackerras local_irq_enable(); 771cd8a5673SPaul Mackerras 77204903a30SKumar Gala #ifdef CONFIG_MATH_EMULATION 77304903a30SKumar Gala /* (reason & REASON_ILLEGAL) would be the obvious thing here, 77404903a30SKumar Gala * but there seems to be a hardware bug on the 405GP (RevD) 77504903a30SKumar Gala * that means ESR is sometimes set incorrectly - either to 77604903a30SKumar Gala * ESR_DST (!?) or 0. In the process of chasing this with the 77704903a30SKumar Gala * hardware people - not sure if it can happen on any illegal 77804903a30SKumar Gala * instruction or only on FP instructions, whether there is a 77904903a30SKumar Gala * pattern to occurences etc. -dgibson 31/Mar/2003 */ 7805fad293bSKumar Gala switch (do_mathemu(regs)) { 7815fad293bSKumar Gala case 0: 78204903a30SKumar Gala emulate_single_step(regs); 78304903a30SKumar Gala return; 7845fad293bSKumar Gala case 1: { 7855fad293bSKumar Gala int code = 0; 7865fad293bSKumar Gala code = __parse_fpscr(current->thread.fpscr.val); 7875fad293bSKumar Gala _exception(SIGFPE, regs, code, regs->nip); 7885fad293bSKumar Gala return; 78904903a30SKumar Gala } 7905fad293bSKumar Gala case -EFAULT: 7915fad293bSKumar Gala _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 7925fad293bSKumar Gala return; 7935fad293bSKumar Gala } 7945fad293bSKumar Gala /* fall through on any other errors */ 79504903a30SKumar Gala #endif /* CONFIG_MATH_EMULATION */ 79604903a30SKumar Gala 7978dad3f92SPaul Mackerras /* Try to emulate it if we should. */ 7988dad3f92SPaul Mackerras if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 79914cf11afSPaul Mackerras switch (emulate_instruction(regs)) { 80014cf11afSPaul Mackerras case 0: 80114cf11afSPaul Mackerras regs->nip += 4; 80214cf11afSPaul Mackerras emulate_single_step(regs); 8038dad3f92SPaul Mackerras return; 80414cf11afSPaul Mackerras case -EFAULT: 80514cf11afSPaul Mackerras _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 8068dad3f92SPaul Mackerras return; 8078dad3f92SPaul Mackerras } 8088dad3f92SPaul Mackerras } 8098dad3f92SPaul Mackerras 81014cf11afSPaul Mackerras if (reason & REASON_PRIVILEGED) 81114cf11afSPaul Mackerras _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 81214cf11afSPaul Mackerras else 81314cf11afSPaul Mackerras _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 81414cf11afSPaul Mackerras } 81514cf11afSPaul Mackerras 816dc1c1ca3SStephen Rothwell void alignment_exception(struct pt_regs *regs) 81714cf11afSPaul Mackerras { 8184393c4f6SBenjamin Herrenschmidt int sig, code, fixed = 0; 81914cf11afSPaul Mackerras 820e9370ae1SPaul Mackerras /* we don't implement logging of alignment exceptions */ 821e9370ae1SPaul Mackerras if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 82214cf11afSPaul Mackerras fixed = fix_alignment(regs); 82314cf11afSPaul Mackerras 82414cf11afSPaul Mackerras if (fixed == 1) { 82514cf11afSPaul Mackerras regs->nip += 4; /* skip over emulated instruction */ 82614cf11afSPaul Mackerras emulate_single_step(regs); 82714cf11afSPaul Mackerras return; 82814cf11afSPaul Mackerras } 82914cf11afSPaul Mackerras 83014cf11afSPaul Mackerras /* Operand address was bad */ 83114cf11afSPaul Mackerras if (fixed == -EFAULT) { 8324393c4f6SBenjamin Herrenschmidt sig = SIGSEGV; 8334393c4f6SBenjamin Herrenschmidt code = SEGV_ACCERR; 8344393c4f6SBenjamin Herrenschmidt } else { 8354393c4f6SBenjamin Herrenschmidt sig = SIGBUS; 8364393c4f6SBenjamin Herrenschmidt code = BUS_ADRALN; 83714cf11afSPaul Mackerras } 8384393c4f6SBenjamin Herrenschmidt if (user_mode(regs)) 8394393c4f6SBenjamin Herrenschmidt _exception(sig, regs, code, regs->dar); 8404393c4f6SBenjamin Herrenschmidt else 8414393c4f6SBenjamin Herrenschmidt bad_page_fault(regs, regs->dar, sig); 84214cf11afSPaul Mackerras } 84314cf11afSPaul Mackerras 84414cf11afSPaul Mackerras void StackOverflow(struct pt_regs *regs) 84514cf11afSPaul Mackerras { 84614cf11afSPaul Mackerras printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 84714cf11afSPaul Mackerras current, regs->gpr[1]); 84814cf11afSPaul Mackerras debugger(regs); 84914cf11afSPaul Mackerras show_regs(regs); 85014cf11afSPaul Mackerras panic("kernel stack overflow"); 85114cf11afSPaul Mackerras } 85214cf11afSPaul Mackerras 85314cf11afSPaul Mackerras void nonrecoverable_exception(struct pt_regs *regs) 85414cf11afSPaul Mackerras { 85514cf11afSPaul Mackerras printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 85614cf11afSPaul Mackerras regs->nip, regs->msr); 85714cf11afSPaul Mackerras debugger(regs); 85814cf11afSPaul Mackerras die("nonrecoverable exception", regs, SIGKILL); 85914cf11afSPaul Mackerras } 86014cf11afSPaul Mackerras 86114cf11afSPaul Mackerras void trace_syscall(struct pt_regs *regs) 86214cf11afSPaul Mackerras { 86314cf11afSPaul Mackerras printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 86414cf11afSPaul Mackerras current, current->pid, regs->nip, regs->link, regs->gpr[0], 86514cf11afSPaul Mackerras regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 86614cf11afSPaul Mackerras } 86714cf11afSPaul Mackerras 868dc1c1ca3SStephen Rothwell void kernel_fp_unavailable_exception(struct pt_regs *regs) 869dc1c1ca3SStephen Rothwell { 870dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 871dc1c1ca3SStephen Rothwell "%lx at %lx\n", regs->trap, regs->nip); 872dc1c1ca3SStephen Rothwell die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 873dc1c1ca3SStephen Rothwell } 874dc1c1ca3SStephen Rothwell 875dc1c1ca3SStephen Rothwell void altivec_unavailable_exception(struct pt_regs *regs) 876dc1c1ca3SStephen Rothwell { 877dc1c1ca3SStephen Rothwell if (user_mode(regs)) { 878dc1c1ca3SStephen Rothwell /* A user program has executed an altivec instruction, 879dc1c1ca3SStephen Rothwell but this kernel doesn't support altivec. */ 880dc1c1ca3SStephen Rothwell _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 881dc1c1ca3SStephen Rothwell return; 882dc1c1ca3SStephen Rothwell } 8836c4841c2SAnton Blanchard 884dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 885dc1c1ca3SStephen Rothwell "%lx at %lx\n", regs->trap, regs->nip); 886dc1c1ca3SStephen Rothwell die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 887dc1c1ca3SStephen Rothwell } 888dc1c1ca3SStephen Rothwell 889dc1c1ca3SStephen Rothwell void performance_monitor_exception(struct pt_regs *regs) 890dc1c1ca3SStephen Rothwell { 891dc1c1ca3SStephen Rothwell perf_irq(regs); 892dc1c1ca3SStephen Rothwell } 893dc1c1ca3SStephen Rothwell 8948dad3f92SPaul Mackerras #ifdef CONFIG_8xx 89514cf11afSPaul Mackerras void SoftwareEmulation(struct pt_regs *regs) 89614cf11afSPaul Mackerras { 89714cf11afSPaul Mackerras extern int do_mathemu(struct pt_regs *); 89814cf11afSPaul Mackerras extern int Soft_emulate_8xx(struct pt_regs *); 89914cf11afSPaul Mackerras int errcode; 90014cf11afSPaul Mackerras 90114cf11afSPaul Mackerras CHECK_FULL_REGS(regs); 90214cf11afSPaul Mackerras 90314cf11afSPaul Mackerras if (!user_mode(regs)) { 90414cf11afSPaul Mackerras debugger(regs); 90514cf11afSPaul Mackerras die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 90614cf11afSPaul Mackerras } 90714cf11afSPaul Mackerras 90814cf11afSPaul Mackerras #ifdef CONFIG_MATH_EMULATION 90914cf11afSPaul Mackerras errcode = do_mathemu(regs); 9105fad293bSKumar Gala 9115fad293bSKumar Gala switch (errcode) { 9125fad293bSKumar Gala case 0: 9135fad293bSKumar Gala emulate_single_step(regs); 9145fad293bSKumar Gala return; 9155fad293bSKumar Gala case 1: { 9165fad293bSKumar Gala int code = 0; 9175fad293bSKumar Gala code = __parse_fpscr(current->thread.fpscr.val); 9185fad293bSKumar Gala _exception(SIGFPE, regs, code, regs->nip); 9195fad293bSKumar Gala return; 9205fad293bSKumar Gala } 9215fad293bSKumar Gala case -EFAULT: 9225fad293bSKumar Gala _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 9235fad293bSKumar Gala return; 9245fad293bSKumar Gala default: 9255fad293bSKumar Gala _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 9265fad293bSKumar Gala return; 9275fad293bSKumar Gala } 9285fad293bSKumar Gala 92914cf11afSPaul Mackerras #else 93014cf11afSPaul Mackerras errcode = Soft_emulate_8xx(regs); 9315fad293bSKumar Gala switch (errcode) { 9325fad293bSKumar Gala case 0: 93314cf11afSPaul Mackerras emulate_single_step(regs); 9345fad293bSKumar Gala return; 9355fad293bSKumar Gala case 1: 9365fad293bSKumar Gala _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 9375fad293bSKumar Gala return; 9385fad293bSKumar Gala case -EFAULT: 9395fad293bSKumar Gala _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 9405fad293bSKumar Gala return; 9415fad293bSKumar Gala } 9425fad293bSKumar Gala #endif 94314cf11afSPaul Mackerras } 9448dad3f92SPaul Mackerras #endif /* CONFIG_8xx */ 94514cf11afSPaul Mackerras 94614cf11afSPaul Mackerras #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 94714cf11afSPaul Mackerras 94814cf11afSPaul Mackerras void DebugException(struct pt_regs *regs, unsigned long debug_status) 94914cf11afSPaul Mackerras { 95014cf11afSPaul Mackerras if (debug_status & DBSR_IC) { /* instruction completion */ 95114cf11afSPaul Mackerras regs->msr &= ~MSR_DE; 95214cf11afSPaul Mackerras if (user_mode(regs)) { 95314cf11afSPaul Mackerras current->thread.dbcr0 &= ~DBCR0_IC; 95414cf11afSPaul Mackerras } else { 95514cf11afSPaul Mackerras /* Disable instruction completion */ 95614cf11afSPaul Mackerras mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 95714cf11afSPaul Mackerras /* Clear the instruction completion event */ 95814cf11afSPaul Mackerras mtspr(SPRN_DBSR, DBSR_IC); 95914cf11afSPaul Mackerras if (debugger_sstep(regs)) 96014cf11afSPaul Mackerras return; 96114cf11afSPaul Mackerras } 96214cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_TRACE, 0); 96314cf11afSPaul Mackerras } 96414cf11afSPaul Mackerras } 96514cf11afSPaul Mackerras #endif /* CONFIG_4xx || CONFIG_BOOKE */ 96614cf11afSPaul Mackerras 96714cf11afSPaul Mackerras #if !defined(CONFIG_TAU_INT) 96814cf11afSPaul Mackerras void TAUException(struct pt_regs *regs) 96914cf11afSPaul Mackerras { 97014cf11afSPaul Mackerras printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 97114cf11afSPaul Mackerras regs->nip, regs->msr, regs->trap, print_tainted()); 97214cf11afSPaul Mackerras } 97314cf11afSPaul Mackerras #endif /* CONFIG_INT_TAU */ 97414cf11afSPaul Mackerras 97514cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 976dc1c1ca3SStephen Rothwell void altivec_assist_exception(struct pt_regs *regs) 97714cf11afSPaul Mackerras { 97814cf11afSPaul Mackerras int err; 97914cf11afSPaul Mackerras 98014cf11afSPaul Mackerras if (!user_mode(regs)) { 98114cf11afSPaul Mackerras printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 98214cf11afSPaul Mackerras " at %lx\n", regs->nip); 9838dad3f92SPaul Mackerras die("Kernel VMX/Altivec assist exception", regs, SIGILL); 98414cf11afSPaul Mackerras } 98514cf11afSPaul Mackerras 986dc1c1ca3SStephen Rothwell flush_altivec_to_thread(current); 987dc1c1ca3SStephen Rothwell 98814cf11afSPaul Mackerras err = emulate_altivec(regs); 98914cf11afSPaul Mackerras if (err == 0) { 99014cf11afSPaul Mackerras regs->nip += 4; /* skip emulated instruction */ 99114cf11afSPaul Mackerras emulate_single_step(regs); 99214cf11afSPaul Mackerras return; 99314cf11afSPaul Mackerras } 99414cf11afSPaul Mackerras 99514cf11afSPaul Mackerras if (err == -EFAULT) { 99614cf11afSPaul Mackerras /* got an error reading the instruction */ 99714cf11afSPaul Mackerras _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 99814cf11afSPaul Mackerras } else { 99914cf11afSPaul Mackerras /* didn't recognize the instruction */ 100014cf11afSPaul Mackerras /* XXX quick hack for now: set the non-Java bit in the VSCR */ 100114cf11afSPaul Mackerras if (printk_ratelimit()) 100214cf11afSPaul Mackerras printk(KERN_ERR "Unrecognized altivec instruction " 100314cf11afSPaul Mackerras "in %s at %lx\n", current->comm, regs->nip); 100414cf11afSPaul Mackerras current->thread.vscr.u[3] |= 0x10000; 100514cf11afSPaul Mackerras } 100614cf11afSPaul Mackerras } 100714cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 100814cf11afSPaul Mackerras 100914cf11afSPaul Mackerras #ifdef CONFIG_FSL_BOOKE 101014cf11afSPaul Mackerras void CacheLockingException(struct pt_regs *regs, unsigned long address, 101114cf11afSPaul Mackerras unsigned long error_code) 101214cf11afSPaul Mackerras { 101314cf11afSPaul Mackerras /* We treat cache locking instructions from the user 101414cf11afSPaul Mackerras * as priv ops, in the future we could try to do 101514cf11afSPaul Mackerras * something smarter 101614cf11afSPaul Mackerras */ 101714cf11afSPaul Mackerras if (error_code & (ESR_DLK|ESR_ILK)) 101814cf11afSPaul Mackerras _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 101914cf11afSPaul Mackerras return; 102014cf11afSPaul Mackerras } 102114cf11afSPaul Mackerras #endif /* CONFIG_FSL_BOOKE */ 102214cf11afSPaul Mackerras 102314cf11afSPaul Mackerras #ifdef CONFIG_SPE 102414cf11afSPaul Mackerras void SPEFloatingPointException(struct pt_regs *regs) 102514cf11afSPaul Mackerras { 102614cf11afSPaul Mackerras unsigned long spefscr; 102714cf11afSPaul Mackerras int fpexc_mode; 102814cf11afSPaul Mackerras int code = 0; 102914cf11afSPaul Mackerras 103014cf11afSPaul Mackerras spefscr = current->thread.spefscr; 103114cf11afSPaul Mackerras fpexc_mode = current->thread.fpexc_mode; 103214cf11afSPaul Mackerras 103314cf11afSPaul Mackerras /* Hardware does not neccessarily set sticky 103414cf11afSPaul Mackerras * underflow/overflow/invalid flags */ 103514cf11afSPaul Mackerras if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 103614cf11afSPaul Mackerras code = FPE_FLTOVF; 103714cf11afSPaul Mackerras spefscr |= SPEFSCR_FOVFS; 103814cf11afSPaul Mackerras } 103914cf11afSPaul Mackerras else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 104014cf11afSPaul Mackerras code = FPE_FLTUND; 104114cf11afSPaul Mackerras spefscr |= SPEFSCR_FUNFS; 104214cf11afSPaul Mackerras } 104314cf11afSPaul Mackerras else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 104414cf11afSPaul Mackerras code = FPE_FLTDIV; 104514cf11afSPaul Mackerras else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 104614cf11afSPaul Mackerras code = FPE_FLTINV; 104714cf11afSPaul Mackerras spefscr |= SPEFSCR_FINVS; 104814cf11afSPaul Mackerras } 104914cf11afSPaul Mackerras else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 105014cf11afSPaul Mackerras code = FPE_FLTRES; 105114cf11afSPaul Mackerras 105214cf11afSPaul Mackerras current->thread.spefscr = spefscr; 105314cf11afSPaul Mackerras 105414cf11afSPaul Mackerras _exception(SIGFPE, regs, code, regs->nip); 105514cf11afSPaul Mackerras return; 105614cf11afSPaul Mackerras } 105714cf11afSPaul Mackerras #endif 105814cf11afSPaul Mackerras 1059dc1c1ca3SStephen Rothwell /* 1060dc1c1ca3SStephen Rothwell * We enter here if we get an unrecoverable exception, that is, one 1061dc1c1ca3SStephen Rothwell * that happened at a point where the RI (recoverable interrupt) bit 1062dc1c1ca3SStephen Rothwell * in the MSR is 0. This indicates that SRR0/1 are live, and that 1063dc1c1ca3SStephen Rothwell * we therefore lost state by taking this exception. 1064dc1c1ca3SStephen Rothwell */ 1065dc1c1ca3SStephen Rothwell void unrecoverable_exception(struct pt_regs *regs) 1066dc1c1ca3SStephen Rothwell { 1067dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1068dc1c1ca3SStephen Rothwell regs->trap, regs->nip); 1069dc1c1ca3SStephen Rothwell die("Unrecoverable exception", regs, SIGABRT); 1070dc1c1ca3SStephen Rothwell } 1071dc1c1ca3SStephen Rothwell 107214cf11afSPaul Mackerras #ifdef CONFIG_BOOKE_WDT 107314cf11afSPaul Mackerras /* 107414cf11afSPaul Mackerras * Default handler for a Watchdog exception, 107514cf11afSPaul Mackerras * spins until a reboot occurs 107614cf11afSPaul Mackerras */ 107714cf11afSPaul Mackerras void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 107814cf11afSPaul Mackerras { 107914cf11afSPaul Mackerras /* Generic WatchdogHandler, implement your own */ 108014cf11afSPaul Mackerras mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 108114cf11afSPaul Mackerras return; 108214cf11afSPaul Mackerras } 108314cf11afSPaul Mackerras 108414cf11afSPaul Mackerras void WatchdogException(struct pt_regs *regs) 108514cf11afSPaul Mackerras { 108614cf11afSPaul Mackerras printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 108714cf11afSPaul Mackerras WatchdogHandler(regs); 108814cf11afSPaul Mackerras } 108914cf11afSPaul Mackerras #endif 1090dc1c1ca3SStephen Rothwell 1091dc1c1ca3SStephen Rothwell /* 1092dc1c1ca3SStephen Rothwell * We enter here if we discover during exception entry that we are 1093dc1c1ca3SStephen Rothwell * running in supervisor mode with a userspace value in the stack pointer. 1094dc1c1ca3SStephen Rothwell */ 1095dc1c1ca3SStephen Rothwell void kernel_bad_stack(struct pt_regs *regs) 1096dc1c1ca3SStephen Rothwell { 1097dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1098dc1c1ca3SStephen Rothwell regs->gpr[1], regs->nip); 1099dc1c1ca3SStephen Rothwell die("Bad kernel stack pointer", regs, SIGABRT); 1100dc1c1ca3SStephen Rothwell } 110114cf11afSPaul Mackerras 110214cf11afSPaul Mackerras void __init trap_init(void) 110314cf11afSPaul Mackerras { 110414cf11afSPaul Mackerras } 1105