xref: /openbmc/linux/arch/powerpc/kernel/setup_32.c (revision e0291f1decd6e8d447067f7d2cf01b1091b7cb3f)
1457c8996SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
270d64ceaSPaul Mackerras /*
370d64ceaSPaul Mackerras  * Common prep/pmac/chrp boot and setup code.
470d64ceaSPaul Mackerras  */
570d64ceaSPaul Mackerras 
670d64ceaSPaul Mackerras #include <linux/module.h>
770d64ceaSPaul Mackerras #include <linux/string.h>
870d64ceaSPaul Mackerras #include <linux/sched.h>
970d64ceaSPaul Mackerras #include <linux/init.h>
1070d64ceaSPaul Mackerras #include <linux/kernel.h>
1170d64ceaSPaul Mackerras #include <linux/reboot.h>
1270d64ceaSPaul Mackerras #include <linux/delay.h>
1370d64ceaSPaul Mackerras #include <linux/initrd.h>
1470d64ceaSPaul Mackerras #include <linux/tty.h>
1570d64ceaSPaul Mackerras #include <linux/seq_file.h>
1670d64ceaSPaul Mackerras #include <linux/root_dev.h>
1770d64ceaSPaul Mackerras #include <linux/cpu.h>
1870d64ceaSPaul Mackerras #include <linux/console.h>
1995f72d1eSYinghai Lu #include <linux/memblock.h>
209445aa1aSAl Viro #include <linux/export.h>
21a156c7baSFinn Thain #include <linux/nvram.h>
2270d64ceaSPaul Mackerras 
2370d64ceaSPaul Mackerras #include <asm/io.h>
2470d64ceaSPaul Mackerras #include <asm/prom.h>
2570d64ceaSPaul Mackerras #include <asm/processor.h>
2670d64ceaSPaul Mackerras #include <asm/pgtable.h>
2770d64ceaSPaul Mackerras #include <asm/setup.h>
2870d64ceaSPaul Mackerras #include <asm/smp.h>
2970d64ceaSPaul Mackerras #include <asm/elf.h>
3070d64ceaSPaul Mackerras #include <asm/cputable.h>
3170d64ceaSPaul Mackerras #include <asm/bootx.h>
3270d64ceaSPaul Mackerras #include <asm/btext.h>
3370d64ceaSPaul Mackerras #include <asm/machdep.h>
347c0f6ba6SLinus Torvalds #include <linux/uaccess.h>
3570d64ceaSPaul Mackerras #include <asm/pmac_feature.h>
3670d64ceaSPaul Mackerras #include <asm/sections.h>
3770d64ceaSPaul Mackerras #include <asm/nvram.h>
3870d64ceaSPaul Mackerras #include <asm/xmon.h>
396d7f58b0SKumar Gala #include <asm/time.h>
40463ce0e1SBenjamin Herrenschmidt #include <asm/serial.h>
4151d3082fSBenjamin Herrenschmidt #include <asm/udbg.h>
421cd03890SLEROY Christophe #include <asm/code-patching.h>
43b92a226eSKevin Hao #include <asm/cpu_has_feature.h>
44e82d70cfSMathieu Malaterre #include <asm/asm-prototypes.h>
45db0a2b63SChristophe Leroy #include <asm/kdump.h>
462c86cd18SChristophe Leroy #include <asm/feature-fixups.h>
4770d64ceaSPaul Mackerras 
48f2c6d0d1SMathieu Malaterre #include "setup.h"
49f2c6d0d1SMathieu Malaterre 
5003501dabSPaul Mackerras #define DBG(fmt...)
5103501dabSPaul Mackerras 
5270d64ceaSPaul Mackerras extern void bootx_init(unsigned long r4, unsigned long phys);
5370d64ceaSPaul Mackerras 
5480579e1fSPaul Mackerras int boot_cpuid_phys;
559974eec2SAndrew Gabbasov EXPORT_SYMBOL_GPL(boot_cpuid_phys);
5680579e1fSPaul Mackerras 
5713a9801eSNathan Lynch int smp_hw_index[NR_CPUS];
589445aa1aSAl Viro EXPORT_SYMBOL(smp_hw_index);
5913a9801eSNathan Lynch 
6070d64ceaSPaul Mackerras unsigned long ISA_DMA_THRESHOLD;
6170d64ceaSPaul Mackerras unsigned int DMA_MODE_READ;
6270d64ceaSPaul Mackerras unsigned int DMA_MODE_WRITE;
6370d64ceaSPaul Mackerras 
649445aa1aSAl Viro EXPORT_SYMBOL(DMA_MODE_READ);
659445aa1aSAl Viro EXPORT_SYMBOL(DMA_MODE_WRITE);
669445aa1aSAl Viro 
6770d64ceaSPaul Mackerras /*
68bd7c93ccSBenjamin Herrenschmidt  * This is run before start_kernel(), the kernel has been relocated
69bd7c93ccSBenjamin Herrenschmidt  * and we are running with enough of the MMU enabled to have our
70bd7c93ccSBenjamin Herrenschmidt  * proper kernel virtual addresses
71bd7c93ccSBenjamin Herrenschmidt  *
72f9cc1d1fSBenjamin Herrenschmidt  * We do the initial parsing of the flat device-tree and prepares
73f9cc1d1fSBenjamin Herrenschmidt  * for the MMU to be fully initialized.
7470d64ceaSPaul Mackerras  */
756dece0ebSScott Wood notrace void __init machine_init(u64 dt_ptr)
7670d64ceaSPaul Mackerras {
7704b0a72fSChristophe Leroy 	unsigned int *addr = (unsigned int *)patch_site_addr(&patch__memset_nocache);
78ad1b0122SChristophe Leroy 	unsigned long insn;
79ad1b0122SChristophe Leroy 
8097f6e0ccSBenjamin Herrenschmidt 	/* Configure static keys first, now that we're relocated. */
8197f6e0ccSBenjamin Herrenschmidt 	setup_feature_keys();
8297f6e0ccSBenjamin Herrenschmidt 
83719c91ccSDavid Gibson 	/* Enable early debugging if any specified (see udbg.h) */
84719c91ccSDavid Gibson 	udbg_early_init();
8551d3082fSBenjamin Herrenschmidt 
86fa54a981SChristophe Leroy 	patch_instruction_site(&patch__memcpy_nocache, PPC_INST_NOP);
87ad1b0122SChristophe Leroy 
88ad1b0122SChristophe Leroy 	insn = create_cond_branch(addr, branch_target(addr), 0x820000);
89ad1b0122SChristophe Leroy 	patch_instruction(addr, insn);	/* replace b by bne cr0 */
901cd03890SLEROY Christophe 
9151d3082fSBenjamin Herrenschmidt 	/* Do some early initialization based on the flat device tree */
9270d64ceaSPaul Mackerras 	early_init_devtree(__va(dt_ptr));
9370d64ceaSPaul Mackerras 
9491b191c7SDave Kleikamp 	early_init_mmu();
9591b191c7SDave Kleikamp 
96f8f50b1bSDale Farnsworth 	setup_kdump_trampoline();
9770d64ceaSPaul Mackerras }
9870d64ceaSPaul Mackerras 
9970d64ceaSPaul Mackerras /* Checks "l2cr=xxxx" command-line option */
100d15a261dSMathieu Malaterre static int __init ppc_setup_l2cr(char *str)
10170d64ceaSPaul Mackerras {
10270d64ceaSPaul Mackerras 	if (cpu_has_feature(CPU_FTR_L2CR)) {
10370d64ceaSPaul Mackerras 		unsigned long val = simple_strtoul(str, NULL, 0);
10470d64ceaSPaul Mackerras 		printk(KERN_INFO "l2cr set to %lx\n", val);
10570d64ceaSPaul Mackerras 		_set_L2CR(0);		/* force invalidate by disable cache */
10670d64ceaSPaul Mackerras 		_set_L2CR(val);		/* and enable it */
10770d64ceaSPaul Mackerras 	}
10870d64ceaSPaul Mackerras 	return 1;
10970d64ceaSPaul Mackerras }
11070d64ceaSPaul Mackerras __setup("l2cr=", ppc_setup_l2cr);
11170d64ceaSPaul Mackerras 
112a78bfbfcSRobert Brose /* Checks "l3cr=xxxx" command-line option */
113d15a261dSMathieu Malaterre static int __init ppc_setup_l3cr(char *str)
114a78bfbfcSRobert Brose {
115a78bfbfcSRobert Brose 	if (cpu_has_feature(CPU_FTR_L3CR)) {
116a78bfbfcSRobert Brose 		unsigned long val = simple_strtoul(str, NULL, 0);
117a78bfbfcSRobert Brose 		printk(KERN_INFO "l3cr set to %lx\n", val);
118a78bfbfcSRobert Brose 		_set_L3CR(val);		/* and enable it */
119a78bfbfcSRobert Brose 	}
120a78bfbfcSRobert Brose 	return 1;
121a78bfbfcSRobert Brose }
122a78bfbfcSRobert Brose __setup("l3cr=", ppc_setup_l3cr);
123a78bfbfcSRobert Brose 
124d15a261dSMathieu Malaterre static int __init ppc_init(void)
12570d64ceaSPaul Mackerras {
12670d64ceaSPaul Mackerras 	/* clear the progress line */
1275e41763aSGiuliano Pochini 	if (ppc_md.progress)
1285e41763aSGiuliano Pochini 		ppc_md.progress("             ", 0xffff);
12970d64ceaSPaul Mackerras 
13070d64ceaSPaul Mackerras 	/* call platform init */
13170d64ceaSPaul Mackerras 	if (ppc_md.init != NULL) {
13270d64ceaSPaul Mackerras 		ppc_md.init();
13370d64ceaSPaul Mackerras 	}
13470d64ceaSPaul Mackerras 	return 0;
13570d64ceaSPaul Mackerras }
13670d64ceaSPaul Mackerras arch_initcall(ppc_init);
13770d64ceaSPaul Mackerras 
138c8e409a3SChristophe Leroy static void *__init alloc_stack(void)
139c8e409a3SChristophe Leroy {
140c8e409a3SChristophe Leroy 	void *ptr = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
141c8e409a3SChristophe Leroy 
142c8e409a3SChristophe Leroy 	if (!ptr)
143c8e409a3SChristophe Leroy 		panic("cannot allocate %d bytes for stack at %pS\n",
144c8e409a3SChristophe Leroy 		      THREAD_SIZE, (void *)_RET_IP_);
145c8e409a3SChristophe Leroy 
146c8e409a3SChristophe Leroy 	return ptr;
147c8e409a3SChristophe Leroy }
148c8e409a3SChristophe Leroy 
149b1923caaSBenjamin Herrenschmidt void __init irqstack_early_init(void)
15085218827SKumar Gala {
15185218827SKumar Gala 	unsigned int i;
15285218827SKumar Gala 
15385218827SKumar Gala 	/* interrupt stacks must be in lowmem, we get that for free on ppc32
154e63075a3SBenjamin Herrenschmidt 	 * as the memblock is limited to lowmem by default */
15585218827SKumar Gala 	for_each_possible_cpu(i) {
156c8e409a3SChristophe Leroy 		softirq_ctx[i] = alloc_stack();
157c8e409a3SChristophe Leroy 		hardirq_ctx[i] = alloc_stack();
15885218827SKumar Gala 	}
15985218827SKumar Gala }
16085218827SKumar Gala 
161bcf0b088SKumar Gala #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
162b1923caaSBenjamin Herrenschmidt void __init exc_lvl_early_init(void)
163bcf0b088SKumar Gala {
1643e7f45adSDave Kleikamp 	unsigned int i, hw_cpu;
165bcf0b088SKumar Gala 
166bcf0b088SKumar Gala 	/* interrupt stacks must be in lowmem, we get that for free on ppc32
16795f72d1eSYinghai Lu 	 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
168bcf0b088SKumar Gala 	for_each_possible_cpu(i) {
16904a34113SKevin Hao #ifdef CONFIG_SMP
1703e7f45adSDave Kleikamp 		hw_cpu = get_hard_smp_processor_id(i);
17104a34113SKevin Hao #else
17204a34113SKevin Hao 		hw_cpu = 0;
17304a34113SKevin Hao #endif
17404a34113SKevin Hao 
175c8e409a3SChristophe Leroy 		critirq_ctx[hw_cpu] = alloc_stack();
176bcf0b088SKumar Gala #ifdef CONFIG_BOOKE
177c8e409a3SChristophe Leroy 		dbgirq_ctx[hw_cpu] = alloc_stack();
178c8e409a3SChristophe Leroy 		mcheckirq_ctx[hw_cpu] = alloc_stack();
179bcf0b088SKumar Gala #endif
180bcf0b088SKumar Gala 	}
181bcf0b088SKumar Gala }
182bcf0b088SKumar Gala #endif
183bcf0b088SKumar Gala 
184b1923caaSBenjamin Herrenschmidt void __init setup_power_save(void)
18556571384SBenjamin Herrenschmidt {
186d7cceda9SChristophe Leroy #ifdef CONFIG_PPC_BOOK3S_32
18756571384SBenjamin Herrenschmidt 	if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
18856571384SBenjamin Herrenschmidt 	    cpu_has_feature(CPU_FTR_CAN_NAP))
18956571384SBenjamin Herrenschmidt 		ppc_md.power_save = ppc6xx_idle;
19056571384SBenjamin Herrenschmidt #endif
19156571384SBenjamin Herrenschmidt 
19256571384SBenjamin Herrenschmidt #ifdef CONFIG_E500
19356571384SBenjamin Herrenschmidt 	if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
19456571384SBenjamin Herrenschmidt 	    cpu_has_feature(CPU_FTR_CAN_NAP))
19556571384SBenjamin Herrenschmidt 		ppc_md.power_save = e500_idle;
19656571384SBenjamin Herrenschmidt #endif
19756571384SBenjamin Herrenschmidt }
19856571384SBenjamin Herrenschmidt 
199b1923caaSBenjamin Herrenschmidt __init void initialize_cache_info(void)
2008f212cb2SBenjamin Herrenschmidt {
2018f212cb2SBenjamin Herrenschmidt 	/*
2028f212cb2SBenjamin Herrenschmidt 	 * Set cache line size based on type of cpu as a default.
2038f212cb2SBenjamin Herrenschmidt 	 * Systems with OF can look in the properties on the cpu node(s)
2048f212cb2SBenjamin Herrenschmidt 	 * for a possibly more accurate value.
2058f212cb2SBenjamin Herrenschmidt 	 */
2068f212cb2SBenjamin Herrenschmidt 	dcache_bsize = cur_cpu_spec->dcache_bsize;
2078f212cb2SBenjamin Herrenschmidt 	icache_bsize = cur_cpu_spec->icache_bsize;
2088f212cb2SBenjamin Herrenschmidt 	ucache_bsize = 0;
209*e0291f1dSChristophe Leroy 	if (IS_ENABLED(CONFIG_PPC_BOOK3S_601) || IS_ENABLED(CONFIG_E200))
2108f212cb2SBenjamin Herrenschmidt 		ucache_bsize = icache_bsize = dcache_bsize;
2118f212cb2SBenjamin Herrenschmidt }
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