xref: /openbmc/linux/arch/powerpc/kernel/ptrace/ptrace-view.c (revision 884ad5c52da253e5d38f947cd8d1d9412a47429c)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 #include <linux/regset.h>
4 #include <linux/elf.h>
5 #include <linux/nospec.h>
6 #include <linux/pkeys.h>
7 
8 #include "ptrace-decl.h"
9 
10 struct pt_regs_offset {
11 	const char *name;
12 	int offset;
13 };
14 
15 #define STR(s)	#s			/* convert to string */
16 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
17 #define GPR_OFFSET_NAME(num)	\
18 	{.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \
19 	{.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
20 #define REG_OFFSET_END {.name = NULL, .offset = 0}
21 
22 static const struct pt_regs_offset regoffset_table[] = {
23 	GPR_OFFSET_NAME(0),
24 	GPR_OFFSET_NAME(1),
25 	GPR_OFFSET_NAME(2),
26 	GPR_OFFSET_NAME(3),
27 	GPR_OFFSET_NAME(4),
28 	GPR_OFFSET_NAME(5),
29 	GPR_OFFSET_NAME(6),
30 	GPR_OFFSET_NAME(7),
31 	GPR_OFFSET_NAME(8),
32 	GPR_OFFSET_NAME(9),
33 	GPR_OFFSET_NAME(10),
34 	GPR_OFFSET_NAME(11),
35 	GPR_OFFSET_NAME(12),
36 	GPR_OFFSET_NAME(13),
37 	GPR_OFFSET_NAME(14),
38 	GPR_OFFSET_NAME(15),
39 	GPR_OFFSET_NAME(16),
40 	GPR_OFFSET_NAME(17),
41 	GPR_OFFSET_NAME(18),
42 	GPR_OFFSET_NAME(19),
43 	GPR_OFFSET_NAME(20),
44 	GPR_OFFSET_NAME(21),
45 	GPR_OFFSET_NAME(22),
46 	GPR_OFFSET_NAME(23),
47 	GPR_OFFSET_NAME(24),
48 	GPR_OFFSET_NAME(25),
49 	GPR_OFFSET_NAME(26),
50 	GPR_OFFSET_NAME(27),
51 	GPR_OFFSET_NAME(28),
52 	GPR_OFFSET_NAME(29),
53 	GPR_OFFSET_NAME(30),
54 	GPR_OFFSET_NAME(31),
55 	REG_OFFSET_NAME(nip),
56 	REG_OFFSET_NAME(msr),
57 	REG_OFFSET_NAME(ctr),
58 	REG_OFFSET_NAME(link),
59 	REG_OFFSET_NAME(xer),
60 	REG_OFFSET_NAME(ccr),
61 #ifdef CONFIG_PPC64
62 	REG_OFFSET_NAME(softe),
63 #else
64 	REG_OFFSET_NAME(mq),
65 #endif
66 	REG_OFFSET_NAME(trap),
67 	REG_OFFSET_NAME(dar),
68 	REG_OFFSET_NAME(dsisr),
69 	REG_OFFSET_END,
70 };
71 
72 /**
73  * regs_query_register_offset() - query register offset from its name
74  * @name:	the name of a register
75  *
76  * regs_query_register_offset() returns the offset of a register in struct
77  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
78  */
79 int regs_query_register_offset(const char *name)
80 {
81 	const struct pt_regs_offset *roff;
82 	for (roff = regoffset_table; roff->name != NULL; roff++)
83 		if (!strcmp(roff->name, name))
84 			return roff->offset;
85 	return -EINVAL;
86 }
87 
88 /**
89  * regs_query_register_name() - query register name from its offset
90  * @offset:	the offset of a register in struct pt_regs.
91  *
92  * regs_query_register_name() returns the name of a register from its
93  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
94  */
95 const char *regs_query_register_name(unsigned int offset)
96 {
97 	const struct pt_regs_offset *roff;
98 	for (roff = regoffset_table; roff->name != NULL; roff++)
99 		if (roff->offset == offset)
100 			return roff->name;
101 	return NULL;
102 }
103 
104 /*
105  * does not yet catch signals sent when the child dies.
106  * in exit.c or in signal.c.
107  */
108 
109 static unsigned long get_user_msr(struct task_struct *task)
110 {
111 	return task->thread.regs->msr | task->thread.fpexc_mode;
112 }
113 
114 static __always_inline int set_user_msr(struct task_struct *task, unsigned long msr)
115 {
116 	unsigned long newmsr = (task->thread.regs->msr & ~MSR_DEBUGCHANGE) |
117 				(msr & MSR_DEBUGCHANGE);
118 	regs_set_return_msr(task->thread.regs, newmsr);
119 	return 0;
120 }
121 
122 #ifdef CONFIG_PPC64
123 static int get_user_dscr(struct task_struct *task, unsigned long *data)
124 {
125 	*data = task->thread.dscr;
126 	return 0;
127 }
128 
129 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
130 {
131 	task->thread.dscr = dscr;
132 	task->thread.dscr_inherit = 1;
133 	return 0;
134 }
135 #else
136 static int get_user_dscr(struct task_struct *task, unsigned long *data)
137 {
138 	return -EIO;
139 }
140 
141 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
142 {
143 	return -EIO;
144 }
145 #endif
146 
147 /*
148  * We prevent mucking around with the reserved area of trap
149  * which are used internally by the kernel.
150  */
151 static __always_inline int set_user_trap(struct task_struct *task, unsigned long trap)
152 {
153 	set_trap(task->thread.regs, trap);
154 	return 0;
155 }
156 
157 /*
158  * Get contents of register REGNO in task TASK.
159  */
160 int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
161 {
162 	unsigned int regs_max;
163 
164 	if (task->thread.regs == NULL || !data)
165 		return -EIO;
166 
167 	if (regno == PT_MSR) {
168 		*data = get_user_msr(task);
169 		return 0;
170 	}
171 
172 	if (regno == PT_DSCR)
173 		return get_user_dscr(task, data);
174 
175 	/*
176 	 * softe copies paca->irq_soft_mask variable state. Since irq_soft_mask is
177 	 * no more used as a flag, lets force usr to always see the softe value as 1
178 	 * which means interrupts are not soft disabled.
179 	 */
180 	if (IS_ENABLED(CONFIG_PPC64) && regno == PT_SOFTE) {
181 		*data = 1;
182 		return  0;
183 	}
184 
185 	regs_max = sizeof(struct user_pt_regs) / sizeof(unsigned long);
186 	if (regno < regs_max) {
187 		regno = array_index_nospec(regno, regs_max);
188 		*data = ((unsigned long *)task->thread.regs)[regno];
189 		return 0;
190 	}
191 
192 	return -EIO;
193 }
194 
195 /*
196  * Write contents of register REGNO in task TASK.
197  */
198 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
199 {
200 	if (task->thread.regs == NULL)
201 		return -EIO;
202 
203 	if (regno == PT_MSR)
204 		return set_user_msr(task, data);
205 	if (regno == PT_TRAP)
206 		return set_user_trap(task, data);
207 	if (regno == PT_DSCR)
208 		return set_user_dscr(task, data);
209 
210 	if (regno <= PT_MAX_PUT_REG) {
211 		regno = array_index_nospec(regno, PT_MAX_PUT_REG + 1);
212 		((unsigned long *)task->thread.regs)[regno] = data;
213 		return 0;
214 	}
215 	return -EIO;
216 }
217 
218 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
219 		   struct membuf to)
220 {
221 	struct membuf to_msr = membuf_at(&to, offsetof(struct pt_regs, msr));
222 #ifdef CONFIG_PPC64
223 	struct membuf to_softe = membuf_at(&to, offsetof(struct pt_regs, softe));
224 #endif
225 	if (target->thread.regs == NULL)
226 		return -EIO;
227 
228 	membuf_write(&to, target->thread.regs, sizeof(struct user_pt_regs));
229 
230 	membuf_store(&to_msr, get_user_msr(target));
231 #ifdef CONFIG_PPC64
232 	membuf_store(&to_softe, 0x1ul);
233 #endif
234 	return membuf_zero(&to, ELF_NGREG * sizeof(unsigned long) -
235 				 sizeof(struct user_pt_regs));
236 }
237 
238 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
239 		   unsigned int pos, unsigned int count, const void *kbuf,
240 		   const void __user *ubuf)
241 {
242 	unsigned long reg;
243 	int ret;
244 
245 	if (target->thread.regs == NULL)
246 		return -EIO;
247 
248 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
249 				 target->thread.regs,
250 				 0, PT_MSR * sizeof(reg));
251 
252 	if (!ret && count > 0) {
253 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
254 					 PT_MSR * sizeof(reg),
255 					 (PT_MSR + 1) * sizeof(reg));
256 		if (!ret)
257 			ret = set_user_msr(target, reg);
258 	}
259 
260 	BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
261 		     offsetof(struct pt_regs, msr) + sizeof(long));
262 
263 	if (!ret)
264 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
265 					 &target->thread.regs->orig_gpr3,
266 					 PT_ORIG_R3 * sizeof(reg),
267 					 (PT_MAX_PUT_REG + 1) * sizeof(reg));
268 
269 	if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
270 		user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
271 					  (PT_MAX_PUT_REG + 1) * sizeof(reg),
272 					  PT_TRAP * sizeof(reg));
273 
274 	if (!ret && count > 0) {
275 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
276 					 PT_TRAP * sizeof(reg),
277 					 (PT_TRAP + 1) * sizeof(reg));
278 		if (!ret)
279 			ret = set_user_trap(target, reg);
280 	}
281 
282 	if (!ret)
283 		user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
284 					  (PT_TRAP + 1) * sizeof(reg), -1);
285 
286 	return ret;
287 }
288 
289 #ifdef CONFIG_PPC64
290 static int ppr_get(struct task_struct *target, const struct user_regset *regset,
291 		   struct membuf to)
292 {
293 	if (!target->thread.regs)
294 		return -EINVAL;
295 
296 	return membuf_write(&to, &target->thread.regs->ppr, sizeof(u64));
297 }
298 
299 static int ppr_set(struct task_struct *target, const struct user_regset *regset,
300 		   unsigned int pos, unsigned int count, const void *kbuf,
301 		   const void __user *ubuf)
302 {
303 	if (!target->thread.regs)
304 		return -EINVAL;
305 
306 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
307 				  &target->thread.regs->ppr, 0, sizeof(u64));
308 }
309 
310 static int dscr_get(struct task_struct *target, const struct user_regset *regset,
311 		    struct membuf to)
312 {
313 	return membuf_write(&to, &target->thread.dscr, sizeof(u64));
314 }
315 static int dscr_set(struct task_struct *target, const struct user_regset *regset,
316 		    unsigned int pos, unsigned int count, const void *kbuf,
317 		    const void __user *ubuf)
318 {
319 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
320 				  &target->thread.dscr, 0, sizeof(u64));
321 }
322 #endif
323 #ifdef CONFIG_PPC_BOOK3S_64
324 static int tar_get(struct task_struct *target, const struct user_regset *regset,
325 		   struct membuf to)
326 {
327 	return membuf_write(&to, &target->thread.tar, sizeof(u64));
328 }
329 static int tar_set(struct task_struct *target, const struct user_regset *regset,
330 		   unsigned int pos, unsigned int count, const void *kbuf,
331 		   const void __user *ubuf)
332 {
333 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
334 				  &target->thread.tar, 0, sizeof(u64));
335 }
336 
337 static int ebb_active(struct task_struct *target, const struct user_regset *regset)
338 {
339 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
340 		return -ENODEV;
341 
342 	if (target->thread.used_ebb)
343 		return regset->n;
344 
345 	return 0;
346 }
347 
348 static int ebb_get(struct task_struct *target, const struct user_regset *regset,
349 		   struct membuf to)
350 {
351 	/* Build tests */
352 	BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
353 	BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
354 
355 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
356 		return -ENODEV;
357 
358 	if (!target->thread.used_ebb)
359 		return -ENODATA;
360 
361 	return membuf_write(&to, &target->thread.ebbrr, 3 * sizeof(unsigned long));
362 }
363 
364 static int ebb_set(struct task_struct *target, const struct user_regset *regset,
365 		   unsigned int pos, unsigned int count, const void *kbuf,
366 		   const void __user *ubuf)
367 {
368 	int ret = 0;
369 
370 	/* Build tests */
371 	BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
372 	BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
373 
374 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
375 		return -ENODEV;
376 
377 	if (target->thread.used_ebb)
378 		return -ENODATA;
379 
380 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.ebbrr,
381 				 0, sizeof(unsigned long));
382 
383 	if (!ret)
384 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
385 					 &target->thread.ebbhr, sizeof(unsigned long),
386 					 2 * sizeof(unsigned long));
387 
388 	if (!ret)
389 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
390 					 &target->thread.bescr, 2 * sizeof(unsigned long),
391 					 3 * sizeof(unsigned long));
392 
393 	return ret;
394 }
395 static int pmu_active(struct task_struct *target, const struct user_regset *regset)
396 {
397 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
398 		return -ENODEV;
399 
400 	return regset->n;
401 }
402 
403 static int pmu_get(struct task_struct *target, const struct user_regset *regset,
404 		   struct membuf to)
405 {
406 	/* Build tests */
407 	BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
408 	BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
409 	BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
410 	BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
411 
412 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
413 		return -ENODEV;
414 
415 	return membuf_write(&to, &target->thread.siar, 5 * sizeof(unsigned long));
416 }
417 
418 static int pmu_set(struct task_struct *target, const struct user_regset *regset,
419 		   unsigned int pos, unsigned int count, const void *kbuf,
420 		   const void __user *ubuf)
421 {
422 	int ret = 0;
423 
424 	/* Build tests */
425 	BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
426 	BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
427 	BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
428 	BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
429 
430 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
431 		return -ENODEV;
432 
433 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.siar,
434 				 0, sizeof(unsigned long));
435 
436 	if (!ret)
437 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
438 					 &target->thread.sdar, sizeof(unsigned long),
439 					 2 * sizeof(unsigned long));
440 
441 	if (!ret)
442 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
443 					 &target->thread.sier, 2 * sizeof(unsigned long),
444 					 3 * sizeof(unsigned long));
445 
446 	if (!ret)
447 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
448 					 &target->thread.mmcr2, 3 * sizeof(unsigned long),
449 					 4 * sizeof(unsigned long));
450 
451 	if (!ret)
452 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
453 					 &target->thread.mmcr0, 4 * sizeof(unsigned long),
454 					 5 * sizeof(unsigned long));
455 	return ret;
456 }
457 
458 static int dexcr_active(struct task_struct *target, const struct user_regset *regset)
459 {
460 	if (!cpu_has_feature(CPU_FTR_ARCH_31))
461 		return -ENODEV;
462 
463 	return regset->n;
464 }
465 
466 static int dexcr_get(struct task_struct *target, const struct user_regset *regset,
467 		     struct membuf to)
468 {
469 	if (!cpu_has_feature(CPU_FTR_ARCH_31))
470 		return -ENODEV;
471 
472 	/*
473 	 * The DEXCR is currently static across all CPUs, so we don't
474 	 * store the target's value anywhere, but the static value
475 	 * will also be correct.
476 	 */
477 	membuf_store(&to, (u64)lower_32_bits(DEXCR_INIT));
478 
479 	/*
480 	 * Technically the HDEXCR is per-cpu, but a hypervisor can't reasonably
481 	 * change it between CPUs of the same guest.
482 	 */
483 	return membuf_store(&to, (u64)lower_32_bits(mfspr(SPRN_HDEXCR_RO)));
484 }
485 
486 #endif /* CONFIG_PPC_BOOK3S_64 */
487 
488 #ifdef CONFIG_PPC_MEM_KEYS
489 static int pkey_active(struct task_struct *target, const struct user_regset *regset)
490 {
491 	if (!arch_pkeys_enabled())
492 		return -ENODEV;
493 
494 	return regset->n;
495 }
496 
497 static int pkey_get(struct task_struct *target, const struct user_regset *regset,
498 		    struct membuf to)
499 {
500 
501 	if (!arch_pkeys_enabled())
502 		return -ENODEV;
503 
504 	membuf_store(&to, target->thread.regs->amr);
505 	membuf_store(&to, target->thread.regs->iamr);
506 	return membuf_store(&to, default_uamor);
507 }
508 
509 static int pkey_set(struct task_struct *target, const struct user_regset *regset,
510 		    unsigned int pos, unsigned int count, const void *kbuf,
511 		    const void __user *ubuf)
512 {
513 	u64 new_amr;
514 	int ret;
515 
516 	if (!arch_pkeys_enabled())
517 		return -ENODEV;
518 
519 	/* Only the AMR can be set from userspace */
520 	if (pos != 0 || count != sizeof(new_amr))
521 		return -EINVAL;
522 
523 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
524 				 &new_amr, 0, sizeof(new_amr));
525 	if (ret)
526 		return ret;
527 
528 	/*
529 	 * UAMOR determines which bits of the AMR can be set from userspace.
530 	 * UAMOR value 0b11 indicates that the AMR value can be modified
531 	 * from userspace. If the kernel is using a specific key, we avoid
532 	 * userspace modifying the AMR value for that key by masking them
533 	 * via UAMOR 0b00.
534 	 *
535 	 * Pick the AMR values for the keys that kernel is using. This
536 	 * will be indicated by the ~default_uamor bits.
537 	 */
538 	target->thread.regs->amr = (new_amr & default_uamor) |
539 		(target->thread.regs->amr & ~default_uamor);
540 
541 	return 0;
542 }
543 #endif /* CONFIG_PPC_MEM_KEYS */
544 
545 static const struct user_regset native_regsets[] = {
546 	[REGSET_GPR] = {
547 		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
548 		.size = sizeof(long), .align = sizeof(long),
549 		.regset_get = gpr_get, .set = gpr_set
550 	},
551 	[REGSET_FPR] = {
552 		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
553 		.size = sizeof(double), .align = sizeof(double),
554 		.regset_get = fpr_get, .set = fpr_set
555 	},
556 #ifdef CONFIG_ALTIVEC
557 	[REGSET_VMX] = {
558 		.core_note_type = NT_PPC_VMX, .n = 34,
559 		.size = sizeof(vector128), .align = sizeof(vector128),
560 		.active = vr_active, .regset_get = vr_get, .set = vr_set
561 	},
562 #endif
563 #ifdef CONFIG_VSX
564 	[REGSET_VSX] = {
565 		.core_note_type = NT_PPC_VSX, .n = 32,
566 		.size = sizeof(double), .align = sizeof(double),
567 		.active = vsr_active, .regset_get = vsr_get, .set = vsr_set
568 	},
569 #endif
570 #ifdef CONFIG_SPE
571 	[REGSET_SPE] = {
572 		.core_note_type = NT_PPC_SPE, .n = 35,
573 		.size = sizeof(u32), .align = sizeof(u32),
574 		.active = evr_active, .regset_get = evr_get, .set = evr_set
575 	},
576 #endif
577 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
578 	[REGSET_TM_CGPR] = {
579 		.core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
580 		.size = sizeof(long), .align = sizeof(long),
581 		.active = tm_cgpr_active, .regset_get = tm_cgpr_get, .set = tm_cgpr_set
582 	},
583 	[REGSET_TM_CFPR] = {
584 		.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
585 		.size = sizeof(double), .align = sizeof(double),
586 		.active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set
587 	},
588 	[REGSET_TM_CVMX] = {
589 		.core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
590 		.size = sizeof(vector128), .align = sizeof(vector128),
591 		.active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set
592 	},
593 	[REGSET_TM_CVSX] = {
594 		.core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
595 		.size = sizeof(double), .align = sizeof(double),
596 		.active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set
597 	},
598 	[REGSET_TM_SPR] = {
599 		.core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
600 		.size = sizeof(u64), .align = sizeof(u64),
601 		.active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set
602 	},
603 	[REGSET_TM_CTAR] = {
604 		.core_note_type = NT_PPC_TM_CTAR, .n = 1,
605 		.size = sizeof(u64), .align = sizeof(u64),
606 		.active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set
607 	},
608 	[REGSET_TM_CPPR] = {
609 		.core_note_type = NT_PPC_TM_CPPR, .n = 1,
610 		.size = sizeof(u64), .align = sizeof(u64),
611 		.active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set
612 	},
613 	[REGSET_TM_CDSCR] = {
614 		.core_note_type = NT_PPC_TM_CDSCR, .n = 1,
615 		.size = sizeof(u64), .align = sizeof(u64),
616 		.active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set
617 	},
618 #endif
619 #ifdef CONFIG_PPC64
620 	[REGSET_PPR] = {
621 		.core_note_type = NT_PPC_PPR, .n = 1,
622 		.size = sizeof(u64), .align = sizeof(u64),
623 		.regset_get = ppr_get, .set = ppr_set
624 	},
625 	[REGSET_DSCR] = {
626 		.core_note_type = NT_PPC_DSCR, .n = 1,
627 		.size = sizeof(u64), .align = sizeof(u64),
628 		.regset_get = dscr_get, .set = dscr_set
629 	},
630 #endif
631 #ifdef CONFIG_PPC_BOOK3S_64
632 	[REGSET_TAR] = {
633 		.core_note_type = NT_PPC_TAR, .n = 1,
634 		.size = sizeof(u64), .align = sizeof(u64),
635 		.regset_get = tar_get, .set = tar_set
636 	},
637 	[REGSET_EBB] = {
638 		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
639 		.size = sizeof(u64), .align = sizeof(u64),
640 		.active = ebb_active, .regset_get = ebb_get, .set = ebb_set
641 	},
642 	[REGSET_PMR] = {
643 		.core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
644 		.size = sizeof(u64), .align = sizeof(u64),
645 		.active = pmu_active, .regset_get = pmu_get, .set = pmu_set
646 	},
647 	[REGSET_DEXCR] = {
648 		.core_note_type = NT_PPC_DEXCR, .n = ELF_NDEXCR,
649 		.size = sizeof(u64), .align = sizeof(u64),
650 		.active = dexcr_active, .regset_get = dexcr_get
651 	},
652 #endif
653 #ifdef CONFIG_PPC_MEM_KEYS
654 	[REGSET_PKEY] = {
655 		.core_note_type = NT_PPC_PKEY, .n = ELF_NPKEY,
656 		.size = sizeof(u64), .align = sizeof(u64),
657 		.active = pkey_active, .regset_get = pkey_get, .set = pkey_set
658 	},
659 #endif
660 };
661 
662 const struct user_regset_view user_ppc_native_view = {
663 	.name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
664 	.regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
665 };
666 
667 #include <linux/compat.h>
668 
669 int gpr32_get_common(struct task_struct *target,
670 		     const struct user_regset *regset,
671 		     struct membuf to, unsigned long *regs)
672 {
673 	int i;
674 
675 	for (i = 0; i < PT_MSR; i++)
676 		membuf_store(&to, (u32)regs[i]);
677 	membuf_store(&to, (u32)get_user_msr(target));
678 	for (i++ ; i < PT_REGS_COUNT; i++)
679 		membuf_store(&to, (u32)regs[i]);
680 	return membuf_zero(&to, (ELF_NGREG - PT_REGS_COUNT) * sizeof(u32));
681 }
682 
683 int gpr32_set_common(struct task_struct *target,
684 		     const struct user_regset *regset,
685 		     unsigned int pos, unsigned int count,
686 		     const void *kbuf, const void __user *ubuf,
687 		     unsigned long *regs)
688 {
689 	const compat_ulong_t *k = kbuf;
690 	const compat_ulong_t __user *u = ubuf;
691 	compat_ulong_t reg;
692 
693 	if (!kbuf && !user_read_access_begin(u, count))
694 		return -EFAULT;
695 
696 	pos /= sizeof(reg);
697 	count /= sizeof(reg);
698 
699 	if (kbuf)
700 		for (; count > 0 && pos < PT_MSR; --count)
701 			regs[pos++] = *k++;
702 	else
703 		for (; count > 0 && pos < PT_MSR; --count) {
704 			unsafe_get_user(reg, u++, Efault);
705 			regs[pos++] = reg;
706 		}
707 
708 
709 	if (count > 0 && pos == PT_MSR) {
710 		if (kbuf)
711 			reg = *k++;
712 		else
713 			unsafe_get_user(reg, u++, Efault);
714 		set_user_msr(target, reg);
715 		++pos;
716 		--count;
717 	}
718 
719 	if (kbuf) {
720 		for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
721 			regs[pos++] = *k++;
722 		for (; count > 0 && pos < PT_TRAP; --count, ++pos)
723 			++k;
724 	} else {
725 		for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
726 			unsafe_get_user(reg, u++, Efault);
727 			regs[pos++] = reg;
728 		}
729 		for (; count > 0 && pos < PT_TRAP; --count, ++pos)
730 			unsafe_get_user(reg, u++, Efault);
731 	}
732 
733 	if (count > 0 && pos == PT_TRAP) {
734 		if (kbuf)
735 			reg = *k++;
736 		else
737 			unsafe_get_user(reg, u++, Efault);
738 		set_user_trap(target, reg);
739 		++pos;
740 		--count;
741 	}
742 	if (!kbuf)
743 		user_read_access_end();
744 
745 	kbuf = k;
746 	ubuf = u;
747 	pos *= sizeof(reg);
748 	count *= sizeof(reg);
749 	user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
750 				  (PT_TRAP + 1) * sizeof(reg), -1);
751 	return 0;
752 
753 Efault:
754 	user_read_access_end();
755 	return -EFAULT;
756 }
757 
758 static int gpr32_get(struct task_struct *target,
759 		     const struct user_regset *regset,
760 		     struct membuf to)
761 {
762 	if (target->thread.regs == NULL)
763 		return -EIO;
764 
765 	return gpr32_get_common(target, regset, to,
766 			&target->thread.regs->gpr[0]);
767 }
768 
769 static int gpr32_set(struct task_struct *target,
770 		     const struct user_regset *regset,
771 		     unsigned int pos, unsigned int count,
772 		     const void *kbuf, const void __user *ubuf)
773 {
774 	if (target->thread.regs == NULL)
775 		return -EIO;
776 
777 	return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
778 			&target->thread.regs->gpr[0]);
779 }
780 
781 /*
782  * These are the regset flavors matching the CONFIG_PPC32 native set.
783  */
784 static const struct user_regset compat_regsets[] = {
785 	[REGSET_GPR] = {
786 		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
787 		.size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
788 		.regset_get = gpr32_get, .set = gpr32_set
789 	},
790 	[REGSET_FPR] = {
791 		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
792 		.size = sizeof(double), .align = sizeof(double),
793 		.regset_get = fpr_get, .set = fpr_set
794 	},
795 #ifdef CONFIG_ALTIVEC
796 	[REGSET_VMX] = {
797 		.core_note_type = NT_PPC_VMX, .n = 34,
798 		.size = sizeof(vector128), .align = sizeof(vector128),
799 		.active = vr_active, .regset_get = vr_get, .set = vr_set
800 	},
801 #endif
802 #ifdef CONFIG_SPE
803 	[REGSET_SPE] = {
804 		.core_note_type = NT_PPC_SPE, .n = 35,
805 		.size = sizeof(u32), .align = sizeof(u32),
806 		.active = evr_active, .regset_get = evr_get, .set = evr_set
807 	},
808 #endif
809 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
810 	[REGSET_TM_CGPR] = {
811 		.core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
812 		.size = sizeof(long), .align = sizeof(long),
813 		.active = tm_cgpr_active,
814 		.regset_get = tm_cgpr32_get, .set = tm_cgpr32_set
815 	},
816 	[REGSET_TM_CFPR] = {
817 		.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
818 		.size = sizeof(double), .align = sizeof(double),
819 		.active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set
820 	},
821 	[REGSET_TM_CVMX] = {
822 		.core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
823 		.size = sizeof(vector128), .align = sizeof(vector128),
824 		.active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set
825 	},
826 	[REGSET_TM_CVSX] = {
827 		.core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
828 		.size = sizeof(double), .align = sizeof(double),
829 		.active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set
830 	},
831 	[REGSET_TM_SPR] = {
832 		.core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
833 		.size = sizeof(u64), .align = sizeof(u64),
834 		.active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set
835 	},
836 	[REGSET_TM_CTAR] = {
837 		.core_note_type = NT_PPC_TM_CTAR, .n = 1,
838 		.size = sizeof(u64), .align = sizeof(u64),
839 		.active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set
840 	},
841 	[REGSET_TM_CPPR] = {
842 		.core_note_type = NT_PPC_TM_CPPR, .n = 1,
843 		.size = sizeof(u64), .align = sizeof(u64),
844 		.active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set
845 	},
846 	[REGSET_TM_CDSCR] = {
847 		.core_note_type = NT_PPC_TM_CDSCR, .n = 1,
848 		.size = sizeof(u64), .align = sizeof(u64),
849 		.active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set
850 	},
851 #endif
852 #ifdef CONFIG_PPC64
853 	[REGSET_PPR] = {
854 		.core_note_type = NT_PPC_PPR, .n = 1,
855 		.size = sizeof(u64), .align = sizeof(u64),
856 		.regset_get = ppr_get, .set = ppr_set
857 	},
858 	[REGSET_DSCR] = {
859 		.core_note_type = NT_PPC_DSCR, .n = 1,
860 		.size = sizeof(u64), .align = sizeof(u64),
861 		.regset_get = dscr_get, .set = dscr_set
862 	},
863 #endif
864 #ifdef CONFIG_PPC_BOOK3S_64
865 	[REGSET_TAR] = {
866 		.core_note_type = NT_PPC_TAR, .n = 1,
867 		.size = sizeof(u64), .align = sizeof(u64),
868 		.regset_get = tar_get, .set = tar_set
869 	},
870 	[REGSET_EBB] = {
871 		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
872 		.size = sizeof(u64), .align = sizeof(u64),
873 		.active = ebb_active, .regset_get = ebb_get, .set = ebb_set
874 	},
875 #endif
876 };
877 
878 static const struct user_regset_view user_ppc_compat_view = {
879 	.name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
880 	.regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
881 };
882 
883 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
884 {
885 	if (IS_ENABLED(CONFIG_COMPAT) && is_tsk_32bit_task(task))
886 		return &user_ppc_compat_view;
887 	return &user_ppc_native_view;
888 }
889