1 // SPDX-License-Identifier: GPL-2.0-or-later 2 3 #include <linux/regset.h> 4 #include <linux/elf.h> 5 #include <linux/nospec.h> 6 #include <linux/pkeys.h> 7 8 #include "ptrace-decl.h" 9 10 struct pt_regs_offset { 11 const char *name; 12 int offset; 13 }; 14 15 #define STR(s) #s /* convert to string */ 16 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)} 17 #define GPR_OFFSET_NAME(num) \ 18 {.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \ 19 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])} 20 #define REG_OFFSET_END {.name = NULL, .offset = 0} 21 22 static const struct pt_regs_offset regoffset_table[] = { 23 GPR_OFFSET_NAME(0), 24 GPR_OFFSET_NAME(1), 25 GPR_OFFSET_NAME(2), 26 GPR_OFFSET_NAME(3), 27 GPR_OFFSET_NAME(4), 28 GPR_OFFSET_NAME(5), 29 GPR_OFFSET_NAME(6), 30 GPR_OFFSET_NAME(7), 31 GPR_OFFSET_NAME(8), 32 GPR_OFFSET_NAME(9), 33 GPR_OFFSET_NAME(10), 34 GPR_OFFSET_NAME(11), 35 GPR_OFFSET_NAME(12), 36 GPR_OFFSET_NAME(13), 37 GPR_OFFSET_NAME(14), 38 GPR_OFFSET_NAME(15), 39 GPR_OFFSET_NAME(16), 40 GPR_OFFSET_NAME(17), 41 GPR_OFFSET_NAME(18), 42 GPR_OFFSET_NAME(19), 43 GPR_OFFSET_NAME(20), 44 GPR_OFFSET_NAME(21), 45 GPR_OFFSET_NAME(22), 46 GPR_OFFSET_NAME(23), 47 GPR_OFFSET_NAME(24), 48 GPR_OFFSET_NAME(25), 49 GPR_OFFSET_NAME(26), 50 GPR_OFFSET_NAME(27), 51 GPR_OFFSET_NAME(28), 52 GPR_OFFSET_NAME(29), 53 GPR_OFFSET_NAME(30), 54 GPR_OFFSET_NAME(31), 55 REG_OFFSET_NAME(nip), 56 REG_OFFSET_NAME(msr), 57 REG_OFFSET_NAME(ctr), 58 REG_OFFSET_NAME(link), 59 REG_OFFSET_NAME(xer), 60 REG_OFFSET_NAME(ccr), 61 #ifdef CONFIG_PPC64 62 REG_OFFSET_NAME(softe), 63 #else 64 REG_OFFSET_NAME(mq), 65 #endif 66 REG_OFFSET_NAME(trap), 67 REG_OFFSET_NAME(dar), 68 REG_OFFSET_NAME(dsisr), 69 REG_OFFSET_END, 70 }; 71 72 /** 73 * regs_query_register_offset() - query register offset from its name 74 * @name: the name of a register 75 * 76 * regs_query_register_offset() returns the offset of a register in struct 77 * pt_regs from its name. If the name is invalid, this returns -EINVAL; 78 */ 79 int regs_query_register_offset(const char *name) 80 { 81 const struct pt_regs_offset *roff; 82 for (roff = regoffset_table; roff->name != NULL; roff++) 83 if (!strcmp(roff->name, name)) 84 return roff->offset; 85 return -EINVAL; 86 } 87 88 /** 89 * regs_query_register_name() - query register name from its offset 90 * @offset: the offset of a register in struct pt_regs. 91 * 92 * regs_query_register_name() returns the name of a register from its 93 * offset in struct pt_regs. If the @offset is invalid, this returns NULL; 94 */ 95 const char *regs_query_register_name(unsigned int offset) 96 { 97 const struct pt_regs_offset *roff; 98 for (roff = regoffset_table; roff->name != NULL; roff++) 99 if (roff->offset == offset) 100 return roff->name; 101 return NULL; 102 } 103 104 /* 105 * does not yet catch signals sent when the child dies. 106 * in exit.c or in signal.c. 107 */ 108 109 static unsigned long get_user_msr(struct task_struct *task) 110 { 111 return task->thread.regs->msr | task->thread.fpexc_mode; 112 } 113 114 static int set_user_msr(struct task_struct *task, unsigned long msr) 115 { 116 task->thread.regs->msr &= ~MSR_DEBUGCHANGE; 117 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE; 118 return 0; 119 } 120 121 #ifdef CONFIG_PPC64 122 static int get_user_dscr(struct task_struct *task, unsigned long *data) 123 { 124 *data = task->thread.dscr; 125 return 0; 126 } 127 128 static int set_user_dscr(struct task_struct *task, unsigned long dscr) 129 { 130 task->thread.dscr = dscr; 131 task->thread.dscr_inherit = 1; 132 return 0; 133 } 134 #else 135 static int get_user_dscr(struct task_struct *task, unsigned long *data) 136 { 137 return -EIO; 138 } 139 140 static int set_user_dscr(struct task_struct *task, unsigned long dscr) 141 { 142 return -EIO; 143 } 144 #endif 145 146 /* 147 * We prevent mucking around with the reserved area of trap 148 * which are used internally by the kernel. 149 */ 150 static int set_user_trap(struct task_struct *task, unsigned long trap) 151 { 152 set_trap(task->thread.regs, trap); 153 return 0; 154 } 155 156 /* 157 * Get contents of register REGNO in task TASK. 158 */ 159 int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data) 160 { 161 unsigned int regs_max; 162 163 if (task->thread.regs == NULL || !data) 164 return -EIO; 165 166 if (regno == PT_MSR) { 167 *data = get_user_msr(task); 168 return 0; 169 } 170 171 if (regno == PT_DSCR) 172 return get_user_dscr(task, data); 173 174 /* 175 * softe copies paca->irq_soft_mask variable state. Since irq_soft_mask is 176 * no more used as a flag, lets force usr to alway see the softe value as 1 177 * which means interrupts are not soft disabled. 178 */ 179 if (IS_ENABLED(CONFIG_PPC64) && regno == PT_SOFTE) { 180 *data = 1; 181 return 0; 182 } 183 184 regs_max = sizeof(struct user_pt_regs) / sizeof(unsigned long); 185 if (regno < regs_max) { 186 regno = array_index_nospec(regno, regs_max); 187 *data = ((unsigned long *)task->thread.regs)[regno]; 188 return 0; 189 } 190 191 return -EIO; 192 } 193 194 /* 195 * Write contents of register REGNO in task TASK. 196 */ 197 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data) 198 { 199 if (task->thread.regs == NULL) 200 return -EIO; 201 202 if (regno == PT_MSR) 203 return set_user_msr(task, data); 204 if (regno == PT_TRAP) 205 return set_user_trap(task, data); 206 if (regno == PT_DSCR) 207 return set_user_dscr(task, data); 208 209 if (regno <= PT_MAX_PUT_REG) { 210 regno = array_index_nospec(regno, PT_MAX_PUT_REG + 1); 211 ((unsigned long *)task->thread.regs)[regno] = data; 212 return 0; 213 } 214 return -EIO; 215 } 216 217 static int gpr_get(struct task_struct *target, const struct user_regset *regset, 218 struct membuf to) 219 { 220 int i; 221 222 if (target->thread.regs == NULL) 223 return -EIO; 224 225 if (!FULL_REGS(target->thread.regs)) { 226 /* We have a partial register set. Fill 14-31 with bogus values */ 227 for (i = 14; i < 32; i++) 228 target->thread.regs->gpr[i] = NV_REG_POISON; 229 } 230 231 membuf_write(&to, target->thread.regs, offsetof(struct pt_regs, msr)); 232 membuf_store(&to, get_user_msr(target)); 233 234 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != 235 offsetof(struct pt_regs, msr) + sizeof(long)); 236 237 membuf_write(&to, &target->thread.regs->orig_gpr3, 238 sizeof(struct user_pt_regs) - 239 offsetof(struct pt_regs, orig_gpr3)); 240 return membuf_zero(&to, ELF_NGREG * sizeof(unsigned long) - 241 sizeof(struct user_pt_regs)); 242 } 243 244 static int gpr_set(struct task_struct *target, const struct user_regset *regset, 245 unsigned int pos, unsigned int count, const void *kbuf, 246 const void __user *ubuf) 247 { 248 unsigned long reg; 249 int ret; 250 251 if (target->thread.regs == NULL) 252 return -EIO; 253 254 CHECK_FULL_REGS(target->thread.regs); 255 256 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 257 target->thread.regs, 258 0, PT_MSR * sizeof(reg)); 259 260 if (!ret && count > 0) { 261 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, 262 PT_MSR * sizeof(reg), 263 (PT_MSR + 1) * sizeof(reg)); 264 if (!ret) 265 ret = set_user_msr(target, reg); 266 } 267 268 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) != 269 offsetof(struct pt_regs, msr) + sizeof(long)); 270 271 if (!ret) 272 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 273 &target->thread.regs->orig_gpr3, 274 PT_ORIG_R3 * sizeof(reg), 275 (PT_MAX_PUT_REG + 1) * sizeof(reg)); 276 277 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret) 278 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 279 (PT_MAX_PUT_REG + 1) * sizeof(reg), 280 PT_TRAP * sizeof(reg)); 281 282 if (!ret && count > 0) { 283 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®, 284 PT_TRAP * sizeof(reg), 285 (PT_TRAP + 1) * sizeof(reg)); 286 if (!ret) 287 ret = set_user_trap(target, reg); 288 } 289 290 if (!ret) 291 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 292 (PT_TRAP + 1) * sizeof(reg), -1); 293 294 return ret; 295 } 296 297 #ifdef CONFIG_PPC64 298 static int ppr_get(struct task_struct *target, const struct user_regset *regset, 299 struct membuf to) 300 { 301 return membuf_write(&to, &target->thread.regs->ppr, sizeof(u64)); 302 } 303 304 static int ppr_set(struct task_struct *target, const struct user_regset *regset, 305 unsigned int pos, unsigned int count, const void *kbuf, 306 const void __user *ubuf) 307 { 308 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 309 &target->thread.regs->ppr, 0, sizeof(u64)); 310 } 311 312 static int dscr_get(struct task_struct *target, const struct user_regset *regset, 313 struct membuf to) 314 { 315 return membuf_write(&to, &target->thread.dscr, sizeof(u64)); 316 } 317 static int dscr_set(struct task_struct *target, const struct user_regset *regset, 318 unsigned int pos, unsigned int count, const void *kbuf, 319 const void __user *ubuf) 320 { 321 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 322 &target->thread.dscr, 0, sizeof(u64)); 323 } 324 #endif 325 #ifdef CONFIG_PPC_BOOK3S_64 326 static int tar_get(struct task_struct *target, const struct user_regset *regset, 327 struct membuf to) 328 { 329 return membuf_write(&to, &target->thread.tar, sizeof(u64)); 330 } 331 static int tar_set(struct task_struct *target, const struct user_regset *regset, 332 unsigned int pos, unsigned int count, const void *kbuf, 333 const void __user *ubuf) 334 { 335 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 336 &target->thread.tar, 0, sizeof(u64)); 337 } 338 339 static int ebb_active(struct task_struct *target, const struct user_regset *regset) 340 { 341 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 342 return -ENODEV; 343 344 if (target->thread.used_ebb) 345 return regset->n; 346 347 return 0; 348 } 349 350 static int ebb_get(struct task_struct *target, const struct user_regset *regset, 351 struct membuf to) 352 { 353 /* Build tests */ 354 BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr)); 355 BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr)); 356 357 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 358 return -ENODEV; 359 360 if (!target->thread.used_ebb) 361 return -ENODATA; 362 363 return membuf_write(&to, &target->thread.ebbrr, 3 * sizeof(unsigned long)); 364 } 365 366 static int ebb_set(struct task_struct *target, const struct user_regset *regset, 367 unsigned int pos, unsigned int count, const void *kbuf, 368 const void __user *ubuf) 369 { 370 int ret = 0; 371 372 /* Build tests */ 373 BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr)); 374 BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr)); 375 376 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 377 return -ENODEV; 378 379 if (target->thread.used_ebb) 380 return -ENODATA; 381 382 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.ebbrr, 383 0, sizeof(unsigned long)); 384 385 if (!ret) 386 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 387 &target->thread.ebbhr, sizeof(unsigned long), 388 2 * sizeof(unsigned long)); 389 390 if (!ret) 391 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 392 &target->thread.bescr, 2 * sizeof(unsigned long), 393 3 * sizeof(unsigned long)); 394 395 return ret; 396 } 397 static int pmu_active(struct task_struct *target, const struct user_regset *regset) 398 { 399 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 400 return -ENODEV; 401 402 return regset->n; 403 } 404 405 static int pmu_get(struct task_struct *target, const struct user_regset *regset, 406 struct membuf to) 407 { 408 /* Build tests */ 409 BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar)); 410 BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier)); 411 BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2)); 412 BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0)); 413 414 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 415 return -ENODEV; 416 417 return membuf_write(&to, &target->thread.siar, 5 * sizeof(unsigned long)); 418 } 419 420 static int pmu_set(struct task_struct *target, const struct user_regset *regset, 421 unsigned int pos, unsigned int count, const void *kbuf, 422 const void __user *ubuf) 423 { 424 int ret = 0; 425 426 /* Build tests */ 427 BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar)); 428 BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier)); 429 BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2)); 430 BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0)); 431 432 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 433 return -ENODEV; 434 435 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.siar, 436 0, sizeof(unsigned long)); 437 438 if (!ret) 439 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 440 &target->thread.sdar, sizeof(unsigned long), 441 2 * sizeof(unsigned long)); 442 443 if (!ret) 444 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 445 &target->thread.sier, 2 * sizeof(unsigned long), 446 3 * sizeof(unsigned long)); 447 448 if (!ret) 449 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 450 &target->thread.mmcr2, 3 * sizeof(unsigned long), 451 4 * sizeof(unsigned long)); 452 453 if (!ret) 454 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 455 &target->thread.mmcr0, 4 * sizeof(unsigned long), 456 5 * sizeof(unsigned long)); 457 return ret; 458 } 459 #endif 460 461 #ifdef CONFIG_PPC_MEM_KEYS 462 static int pkey_active(struct task_struct *target, const struct user_regset *regset) 463 { 464 if (!arch_pkeys_enabled()) 465 return -ENODEV; 466 467 return regset->n; 468 } 469 470 static int pkey_get(struct task_struct *target, const struct user_regset *regset, 471 struct membuf to) 472 { 473 BUILD_BUG_ON(TSO(amr) + sizeof(unsigned long) != TSO(iamr)); 474 BUILD_BUG_ON(TSO(iamr) + sizeof(unsigned long) != TSO(uamor)); 475 476 if (!arch_pkeys_enabled()) 477 return -ENODEV; 478 479 return membuf_write(&to, &target->thread.amr, ELF_NPKEY * sizeof(unsigned long)); 480 } 481 482 static int pkey_set(struct task_struct *target, const struct user_regset *regset, 483 unsigned int pos, unsigned int count, const void *kbuf, 484 const void __user *ubuf) 485 { 486 u64 new_amr; 487 int ret; 488 489 if (!arch_pkeys_enabled()) 490 return -ENODEV; 491 492 /* Only the AMR can be set from userspace */ 493 if (pos != 0 || count != sizeof(new_amr)) 494 return -EINVAL; 495 496 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 497 &new_amr, 0, sizeof(new_amr)); 498 if (ret) 499 return ret; 500 501 /* UAMOR determines which bits of the AMR can be set from userspace. */ 502 target->thread.amr = (new_amr & target->thread.uamor) | 503 (target->thread.amr & ~target->thread.uamor); 504 505 return 0; 506 } 507 #endif /* CONFIG_PPC_MEM_KEYS */ 508 509 static const struct user_regset native_regsets[] = { 510 [REGSET_GPR] = { 511 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG, 512 .size = sizeof(long), .align = sizeof(long), 513 .regset_get = gpr_get, .set = gpr_set 514 }, 515 [REGSET_FPR] = { 516 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG, 517 .size = sizeof(double), .align = sizeof(double), 518 .regset_get = fpr_get, .set = fpr_set 519 }, 520 #ifdef CONFIG_ALTIVEC 521 [REGSET_VMX] = { 522 .core_note_type = NT_PPC_VMX, .n = 34, 523 .size = sizeof(vector128), .align = sizeof(vector128), 524 .active = vr_active, .regset_get = vr_get, .set = vr_set 525 }, 526 #endif 527 #ifdef CONFIG_VSX 528 [REGSET_VSX] = { 529 .core_note_type = NT_PPC_VSX, .n = 32, 530 .size = sizeof(double), .align = sizeof(double), 531 .active = vsr_active, .regset_get = vsr_get, .set = vsr_set 532 }, 533 #endif 534 #ifdef CONFIG_SPE 535 [REGSET_SPE] = { 536 .core_note_type = NT_PPC_SPE, .n = 35, 537 .size = sizeof(u32), .align = sizeof(u32), 538 .active = evr_active, .regset_get = evr_get, .set = evr_set 539 }, 540 #endif 541 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 542 [REGSET_TM_CGPR] = { 543 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG, 544 .size = sizeof(long), .align = sizeof(long), 545 .active = tm_cgpr_active, .regset_get = tm_cgpr_get, .set = tm_cgpr_set 546 }, 547 [REGSET_TM_CFPR] = { 548 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG, 549 .size = sizeof(double), .align = sizeof(double), 550 .active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set 551 }, 552 [REGSET_TM_CVMX] = { 553 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX, 554 .size = sizeof(vector128), .align = sizeof(vector128), 555 .active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set 556 }, 557 [REGSET_TM_CVSX] = { 558 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX, 559 .size = sizeof(double), .align = sizeof(double), 560 .active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set 561 }, 562 [REGSET_TM_SPR] = { 563 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG, 564 .size = sizeof(u64), .align = sizeof(u64), 565 .active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set 566 }, 567 [REGSET_TM_CTAR] = { 568 .core_note_type = NT_PPC_TM_CTAR, .n = 1, 569 .size = sizeof(u64), .align = sizeof(u64), 570 .active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set 571 }, 572 [REGSET_TM_CPPR] = { 573 .core_note_type = NT_PPC_TM_CPPR, .n = 1, 574 .size = sizeof(u64), .align = sizeof(u64), 575 .active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set 576 }, 577 [REGSET_TM_CDSCR] = { 578 .core_note_type = NT_PPC_TM_CDSCR, .n = 1, 579 .size = sizeof(u64), .align = sizeof(u64), 580 .active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set 581 }, 582 #endif 583 #ifdef CONFIG_PPC64 584 [REGSET_PPR] = { 585 .core_note_type = NT_PPC_PPR, .n = 1, 586 .size = sizeof(u64), .align = sizeof(u64), 587 .regset_get = ppr_get, .set = ppr_set 588 }, 589 [REGSET_DSCR] = { 590 .core_note_type = NT_PPC_DSCR, .n = 1, 591 .size = sizeof(u64), .align = sizeof(u64), 592 .regset_get = dscr_get, .set = dscr_set 593 }, 594 #endif 595 #ifdef CONFIG_PPC_BOOK3S_64 596 [REGSET_TAR] = { 597 .core_note_type = NT_PPC_TAR, .n = 1, 598 .size = sizeof(u64), .align = sizeof(u64), 599 .regset_get = tar_get, .set = tar_set 600 }, 601 [REGSET_EBB] = { 602 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB, 603 .size = sizeof(u64), .align = sizeof(u64), 604 .active = ebb_active, .regset_get = ebb_get, .set = ebb_set 605 }, 606 [REGSET_PMR] = { 607 .core_note_type = NT_PPC_PMU, .n = ELF_NPMU, 608 .size = sizeof(u64), .align = sizeof(u64), 609 .active = pmu_active, .regset_get = pmu_get, .set = pmu_set 610 }, 611 #endif 612 #ifdef CONFIG_PPC_MEM_KEYS 613 [REGSET_PKEY] = { 614 .core_note_type = NT_PPC_PKEY, .n = ELF_NPKEY, 615 .size = sizeof(u64), .align = sizeof(u64), 616 .active = pkey_active, .regset_get = pkey_get, .set = pkey_set 617 }, 618 #endif 619 }; 620 621 const struct user_regset_view user_ppc_native_view = { 622 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI, 623 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets) 624 }; 625 626 #include <linux/compat.h> 627 628 int gpr32_get_common(struct task_struct *target, 629 const struct user_regset *regset, 630 struct membuf to, unsigned long *regs) 631 { 632 int i; 633 634 for (i = 0; i < PT_MSR; i++) 635 membuf_store(&to, (u32)regs[i]); 636 membuf_store(&to, (u32)get_user_msr(target)); 637 for (i++ ; i < PT_REGS_COUNT; i++) 638 membuf_store(&to, (u32)regs[i]); 639 return membuf_zero(&to, (ELF_NGREG - PT_REGS_COUNT) * sizeof(u32)); 640 } 641 642 int gpr32_set_common(struct task_struct *target, 643 const struct user_regset *regset, 644 unsigned int pos, unsigned int count, 645 const void *kbuf, const void __user *ubuf, 646 unsigned long *regs) 647 { 648 const compat_ulong_t *k = kbuf; 649 const compat_ulong_t __user *u = ubuf; 650 compat_ulong_t reg; 651 652 pos /= sizeof(reg); 653 count /= sizeof(reg); 654 655 if (kbuf) 656 for (; count > 0 && pos < PT_MSR; --count) 657 regs[pos++] = *k++; 658 else 659 for (; count > 0 && pos < PT_MSR; --count) { 660 if (__get_user(reg, u++)) 661 return -EFAULT; 662 regs[pos++] = reg; 663 } 664 665 666 if (count > 0 && pos == PT_MSR) { 667 if (kbuf) 668 reg = *k++; 669 else if (__get_user(reg, u++)) 670 return -EFAULT; 671 set_user_msr(target, reg); 672 ++pos; 673 --count; 674 } 675 676 if (kbuf) { 677 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) 678 regs[pos++] = *k++; 679 for (; count > 0 && pos < PT_TRAP; --count, ++pos) 680 ++k; 681 } else { 682 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) { 683 if (__get_user(reg, u++)) 684 return -EFAULT; 685 regs[pos++] = reg; 686 } 687 for (; count > 0 && pos < PT_TRAP; --count, ++pos) 688 if (__get_user(reg, u++)) 689 return -EFAULT; 690 } 691 692 if (count > 0 && pos == PT_TRAP) { 693 if (kbuf) 694 reg = *k++; 695 else if (__get_user(reg, u++)) 696 return -EFAULT; 697 set_user_trap(target, reg); 698 ++pos; 699 --count; 700 } 701 702 kbuf = k; 703 ubuf = u; 704 pos *= sizeof(reg); 705 count *= sizeof(reg); 706 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 707 (PT_TRAP + 1) * sizeof(reg), -1); 708 } 709 710 static int gpr32_get(struct task_struct *target, 711 const struct user_regset *regset, 712 struct membuf to) 713 { 714 int i; 715 716 if (target->thread.regs == NULL) 717 return -EIO; 718 719 if (!FULL_REGS(target->thread.regs)) { 720 /* 721 * We have a partial register set. 722 * Fill 14-31 with bogus values. 723 */ 724 for (i = 14; i < 32; i++) 725 target->thread.regs->gpr[i] = NV_REG_POISON; 726 } 727 return gpr32_get_common(target, regset, to, 728 &target->thread.regs->gpr[0]); 729 } 730 731 static int gpr32_set(struct task_struct *target, 732 const struct user_regset *regset, 733 unsigned int pos, unsigned int count, 734 const void *kbuf, const void __user *ubuf) 735 { 736 if (target->thread.regs == NULL) 737 return -EIO; 738 739 CHECK_FULL_REGS(target->thread.regs); 740 return gpr32_set_common(target, regset, pos, count, kbuf, ubuf, 741 &target->thread.regs->gpr[0]); 742 } 743 744 /* 745 * These are the regset flavors matching the CONFIG_PPC32 native set. 746 */ 747 static const struct user_regset compat_regsets[] = { 748 [REGSET_GPR] = { 749 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG, 750 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t), 751 .regset_get = gpr32_get, .set = gpr32_set 752 }, 753 [REGSET_FPR] = { 754 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG, 755 .size = sizeof(double), .align = sizeof(double), 756 .regset_get = fpr_get, .set = fpr_set 757 }, 758 #ifdef CONFIG_ALTIVEC 759 [REGSET_VMX] = { 760 .core_note_type = NT_PPC_VMX, .n = 34, 761 .size = sizeof(vector128), .align = sizeof(vector128), 762 .active = vr_active, .regset_get = vr_get, .set = vr_set 763 }, 764 #endif 765 #ifdef CONFIG_SPE 766 [REGSET_SPE] = { 767 .core_note_type = NT_PPC_SPE, .n = 35, 768 .size = sizeof(u32), .align = sizeof(u32), 769 .active = evr_active, .regset_get = evr_get, .set = evr_set 770 }, 771 #endif 772 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 773 [REGSET_TM_CGPR] = { 774 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG, 775 .size = sizeof(long), .align = sizeof(long), 776 .active = tm_cgpr_active, 777 .regset_get = tm_cgpr32_get, .set = tm_cgpr32_set 778 }, 779 [REGSET_TM_CFPR] = { 780 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG, 781 .size = sizeof(double), .align = sizeof(double), 782 .active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set 783 }, 784 [REGSET_TM_CVMX] = { 785 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX, 786 .size = sizeof(vector128), .align = sizeof(vector128), 787 .active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set 788 }, 789 [REGSET_TM_CVSX] = { 790 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX, 791 .size = sizeof(double), .align = sizeof(double), 792 .active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set 793 }, 794 [REGSET_TM_SPR] = { 795 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG, 796 .size = sizeof(u64), .align = sizeof(u64), 797 .active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set 798 }, 799 [REGSET_TM_CTAR] = { 800 .core_note_type = NT_PPC_TM_CTAR, .n = 1, 801 .size = sizeof(u64), .align = sizeof(u64), 802 .active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set 803 }, 804 [REGSET_TM_CPPR] = { 805 .core_note_type = NT_PPC_TM_CPPR, .n = 1, 806 .size = sizeof(u64), .align = sizeof(u64), 807 .active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set 808 }, 809 [REGSET_TM_CDSCR] = { 810 .core_note_type = NT_PPC_TM_CDSCR, .n = 1, 811 .size = sizeof(u64), .align = sizeof(u64), 812 .active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set 813 }, 814 #endif 815 #ifdef CONFIG_PPC64 816 [REGSET_PPR] = { 817 .core_note_type = NT_PPC_PPR, .n = 1, 818 .size = sizeof(u64), .align = sizeof(u64), 819 .regset_get = ppr_get, .set = ppr_set 820 }, 821 [REGSET_DSCR] = { 822 .core_note_type = NT_PPC_DSCR, .n = 1, 823 .size = sizeof(u64), .align = sizeof(u64), 824 .regset_get = dscr_get, .set = dscr_set 825 }, 826 #endif 827 #ifdef CONFIG_PPC_BOOK3S_64 828 [REGSET_TAR] = { 829 .core_note_type = NT_PPC_TAR, .n = 1, 830 .size = sizeof(u64), .align = sizeof(u64), 831 .regset_get = tar_get, .set = tar_set 832 }, 833 [REGSET_EBB] = { 834 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB, 835 .size = sizeof(u64), .align = sizeof(u64), 836 .active = ebb_active, .regset_get = ebb_get, .set = ebb_set 837 }, 838 #endif 839 }; 840 841 static const struct user_regset_view user_ppc_compat_view = { 842 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI, 843 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets) 844 }; 845 846 const struct user_regset_view *task_user_regset_view(struct task_struct *task) 847 { 848 if (IS_ENABLED(CONFIG_PPC64) && test_tsk_thread_flag(task, TIF_32BIT)) 849 return &user_ppc_compat_view; 850 return &user_ppc_native_view; 851 } 852