xref: /openbmc/linux/arch/powerpc/kernel/pci-common.c (revision 96de0e252cedffad61b3cb5e05662c591898e69a)
1 /*
2  * Contains common pci routines for ALL ppc platform
3  * (based on pci_32.c and pci_64.c)
4  *
5  * Port for PPC64 David Engebretsen, IBM Corp.
6  * Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
7  *
8  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
9  *   Rework, based on alpha PCI code.
10  *
11  * Common pmac/prep/chrp pci routines. -- Cort
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version
16  * 2 of the License, or (at your option) any later version.
17  */
18 
19 #undef DEBUG
20 
21 #include <linux/kernel.h>
22 #include <linux/pci.h>
23 #include <linux/string.h>
24 #include <linux/init.h>
25 #include <linux/bootmem.h>
26 #include <linux/mm.h>
27 #include <linux/list.h>
28 #include <linux/syscalls.h>
29 #include <linux/irq.h>
30 #include <linux/vmalloc.h>
31 
32 #include <asm/processor.h>
33 #include <asm/io.h>
34 #include <asm/prom.h>
35 #include <asm/pci-bridge.h>
36 #include <asm/byteorder.h>
37 #include <asm/machdep.h>
38 #include <asm/ppc-pci.h>
39 #include <asm/firmware.h>
40 
41 #ifdef DEBUG
42 #include <asm/udbg.h>
43 #define DBG(fmt...) printk(fmt)
44 #else
45 #define DBG(fmt...)
46 #endif
47 
48 static DEFINE_SPINLOCK(hose_spinlock);
49 
50 /* XXX kill that some day ... */
51 int global_phb_number;		/* Global phb counter */
52 
53 extern struct list_head hose_list;
54 
55 /*
56  * pci_controller(phb) initialized common variables.
57  */
58 static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
59 {
60 	memset(hose, 0, sizeof(struct pci_controller));
61 
62 	spin_lock(&hose_spinlock);
63 	hose->global_number = global_phb_number++;
64 	list_add_tail(&hose->list_node, &hose_list);
65 	spin_unlock(&hose_spinlock);
66 }
67 
68 struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
69 {
70 	struct pci_controller *phb;
71 
72 	phb = alloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
73 	if (phb == NULL)
74 		return NULL;
75 	pci_setup_pci_controller(phb);
76 	phb->arch_data = dev;
77 	phb->is_dynamic = mem_init_done;
78 #ifdef CONFIG_PPC64
79 	if (dev) {
80 		int nid = of_node_to_nid(dev);
81 
82 		if (nid < 0 || !node_online(nid))
83 			nid = -1;
84 
85 		PHB_SET_NODE(phb, nid);
86 	}
87 #endif
88 	return phb;
89 }
90 
91 void pcibios_free_controller(struct pci_controller *phb)
92 {
93 	spin_lock(&hose_spinlock);
94 	list_del(&phb->list_node);
95 	spin_unlock(&hose_spinlock);
96 
97 	if (phb->is_dynamic)
98 		kfree(phb);
99 }
100 
101 int pcibios_vaddr_is_ioport(void __iomem *address)
102 {
103 	int ret = 0;
104 	struct pci_controller *hose;
105 	unsigned long size;
106 
107 	spin_lock(&hose_spinlock);
108 	list_for_each_entry(hose, &hose_list, list_node) {
109 #ifdef CONFIG_PPC64
110 		size = hose->pci_io_size;
111 #else
112 		size = hose->io_resource.end - hose->io_resource.start + 1;
113 #endif
114 		if (address >= hose->io_base_virt &&
115 		    address < (hose->io_base_virt + size)) {
116 			ret = 1;
117 			break;
118 		}
119 	}
120 	spin_unlock(&hose_spinlock);
121 	return ret;
122 }
123 
124 /*
125  * Return the domain number for this bus.
126  */
127 int pci_domain_nr(struct pci_bus *bus)
128 {
129 	if (firmware_has_feature(FW_FEATURE_ISERIES))
130 		return 0;
131 	else {
132 		struct pci_controller *hose = pci_bus_to_host(bus);
133 
134 		return hose->global_number;
135 	}
136 }
137 
138 EXPORT_SYMBOL(pci_domain_nr);
139 
140 #ifdef CONFIG_PPC_OF
141 
142 /* This routine is meant to be used early during boot, when the
143  * PCI bus numbers have not yet been assigned, and you need to
144  * issue PCI config cycles to an OF device.
145  * It could also be used to "fix" RTAS config cycles if you want
146  * to set pci_assign_all_buses to 1 and still use RTAS for PCI
147  * config cycles.
148  */
149 struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
150 {
151 	if (!have_of)
152 		return NULL;
153 	while(node) {
154 		struct pci_controller *hose, *tmp;
155 		list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
156 			if (hose->arch_data == node)
157 				return hose;
158 		node = node->parent;
159 	}
160 	return NULL;
161 }
162 
163 static ssize_t pci_show_devspec(struct device *dev,
164 		struct device_attribute *attr, char *buf)
165 {
166 	struct pci_dev *pdev;
167 	struct device_node *np;
168 
169 	pdev = to_pci_dev (dev);
170 	np = pci_device_to_OF_node(pdev);
171 	if (np == NULL || np->full_name == NULL)
172 		return 0;
173 	return sprintf(buf, "%s", np->full_name);
174 }
175 static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
176 #endif /* CONFIG_PPC_OF */
177 
178 /* Add sysfs properties */
179 int pcibios_add_platform_entries(struct pci_dev *pdev)
180 {
181 #ifdef CONFIG_PPC_OF
182 	return device_create_file(&pdev->dev, &dev_attr_devspec);
183 #else
184 	return 0;
185 #endif /* CONFIG_PPC_OF */
186 
187 }
188 
189 char __devinit *pcibios_setup(char *str)
190 {
191 	return str;
192 }
193 
194 /*
195  * Reads the interrupt pin to determine if interrupt is use by card.
196  * If the interrupt is used, then gets the interrupt line from the
197  * openfirmware and sets it in the pci_dev and pci_config line.
198  */
199 int pci_read_irq_line(struct pci_dev *pci_dev)
200 {
201 	struct of_irq oirq;
202 	unsigned int virq;
203 
204 	DBG("Try to map irq for %s...\n", pci_name(pci_dev));
205 
206 #ifdef DEBUG
207 	memset(&oirq, 0xff, sizeof(oirq));
208 #endif
209 	/* Try to get a mapping from the device-tree */
210 	if (of_irq_map_pci(pci_dev, &oirq)) {
211 		u8 line, pin;
212 
213 		/* If that fails, lets fallback to what is in the config
214 		 * space and map that through the default controller. We
215 		 * also set the type to level low since that's what PCI
216 		 * interrupts are. If your platform does differently, then
217 		 * either provide a proper interrupt tree or don't use this
218 		 * function.
219 		 */
220 		if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
221 			return -1;
222 		if (pin == 0)
223 			return -1;
224 		if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
225 		    line == 0xff) {
226 			return -1;
227 		}
228 		DBG(" -> no map ! Using irq line %d from PCI config\n", line);
229 
230 		virq = irq_create_mapping(NULL, line);
231 		if (virq != NO_IRQ)
232 			set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
233 	} else {
234 		DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
235 		    oirq.size, oirq.specifier[0], oirq.specifier[1],
236 		    oirq.controller->full_name);
237 
238 		virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
239 					     oirq.size);
240 	}
241 	if(virq == NO_IRQ) {
242 		DBG(" -> failed to map !\n");
243 		return -1;
244 	}
245 
246 	DBG(" -> mapped to linux irq %d\n", virq);
247 
248 	pci_dev->irq = virq;
249 
250 	return 0;
251 }
252 EXPORT_SYMBOL(pci_read_irq_line);
253 
254 /*
255  * Platform support for /proc/bus/pci/X/Y mmap()s,
256  * modelled on the sparc64 implementation by Dave Miller.
257  *  -- paulus.
258  */
259 
260 /*
261  * Adjust vm_pgoff of VMA such that it is the physical page offset
262  * corresponding to the 32-bit pci bus offset for DEV requested by the user.
263  *
264  * Basically, the user finds the base address for his device which he wishes
265  * to mmap.  They read the 32-bit value from the config space base register,
266  * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
267  * offset parameter of mmap on /proc/bus/pci/XXX for that device.
268  *
269  * Returns negative error code on failure, zero on success.
270  */
271 static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
272 					       resource_size_t *offset,
273 					       enum pci_mmap_state mmap_state)
274 {
275 	struct pci_controller *hose = pci_bus_to_host(dev->bus);
276 	unsigned long io_offset = 0;
277 	int i, res_bit;
278 
279 	if (hose == 0)
280 		return NULL;		/* should never happen */
281 
282 	/* If memory, add on the PCI bridge address offset */
283 	if (mmap_state == pci_mmap_mem) {
284 #if 0 /* See comment in pci_resource_to_user() for why this is disabled */
285 		*offset += hose->pci_mem_offset;
286 #endif
287 		res_bit = IORESOURCE_MEM;
288 	} else {
289 		io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
290 		*offset += io_offset;
291 		res_bit = IORESOURCE_IO;
292 	}
293 
294 	/*
295 	 * Check that the offset requested corresponds to one of the
296 	 * resources of the device.
297 	 */
298 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
299 		struct resource *rp = &dev->resource[i];
300 		int flags = rp->flags;
301 
302 		/* treat ROM as memory (should be already) */
303 		if (i == PCI_ROM_RESOURCE)
304 			flags |= IORESOURCE_MEM;
305 
306 		/* Active and same type? */
307 		if ((flags & res_bit) == 0)
308 			continue;
309 
310 		/* In the range of this resource? */
311 		if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
312 			continue;
313 
314 		/* found it! construct the final physical address */
315 		if (mmap_state == pci_mmap_io)
316 			*offset += hose->io_base_phys - io_offset;
317 		return rp;
318 	}
319 
320 	return NULL;
321 }
322 
323 /*
324  * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
325  * device mapping.
326  */
327 static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
328 				      pgprot_t protection,
329 				      enum pci_mmap_state mmap_state,
330 				      int write_combine)
331 {
332 	unsigned long prot = pgprot_val(protection);
333 
334 	/* Write combine is always 0 on non-memory space mappings. On
335 	 * memory space, if the user didn't pass 1, we check for a
336 	 * "prefetchable" resource. This is a bit hackish, but we use
337 	 * this to workaround the inability of /sysfs to provide a write
338 	 * combine bit
339 	 */
340 	if (mmap_state != pci_mmap_mem)
341 		write_combine = 0;
342 	else if (write_combine == 0) {
343 		if (rp->flags & IORESOURCE_PREFETCH)
344 			write_combine = 1;
345 	}
346 
347 	/* XXX would be nice to have a way to ask for write-through */
348 	prot |= _PAGE_NO_CACHE;
349 	if (write_combine)
350 		prot &= ~_PAGE_GUARDED;
351 	else
352 		prot |= _PAGE_GUARDED;
353 
354 	return __pgprot(prot);
355 }
356 
357 /*
358  * This one is used by /dev/mem and fbdev who have no clue about the
359  * PCI device, it tries to find the PCI device first and calls the
360  * above routine
361  */
362 pgprot_t pci_phys_mem_access_prot(struct file *file,
363 				  unsigned long pfn,
364 				  unsigned long size,
365 				  pgprot_t protection)
366 {
367 	struct pci_dev *pdev = NULL;
368 	struct resource *found = NULL;
369 	unsigned long prot = pgprot_val(protection);
370 	unsigned long offset = pfn << PAGE_SHIFT;
371 	int i;
372 
373 	if (page_is_ram(pfn))
374 		return __pgprot(prot);
375 
376 	prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
377 
378 	for_each_pci_dev(pdev) {
379 		for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
380 			struct resource *rp = &pdev->resource[i];
381 			int flags = rp->flags;
382 
383 			/* Active and same type? */
384 			if ((flags & IORESOURCE_MEM) == 0)
385 				continue;
386 			/* In the range of this resource? */
387 			if (offset < (rp->start & PAGE_MASK) ||
388 			    offset > rp->end)
389 				continue;
390 			found = rp;
391 			break;
392 		}
393 		if (found)
394 			break;
395 	}
396 	if (found) {
397 		if (found->flags & IORESOURCE_PREFETCH)
398 			prot &= ~_PAGE_GUARDED;
399 		pci_dev_put(pdev);
400 	}
401 
402 	DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
403 
404 	return __pgprot(prot);
405 }
406 
407 
408 /*
409  * Perform the actual remap of the pages for a PCI device mapping, as
410  * appropriate for this architecture.  The region in the process to map
411  * is described by vm_start and vm_end members of VMA, the base physical
412  * address is found in vm_pgoff.
413  * The pci device structure is provided so that architectures may make mapping
414  * decisions on a per-device or per-bus basis.
415  *
416  * Returns a negative error code on failure, zero on success.
417  */
418 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
419 			enum pci_mmap_state mmap_state, int write_combine)
420 {
421 	resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
422 	struct resource *rp;
423 	int ret;
424 
425 	rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
426 	if (rp == NULL)
427 		return -EINVAL;
428 
429 	vma->vm_pgoff = offset >> PAGE_SHIFT;
430 	vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
431 						  vma->vm_page_prot,
432 						  mmap_state, write_combine);
433 
434 	ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
435 			       vma->vm_end - vma->vm_start, vma->vm_page_prot);
436 
437 	return ret;
438 }
439 
440 void pci_resource_to_user(const struct pci_dev *dev, int bar,
441 			  const struct resource *rsrc,
442 			  resource_size_t *start, resource_size_t *end)
443 {
444 	struct pci_controller *hose = pci_bus_to_host(dev->bus);
445 	resource_size_t offset = 0;
446 
447 	if (hose == NULL)
448 		return;
449 
450 	if (rsrc->flags & IORESOURCE_IO)
451 		offset = (unsigned long)hose->io_base_virt - _IO_BASE;
452 
453 	/* We pass a fully fixed up address to userland for MMIO instead of
454 	 * a BAR value because X is lame and expects to be able to use that
455 	 * to pass to /dev/mem !
456 	 *
457 	 * That means that we'll have potentially 64 bits values where some
458 	 * userland apps only expect 32 (like X itself since it thinks only
459 	 * Sparc has 64 bits MMIO) but if we don't do that, we break it on
460 	 * 32 bits CHRPs :-(
461 	 *
462 	 * Hopefully, the sysfs insterface is immune to that gunk. Once X
463 	 * has been fixed (and the fix spread enough), we can re-enable the
464 	 * 2 lines below and pass down a BAR value to userland. In that case
465 	 * we'll also have to re-enable the matching code in
466 	 * __pci_mmap_make_offset().
467 	 *
468 	 * BenH.
469 	 */
470 #if 0
471 	else if (rsrc->flags & IORESOURCE_MEM)
472 		offset = hose->pci_mem_offset;
473 #endif
474 
475 	*start = rsrc->start - offset;
476 	*end = rsrc->end - offset;
477 }
478