1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 23 struct cpu_spec* cur_cpu_spec = NULL; 24 EXPORT_SYMBOL(cur_cpu_spec); 25 26 /* NOTE: 27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 28 * the responsibility of the appropriate CPU save/restore functions to 29 * eventually copy these settings over. Those save/restore aren't yet 30 * part of the cputable though. That has to be fixed for both ppc32 31 * and ppc64 32 */ 33 #ifdef CONFIG_PPC32 34 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 35 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 36 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 37 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 38 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 45 #endif /* CONFIG_PPC32 */ 46 #ifdef CONFIG_PPC64 47 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 50 extern void __restore_cpu_pa6t(void); 51 extern void __restore_cpu_ppc970(void); 52 #endif /* CONFIG_PPC64 */ 53 54 /* This table only contains "desktop" CPUs, it need to be filled with embedded 55 * ones as well... 56 */ 57 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 58 PPC_FEATURE_HAS_MMU) 59 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 60 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 61 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 62 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 63 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 64 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 65 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 66 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 67 PPC_FEATURE_TRUE_LE) 68 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 69 PPC_FEATURE_TRUE_LE | \ 70 PPC_FEATURE_HAS_ALTIVEC_COMP) 71 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 72 PPC_FEATURE_BOOKE) 73 74 static struct cpu_spec __initdata cpu_specs[] = { 75 #ifdef CONFIG_PPC64 76 { /* Power3 */ 77 .pvr_mask = 0xffff0000, 78 .pvr_value = 0x00400000, 79 .cpu_name = "POWER3 (630)", 80 .cpu_features = CPU_FTRS_POWER3, 81 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 82 .icache_bsize = 128, 83 .dcache_bsize = 128, 84 .num_pmcs = 8, 85 .pmc_type = PPC_PMC_IBM, 86 .oprofile_cpu_type = "ppc64/power3", 87 .oprofile_type = PPC_OPROFILE_RS64, 88 .platform = "power3", 89 }, 90 { /* Power3+ */ 91 .pvr_mask = 0xffff0000, 92 .pvr_value = 0x00410000, 93 .cpu_name = "POWER3 (630+)", 94 .cpu_features = CPU_FTRS_POWER3, 95 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 96 .icache_bsize = 128, 97 .dcache_bsize = 128, 98 .num_pmcs = 8, 99 .pmc_type = PPC_PMC_IBM, 100 .oprofile_cpu_type = "ppc64/power3", 101 .oprofile_type = PPC_OPROFILE_RS64, 102 .platform = "power3", 103 }, 104 { /* Northstar */ 105 .pvr_mask = 0xffff0000, 106 .pvr_value = 0x00330000, 107 .cpu_name = "RS64-II (northstar)", 108 .cpu_features = CPU_FTRS_RS64, 109 .cpu_user_features = COMMON_USER_PPC64, 110 .icache_bsize = 128, 111 .dcache_bsize = 128, 112 .num_pmcs = 8, 113 .pmc_type = PPC_PMC_IBM, 114 .oprofile_cpu_type = "ppc64/rs64", 115 .oprofile_type = PPC_OPROFILE_RS64, 116 .platform = "rs64", 117 }, 118 { /* Pulsar */ 119 .pvr_mask = 0xffff0000, 120 .pvr_value = 0x00340000, 121 .cpu_name = "RS64-III (pulsar)", 122 .cpu_features = CPU_FTRS_RS64, 123 .cpu_user_features = COMMON_USER_PPC64, 124 .icache_bsize = 128, 125 .dcache_bsize = 128, 126 .num_pmcs = 8, 127 .pmc_type = PPC_PMC_IBM, 128 .oprofile_cpu_type = "ppc64/rs64", 129 .oprofile_type = PPC_OPROFILE_RS64, 130 .platform = "rs64", 131 }, 132 { /* I-star */ 133 .pvr_mask = 0xffff0000, 134 .pvr_value = 0x00360000, 135 .cpu_name = "RS64-III (icestar)", 136 .cpu_features = CPU_FTRS_RS64, 137 .cpu_user_features = COMMON_USER_PPC64, 138 .icache_bsize = 128, 139 .dcache_bsize = 128, 140 .num_pmcs = 8, 141 .pmc_type = PPC_PMC_IBM, 142 .oprofile_cpu_type = "ppc64/rs64", 143 .oprofile_type = PPC_OPROFILE_RS64, 144 .platform = "rs64", 145 }, 146 { /* S-star */ 147 .pvr_mask = 0xffff0000, 148 .pvr_value = 0x00370000, 149 .cpu_name = "RS64-IV (sstar)", 150 .cpu_features = CPU_FTRS_RS64, 151 .cpu_user_features = COMMON_USER_PPC64, 152 .icache_bsize = 128, 153 .dcache_bsize = 128, 154 .num_pmcs = 8, 155 .pmc_type = PPC_PMC_IBM, 156 .oprofile_cpu_type = "ppc64/rs64", 157 .oprofile_type = PPC_OPROFILE_RS64, 158 .platform = "rs64", 159 }, 160 { /* Power4 */ 161 .pvr_mask = 0xffff0000, 162 .pvr_value = 0x00350000, 163 .cpu_name = "POWER4 (gp)", 164 .cpu_features = CPU_FTRS_POWER4, 165 .cpu_user_features = COMMON_USER_POWER4, 166 .icache_bsize = 128, 167 .dcache_bsize = 128, 168 .num_pmcs = 8, 169 .pmc_type = PPC_PMC_IBM, 170 .oprofile_cpu_type = "ppc64/power4", 171 .oprofile_type = PPC_OPROFILE_POWER4, 172 .platform = "power4", 173 }, 174 { /* Power4+ */ 175 .pvr_mask = 0xffff0000, 176 .pvr_value = 0x00380000, 177 .cpu_name = "POWER4+ (gq)", 178 .cpu_features = CPU_FTRS_POWER4, 179 .cpu_user_features = COMMON_USER_POWER4, 180 .icache_bsize = 128, 181 .dcache_bsize = 128, 182 .num_pmcs = 8, 183 .pmc_type = PPC_PMC_IBM, 184 .oprofile_cpu_type = "ppc64/power4", 185 .oprofile_type = PPC_OPROFILE_POWER4, 186 .platform = "power4", 187 }, 188 { /* PPC970 */ 189 .pvr_mask = 0xffff0000, 190 .pvr_value = 0x00390000, 191 .cpu_name = "PPC970", 192 .cpu_features = CPU_FTRS_PPC970, 193 .cpu_user_features = COMMON_USER_POWER4 | 194 PPC_FEATURE_HAS_ALTIVEC_COMP, 195 .icache_bsize = 128, 196 .dcache_bsize = 128, 197 .num_pmcs = 8, 198 .pmc_type = PPC_PMC_IBM, 199 .cpu_setup = __setup_cpu_ppc970, 200 .cpu_restore = __restore_cpu_ppc970, 201 .oprofile_cpu_type = "ppc64/970", 202 .oprofile_type = PPC_OPROFILE_POWER4, 203 .platform = "ppc970", 204 }, 205 { /* PPC970FX */ 206 .pvr_mask = 0xffff0000, 207 .pvr_value = 0x003c0000, 208 .cpu_name = "PPC970FX", 209 .cpu_features = CPU_FTRS_PPC970, 210 .cpu_user_features = COMMON_USER_POWER4 | 211 PPC_FEATURE_HAS_ALTIVEC_COMP, 212 .icache_bsize = 128, 213 .dcache_bsize = 128, 214 .num_pmcs = 8, 215 .pmc_type = PPC_PMC_IBM, 216 .cpu_setup = __setup_cpu_ppc970, 217 .cpu_restore = __restore_cpu_ppc970, 218 .oprofile_cpu_type = "ppc64/970", 219 .oprofile_type = PPC_OPROFILE_POWER4, 220 .platform = "ppc970", 221 }, 222 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 223 .pvr_mask = 0xffffffff, 224 .pvr_value = 0x00440100, 225 .cpu_name = "PPC970MP", 226 .cpu_features = CPU_FTRS_PPC970, 227 .cpu_user_features = COMMON_USER_POWER4 | 228 PPC_FEATURE_HAS_ALTIVEC_COMP, 229 .icache_bsize = 128, 230 .dcache_bsize = 128, 231 .num_pmcs = 8, 232 .pmc_type = PPC_PMC_IBM, 233 .cpu_setup = __setup_cpu_ppc970, 234 .cpu_restore = __restore_cpu_ppc970, 235 .oprofile_cpu_type = "ppc64/970MP", 236 .oprofile_type = PPC_OPROFILE_POWER4, 237 .platform = "ppc970", 238 }, 239 { /* PPC970MP */ 240 .pvr_mask = 0xffff0000, 241 .pvr_value = 0x00440000, 242 .cpu_name = "PPC970MP", 243 .cpu_features = CPU_FTRS_PPC970, 244 .cpu_user_features = COMMON_USER_POWER4 | 245 PPC_FEATURE_HAS_ALTIVEC_COMP, 246 .icache_bsize = 128, 247 .dcache_bsize = 128, 248 .num_pmcs = 8, 249 .pmc_type = PPC_PMC_IBM, 250 .cpu_setup = __setup_cpu_ppc970MP, 251 .cpu_restore = __restore_cpu_ppc970, 252 .oprofile_cpu_type = "ppc64/970MP", 253 .oprofile_type = PPC_OPROFILE_POWER4, 254 .platform = "ppc970", 255 }, 256 { /* PPC970GX */ 257 .pvr_mask = 0xffff0000, 258 .pvr_value = 0x00450000, 259 .cpu_name = "PPC970GX", 260 .cpu_features = CPU_FTRS_PPC970, 261 .cpu_user_features = COMMON_USER_POWER4 | 262 PPC_FEATURE_HAS_ALTIVEC_COMP, 263 .icache_bsize = 128, 264 .dcache_bsize = 128, 265 .num_pmcs = 8, 266 .pmc_type = PPC_PMC_IBM, 267 .cpu_setup = __setup_cpu_ppc970, 268 .oprofile_cpu_type = "ppc64/970", 269 .oprofile_type = PPC_OPROFILE_POWER4, 270 .platform = "ppc970", 271 }, 272 { /* Power5 GR */ 273 .pvr_mask = 0xffff0000, 274 .pvr_value = 0x003a0000, 275 .cpu_name = "POWER5 (gr)", 276 .cpu_features = CPU_FTRS_POWER5, 277 .cpu_user_features = COMMON_USER_POWER5, 278 .icache_bsize = 128, 279 .dcache_bsize = 128, 280 .num_pmcs = 6, 281 .pmc_type = PPC_PMC_IBM, 282 .oprofile_cpu_type = "ppc64/power5", 283 .oprofile_type = PPC_OPROFILE_POWER4, 284 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 285 * and above but only works on POWER5 and above 286 */ 287 .oprofile_mmcra_sihv = MMCRA_SIHV, 288 .oprofile_mmcra_sipr = MMCRA_SIPR, 289 .platform = "power5", 290 }, 291 { /* Power5++ */ 292 .pvr_mask = 0xffffff00, 293 .pvr_value = 0x003b0300, 294 .cpu_name = "POWER5+ (gs)", 295 .cpu_features = CPU_FTRS_POWER5, 296 .cpu_user_features = COMMON_USER_POWER5_PLUS, 297 .icache_bsize = 128, 298 .dcache_bsize = 128, 299 .num_pmcs = 6, 300 .oprofile_cpu_type = "ppc64/power5++", 301 .oprofile_type = PPC_OPROFILE_POWER4, 302 .oprofile_mmcra_sihv = MMCRA_SIHV, 303 .oprofile_mmcra_sipr = MMCRA_SIPR, 304 .platform = "power5+", 305 }, 306 { /* Power5 GS */ 307 .pvr_mask = 0xffff0000, 308 .pvr_value = 0x003b0000, 309 .cpu_name = "POWER5+ (gs)", 310 .cpu_features = CPU_FTRS_POWER5, 311 .cpu_user_features = COMMON_USER_POWER5_PLUS, 312 .icache_bsize = 128, 313 .dcache_bsize = 128, 314 .num_pmcs = 6, 315 .pmc_type = PPC_PMC_IBM, 316 .oprofile_cpu_type = "ppc64/power5+", 317 .oprofile_type = PPC_OPROFILE_POWER4, 318 .oprofile_mmcra_sihv = MMCRA_SIHV, 319 .oprofile_mmcra_sipr = MMCRA_SIPR, 320 .platform = "power5+", 321 }, 322 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 323 .pvr_mask = 0xffffffff, 324 .pvr_value = 0x0f000001, 325 .cpu_name = "POWER5+", 326 .cpu_features = CPU_FTRS_POWER5, 327 .cpu_user_features = COMMON_USER_POWER5_PLUS, 328 .icache_bsize = 128, 329 .dcache_bsize = 128, 330 .platform = "power5+", 331 }, 332 { /* Power6 */ 333 .pvr_mask = 0xffff0000, 334 .pvr_value = 0x003e0000, 335 .cpu_name = "POWER6 (raw)", 336 .cpu_features = CPU_FTRS_POWER6, 337 .cpu_user_features = COMMON_USER_POWER6 | 338 PPC_FEATURE_POWER6_EXT, 339 .icache_bsize = 128, 340 .dcache_bsize = 128, 341 .num_pmcs = 6, 342 .pmc_type = PPC_PMC_IBM, 343 .oprofile_cpu_type = "ppc64/power6", 344 .oprofile_type = PPC_OPROFILE_POWER4, 345 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 346 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 347 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 348 POWER6_MMCRA_OTHER, 349 .platform = "power6x", 350 }, 351 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 352 .pvr_mask = 0xffffffff, 353 .pvr_value = 0x0f000002, 354 .cpu_name = "POWER6 (architected)", 355 .cpu_features = CPU_FTRS_POWER6, 356 .cpu_user_features = COMMON_USER_POWER6, 357 .icache_bsize = 128, 358 .dcache_bsize = 128, 359 .platform = "power6", 360 }, 361 { /* Cell Broadband Engine */ 362 .pvr_mask = 0xffff0000, 363 .pvr_value = 0x00700000, 364 .cpu_name = "Cell Broadband Engine", 365 .cpu_features = CPU_FTRS_CELL, 366 .cpu_user_features = COMMON_USER_PPC64 | 367 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 368 PPC_FEATURE_SMT, 369 .icache_bsize = 128, 370 .dcache_bsize = 128, 371 .num_pmcs = 4, 372 .pmc_type = PPC_PMC_IBM, 373 .oprofile_cpu_type = "ppc64/cell-be", 374 .oprofile_type = PPC_OPROFILE_CELL, 375 .platform = "ppc-cell-be", 376 }, 377 { /* PA Semi PA6T */ 378 .pvr_mask = 0x7fff0000, 379 .pvr_value = 0x00900000, 380 .cpu_name = "PA6T", 381 .cpu_features = CPU_FTRS_PA6T, 382 .cpu_user_features = COMMON_USER_PA6T, 383 .icache_bsize = 64, 384 .dcache_bsize = 64, 385 .num_pmcs = 6, 386 .pmc_type = PPC_PMC_PA6T, 387 .cpu_setup = __setup_cpu_pa6t, 388 .cpu_restore = __restore_cpu_pa6t, 389 .oprofile_cpu_type = "ppc64/pa6t", 390 .oprofile_type = PPC_OPROFILE_PA6T, 391 .platform = "pa6t", 392 }, 393 { /* default match */ 394 .pvr_mask = 0x00000000, 395 .pvr_value = 0x00000000, 396 .cpu_name = "POWER4 (compatible)", 397 .cpu_features = CPU_FTRS_COMPATIBLE, 398 .cpu_user_features = COMMON_USER_PPC64, 399 .icache_bsize = 128, 400 .dcache_bsize = 128, 401 .num_pmcs = 6, 402 .pmc_type = PPC_PMC_IBM, 403 .platform = "power4", 404 } 405 #endif /* CONFIG_PPC64 */ 406 #ifdef CONFIG_PPC32 407 #if CLASSIC_PPC 408 { /* 601 */ 409 .pvr_mask = 0xffff0000, 410 .pvr_value = 0x00010000, 411 .cpu_name = "601", 412 .cpu_features = CPU_FTRS_PPC601, 413 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 414 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 415 .icache_bsize = 32, 416 .dcache_bsize = 32, 417 .platform = "ppc601", 418 }, 419 { /* 603 */ 420 .pvr_mask = 0xffff0000, 421 .pvr_value = 0x00030000, 422 .cpu_name = "603", 423 .cpu_features = CPU_FTRS_603, 424 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 425 .icache_bsize = 32, 426 .dcache_bsize = 32, 427 .cpu_setup = __setup_cpu_603, 428 .platform = "ppc603", 429 }, 430 { /* 603e */ 431 .pvr_mask = 0xffff0000, 432 .pvr_value = 0x00060000, 433 .cpu_name = "603e", 434 .cpu_features = CPU_FTRS_603, 435 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 436 .icache_bsize = 32, 437 .dcache_bsize = 32, 438 .cpu_setup = __setup_cpu_603, 439 .platform = "ppc603", 440 }, 441 { /* 603ev */ 442 .pvr_mask = 0xffff0000, 443 .pvr_value = 0x00070000, 444 .cpu_name = "603ev", 445 .cpu_features = CPU_FTRS_603, 446 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 447 .icache_bsize = 32, 448 .dcache_bsize = 32, 449 .cpu_setup = __setup_cpu_603, 450 .platform = "ppc603", 451 }, 452 { /* 604 */ 453 .pvr_mask = 0xffff0000, 454 .pvr_value = 0x00040000, 455 .cpu_name = "604", 456 .cpu_features = CPU_FTRS_604, 457 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 458 .icache_bsize = 32, 459 .dcache_bsize = 32, 460 .num_pmcs = 2, 461 .cpu_setup = __setup_cpu_604, 462 .platform = "ppc604", 463 }, 464 { /* 604e */ 465 .pvr_mask = 0xfffff000, 466 .pvr_value = 0x00090000, 467 .cpu_name = "604e", 468 .cpu_features = CPU_FTRS_604, 469 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 470 .icache_bsize = 32, 471 .dcache_bsize = 32, 472 .num_pmcs = 4, 473 .cpu_setup = __setup_cpu_604, 474 .platform = "ppc604", 475 }, 476 { /* 604r */ 477 .pvr_mask = 0xffff0000, 478 .pvr_value = 0x00090000, 479 .cpu_name = "604r", 480 .cpu_features = CPU_FTRS_604, 481 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 482 .icache_bsize = 32, 483 .dcache_bsize = 32, 484 .num_pmcs = 4, 485 .cpu_setup = __setup_cpu_604, 486 .platform = "ppc604", 487 }, 488 { /* 604ev */ 489 .pvr_mask = 0xffff0000, 490 .pvr_value = 0x000a0000, 491 .cpu_name = "604ev", 492 .cpu_features = CPU_FTRS_604, 493 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 494 .icache_bsize = 32, 495 .dcache_bsize = 32, 496 .num_pmcs = 4, 497 .cpu_setup = __setup_cpu_604, 498 .platform = "ppc604", 499 }, 500 { /* 740/750 (0x4202, don't support TAU ?) */ 501 .pvr_mask = 0xffffffff, 502 .pvr_value = 0x00084202, 503 .cpu_name = "740/750", 504 .cpu_features = CPU_FTRS_740_NOTAU, 505 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 506 .icache_bsize = 32, 507 .dcache_bsize = 32, 508 .num_pmcs = 4, 509 .cpu_setup = __setup_cpu_750, 510 .platform = "ppc750", 511 }, 512 { /* 750CX (80100 and 8010x?) */ 513 .pvr_mask = 0xfffffff0, 514 .pvr_value = 0x00080100, 515 .cpu_name = "750CX", 516 .cpu_features = CPU_FTRS_750, 517 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 518 .icache_bsize = 32, 519 .dcache_bsize = 32, 520 .num_pmcs = 4, 521 .cpu_setup = __setup_cpu_750cx, 522 .platform = "ppc750", 523 }, 524 { /* 750CX (82201 and 82202) */ 525 .pvr_mask = 0xfffffff0, 526 .pvr_value = 0x00082200, 527 .cpu_name = "750CX", 528 .cpu_features = CPU_FTRS_750, 529 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 530 .icache_bsize = 32, 531 .dcache_bsize = 32, 532 .num_pmcs = 4, 533 .cpu_setup = __setup_cpu_750cx, 534 .platform = "ppc750", 535 }, 536 { /* 750CXe (82214) */ 537 .pvr_mask = 0xfffffff0, 538 .pvr_value = 0x00082210, 539 .cpu_name = "750CXe", 540 .cpu_features = CPU_FTRS_750, 541 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 542 .icache_bsize = 32, 543 .dcache_bsize = 32, 544 .num_pmcs = 4, 545 .cpu_setup = __setup_cpu_750cx, 546 .platform = "ppc750", 547 }, 548 { /* 750CXe "Gekko" (83214) */ 549 .pvr_mask = 0xffffffff, 550 .pvr_value = 0x00083214, 551 .cpu_name = "750CXe", 552 .cpu_features = CPU_FTRS_750, 553 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 554 .icache_bsize = 32, 555 .dcache_bsize = 32, 556 .num_pmcs = 4, 557 .cpu_setup = __setup_cpu_750cx, 558 .platform = "ppc750", 559 }, 560 { /* 750CL */ 561 .pvr_mask = 0xfffff0f0, 562 .pvr_value = 0x00087010, 563 .cpu_name = "750CL", 564 .cpu_features = CPU_FTRS_750CL, 565 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 566 .icache_bsize = 32, 567 .dcache_bsize = 32, 568 .num_pmcs = 4, 569 .cpu_setup = __setup_cpu_750, 570 .platform = "ppc750", 571 }, 572 { /* 745/755 */ 573 .pvr_mask = 0xfffff000, 574 .pvr_value = 0x00083000, 575 .cpu_name = "745/755", 576 .cpu_features = CPU_FTRS_750, 577 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 578 .icache_bsize = 32, 579 .dcache_bsize = 32, 580 .num_pmcs = 4, 581 .cpu_setup = __setup_cpu_750, 582 .platform = "ppc750", 583 }, 584 { /* 750FX rev 1.x */ 585 .pvr_mask = 0xffffff00, 586 .pvr_value = 0x70000100, 587 .cpu_name = "750FX", 588 .cpu_features = CPU_FTRS_750FX1, 589 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 590 .icache_bsize = 32, 591 .dcache_bsize = 32, 592 .num_pmcs = 4, 593 .cpu_setup = __setup_cpu_750, 594 .platform = "ppc750", 595 }, 596 { /* 750FX rev 2.0 must disable HID0[DPM] */ 597 .pvr_mask = 0xffffffff, 598 .pvr_value = 0x70000200, 599 .cpu_name = "750FX", 600 .cpu_features = CPU_FTRS_750FX2, 601 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 602 .icache_bsize = 32, 603 .dcache_bsize = 32, 604 .num_pmcs = 4, 605 .cpu_setup = __setup_cpu_750, 606 .platform = "ppc750", 607 }, 608 { /* 750FX (All revs except 2.0) */ 609 .pvr_mask = 0xffff0000, 610 .pvr_value = 0x70000000, 611 .cpu_name = "750FX", 612 .cpu_features = CPU_FTRS_750FX, 613 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 614 .icache_bsize = 32, 615 .dcache_bsize = 32, 616 .num_pmcs = 4, 617 .cpu_setup = __setup_cpu_750fx, 618 .platform = "ppc750", 619 }, 620 { /* 750GX */ 621 .pvr_mask = 0xffff0000, 622 .pvr_value = 0x70020000, 623 .cpu_name = "750GX", 624 .cpu_features = CPU_FTRS_750GX, 625 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 626 .icache_bsize = 32, 627 .dcache_bsize = 32, 628 .num_pmcs = 4, 629 .cpu_setup = __setup_cpu_750fx, 630 .platform = "ppc750", 631 }, 632 { /* 740/750 (L2CR bit need fixup for 740) */ 633 .pvr_mask = 0xffff0000, 634 .pvr_value = 0x00080000, 635 .cpu_name = "740/750", 636 .cpu_features = CPU_FTRS_740, 637 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 638 .icache_bsize = 32, 639 .dcache_bsize = 32, 640 .num_pmcs = 4, 641 .cpu_setup = __setup_cpu_750, 642 .platform = "ppc750", 643 }, 644 { /* 7400 rev 1.1 ? (no TAU) */ 645 .pvr_mask = 0xffffffff, 646 .pvr_value = 0x000c1101, 647 .cpu_name = "7400 (1.1)", 648 .cpu_features = CPU_FTRS_7400_NOTAU, 649 .cpu_user_features = COMMON_USER | 650 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 651 .icache_bsize = 32, 652 .dcache_bsize = 32, 653 .num_pmcs = 4, 654 .cpu_setup = __setup_cpu_7400, 655 .platform = "ppc7400", 656 }, 657 { /* 7400 */ 658 .pvr_mask = 0xffff0000, 659 .pvr_value = 0x000c0000, 660 .cpu_name = "7400", 661 .cpu_features = CPU_FTRS_7400, 662 .cpu_user_features = COMMON_USER | 663 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 664 .icache_bsize = 32, 665 .dcache_bsize = 32, 666 .num_pmcs = 4, 667 .cpu_setup = __setup_cpu_7400, 668 .platform = "ppc7400", 669 }, 670 { /* 7410 */ 671 .pvr_mask = 0xffff0000, 672 .pvr_value = 0x800c0000, 673 .cpu_name = "7410", 674 .cpu_features = CPU_FTRS_7400, 675 .cpu_user_features = COMMON_USER | 676 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 677 .icache_bsize = 32, 678 .dcache_bsize = 32, 679 .num_pmcs = 4, 680 .cpu_setup = __setup_cpu_7410, 681 .platform = "ppc7400", 682 }, 683 { /* 7450 2.0 - no doze/nap */ 684 .pvr_mask = 0xffffffff, 685 .pvr_value = 0x80000200, 686 .cpu_name = "7450", 687 .cpu_features = CPU_FTRS_7450_20, 688 .cpu_user_features = COMMON_USER | 689 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 690 .icache_bsize = 32, 691 .dcache_bsize = 32, 692 .num_pmcs = 6, 693 .cpu_setup = __setup_cpu_745x, 694 .oprofile_cpu_type = "ppc/7450", 695 .oprofile_type = PPC_OPROFILE_G4, 696 .platform = "ppc7450", 697 }, 698 { /* 7450 2.1 */ 699 .pvr_mask = 0xffffffff, 700 .pvr_value = 0x80000201, 701 .cpu_name = "7450", 702 .cpu_features = CPU_FTRS_7450_21, 703 .cpu_user_features = COMMON_USER | 704 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 705 .icache_bsize = 32, 706 .dcache_bsize = 32, 707 .num_pmcs = 6, 708 .cpu_setup = __setup_cpu_745x, 709 .oprofile_cpu_type = "ppc/7450", 710 .oprofile_type = PPC_OPROFILE_G4, 711 .platform = "ppc7450", 712 }, 713 { /* 7450 2.3 and newer */ 714 .pvr_mask = 0xffff0000, 715 .pvr_value = 0x80000000, 716 .cpu_name = "7450", 717 .cpu_features = CPU_FTRS_7450_23, 718 .cpu_user_features = COMMON_USER | 719 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 720 .icache_bsize = 32, 721 .dcache_bsize = 32, 722 .num_pmcs = 6, 723 .cpu_setup = __setup_cpu_745x, 724 .oprofile_cpu_type = "ppc/7450", 725 .oprofile_type = PPC_OPROFILE_G4, 726 .platform = "ppc7450", 727 }, 728 { /* 7455 rev 1.x */ 729 .pvr_mask = 0xffffff00, 730 .pvr_value = 0x80010100, 731 .cpu_name = "7455", 732 .cpu_features = CPU_FTRS_7455_1, 733 .cpu_user_features = COMMON_USER | 734 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 735 .icache_bsize = 32, 736 .dcache_bsize = 32, 737 .num_pmcs = 6, 738 .cpu_setup = __setup_cpu_745x, 739 .oprofile_cpu_type = "ppc/7450", 740 .oprofile_type = PPC_OPROFILE_G4, 741 .platform = "ppc7450", 742 }, 743 { /* 7455 rev 2.0 */ 744 .pvr_mask = 0xffffffff, 745 .pvr_value = 0x80010200, 746 .cpu_name = "7455", 747 .cpu_features = CPU_FTRS_7455_20, 748 .cpu_user_features = COMMON_USER | 749 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 750 .icache_bsize = 32, 751 .dcache_bsize = 32, 752 .num_pmcs = 6, 753 .cpu_setup = __setup_cpu_745x, 754 .oprofile_cpu_type = "ppc/7450", 755 .oprofile_type = PPC_OPROFILE_G4, 756 .platform = "ppc7450", 757 }, 758 { /* 7455 others */ 759 .pvr_mask = 0xffff0000, 760 .pvr_value = 0x80010000, 761 .cpu_name = "7455", 762 .cpu_features = CPU_FTRS_7455, 763 .cpu_user_features = COMMON_USER | 764 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 765 .icache_bsize = 32, 766 .dcache_bsize = 32, 767 .num_pmcs = 6, 768 .cpu_setup = __setup_cpu_745x, 769 .oprofile_cpu_type = "ppc/7450", 770 .oprofile_type = PPC_OPROFILE_G4, 771 .platform = "ppc7450", 772 }, 773 { /* 7447/7457 Rev 1.0 */ 774 .pvr_mask = 0xffffffff, 775 .pvr_value = 0x80020100, 776 .cpu_name = "7447/7457", 777 .cpu_features = CPU_FTRS_7447_10, 778 .cpu_user_features = COMMON_USER | 779 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 780 .icache_bsize = 32, 781 .dcache_bsize = 32, 782 .num_pmcs = 6, 783 .cpu_setup = __setup_cpu_745x, 784 .oprofile_cpu_type = "ppc/7450", 785 .oprofile_type = PPC_OPROFILE_G4, 786 .platform = "ppc7450", 787 }, 788 { /* 7447/7457 Rev 1.1 */ 789 .pvr_mask = 0xffffffff, 790 .pvr_value = 0x80020101, 791 .cpu_name = "7447/7457", 792 .cpu_features = CPU_FTRS_7447_10, 793 .cpu_user_features = COMMON_USER | 794 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 795 .icache_bsize = 32, 796 .dcache_bsize = 32, 797 .num_pmcs = 6, 798 .cpu_setup = __setup_cpu_745x, 799 .oprofile_cpu_type = "ppc/7450", 800 .oprofile_type = PPC_OPROFILE_G4, 801 .platform = "ppc7450", 802 }, 803 { /* 7447/7457 Rev 1.2 and later */ 804 .pvr_mask = 0xffff0000, 805 .pvr_value = 0x80020000, 806 .cpu_name = "7447/7457", 807 .cpu_features = CPU_FTRS_7447, 808 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 809 .icache_bsize = 32, 810 .dcache_bsize = 32, 811 .num_pmcs = 6, 812 .cpu_setup = __setup_cpu_745x, 813 .oprofile_cpu_type = "ppc/7450", 814 .oprofile_type = PPC_OPROFILE_G4, 815 .platform = "ppc7450", 816 }, 817 { /* 7447A */ 818 .pvr_mask = 0xffff0000, 819 .pvr_value = 0x80030000, 820 .cpu_name = "7447A", 821 .cpu_features = CPU_FTRS_7447A, 822 .cpu_user_features = COMMON_USER | 823 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 824 .icache_bsize = 32, 825 .dcache_bsize = 32, 826 .num_pmcs = 6, 827 .cpu_setup = __setup_cpu_745x, 828 .oprofile_cpu_type = "ppc/7450", 829 .oprofile_type = PPC_OPROFILE_G4, 830 .platform = "ppc7450", 831 }, 832 { /* 7448 */ 833 .pvr_mask = 0xffff0000, 834 .pvr_value = 0x80040000, 835 .cpu_name = "7448", 836 .cpu_features = CPU_FTRS_7448, 837 .cpu_user_features = COMMON_USER | 838 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 839 .icache_bsize = 32, 840 .dcache_bsize = 32, 841 .num_pmcs = 6, 842 .cpu_setup = __setup_cpu_745x, 843 .oprofile_cpu_type = "ppc/7450", 844 .oprofile_type = PPC_OPROFILE_G4, 845 .platform = "ppc7450", 846 }, 847 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 848 .pvr_mask = 0x7fff0000, 849 .pvr_value = 0x00810000, 850 .cpu_name = "82xx", 851 .cpu_features = CPU_FTRS_82XX, 852 .cpu_user_features = COMMON_USER, 853 .icache_bsize = 32, 854 .dcache_bsize = 32, 855 .cpu_setup = __setup_cpu_603, 856 .platform = "ppc603", 857 }, 858 { /* All G2_LE (603e core, plus some) have the same pvr */ 859 .pvr_mask = 0x7fff0000, 860 .pvr_value = 0x00820000, 861 .cpu_name = "G2_LE", 862 .cpu_features = CPU_FTRS_G2_LE, 863 .cpu_user_features = COMMON_USER, 864 .icache_bsize = 32, 865 .dcache_bsize = 32, 866 .cpu_setup = __setup_cpu_603, 867 .platform = "ppc603", 868 }, 869 { /* e300c1 (a 603e core, plus some) on 83xx */ 870 .pvr_mask = 0x7fff0000, 871 .pvr_value = 0x00830000, 872 .cpu_name = "e300c1", 873 .cpu_features = CPU_FTRS_E300, 874 .cpu_user_features = COMMON_USER, 875 .icache_bsize = 32, 876 .dcache_bsize = 32, 877 .cpu_setup = __setup_cpu_603, 878 .platform = "ppc603", 879 }, 880 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 881 .pvr_mask = 0x7fff0000, 882 .pvr_value = 0x00840000, 883 .cpu_name = "e300c2", 884 .cpu_features = CPU_FTRS_E300C2, 885 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 886 .icache_bsize = 32, 887 .dcache_bsize = 32, 888 .cpu_setup = __setup_cpu_603, 889 .platform = "ppc603", 890 }, 891 { /* e300c3 on 83xx */ 892 .pvr_mask = 0x7fff0000, 893 .pvr_value = 0x00850000, 894 .cpu_name = "e300c3", 895 .cpu_features = CPU_FTRS_E300, 896 .cpu_user_features = COMMON_USER, 897 .icache_bsize = 32, 898 .dcache_bsize = 32, 899 .cpu_setup = __setup_cpu_603, 900 .platform = "ppc603", 901 }, 902 { /* default match, we assume split I/D cache & TB (non-601)... */ 903 .pvr_mask = 0x00000000, 904 .pvr_value = 0x00000000, 905 .cpu_name = "(generic PPC)", 906 .cpu_features = CPU_FTRS_CLASSIC32, 907 .cpu_user_features = COMMON_USER, 908 .icache_bsize = 32, 909 .dcache_bsize = 32, 910 .platform = "ppc603", 911 }, 912 #endif /* CLASSIC_PPC */ 913 #ifdef CONFIG_8xx 914 { /* 8xx */ 915 .pvr_mask = 0xffff0000, 916 .pvr_value = 0x00500000, 917 .cpu_name = "8xx", 918 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 919 * if the 8xx code is there.... */ 920 .cpu_features = CPU_FTRS_8XX, 921 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 922 .icache_bsize = 16, 923 .dcache_bsize = 16, 924 .platform = "ppc823", 925 }, 926 #endif /* CONFIG_8xx */ 927 #ifdef CONFIG_40x 928 { /* 403GC */ 929 .pvr_mask = 0xffffff00, 930 .pvr_value = 0x00200200, 931 .cpu_name = "403GC", 932 .cpu_features = CPU_FTRS_40X, 933 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 934 .icache_bsize = 16, 935 .dcache_bsize = 16, 936 .platform = "ppc403", 937 }, 938 { /* 403GCX */ 939 .pvr_mask = 0xffffff00, 940 .pvr_value = 0x00201400, 941 .cpu_name = "403GCX", 942 .cpu_features = CPU_FTRS_40X, 943 .cpu_user_features = PPC_FEATURE_32 | 944 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 945 .icache_bsize = 16, 946 .dcache_bsize = 16, 947 .platform = "ppc403", 948 }, 949 { /* 403G ?? */ 950 .pvr_mask = 0xffff0000, 951 .pvr_value = 0x00200000, 952 .cpu_name = "403G ??", 953 .cpu_features = CPU_FTRS_40X, 954 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 955 .icache_bsize = 16, 956 .dcache_bsize = 16, 957 .platform = "ppc403", 958 }, 959 { /* 405GP */ 960 .pvr_mask = 0xffff0000, 961 .pvr_value = 0x40110000, 962 .cpu_name = "405GP", 963 .cpu_features = CPU_FTRS_40X, 964 .cpu_user_features = PPC_FEATURE_32 | 965 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 966 .icache_bsize = 32, 967 .dcache_bsize = 32, 968 .platform = "ppc405", 969 }, 970 { /* STB 03xxx */ 971 .pvr_mask = 0xffff0000, 972 .pvr_value = 0x40130000, 973 .cpu_name = "STB03xxx", 974 .cpu_features = CPU_FTRS_40X, 975 .cpu_user_features = PPC_FEATURE_32 | 976 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 977 .icache_bsize = 32, 978 .dcache_bsize = 32, 979 .platform = "ppc405", 980 }, 981 { /* STB 04xxx */ 982 .pvr_mask = 0xffff0000, 983 .pvr_value = 0x41810000, 984 .cpu_name = "STB04xxx", 985 .cpu_features = CPU_FTRS_40X, 986 .cpu_user_features = PPC_FEATURE_32 | 987 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 988 .icache_bsize = 32, 989 .dcache_bsize = 32, 990 .platform = "ppc405", 991 }, 992 { /* NP405L */ 993 .pvr_mask = 0xffff0000, 994 .pvr_value = 0x41610000, 995 .cpu_name = "NP405L", 996 .cpu_features = CPU_FTRS_40X, 997 .cpu_user_features = PPC_FEATURE_32 | 998 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 999 .icache_bsize = 32, 1000 .dcache_bsize = 32, 1001 .platform = "ppc405", 1002 }, 1003 { /* NP4GS3 */ 1004 .pvr_mask = 0xffff0000, 1005 .pvr_value = 0x40B10000, 1006 .cpu_name = "NP4GS3", 1007 .cpu_features = CPU_FTRS_40X, 1008 .cpu_user_features = PPC_FEATURE_32 | 1009 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1010 .icache_bsize = 32, 1011 .dcache_bsize = 32, 1012 .platform = "ppc405", 1013 }, 1014 { /* NP405H */ 1015 .pvr_mask = 0xffff0000, 1016 .pvr_value = 0x41410000, 1017 .cpu_name = "NP405H", 1018 .cpu_features = CPU_FTRS_40X, 1019 .cpu_user_features = PPC_FEATURE_32 | 1020 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1021 .icache_bsize = 32, 1022 .dcache_bsize = 32, 1023 .platform = "ppc405", 1024 }, 1025 { /* 405GPr */ 1026 .pvr_mask = 0xffff0000, 1027 .pvr_value = 0x50910000, 1028 .cpu_name = "405GPr", 1029 .cpu_features = CPU_FTRS_40X, 1030 .cpu_user_features = PPC_FEATURE_32 | 1031 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1032 .icache_bsize = 32, 1033 .dcache_bsize = 32, 1034 .platform = "ppc405", 1035 }, 1036 { /* STBx25xx */ 1037 .pvr_mask = 0xffff0000, 1038 .pvr_value = 0x51510000, 1039 .cpu_name = "STBx25xx", 1040 .cpu_features = CPU_FTRS_40X, 1041 .cpu_user_features = PPC_FEATURE_32 | 1042 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1043 .icache_bsize = 32, 1044 .dcache_bsize = 32, 1045 .platform = "ppc405", 1046 }, 1047 { /* 405LP */ 1048 .pvr_mask = 0xffff0000, 1049 .pvr_value = 0x41F10000, 1050 .cpu_name = "405LP", 1051 .cpu_features = CPU_FTRS_40X, 1052 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1053 .icache_bsize = 32, 1054 .dcache_bsize = 32, 1055 .platform = "ppc405", 1056 }, 1057 { /* Xilinx Virtex-II Pro */ 1058 .pvr_mask = 0xfffff000, 1059 .pvr_value = 0x20010000, 1060 .cpu_name = "Virtex-II Pro", 1061 .cpu_features = CPU_FTRS_40X, 1062 .cpu_user_features = PPC_FEATURE_32 | 1063 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1064 .icache_bsize = 32, 1065 .dcache_bsize = 32, 1066 .platform = "ppc405", 1067 }, 1068 { /* Xilinx Virtex-4 FX */ 1069 .pvr_mask = 0xfffff000, 1070 .pvr_value = 0x20011000, 1071 .cpu_name = "Virtex-4 FX", 1072 .cpu_features = CPU_FTRS_40X, 1073 .cpu_user_features = PPC_FEATURE_32 | 1074 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1075 .icache_bsize = 32, 1076 .dcache_bsize = 32, 1077 .platform = "ppc405", 1078 }, 1079 { /* 405EP */ 1080 .pvr_mask = 0xffff0000, 1081 .pvr_value = 0x51210000, 1082 .cpu_name = "405EP", 1083 .cpu_features = CPU_FTRS_40X, 1084 .cpu_user_features = PPC_FEATURE_32 | 1085 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1086 .icache_bsize = 32, 1087 .dcache_bsize = 32, 1088 .platform = "ppc405", 1089 }, 1090 { /* 405EX */ 1091 .pvr_mask = 0xffff0000, 1092 .pvr_value = 0x12910000, 1093 .cpu_name = "405EX", 1094 .cpu_features = CPU_FTRS_40X, 1095 .cpu_user_features = PPC_FEATURE_32 | 1096 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1097 .icache_bsize = 32, 1098 .dcache_bsize = 32, 1099 .platform = "ppc405", 1100 }, 1101 1102 #endif /* CONFIG_40x */ 1103 #ifdef CONFIG_44x 1104 { 1105 .pvr_mask = 0xf0000fff, 1106 .pvr_value = 0x40000850, 1107 .cpu_name = "440EP Rev. A", 1108 .cpu_features = CPU_FTRS_44X, 1109 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1110 .icache_bsize = 32, 1111 .dcache_bsize = 32, 1112 .cpu_setup = __setup_cpu_440ep, 1113 .platform = "ppc440", 1114 }, 1115 { 1116 .pvr_mask = 0xf0000fff, 1117 .pvr_value = 0x400008d3, 1118 .cpu_name = "440EP Rev. B", 1119 .cpu_features = CPU_FTRS_44X, 1120 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1121 .icache_bsize = 32, 1122 .dcache_bsize = 32, 1123 .cpu_setup = __setup_cpu_440ep, 1124 .platform = "ppc440", 1125 }, 1126 { /* 440EPX */ 1127 .pvr_mask = 0xf0000ffb, 1128 .pvr_value = 0x200008D0, 1129 .cpu_name = "440EPX", 1130 .cpu_features = CPU_FTRS_44X, 1131 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1132 .icache_bsize = 32, 1133 .dcache_bsize = 32, 1134 .cpu_setup = __setup_cpu_440epx, 1135 .platform = "ppc440", 1136 }, 1137 { /* 440GRX */ 1138 .pvr_mask = 0xf0000ffb, 1139 .pvr_value = 0x200008D8, 1140 .cpu_name = "440GRX", 1141 .cpu_features = CPU_FTRS_44X, 1142 .cpu_user_features = COMMON_USER_BOOKE, 1143 .icache_bsize = 32, 1144 .dcache_bsize = 32, 1145 .cpu_setup = __setup_cpu_440grx, 1146 .platform = "ppc440", 1147 }, 1148 { /* 440GP Rev. B */ 1149 .pvr_mask = 0xf0000fff, 1150 .pvr_value = 0x40000440, 1151 .cpu_name = "440GP Rev. B", 1152 .cpu_features = CPU_FTRS_44X, 1153 .cpu_user_features = COMMON_USER_BOOKE, 1154 .icache_bsize = 32, 1155 .dcache_bsize = 32, 1156 .platform = "ppc440gp", 1157 }, 1158 { /* 440GP Rev. C */ 1159 .pvr_mask = 0xf0000fff, 1160 .pvr_value = 0x40000481, 1161 .cpu_name = "440GP Rev. C", 1162 .cpu_features = CPU_FTRS_44X, 1163 .cpu_user_features = COMMON_USER_BOOKE, 1164 .icache_bsize = 32, 1165 .dcache_bsize = 32, 1166 .platform = "ppc440gp", 1167 }, 1168 { /* 440GX Rev. A */ 1169 .pvr_mask = 0xf0000fff, 1170 .pvr_value = 0x50000850, 1171 .cpu_name = "440GX Rev. A", 1172 .cpu_features = CPU_FTRS_44X, 1173 .cpu_user_features = COMMON_USER_BOOKE, 1174 .icache_bsize = 32, 1175 .dcache_bsize = 32, 1176 .platform = "ppc440", 1177 }, 1178 { /* 440GX Rev. B */ 1179 .pvr_mask = 0xf0000fff, 1180 .pvr_value = 0x50000851, 1181 .cpu_name = "440GX Rev. B", 1182 .cpu_features = CPU_FTRS_44X, 1183 .cpu_user_features = COMMON_USER_BOOKE, 1184 .icache_bsize = 32, 1185 .dcache_bsize = 32, 1186 .platform = "ppc440", 1187 }, 1188 { /* 440GX Rev. C */ 1189 .pvr_mask = 0xf0000fff, 1190 .pvr_value = 0x50000892, 1191 .cpu_name = "440GX Rev. C", 1192 .cpu_features = CPU_FTRS_44X, 1193 .cpu_user_features = COMMON_USER_BOOKE, 1194 .icache_bsize = 32, 1195 .dcache_bsize = 32, 1196 .platform = "ppc440", 1197 }, 1198 { /* 440GX Rev. F */ 1199 .pvr_mask = 0xf0000fff, 1200 .pvr_value = 0x50000894, 1201 .cpu_name = "440GX Rev. F", 1202 .cpu_features = CPU_FTRS_44X, 1203 .cpu_user_features = COMMON_USER_BOOKE, 1204 .icache_bsize = 32, 1205 .dcache_bsize = 32, 1206 .platform = "ppc440", 1207 }, 1208 { /* 440SP Rev. A */ 1209 .pvr_mask = 0xfff00fff, 1210 .pvr_value = 0x53200891, 1211 .cpu_name = "440SP Rev. A", 1212 .cpu_features = CPU_FTRS_44X, 1213 .cpu_user_features = COMMON_USER_BOOKE, 1214 .icache_bsize = 32, 1215 .dcache_bsize = 32, 1216 .platform = "ppc440", 1217 }, 1218 { /* 440SPe Rev. A */ 1219 .pvr_mask = 0xfff00fff, 1220 .pvr_value = 0x53400890, 1221 .cpu_name = "440SPe Rev. A", 1222 .cpu_features = CPU_FTRS_44X, 1223 .cpu_user_features = COMMON_USER_BOOKE, 1224 .icache_bsize = 32, 1225 .dcache_bsize = 32, 1226 .platform = "ppc440", 1227 }, 1228 { /* 440SPe Rev. B */ 1229 .pvr_mask = 0xfff00fff, 1230 .pvr_value = 0x53400891, 1231 .cpu_name = "440SPe Rev. B", 1232 .cpu_features = CPU_FTRS_44X, 1233 .cpu_user_features = COMMON_USER_BOOKE, 1234 .icache_bsize = 32, 1235 .dcache_bsize = 32, 1236 .platform = "ppc440", 1237 }, 1238 #endif /* CONFIG_44x */ 1239 #ifdef CONFIG_FSL_BOOKE 1240 { /* e200z5 */ 1241 .pvr_mask = 0xfff00000, 1242 .pvr_value = 0x81000000, 1243 .cpu_name = "e200z5", 1244 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1245 .cpu_features = CPU_FTRS_E200, 1246 .cpu_user_features = COMMON_USER_BOOKE | 1247 PPC_FEATURE_HAS_EFP_SINGLE | 1248 PPC_FEATURE_UNIFIED_CACHE, 1249 .dcache_bsize = 32, 1250 .platform = "ppc5554", 1251 }, 1252 { /* e200z6 */ 1253 .pvr_mask = 0xfff00000, 1254 .pvr_value = 0x81100000, 1255 .cpu_name = "e200z6", 1256 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1257 .cpu_features = CPU_FTRS_E200, 1258 .cpu_user_features = COMMON_USER_BOOKE | 1259 PPC_FEATURE_HAS_SPE_COMP | 1260 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1261 PPC_FEATURE_UNIFIED_CACHE, 1262 .dcache_bsize = 32, 1263 .platform = "ppc5554", 1264 }, 1265 { /* e500 */ 1266 .pvr_mask = 0xffff0000, 1267 .pvr_value = 0x80200000, 1268 .cpu_name = "e500", 1269 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1270 .cpu_features = CPU_FTRS_E500, 1271 .cpu_user_features = COMMON_USER_BOOKE | 1272 PPC_FEATURE_HAS_SPE_COMP | 1273 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1274 .icache_bsize = 32, 1275 .dcache_bsize = 32, 1276 .num_pmcs = 4, 1277 .oprofile_cpu_type = "ppc/e500", 1278 .oprofile_type = PPC_OPROFILE_BOOKE, 1279 .platform = "ppc8540", 1280 }, 1281 { /* e500v2 */ 1282 .pvr_mask = 0xffff0000, 1283 .pvr_value = 0x80210000, 1284 .cpu_name = "e500v2", 1285 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1286 .cpu_features = CPU_FTRS_E500_2, 1287 .cpu_user_features = COMMON_USER_BOOKE | 1288 PPC_FEATURE_HAS_SPE_COMP | 1289 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1290 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1291 .icache_bsize = 32, 1292 .dcache_bsize = 32, 1293 .num_pmcs = 4, 1294 .oprofile_cpu_type = "ppc/e500", 1295 .oprofile_type = PPC_OPROFILE_BOOKE, 1296 .platform = "ppc8548", 1297 }, 1298 #endif 1299 #if !CLASSIC_PPC 1300 { /* default match */ 1301 .pvr_mask = 0x00000000, 1302 .pvr_value = 0x00000000, 1303 .cpu_name = "(generic PPC)", 1304 .cpu_features = CPU_FTRS_GENERIC_32, 1305 .cpu_user_features = PPC_FEATURE_32, 1306 .icache_bsize = 32, 1307 .dcache_bsize = 32, 1308 .platform = "powerpc", 1309 } 1310 #endif /* !CLASSIC_PPC */ 1311 #endif /* CONFIG_PPC32 */ 1312 }; 1313 1314 static struct cpu_spec the_cpu_spec; 1315 1316 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1317 { 1318 struct cpu_spec *s = cpu_specs; 1319 struct cpu_spec *t = &the_cpu_spec; 1320 int i; 1321 1322 s = PTRRELOC(s); 1323 t = PTRRELOC(t); 1324 1325 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) 1326 if ((pvr & s->pvr_mask) == s->pvr_value) { 1327 /* 1328 * If we are overriding a previous value derived 1329 * from the real PVR with a new value obtained 1330 * using a logical PVR value, don't modify the 1331 * performance monitor fields. 1332 */ 1333 if (t->num_pmcs && !s->num_pmcs) { 1334 t->cpu_name = s->cpu_name; 1335 t->cpu_features = s->cpu_features; 1336 t->cpu_user_features = s->cpu_user_features; 1337 t->icache_bsize = s->icache_bsize; 1338 t->dcache_bsize = s->dcache_bsize; 1339 t->cpu_setup = s->cpu_setup; 1340 t->cpu_restore = s->cpu_restore; 1341 t->platform = s->platform; 1342 } else 1343 *t = *s; 1344 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1345 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1346 /* ppc64 and booke expect identify_cpu to also call 1347 * setup_cpu for that processor. I will consolidate 1348 * that at a later time, for now, just use #ifdef. 1349 * we also don't need to PTRRELOC the function pointer 1350 * on ppc64 and booke as we are running at 0 in real 1351 * mode on ppc64 and reloc_offset is always 0 on booke. 1352 */ 1353 if (s->cpu_setup) { 1354 s->cpu_setup(offset, s); 1355 } 1356 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1357 return s; 1358 } 1359 BUG(); 1360 return NULL; 1361 } 1362 1363 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end) 1364 { 1365 struct fixup_entry { 1366 unsigned long mask; 1367 unsigned long value; 1368 long start_off; 1369 long end_off; 1370 } *fcur, *fend; 1371 1372 fcur = fixup_start; 1373 fend = fixup_end; 1374 1375 for (; fcur < fend; fcur++) { 1376 unsigned int *pstart, *pend, *p; 1377 1378 if ((value & fcur->mask) == fcur->value) 1379 continue; 1380 1381 /* These PTRRELOCs will disappear once the new scheme for 1382 * modules and vdso is implemented 1383 */ 1384 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4); 1385 pend = ((unsigned int *)fcur) + (fcur->end_off / 4); 1386 1387 for (p = pstart; p < pend; p++) { 1388 *p = 0x60000000u; 1389 asm volatile ("dcbst 0, %0" : : "r" (p)); 1390 } 1391 asm volatile ("sync" : : : "memory"); 1392 for (p = pstart; p < pend; p++) 1393 asm volatile ("icbi 0,%0" : : "r" (p)); 1394 asm volatile ("sync; isync" : : : "memory"); 1395 } 1396 } 1397