1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 24 struct cpu_spec* cur_cpu_spec = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 54 #endif /* CONFIG_PPC32 */ 55 #ifdef CONFIG_PPC64 56 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 59 extern void __restore_cpu_pa6t(void); 60 extern void __restore_cpu_ppc970(void); 61 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 62 extern void __restore_cpu_power7(void); 63 #endif /* CONFIG_PPC64 */ 64 65 /* This table only contains "desktop" CPUs, it need to be filled with embedded 66 * ones as well... 67 */ 68 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 69 PPC_FEATURE_HAS_MMU) 70 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 71 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 72 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 73 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 74 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 75 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 76 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 77 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 78 PPC_FEATURE_TRUE_LE | \ 79 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 80 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 81 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 82 PPC_FEATURE_TRUE_LE | \ 83 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 84 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 85 PPC_FEATURE_TRUE_LE | \ 86 PPC_FEATURE_HAS_ALTIVEC_COMP) 87 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 88 PPC_FEATURE_BOOKE) 89 90 static struct cpu_spec __initdata cpu_specs[] = { 91 #ifdef CONFIG_PPC64 92 { /* Power3 */ 93 .pvr_mask = 0xffff0000, 94 .pvr_value = 0x00400000, 95 .cpu_name = "POWER3 (630)", 96 .cpu_features = CPU_FTRS_POWER3, 97 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 98 .mmu_features = MMU_FTR_HPTE_TABLE, 99 .icache_bsize = 128, 100 .dcache_bsize = 128, 101 .num_pmcs = 8, 102 .pmc_type = PPC_PMC_IBM, 103 .oprofile_cpu_type = "ppc64/power3", 104 .oprofile_type = PPC_OPROFILE_RS64, 105 .machine_check = machine_check_generic, 106 .platform = "power3", 107 }, 108 { /* Power3+ */ 109 .pvr_mask = 0xffff0000, 110 .pvr_value = 0x00410000, 111 .cpu_name = "POWER3 (630+)", 112 .cpu_features = CPU_FTRS_POWER3, 113 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 114 .mmu_features = MMU_FTR_HPTE_TABLE, 115 .icache_bsize = 128, 116 .dcache_bsize = 128, 117 .num_pmcs = 8, 118 .pmc_type = PPC_PMC_IBM, 119 .oprofile_cpu_type = "ppc64/power3", 120 .oprofile_type = PPC_OPROFILE_RS64, 121 .machine_check = machine_check_generic, 122 .platform = "power3", 123 }, 124 { /* Northstar */ 125 .pvr_mask = 0xffff0000, 126 .pvr_value = 0x00330000, 127 .cpu_name = "RS64-II (northstar)", 128 .cpu_features = CPU_FTRS_RS64, 129 .cpu_user_features = COMMON_USER_PPC64, 130 .mmu_features = MMU_FTR_HPTE_TABLE, 131 .icache_bsize = 128, 132 .dcache_bsize = 128, 133 .num_pmcs = 8, 134 .pmc_type = PPC_PMC_IBM, 135 .oprofile_cpu_type = "ppc64/rs64", 136 .oprofile_type = PPC_OPROFILE_RS64, 137 .machine_check = machine_check_generic, 138 .platform = "rs64", 139 }, 140 { /* Pulsar */ 141 .pvr_mask = 0xffff0000, 142 .pvr_value = 0x00340000, 143 .cpu_name = "RS64-III (pulsar)", 144 .cpu_features = CPU_FTRS_RS64, 145 .cpu_user_features = COMMON_USER_PPC64, 146 .mmu_features = MMU_FTR_HPTE_TABLE, 147 .icache_bsize = 128, 148 .dcache_bsize = 128, 149 .num_pmcs = 8, 150 .pmc_type = PPC_PMC_IBM, 151 .oprofile_cpu_type = "ppc64/rs64", 152 .oprofile_type = PPC_OPROFILE_RS64, 153 .machine_check = machine_check_generic, 154 .platform = "rs64", 155 }, 156 { /* I-star */ 157 .pvr_mask = 0xffff0000, 158 .pvr_value = 0x00360000, 159 .cpu_name = "RS64-III (icestar)", 160 .cpu_features = CPU_FTRS_RS64, 161 .cpu_user_features = COMMON_USER_PPC64, 162 .mmu_features = MMU_FTR_HPTE_TABLE, 163 .icache_bsize = 128, 164 .dcache_bsize = 128, 165 .num_pmcs = 8, 166 .pmc_type = PPC_PMC_IBM, 167 .oprofile_cpu_type = "ppc64/rs64", 168 .oprofile_type = PPC_OPROFILE_RS64, 169 .machine_check = machine_check_generic, 170 .platform = "rs64", 171 }, 172 { /* S-star */ 173 .pvr_mask = 0xffff0000, 174 .pvr_value = 0x00370000, 175 .cpu_name = "RS64-IV (sstar)", 176 .cpu_features = CPU_FTRS_RS64, 177 .cpu_user_features = COMMON_USER_PPC64, 178 .mmu_features = MMU_FTR_HPTE_TABLE, 179 .icache_bsize = 128, 180 .dcache_bsize = 128, 181 .num_pmcs = 8, 182 .pmc_type = PPC_PMC_IBM, 183 .oprofile_cpu_type = "ppc64/rs64", 184 .oprofile_type = PPC_OPROFILE_RS64, 185 .machine_check = machine_check_generic, 186 .platform = "rs64", 187 }, 188 { /* Power4 */ 189 .pvr_mask = 0xffff0000, 190 .pvr_value = 0x00350000, 191 .cpu_name = "POWER4 (gp)", 192 .cpu_features = CPU_FTRS_POWER4, 193 .cpu_user_features = COMMON_USER_POWER4, 194 .mmu_features = MMU_FTR_HPTE_TABLE, 195 .icache_bsize = 128, 196 .dcache_bsize = 128, 197 .num_pmcs = 8, 198 .pmc_type = PPC_PMC_IBM, 199 .oprofile_cpu_type = "ppc64/power4", 200 .oprofile_type = PPC_OPROFILE_POWER4, 201 .machine_check = machine_check_generic, 202 .platform = "power4", 203 }, 204 { /* Power4+ */ 205 .pvr_mask = 0xffff0000, 206 .pvr_value = 0x00380000, 207 .cpu_name = "POWER4+ (gq)", 208 .cpu_features = CPU_FTRS_POWER4, 209 .cpu_user_features = COMMON_USER_POWER4, 210 .mmu_features = MMU_FTR_HPTE_TABLE, 211 .icache_bsize = 128, 212 .dcache_bsize = 128, 213 .num_pmcs = 8, 214 .pmc_type = PPC_PMC_IBM, 215 .oprofile_cpu_type = "ppc64/power4", 216 .oprofile_type = PPC_OPROFILE_POWER4, 217 .machine_check = machine_check_generic, 218 .platform = "power4", 219 }, 220 { /* PPC970 */ 221 .pvr_mask = 0xffff0000, 222 .pvr_value = 0x00390000, 223 .cpu_name = "PPC970", 224 .cpu_features = CPU_FTRS_PPC970, 225 .cpu_user_features = COMMON_USER_POWER4 | 226 PPC_FEATURE_HAS_ALTIVEC_COMP, 227 .mmu_features = MMU_FTR_HPTE_TABLE, 228 .icache_bsize = 128, 229 .dcache_bsize = 128, 230 .num_pmcs = 8, 231 .pmc_type = PPC_PMC_IBM, 232 .cpu_setup = __setup_cpu_ppc970, 233 .cpu_restore = __restore_cpu_ppc970, 234 .oprofile_cpu_type = "ppc64/970", 235 .oprofile_type = PPC_OPROFILE_POWER4, 236 .machine_check = machine_check_generic, 237 .platform = "ppc970", 238 }, 239 { /* PPC970FX */ 240 .pvr_mask = 0xffff0000, 241 .pvr_value = 0x003c0000, 242 .cpu_name = "PPC970FX", 243 .cpu_features = CPU_FTRS_PPC970, 244 .cpu_user_features = COMMON_USER_POWER4 | 245 PPC_FEATURE_HAS_ALTIVEC_COMP, 246 .mmu_features = MMU_FTR_HPTE_TABLE, 247 .icache_bsize = 128, 248 .dcache_bsize = 128, 249 .num_pmcs = 8, 250 .pmc_type = PPC_PMC_IBM, 251 .cpu_setup = __setup_cpu_ppc970, 252 .cpu_restore = __restore_cpu_ppc970, 253 .oprofile_cpu_type = "ppc64/970", 254 .oprofile_type = PPC_OPROFILE_POWER4, 255 .machine_check = machine_check_generic, 256 .platform = "ppc970", 257 }, 258 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 259 .pvr_mask = 0xffffffff, 260 .pvr_value = 0x00440100, 261 .cpu_name = "PPC970MP", 262 .cpu_features = CPU_FTRS_PPC970, 263 .cpu_user_features = COMMON_USER_POWER4 | 264 PPC_FEATURE_HAS_ALTIVEC_COMP, 265 .mmu_features = MMU_FTR_HPTE_TABLE, 266 .icache_bsize = 128, 267 .dcache_bsize = 128, 268 .num_pmcs = 8, 269 .pmc_type = PPC_PMC_IBM, 270 .cpu_setup = __setup_cpu_ppc970, 271 .cpu_restore = __restore_cpu_ppc970, 272 .oprofile_cpu_type = "ppc64/970MP", 273 .oprofile_type = PPC_OPROFILE_POWER4, 274 .machine_check = machine_check_generic, 275 .platform = "ppc970", 276 }, 277 { /* PPC970MP */ 278 .pvr_mask = 0xffff0000, 279 .pvr_value = 0x00440000, 280 .cpu_name = "PPC970MP", 281 .cpu_features = CPU_FTRS_PPC970, 282 .cpu_user_features = COMMON_USER_POWER4 | 283 PPC_FEATURE_HAS_ALTIVEC_COMP, 284 .mmu_features = MMU_FTR_HPTE_TABLE, 285 .icache_bsize = 128, 286 .dcache_bsize = 128, 287 .num_pmcs = 8, 288 .pmc_type = PPC_PMC_IBM, 289 .cpu_setup = __setup_cpu_ppc970MP, 290 .cpu_restore = __restore_cpu_ppc970, 291 .oprofile_cpu_type = "ppc64/970MP", 292 .oprofile_type = PPC_OPROFILE_POWER4, 293 .machine_check = machine_check_generic, 294 .platform = "ppc970", 295 }, 296 { /* PPC970GX */ 297 .pvr_mask = 0xffff0000, 298 .pvr_value = 0x00450000, 299 .cpu_name = "PPC970GX", 300 .cpu_features = CPU_FTRS_PPC970, 301 .cpu_user_features = COMMON_USER_POWER4 | 302 PPC_FEATURE_HAS_ALTIVEC_COMP, 303 .mmu_features = MMU_FTR_HPTE_TABLE, 304 .icache_bsize = 128, 305 .dcache_bsize = 128, 306 .num_pmcs = 8, 307 .pmc_type = PPC_PMC_IBM, 308 .cpu_setup = __setup_cpu_ppc970, 309 .oprofile_cpu_type = "ppc64/970", 310 .oprofile_type = PPC_OPROFILE_POWER4, 311 .machine_check = machine_check_generic, 312 .platform = "ppc970", 313 }, 314 { /* Power5 GR */ 315 .pvr_mask = 0xffff0000, 316 .pvr_value = 0x003a0000, 317 .cpu_name = "POWER5 (gr)", 318 .cpu_features = CPU_FTRS_POWER5, 319 .cpu_user_features = COMMON_USER_POWER5, 320 .mmu_features = MMU_FTR_HPTE_TABLE, 321 .icache_bsize = 128, 322 .dcache_bsize = 128, 323 .num_pmcs = 6, 324 .pmc_type = PPC_PMC_IBM, 325 .oprofile_cpu_type = "ppc64/power5", 326 .oprofile_type = PPC_OPROFILE_POWER4, 327 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 328 * and above but only works on POWER5 and above 329 */ 330 .oprofile_mmcra_sihv = MMCRA_SIHV, 331 .oprofile_mmcra_sipr = MMCRA_SIPR, 332 .machine_check = machine_check_generic, 333 .platform = "power5", 334 }, 335 { /* Power5++ */ 336 .pvr_mask = 0xffffff00, 337 .pvr_value = 0x003b0300, 338 .cpu_name = "POWER5+ (gs)", 339 .cpu_features = CPU_FTRS_POWER5, 340 .cpu_user_features = COMMON_USER_POWER5_PLUS, 341 .mmu_features = MMU_FTR_HPTE_TABLE, 342 .icache_bsize = 128, 343 .dcache_bsize = 128, 344 .num_pmcs = 6, 345 .oprofile_cpu_type = "ppc64/power5++", 346 .oprofile_type = PPC_OPROFILE_POWER4, 347 .oprofile_mmcra_sihv = MMCRA_SIHV, 348 .oprofile_mmcra_sipr = MMCRA_SIPR, 349 .machine_check = machine_check_generic, 350 .platform = "power5+", 351 }, 352 { /* Power5 GS */ 353 .pvr_mask = 0xffff0000, 354 .pvr_value = 0x003b0000, 355 .cpu_name = "POWER5+ (gs)", 356 .cpu_features = CPU_FTRS_POWER5, 357 .cpu_user_features = COMMON_USER_POWER5_PLUS, 358 .mmu_features = MMU_FTR_HPTE_TABLE, 359 .icache_bsize = 128, 360 .dcache_bsize = 128, 361 .num_pmcs = 6, 362 .pmc_type = PPC_PMC_IBM, 363 .oprofile_cpu_type = "ppc64/power5+", 364 .oprofile_type = PPC_OPROFILE_POWER4, 365 .oprofile_mmcra_sihv = MMCRA_SIHV, 366 .oprofile_mmcra_sipr = MMCRA_SIPR, 367 .machine_check = machine_check_generic, 368 .platform = "power5+", 369 }, 370 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 371 .pvr_mask = 0xffffffff, 372 .pvr_value = 0x0f000001, 373 .cpu_name = "POWER5+", 374 .cpu_features = CPU_FTRS_POWER5, 375 .cpu_user_features = COMMON_USER_POWER5_PLUS, 376 .mmu_features = MMU_FTR_HPTE_TABLE, 377 .icache_bsize = 128, 378 .dcache_bsize = 128, 379 .machine_check = machine_check_generic, 380 .oprofile_cpu_type = "ppc64/compat-power5+", 381 .platform = "power5+", 382 }, 383 { /* Power6 */ 384 .pvr_mask = 0xffff0000, 385 .pvr_value = 0x003e0000, 386 .cpu_name = "POWER6 (raw)", 387 .cpu_features = CPU_FTRS_POWER6, 388 .cpu_user_features = COMMON_USER_POWER6 | 389 PPC_FEATURE_POWER6_EXT, 390 .mmu_features = MMU_FTR_HPTE_TABLE, 391 .icache_bsize = 128, 392 .dcache_bsize = 128, 393 .num_pmcs = 6, 394 .pmc_type = PPC_PMC_IBM, 395 .oprofile_cpu_type = "ppc64/power6", 396 .oprofile_type = PPC_OPROFILE_POWER4, 397 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 398 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 399 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 400 POWER6_MMCRA_OTHER, 401 .machine_check = machine_check_generic, 402 .platform = "power6x", 403 }, 404 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 405 .pvr_mask = 0xffffffff, 406 .pvr_value = 0x0f000002, 407 .cpu_name = "POWER6 (architected)", 408 .cpu_features = CPU_FTRS_POWER6, 409 .cpu_user_features = COMMON_USER_POWER6, 410 .mmu_features = MMU_FTR_HPTE_TABLE, 411 .icache_bsize = 128, 412 .dcache_bsize = 128, 413 .machine_check = machine_check_generic, 414 .oprofile_cpu_type = "ppc64/compat-power6", 415 .platform = "power6", 416 }, 417 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 418 .pvr_mask = 0xffffffff, 419 .pvr_value = 0x0f000003, 420 .cpu_name = "POWER7 (architected)", 421 .cpu_features = CPU_FTRS_POWER7, 422 .cpu_user_features = COMMON_USER_POWER7, 423 .mmu_features = MMU_FTR_HPTE_TABLE, 424 .icache_bsize = 128, 425 .dcache_bsize = 128, 426 .machine_check = machine_check_generic, 427 .oprofile_cpu_type = "ppc64/compat-power7", 428 .platform = "power7", 429 }, 430 { /* Power7 */ 431 .pvr_mask = 0xffff0000, 432 .pvr_value = 0x003f0000, 433 .cpu_name = "POWER7 (raw)", 434 .cpu_features = CPU_FTRS_POWER7, 435 .cpu_user_features = COMMON_USER_POWER7, 436 .mmu_features = MMU_FTR_HPTE_TABLE, 437 .icache_bsize = 128, 438 .dcache_bsize = 128, 439 .num_pmcs = 6, 440 .pmc_type = PPC_PMC_IBM, 441 .cpu_setup = __setup_cpu_power7, 442 .cpu_restore = __restore_cpu_power7, 443 .oprofile_cpu_type = "ppc64/power7", 444 .oprofile_type = PPC_OPROFILE_POWER4, 445 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 446 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 447 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 448 POWER6_MMCRA_OTHER, 449 .platform = "power7", 450 }, 451 { /* Cell Broadband Engine */ 452 .pvr_mask = 0xffff0000, 453 .pvr_value = 0x00700000, 454 .cpu_name = "Cell Broadband Engine", 455 .cpu_features = CPU_FTRS_CELL, 456 .cpu_user_features = COMMON_USER_PPC64 | 457 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 458 PPC_FEATURE_SMT, 459 .mmu_features = MMU_FTR_HPTE_TABLE, 460 .icache_bsize = 128, 461 .dcache_bsize = 128, 462 .num_pmcs = 4, 463 .pmc_type = PPC_PMC_IBM, 464 .oprofile_cpu_type = "ppc64/cell-be", 465 .oprofile_type = PPC_OPROFILE_CELL, 466 .machine_check = machine_check_generic, 467 .platform = "ppc-cell-be", 468 }, 469 { /* PA Semi PA6T */ 470 .pvr_mask = 0x7fff0000, 471 .pvr_value = 0x00900000, 472 .cpu_name = "PA6T", 473 .cpu_features = CPU_FTRS_PA6T, 474 .cpu_user_features = COMMON_USER_PA6T, 475 .mmu_features = MMU_FTR_HPTE_TABLE, 476 .icache_bsize = 64, 477 .dcache_bsize = 64, 478 .num_pmcs = 6, 479 .pmc_type = PPC_PMC_PA6T, 480 .cpu_setup = __setup_cpu_pa6t, 481 .cpu_restore = __restore_cpu_pa6t, 482 .oprofile_cpu_type = "ppc64/pa6t", 483 .oprofile_type = PPC_OPROFILE_PA6T, 484 .machine_check = machine_check_generic, 485 .platform = "pa6t", 486 }, 487 { /* default match */ 488 .pvr_mask = 0x00000000, 489 .pvr_value = 0x00000000, 490 .cpu_name = "POWER4 (compatible)", 491 .cpu_features = CPU_FTRS_COMPATIBLE, 492 .cpu_user_features = COMMON_USER_PPC64, 493 .mmu_features = MMU_FTR_HPTE_TABLE, 494 .icache_bsize = 128, 495 .dcache_bsize = 128, 496 .num_pmcs = 6, 497 .pmc_type = PPC_PMC_IBM, 498 .machine_check = machine_check_generic, 499 .platform = "power4", 500 } 501 #endif /* CONFIG_PPC64 */ 502 #ifdef CONFIG_PPC32 503 #if CLASSIC_PPC 504 { /* 601 */ 505 .pvr_mask = 0xffff0000, 506 .pvr_value = 0x00010000, 507 .cpu_name = "601", 508 .cpu_features = CPU_FTRS_PPC601, 509 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 510 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 511 .mmu_features = MMU_FTR_HPTE_TABLE, 512 .icache_bsize = 32, 513 .dcache_bsize = 32, 514 .machine_check = machine_check_generic, 515 .platform = "ppc601", 516 }, 517 { /* 603 */ 518 .pvr_mask = 0xffff0000, 519 .pvr_value = 0x00030000, 520 .cpu_name = "603", 521 .cpu_features = CPU_FTRS_603, 522 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 523 .mmu_features = 0, 524 .icache_bsize = 32, 525 .dcache_bsize = 32, 526 .cpu_setup = __setup_cpu_603, 527 .machine_check = machine_check_generic, 528 .platform = "ppc603", 529 }, 530 { /* 603e */ 531 .pvr_mask = 0xffff0000, 532 .pvr_value = 0x00060000, 533 .cpu_name = "603e", 534 .cpu_features = CPU_FTRS_603, 535 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 536 .mmu_features = 0, 537 .icache_bsize = 32, 538 .dcache_bsize = 32, 539 .cpu_setup = __setup_cpu_603, 540 .machine_check = machine_check_generic, 541 .platform = "ppc603", 542 }, 543 { /* 603ev */ 544 .pvr_mask = 0xffff0000, 545 .pvr_value = 0x00070000, 546 .cpu_name = "603ev", 547 .cpu_features = CPU_FTRS_603, 548 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 549 .mmu_features = 0, 550 .icache_bsize = 32, 551 .dcache_bsize = 32, 552 .cpu_setup = __setup_cpu_603, 553 .machine_check = machine_check_generic, 554 .platform = "ppc603", 555 }, 556 { /* 604 */ 557 .pvr_mask = 0xffff0000, 558 .pvr_value = 0x00040000, 559 .cpu_name = "604", 560 .cpu_features = CPU_FTRS_604, 561 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 562 .mmu_features = MMU_FTR_HPTE_TABLE, 563 .icache_bsize = 32, 564 .dcache_bsize = 32, 565 .num_pmcs = 2, 566 .cpu_setup = __setup_cpu_604, 567 .machine_check = machine_check_generic, 568 .platform = "ppc604", 569 }, 570 { /* 604e */ 571 .pvr_mask = 0xfffff000, 572 .pvr_value = 0x00090000, 573 .cpu_name = "604e", 574 .cpu_features = CPU_FTRS_604, 575 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 576 .mmu_features = MMU_FTR_HPTE_TABLE, 577 .icache_bsize = 32, 578 .dcache_bsize = 32, 579 .num_pmcs = 4, 580 .cpu_setup = __setup_cpu_604, 581 .machine_check = machine_check_generic, 582 .platform = "ppc604", 583 }, 584 { /* 604r */ 585 .pvr_mask = 0xffff0000, 586 .pvr_value = 0x00090000, 587 .cpu_name = "604r", 588 .cpu_features = CPU_FTRS_604, 589 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 590 .mmu_features = MMU_FTR_HPTE_TABLE, 591 .icache_bsize = 32, 592 .dcache_bsize = 32, 593 .num_pmcs = 4, 594 .cpu_setup = __setup_cpu_604, 595 .machine_check = machine_check_generic, 596 .platform = "ppc604", 597 }, 598 { /* 604ev */ 599 .pvr_mask = 0xffff0000, 600 .pvr_value = 0x000a0000, 601 .cpu_name = "604ev", 602 .cpu_features = CPU_FTRS_604, 603 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 604 .mmu_features = MMU_FTR_HPTE_TABLE, 605 .icache_bsize = 32, 606 .dcache_bsize = 32, 607 .num_pmcs = 4, 608 .cpu_setup = __setup_cpu_604, 609 .machine_check = machine_check_generic, 610 .platform = "ppc604", 611 }, 612 { /* 740/750 (0x4202, don't support TAU ?) */ 613 .pvr_mask = 0xffffffff, 614 .pvr_value = 0x00084202, 615 .cpu_name = "740/750", 616 .cpu_features = CPU_FTRS_740_NOTAU, 617 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 618 .mmu_features = MMU_FTR_HPTE_TABLE, 619 .icache_bsize = 32, 620 .dcache_bsize = 32, 621 .num_pmcs = 4, 622 .cpu_setup = __setup_cpu_750, 623 .machine_check = machine_check_generic, 624 .platform = "ppc750", 625 }, 626 { /* 750CX (80100 and 8010x?) */ 627 .pvr_mask = 0xfffffff0, 628 .pvr_value = 0x00080100, 629 .cpu_name = "750CX", 630 .cpu_features = CPU_FTRS_750, 631 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 632 .mmu_features = MMU_FTR_HPTE_TABLE, 633 .icache_bsize = 32, 634 .dcache_bsize = 32, 635 .num_pmcs = 4, 636 .cpu_setup = __setup_cpu_750cx, 637 .machine_check = machine_check_generic, 638 .platform = "ppc750", 639 }, 640 { /* 750CX (82201 and 82202) */ 641 .pvr_mask = 0xfffffff0, 642 .pvr_value = 0x00082200, 643 .cpu_name = "750CX", 644 .cpu_features = CPU_FTRS_750, 645 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 646 .mmu_features = MMU_FTR_HPTE_TABLE, 647 .icache_bsize = 32, 648 .dcache_bsize = 32, 649 .num_pmcs = 4, 650 .pmc_type = PPC_PMC_IBM, 651 .cpu_setup = __setup_cpu_750cx, 652 .machine_check = machine_check_generic, 653 .platform = "ppc750", 654 }, 655 { /* 750CXe (82214) */ 656 .pvr_mask = 0xfffffff0, 657 .pvr_value = 0x00082210, 658 .cpu_name = "750CXe", 659 .cpu_features = CPU_FTRS_750, 660 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 661 .mmu_features = MMU_FTR_HPTE_TABLE, 662 .icache_bsize = 32, 663 .dcache_bsize = 32, 664 .num_pmcs = 4, 665 .pmc_type = PPC_PMC_IBM, 666 .cpu_setup = __setup_cpu_750cx, 667 .machine_check = machine_check_generic, 668 .platform = "ppc750", 669 }, 670 { /* 750CXe "Gekko" (83214) */ 671 .pvr_mask = 0xffffffff, 672 .pvr_value = 0x00083214, 673 .cpu_name = "750CXe", 674 .cpu_features = CPU_FTRS_750, 675 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 676 .mmu_features = MMU_FTR_HPTE_TABLE, 677 .icache_bsize = 32, 678 .dcache_bsize = 32, 679 .num_pmcs = 4, 680 .pmc_type = PPC_PMC_IBM, 681 .cpu_setup = __setup_cpu_750cx, 682 .machine_check = machine_check_generic, 683 .platform = "ppc750", 684 }, 685 { /* 750CL */ 686 .pvr_mask = 0xfffff0f0, 687 .pvr_value = 0x00087010, 688 .cpu_name = "750CL", 689 .cpu_features = CPU_FTRS_750CL, 690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 691 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 692 .icache_bsize = 32, 693 .dcache_bsize = 32, 694 .num_pmcs = 4, 695 .pmc_type = PPC_PMC_IBM, 696 .cpu_setup = __setup_cpu_750, 697 .machine_check = machine_check_generic, 698 .platform = "ppc750", 699 }, 700 { /* 745/755 */ 701 .pvr_mask = 0xfffff000, 702 .pvr_value = 0x00083000, 703 .cpu_name = "745/755", 704 .cpu_features = CPU_FTRS_750, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 706 .mmu_features = MMU_FTR_HPTE_TABLE, 707 .icache_bsize = 32, 708 .dcache_bsize = 32, 709 .num_pmcs = 4, 710 .pmc_type = PPC_PMC_IBM, 711 .cpu_setup = __setup_cpu_750, 712 .machine_check = machine_check_generic, 713 .platform = "ppc750", 714 }, 715 { /* 750FX rev 1.x */ 716 .pvr_mask = 0xffffff00, 717 .pvr_value = 0x70000100, 718 .cpu_name = "750FX", 719 .cpu_features = CPU_FTRS_750FX1, 720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 721 .mmu_features = MMU_FTR_HPTE_TABLE, 722 .icache_bsize = 32, 723 .dcache_bsize = 32, 724 .num_pmcs = 4, 725 .pmc_type = PPC_PMC_IBM, 726 .cpu_setup = __setup_cpu_750, 727 .machine_check = machine_check_generic, 728 .platform = "ppc750", 729 }, 730 { /* 750FX rev 2.0 must disable HID0[DPM] */ 731 .pvr_mask = 0xffffffff, 732 .pvr_value = 0x70000200, 733 .cpu_name = "750FX", 734 .cpu_features = CPU_FTRS_750FX2, 735 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 736 .mmu_features = MMU_FTR_HPTE_TABLE, 737 .icache_bsize = 32, 738 .dcache_bsize = 32, 739 .num_pmcs = 4, 740 .pmc_type = PPC_PMC_IBM, 741 .cpu_setup = __setup_cpu_750, 742 .machine_check = machine_check_generic, 743 .platform = "ppc750", 744 }, 745 { /* 750FX (All revs except 2.0) */ 746 .pvr_mask = 0xffff0000, 747 .pvr_value = 0x70000000, 748 .cpu_name = "750FX", 749 .cpu_features = CPU_FTRS_750FX, 750 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 751 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 752 .icache_bsize = 32, 753 .dcache_bsize = 32, 754 .num_pmcs = 4, 755 .pmc_type = PPC_PMC_IBM, 756 .cpu_setup = __setup_cpu_750fx, 757 .machine_check = machine_check_generic, 758 .platform = "ppc750", 759 }, 760 { /* 750GX */ 761 .pvr_mask = 0xffff0000, 762 .pvr_value = 0x70020000, 763 .cpu_name = "750GX", 764 .cpu_features = CPU_FTRS_750GX, 765 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 766 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 767 .icache_bsize = 32, 768 .dcache_bsize = 32, 769 .num_pmcs = 4, 770 .pmc_type = PPC_PMC_IBM, 771 .cpu_setup = __setup_cpu_750fx, 772 .machine_check = machine_check_generic, 773 .platform = "ppc750", 774 }, 775 { /* 740/750 (L2CR bit need fixup for 740) */ 776 .pvr_mask = 0xffff0000, 777 .pvr_value = 0x00080000, 778 .cpu_name = "740/750", 779 .cpu_features = CPU_FTRS_740, 780 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 781 .mmu_features = MMU_FTR_HPTE_TABLE, 782 .icache_bsize = 32, 783 .dcache_bsize = 32, 784 .num_pmcs = 4, 785 .pmc_type = PPC_PMC_IBM, 786 .cpu_setup = __setup_cpu_750, 787 .machine_check = machine_check_generic, 788 .platform = "ppc750", 789 }, 790 { /* 7400 rev 1.1 ? (no TAU) */ 791 .pvr_mask = 0xffffffff, 792 .pvr_value = 0x000c1101, 793 .cpu_name = "7400 (1.1)", 794 .cpu_features = CPU_FTRS_7400_NOTAU, 795 .cpu_user_features = COMMON_USER | 796 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 797 .mmu_features = MMU_FTR_HPTE_TABLE, 798 .icache_bsize = 32, 799 .dcache_bsize = 32, 800 .num_pmcs = 4, 801 .pmc_type = PPC_PMC_G4, 802 .cpu_setup = __setup_cpu_7400, 803 .machine_check = machine_check_generic, 804 .platform = "ppc7400", 805 }, 806 { /* 7400 */ 807 .pvr_mask = 0xffff0000, 808 .pvr_value = 0x000c0000, 809 .cpu_name = "7400", 810 .cpu_features = CPU_FTRS_7400, 811 .cpu_user_features = COMMON_USER | 812 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 813 .mmu_features = MMU_FTR_HPTE_TABLE, 814 .icache_bsize = 32, 815 .dcache_bsize = 32, 816 .num_pmcs = 4, 817 .pmc_type = PPC_PMC_G4, 818 .cpu_setup = __setup_cpu_7400, 819 .machine_check = machine_check_generic, 820 .platform = "ppc7400", 821 }, 822 { /* 7410 */ 823 .pvr_mask = 0xffff0000, 824 .pvr_value = 0x800c0000, 825 .cpu_name = "7410", 826 .cpu_features = CPU_FTRS_7400, 827 .cpu_user_features = COMMON_USER | 828 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 829 .mmu_features = MMU_FTR_HPTE_TABLE, 830 .icache_bsize = 32, 831 .dcache_bsize = 32, 832 .num_pmcs = 4, 833 .pmc_type = PPC_PMC_G4, 834 .cpu_setup = __setup_cpu_7410, 835 .machine_check = machine_check_generic, 836 .platform = "ppc7400", 837 }, 838 { /* 7450 2.0 - no doze/nap */ 839 .pvr_mask = 0xffffffff, 840 .pvr_value = 0x80000200, 841 .cpu_name = "7450", 842 .cpu_features = CPU_FTRS_7450_20, 843 .cpu_user_features = COMMON_USER | 844 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 845 .mmu_features = MMU_FTR_HPTE_TABLE, 846 .icache_bsize = 32, 847 .dcache_bsize = 32, 848 .num_pmcs = 6, 849 .pmc_type = PPC_PMC_G4, 850 .cpu_setup = __setup_cpu_745x, 851 .oprofile_cpu_type = "ppc/7450", 852 .oprofile_type = PPC_OPROFILE_G4, 853 .machine_check = machine_check_generic, 854 .platform = "ppc7450", 855 }, 856 { /* 7450 2.1 */ 857 .pvr_mask = 0xffffffff, 858 .pvr_value = 0x80000201, 859 .cpu_name = "7450", 860 .cpu_features = CPU_FTRS_7450_21, 861 .cpu_user_features = COMMON_USER | 862 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 863 .mmu_features = MMU_FTR_HPTE_TABLE, 864 .icache_bsize = 32, 865 .dcache_bsize = 32, 866 .num_pmcs = 6, 867 .pmc_type = PPC_PMC_G4, 868 .cpu_setup = __setup_cpu_745x, 869 .oprofile_cpu_type = "ppc/7450", 870 .oprofile_type = PPC_OPROFILE_G4, 871 .machine_check = machine_check_generic, 872 .platform = "ppc7450", 873 }, 874 { /* 7450 2.3 and newer */ 875 .pvr_mask = 0xffff0000, 876 .pvr_value = 0x80000000, 877 .cpu_name = "7450", 878 .cpu_features = CPU_FTRS_7450_23, 879 .cpu_user_features = COMMON_USER | 880 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 881 .mmu_features = MMU_FTR_HPTE_TABLE, 882 .icache_bsize = 32, 883 .dcache_bsize = 32, 884 .num_pmcs = 6, 885 .pmc_type = PPC_PMC_G4, 886 .cpu_setup = __setup_cpu_745x, 887 .oprofile_cpu_type = "ppc/7450", 888 .oprofile_type = PPC_OPROFILE_G4, 889 .machine_check = machine_check_generic, 890 .platform = "ppc7450", 891 }, 892 { /* 7455 rev 1.x */ 893 .pvr_mask = 0xffffff00, 894 .pvr_value = 0x80010100, 895 .cpu_name = "7455", 896 .cpu_features = CPU_FTRS_7455_1, 897 .cpu_user_features = COMMON_USER | 898 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 899 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 900 .icache_bsize = 32, 901 .dcache_bsize = 32, 902 .num_pmcs = 6, 903 .pmc_type = PPC_PMC_G4, 904 .cpu_setup = __setup_cpu_745x, 905 .oprofile_cpu_type = "ppc/7450", 906 .oprofile_type = PPC_OPROFILE_G4, 907 .machine_check = machine_check_generic, 908 .platform = "ppc7450", 909 }, 910 { /* 7455 rev 2.0 */ 911 .pvr_mask = 0xffffffff, 912 .pvr_value = 0x80010200, 913 .cpu_name = "7455", 914 .cpu_features = CPU_FTRS_7455_20, 915 .cpu_user_features = COMMON_USER | 916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 917 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 918 .icache_bsize = 32, 919 .dcache_bsize = 32, 920 .num_pmcs = 6, 921 .pmc_type = PPC_PMC_G4, 922 .cpu_setup = __setup_cpu_745x, 923 .oprofile_cpu_type = "ppc/7450", 924 .oprofile_type = PPC_OPROFILE_G4, 925 .machine_check = machine_check_generic, 926 .platform = "ppc7450", 927 }, 928 { /* 7455 others */ 929 .pvr_mask = 0xffff0000, 930 .pvr_value = 0x80010000, 931 .cpu_name = "7455", 932 .cpu_features = CPU_FTRS_7455, 933 .cpu_user_features = COMMON_USER | 934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 935 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 936 .icache_bsize = 32, 937 .dcache_bsize = 32, 938 .num_pmcs = 6, 939 .pmc_type = PPC_PMC_G4, 940 .cpu_setup = __setup_cpu_745x, 941 .oprofile_cpu_type = "ppc/7450", 942 .oprofile_type = PPC_OPROFILE_G4, 943 .machine_check = machine_check_generic, 944 .platform = "ppc7450", 945 }, 946 { /* 7447/7457 Rev 1.0 */ 947 .pvr_mask = 0xffffffff, 948 .pvr_value = 0x80020100, 949 .cpu_name = "7447/7457", 950 .cpu_features = CPU_FTRS_7447_10, 951 .cpu_user_features = COMMON_USER | 952 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 953 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 954 .icache_bsize = 32, 955 .dcache_bsize = 32, 956 .num_pmcs = 6, 957 .pmc_type = PPC_PMC_G4, 958 .cpu_setup = __setup_cpu_745x, 959 .oprofile_cpu_type = "ppc/7450", 960 .oprofile_type = PPC_OPROFILE_G4, 961 .machine_check = machine_check_generic, 962 .platform = "ppc7450", 963 }, 964 { /* 7447/7457 Rev 1.1 */ 965 .pvr_mask = 0xffffffff, 966 .pvr_value = 0x80020101, 967 .cpu_name = "7447/7457", 968 .cpu_features = CPU_FTRS_7447_10, 969 .cpu_user_features = COMMON_USER | 970 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 971 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 972 .icache_bsize = 32, 973 .dcache_bsize = 32, 974 .num_pmcs = 6, 975 .pmc_type = PPC_PMC_G4, 976 .cpu_setup = __setup_cpu_745x, 977 .oprofile_cpu_type = "ppc/7450", 978 .oprofile_type = PPC_OPROFILE_G4, 979 .machine_check = machine_check_generic, 980 .platform = "ppc7450", 981 }, 982 { /* 7447/7457 Rev 1.2 and later */ 983 .pvr_mask = 0xffff0000, 984 .pvr_value = 0x80020000, 985 .cpu_name = "7447/7457", 986 .cpu_features = CPU_FTRS_7447, 987 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 988 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 989 .icache_bsize = 32, 990 .dcache_bsize = 32, 991 .num_pmcs = 6, 992 .pmc_type = PPC_PMC_G4, 993 .cpu_setup = __setup_cpu_745x, 994 .oprofile_cpu_type = "ppc/7450", 995 .oprofile_type = PPC_OPROFILE_G4, 996 .machine_check = machine_check_generic, 997 .platform = "ppc7450", 998 }, 999 { /* 7447A */ 1000 .pvr_mask = 0xffff0000, 1001 .pvr_value = 0x80030000, 1002 .cpu_name = "7447A", 1003 .cpu_features = CPU_FTRS_7447A, 1004 .cpu_user_features = COMMON_USER | 1005 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1006 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1007 .icache_bsize = 32, 1008 .dcache_bsize = 32, 1009 .num_pmcs = 6, 1010 .pmc_type = PPC_PMC_G4, 1011 .cpu_setup = __setup_cpu_745x, 1012 .oprofile_cpu_type = "ppc/7450", 1013 .oprofile_type = PPC_OPROFILE_G4, 1014 .machine_check = machine_check_generic, 1015 .platform = "ppc7450", 1016 }, 1017 { /* 7448 */ 1018 .pvr_mask = 0xffff0000, 1019 .pvr_value = 0x80040000, 1020 .cpu_name = "7448", 1021 .cpu_features = CPU_FTRS_7448, 1022 .cpu_user_features = COMMON_USER | 1023 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1024 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1025 .icache_bsize = 32, 1026 .dcache_bsize = 32, 1027 .num_pmcs = 6, 1028 .pmc_type = PPC_PMC_G4, 1029 .cpu_setup = __setup_cpu_745x, 1030 .oprofile_cpu_type = "ppc/7450", 1031 .oprofile_type = PPC_OPROFILE_G4, 1032 .machine_check = machine_check_generic, 1033 .platform = "ppc7450", 1034 }, 1035 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1036 .pvr_mask = 0x7fff0000, 1037 .pvr_value = 0x00810000, 1038 .cpu_name = "82xx", 1039 .cpu_features = CPU_FTRS_82XX, 1040 .cpu_user_features = COMMON_USER, 1041 .mmu_features = 0, 1042 .icache_bsize = 32, 1043 .dcache_bsize = 32, 1044 .cpu_setup = __setup_cpu_603, 1045 .machine_check = machine_check_generic, 1046 .platform = "ppc603", 1047 }, 1048 { /* All G2_LE (603e core, plus some) have the same pvr */ 1049 .pvr_mask = 0x7fff0000, 1050 .pvr_value = 0x00820000, 1051 .cpu_name = "G2_LE", 1052 .cpu_features = CPU_FTRS_G2_LE, 1053 .cpu_user_features = COMMON_USER, 1054 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1055 .icache_bsize = 32, 1056 .dcache_bsize = 32, 1057 .cpu_setup = __setup_cpu_603, 1058 .machine_check = machine_check_generic, 1059 .platform = "ppc603", 1060 }, 1061 { /* e300c1 (a 603e core, plus some) on 83xx */ 1062 .pvr_mask = 0x7fff0000, 1063 .pvr_value = 0x00830000, 1064 .cpu_name = "e300c1", 1065 .cpu_features = CPU_FTRS_E300, 1066 .cpu_user_features = COMMON_USER, 1067 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1068 .icache_bsize = 32, 1069 .dcache_bsize = 32, 1070 .cpu_setup = __setup_cpu_603, 1071 .machine_check = machine_check_generic, 1072 .platform = "ppc603", 1073 }, 1074 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1075 .pvr_mask = 0x7fff0000, 1076 .pvr_value = 0x00840000, 1077 .cpu_name = "e300c2", 1078 .cpu_features = CPU_FTRS_E300C2, 1079 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1080 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1081 .icache_bsize = 32, 1082 .dcache_bsize = 32, 1083 .cpu_setup = __setup_cpu_603, 1084 .machine_check = machine_check_generic, 1085 .platform = "ppc603", 1086 }, 1087 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1088 .pvr_mask = 0x7fff0000, 1089 .pvr_value = 0x00850000, 1090 .cpu_name = "e300c3", 1091 .cpu_features = CPU_FTRS_E300, 1092 .cpu_user_features = COMMON_USER, 1093 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1094 .icache_bsize = 32, 1095 .dcache_bsize = 32, 1096 .cpu_setup = __setup_cpu_603, 1097 .num_pmcs = 4, 1098 .oprofile_cpu_type = "ppc/e300", 1099 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1100 .platform = "ppc603", 1101 }, 1102 { /* e300c4 (e300c1, plus one IU) */ 1103 .pvr_mask = 0x7fff0000, 1104 .pvr_value = 0x00860000, 1105 .cpu_name = "e300c4", 1106 .cpu_features = CPU_FTRS_E300, 1107 .cpu_user_features = COMMON_USER, 1108 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1109 .icache_bsize = 32, 1110 .dcache_bsize = 32, 1111 .cpu_setup = __setup_cpu_603, 1112 .machine_check = machine_check_generic, 1113 .num_pmcs = 4, 1114 .oprofile_cpu_type = "ppc/e300", 1115 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1116 .platform = "ppc603", 1117 }, 1118 { /* default match, we assume split I/D cache & TB (non-601)... */ 1119 .pvr_mask = 0x00000000, 1120 .pvr_value = 0x00000000, 1121 .cpu_name = "(generic PPC)", 1122 .cpu_features = CPU_FTRS_CLASSIC32, 1123 .cpu_user_features = COMMON_USER, 1124 .mmu_features = MMU_FTR_HPTE_TABLE, 1125 .icache_bsize = 32, 1126 .dcache_bsize = 32, 1127 .machine_check = machine_check_generic, 1128 .platform = "ppc603", 1129 }, 1130 #endif /* CLASSIC_PPC */ 1131 #ifdef CONFIG_8xx 1132 { /* 8xx */ 1133 .pvr_mask = 0xffff0000, 1134 .pvr_value = 0x00500000, 1135 .cpu_name = "8xx", 1136 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1137 * if the 8xx code is there.... */ 1138 .cpu_features = CPU_FTRS_8XX, 1139 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1140 .mmu_features = MMU_FTR_TYPE_8xx, 1141 .icache_bsize = 16, 1142 .dcache_bsize = 16, 1143 .platform = "ppc823", 1144 }, 1145 #endif /* CONFIG_8xx */ 1146 #ifdef CONFIG_40x 1147 { /* 403GC */ 1148 .pvr_mask = 0xffffff00, 1149 .pvr_value = 0x00200200, 1150 .cpu_name = "403GC", 1151 .cpu_features = CPU_FTRS_40X, 1152 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1153 .mmu_features = MMU_FTR_TYPE_40x, 1154 .icache_bsize = 16, 1155 .dcache_bsize = 16, 1156 .machine_check = machine_check_4xx, 1157 .platform = "ppc403", 1158 }, 1159 { /* 403GCX */ 1160 .pvr_mask = 0xffffff00, 1161 .pvr_value = 0x00201400, 1162 .cpu_name = "403GCX", 1163 .cpu_features = CPU_FTRS_40X, 1164 .cpu_user_features = PPC_FEATURE_32 | 1165 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1166 .mmu_features = MMU_FTR_TYPE_40x, 1167 .icache_bsize = 16, 1168 .dcache_bsize = 16, 1169 .machine_check = machine_check_4xx, 1170 .platform = "ppc403", 1171 }, 1172 { /* 403G ?? */ 1173 .pvr_mask = 0xffff0000, 1174 .pvr_value = 0x00200000, 1175 .cpu_name = "403G ??", 1176 .cpu_features = CPU_FTRS_40X, 1177 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1178 .mmu_features = MMU_FTR_TYPE_40x, 1179 .icache_bsize = 16, 1180 .dcache_bsize = 16, 1181 .machine_check = machine_check_4xx, 1182 .platform = "ppc403", 1183 }, 1184 { /* 405GP */ 1185 .pvr_mask = 0xffff0000, 1186 .pvr_value = 0x40110000, 1187 .cpu_name = "405GP", 1188 .cpu_features = CPU_FTRS_40X, 1189 .cpu_user_features = PPC_FEATURE_32 | 1190 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1191 .mmu_features = MMU_FTR_TYPE_40x, 1192 .icache_bsize = 32, 1193 .dcache_bsize = 32, 1194 .machine_check = machine_check_4xx, 1195 .platform = "ppc405", 1196 }, 1197 { /* STB 03xxx */ 1198 .pvr_mask = 0xffff0000, 1199 .pvr_value = 0x40130000, 1200 .cpu_name = "STB03xxx", 1201 .cpu_features = CPU_FTRS_40X, 1202 .cpu_user_features = PPC_FEATURE_32 | 1203 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1204 .mmu_features = MMU_FTR_TYPE_40x, 1205 .icache_bsize = 32, 1206 .dcache_bsize = 32, 1207 .machine_check = machine_check_4xx, 1208 .platform = "ppc405", 1209 }, 1210 { /* STB 04xxx */ 1211 .pvr_mask = 0xffff0000, 1212 .pvr_value = 0x41810000, 1213 .cpu_name = "STB04xxx", 1214 .cpu_features = CPU_FTRS_40X, 1215 .cpu_user_features = PPC_FEATURE_32 | 1216 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1217 .mmu_features = MMU_FTR_TYPE_40x, 1218 .icache_bsize = 32, 1219 .dcache_bsize = 32, 1220 .machine_check = machine_check_4xx, 1221 .platform = "ppc405", 1222 }, 1223 { /* NP405L */ 1224 .pvr_mask = 0xffff0000, 1225 .pvr_value = 0x41610000, 1226 .cpu_name = "NP405L", 1227 .cpu_features = CPU_FTRS_40X, 1228 .cpu_user_features = PPC_FEATURE_32 | 1229 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1230 .mmu_features = MMU_FTR_TYPE_40x, 1231 .icache_bsize = 32, 1232 .dcache_bsize = 32, 1233 .machine_check = machine_check_4xx, 1234 .platform = "ppc405", 1235 }, 1236 { /* NP4GS3 */ 1237 .pvr_mask = 0xffff0000, 1238 .pvr_value = 0x40B10000, 1239 .cpu_name = "NP4GS3", 1240 .cpu_features = CPU_FTRS_40X, 1241 .cpu_user_features = PPC_FEATURE_32 | 1242 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1243 .mmu_features = MMU_FTR_TYPE_40x, 1244 .icache_bsize = 32, 1245 .dcache_bsize = 32, 1246 .machine_check = machine_check_4xx, 1247 .platform = "ppc405", 1248 }, 1249 { /* NP405H */ 1250 .pvr_mask = 0xffff0000, 1251 .pvr_value = 0x41410000, 1252 .cpu_name = "NP405H", 1253 .cpu_features = CPU_FTRS_40X, 1254 .cpu_user_features = PPC_FEATURE_32 | 1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1256 .mmu_features = MMU_FTR_TYPE_40x, 1257 .icache_bsize = 32, 1258 .dcache_bsize = 32, 1259 .machine_check = machine_check_4xx, 1260 .platform = "ppc405", 1261 }, 1262 { /* 405GPr */ 1263 .pvr_mask = 0xffff0000, 1264 .pvr_value = 0x50910000, 1265 .cpu_name = "405GPr", 1266 .cpu_features = CPU_FTRS_40X, 1267 .cpu_user_features = PPC_FEATURE_32 | 1268 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1269 .mmu_features = MMU_FTR_TYPE_40x, 1270 .icache_bsize = 32, 1271 .dcache_bsize = 32, 1272 .machine_check = machine_check_4xx, 1273 .platform = "ppc405", 1274 }, 1275 { /* STBx25xx */ 1276 .pvr_mask = 0xffff0000, 1277 .pvr_value = 0x51510000, 1278 .cpu_name = "STBx25xx", 1279 .cpu_features = CPU_FTRS_40X, 1280 .cpu_user_features = PPC_FEATURE_32 | 1281 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1282 .mmu_features = MMU_FTR_TYPE_40x, 1283 .icache_bsize = 32, 1284 .dcache_bsize = 32, 1285 .machine_check = machine_check_4xx, 1286 .platform = "ppc405", 1287 }, 1288 { /* 405LP */ 1289 .pvr_mask = 0xffff0000, 1290 .pvr_value = 0x41F10000, 1291 .cpu_name = "405LP", 1292 .cpu_features = CPU_FTRS_40X, 1293 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1294 .mmu_features = MMU_FTR_TYPE_40x, 1295 .icache_bsize = 32, 1296 .dcache_bsize = 32, 1297 .machine_check = machine_check_4xx, 1298 .platform = "ppc405", 1299 }, 1300 { /* Xilinx Virtex-II Pro */ 1301 .pvr_mask = 0xfffff000, 1302 .pvr_value = 0x20010000, 1303 .cpu_name = "Virtex-II Pro", 1304 .cpu_features = CPU_FTRS_40X, 1305 .cpu_user_features = PPC_FEATURE_32 | 1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1307 .mmu_features = MMU_FTR_TYPE_40x, 1308 .icache_bsize = 32, 1309 .dcache_bsize = 32, 1310 .machine_check = machine_check_4xx, 1311 .platform = "ppc405", 1312 }, 1313 { /* Xilinx Virtex-4 FX */ 1314 .pvr_mask = 0xfffff000, 1315 .pvr_value = 0x20011000, 1316 .cpu_name = "Virtex-4 FX", 1317 .cpu_features = CPU_FTRS_40X, 1318 .cpu_user_features = PPC_FEATURE_32 | 1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1320 .mmu_features = MMU_FTR_TYPE_40x, 1321 .icache_bsize = 32, 1322 .dcache_bsize = 32, 1323 .machine_check = machine_check_4xx, 1324 .platform = "ppc405", 1325 }, 1326 { /* 405EP */ 1327 .pvr_mask = 0xffff0000, 1328 .pvr_value = 0x51210000, 1329 .cpu_name = "405EP", 1330 .cpu_features = CPU_FTRS_40X, 1331 .cpu_user_features = PPC_FEATURE_32 | 1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1333 .mmu_features = MMU_FTR_TYPE_40x, 1334 .icache_bsize = 32, 1335 .dcache_bsize = 32, 1336 .machine_check = machine_check_4xx, 1337 .platform = "ppc405", 1338 }, 1339 { /* 405EX */ 1340 .pvr_mask = 0xffff0004, 1341 .pvr_value = 0x12910004, 1342 .cpu_name = "405EX", 1343 .cpu_features = CPU_FTRS_40X, 1344 .cpu_user_features = PPC_FEATURE_32 | 1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1346 .mmu_features = MMU_FTR_TYPE_40x, 1347 .icache_bsize = 32, 1348 .dcache_bsize = 32, 1349 .machine_check = machine_check_4xx, 1350 .platform = "ppc405", 1351 }, 1352 { /* 405EXr */ 1353 .pvr_mask = 0xffff0004, 1354 .pvr_value = 0x12910000, 1355 .cpu_name = "405EXr", 1356 .cpu_features = CPU_FTRS_40X, 1357 .cpu_user_features = PPC_FEATURE_32 | 1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1359 .mmu_features = MMU_FTR_TYPE_40x, 1360 .icache_bsize = 32, 1361 .dcache_bsize = 32, 1362 .machine_check = machine_check_4xx, 1363 .platform = "ppc405", 1364 }, 1365 { 1366 /* 405EZ */ 1367 .pvr_mask = 0xffff0000, 1368 .pvr_value = 0x41510000, 1369 .cpu_name = "405EZ", 1370 .cpu_features = CPU_FTRS_40X, 1371 .cpu_user_features = PPC_FEATURE_32 | 1372 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1373 .mmu_features = MMU_FTR_TYPE_40x, 1374 .icache_bsize = 32, 1375 .dcache_bsize = 32, 1376 .machine_check = machine_check_4xx, 1377 .platform = "ppc405", 1378 }, 1379 { /* default match */ 1380 .pvr_mask = 0x00000000, 1381 .pvr_value = 0x00000000, 1382 .cpu_name = "(generic 40x PPC)", 1383 .cpu_features = CPU_FTRS_40X, 1384 .cpu_user_features = PPC_FEATURE_32 | 1385 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1386 .mmu_features = MMU_FTR_TYPE_40x, 1387 .icache_bsize = 32, 1388 .dcache_bsize = 32, 1389 .machine_check = machine_check_4xx, 1390 .platform = "ppc405", 1391 } 1392 1393 #endif /* CONFIG_40x */ 1394 #ifdef CONFIG_44x 1395 { 1396 .pvr_mask = 0xf0000fff, 1397 .pvr_value = 0x40000850, 1398 .cpu_name = "440GR Rev. A", 1399 .cpu_features = CPU_FTRS_44X, 1400 .cpu_user_features = COMMON_USER_BOOKE, 1401 .mmu_features = MMU_FTR_TYPE_44x, 1402 .icache_bsize = 32, 1403 .dcache_bsize = 32, 1404 .machine_check = machine_check_4xx, 1405 .platform = "ppc440", 1406 }, 1407 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1408 .pvr_mask = 0xf0000fff, 1409 .pvr_value = 0x40000858, 1410 .cpu_name = "440EP Rev. A", 1411 .cpu_features = CPU_FTRS_44X, 1412 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1413 .mmu_features = MMU_FTR_TYPE_44x, 1414 .icache_bsize = 32, 1415 .dcache_bsize = 32, 1416 .cpu_setup = __setup_cpu_440ep, 1417 .machine_check = machine_check_4xx, 1418 .platform = "ppc440", 1419 }, 1420 { 1421 .pvr_mask = 0xf0000fff, 1422 .pvr_value = 0x400008d3, 1423 .cpu_name = "440GR Rev. B", 1424 .cpu_features = CPU_FTRS_44X, 1425 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1426 .mmu_features = MMU_FTR_TYPE_44x, 1427 .icache_bsize = 32, 1428 .dcache_bsize = 32, 1429 .machine_check = machine_check_4xx, 1430 .platform = "ppc440", 1431 }, 1432 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1433 .pvr_mask = 0xf0000ff7, 1434 .pvr_value = 0x400008d4, 1435 .cpu_name = "440EP Rev. C", 1436 .cpu_features = CPU_FTRS_44X, 1437 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1438 .mmu_features = MMU_FTR_TYPE_44x, 1439 .icache_bsize = 32, 1440 .dcache_bsize = 32, 1441 .cpu_setup = __setup_cpu_440ep, 1442 .machine_check = machine_check_4xx, 1443 .platform = "ppc440", 1444 }, 1445 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1446 .pvr_mask = 0xf0000fff, 1447 .pvr_value = 0x400008db, 1448 .cpu_name = "440EP Rev. B", 1449 .cpu_features = CPU_FTRS_44X, 1450 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1451 .mmu_features = MMU_FTR_TYPE_44x, 1452 .icache_bsize = 32, 1453 .dcache_bsize = 32, 1454 .cpu_setup = __setup_cpu_440ep, 1455 .machine_check = machine_check_4xx, 1456 .platform = "ppc440", 1457 }, 1458 { /* 440GRX */ 1459 .pvr_mask = 0xf0000ffb, 1460 .pvr_value = 0x200008D0, 1461 .cpu_name = "440GRX", 1462 .cpu_features = CPU_FTRS_44X, 1463 .cpu_user_features = COMMON_USER_BOOKE, 1464 .mmu_features = MMU_FTR_TYPE_44x, 1465 .icache_bsize = 32, 1466 .dcache_bsize = 32, 1467 .cpu_setup = __setup_cpu_440grx, 1468 .machine_check = machine_check_440A, 1469 .platform = "ppc440", 1470 }, 1471 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1472 .pvr_mask = 0xf0000ffb, 1473 .pvr_value = 0x200008D8, 1474 .cpu_name = "440EPX", 1475 .cpu_features = CPU_FTRS_44X, 1476 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1477 .mmu_features = MMU_FTR_TYPE_44x, 1478 .icache_bsize = 32, 1479 .dcache_bsize = 32, 1480 .cpu_setup = __setup_cpu_440epx, 1481 .machine_check = machine_check_440A, 1482 .platform = "ppc440", 1483 }, 1484 { /* 440GP Rev. B */ 1485 .pvr_mask = 0xf0000fff, 1486 .pvr_value = 0x40000440, 1487 .cpu_name = "440GP Rev. B", 1488 .cpu_features = CPU_FTRS_44X, 1489 .cpu_user_features = COMMON_USER_BOOKE, 1490 .mmu_features = MMU_FTR_TYPE_44x, 1491 .icache_bsize = 32, 1492 .dcache_bsize = 32, 1493 .machine_check = machine_check_4xx, 1494 .platform = "ppc440gp", 1495 }, 1496 { /* 440GP Rev. C */ 1497 .pvr_mask = 0xf0000fff, 1498 .pvr_value = 0x40000481, 1499 .cpu_name = "440GP Rev. C", 1500 .cpu_features = CPU_FTRS_44X, 1501 .cpu_user_features = COMMON_USER_BOOKE, 1502 .mmu_features = MMU_FTR_TYPE_44x, 1503 .icache_bsize = 32, 1504 .dcache_bsize = 32, 1505 .machine_check = machine_check_4xx, 1506 .platform = "ppc440gp", 1507 }, 1508 { /* 440GX Rev. A */ 1509 .pvr_mask = 0xf0000fff, 1510 .pvr_value = 0x50000850, 1511 .cpu_name = "440GX Rev. A", 1512 .cpu_features = CPU_FTRS_44X, 1513 .cpu_user_features = COMMON_USER_BOOKE, 1514 .mmu_features = MMU_FTR_TYPE_44x, 1515 .icache_bsize = 32, 1516 .dcache_bsize = 32, 1517 .cpu_setup = __setup_cpu_440gx, 1518 .machine_check = machine_check_440A, 1519 .platform = "ppc440", 1520 }, 1521 { /* 440GX Rev. B */ 1522 .pvr_mask = 0xf0000fff, 1523 .pvr_value = 0x50000851, 1524 .cpu_name = "440GX Rev. B", 1525 .cpu_features = CPU_FTRS_44X, 1526 .cpu_user_features = COMMON_USER_BOOKE, 1527 .mmu_features = MMU_FTR_TYPE_44x, 1528 .icache_bsize = 32, 1529 .dcache_bsize = 32, 1530 .cpu_setup = __setup_cpu_440gx, 1531 .machine_check = machine_check_440A, 1532 .platform = "ppc440", 1533 }, 1534 { /* 440GX Rev. C */ 1535 .pvr_mask = 0xf0000fff, 1536 .pvr_value = 0x50000892, 1537 .cpu_name = "440GX Rev. C", 1538 .cpu_features = CPU_FTRS_44X, 1539 .cpu_user_features = COMMON_USER_BOOKE, 1540 .mmu_features = MMU_FTR_TYPE_44x, 1541 .icache_bsize = 32, 1542 .dcache_bsize = 32, 1543 .cpu_setup = __setup_cpu_440gx, 1544 .machine_check = machine_check_440A, 1545 .platform = "ppc440", 1546 }, 1547 { /* 440GX Rev. F */ 1548 .pvr_mask = 0xf0000fff, 1549 .pvr_value = 0x50000894, 1550 .cpu_name = "440GX Rev. F", 1551 .cpu_features = CPU_FTRS_44X, 1552 .cpu_user_features = COMMON_USER_BOOKE, 1553 .mmu_features = MMU_FTR_TYPE_44x, 1554 .icache_bsize = 32, 1555 .dcache_bsize = 32, 1556 .cpu_setup = __setup_cpu_440gx, 1557 .machine_check = machine_check_440A, 1558 .platform = "ppc440", 1559 }, 1560 { /* 440SP Rev. A */ 1561 .pvr_mask = 0xfff00fff, 1562 .pvr_value = 0x53200891, 1563 .cpu_name = "440SP Rev. A", 1564 .cpu_features = CPU_FTRS_44X, 1565 .cpu_user_features = COMMON_USER_BOOKE, 1566 .mmu_features = MMU_FTR_TYPE_44x, 1567 .icache_bsize = 32, 1568 .dcache_bsize = 32, 1569 .machine_check = machine_check_4xx, 1570 .platform = "ppc440", 1571 }, 1572 { /* 440SPe Rev. A */ 1573 .pvr_mask = 0xfff00fff, 1574 .pvr_value = 0x53400890, 1575 .cpu_name = "440SPe Rev. A", 1576 .cpu_features = CPU_FTRS_44X, 1577 .cpu_user_features = COMMON_USER_BOOKE, 1578 .mmu_features = MMU_FTR_TYPE_44x, 1579 .icache_bsize = 32, 1580 .dcache_bsize = 32, 1581 .cpu_setup = __setup_cpu_440spe, 1582 .machine_check = machine_check_440A, 1583 .platform = "ppc440", 1584 }, 1585 { /* 440SPe Rev. B */ 1586 .pvr_mask = 0xfff00fff, 1587 .pvr_value = 0x53400891, 1588 .cpu_name = "440SPe Rev. B", 1589 .cpu_features = CPU_FTRS_44X, 1590 .cpu_user_features = COMMON_USER_BOOKE, 1591 .mmu_features = MMU_FTR_TYPE_44x, 1592 .icache_bsize = 32, 1593 .dcache_bsize = 32, 1594 .cpu_setup = __setup_cpu_440spe, 1595 .machine_check = machine_check_440A, 1596 .platform = "ppc440", 1597 }, 1598 { /* 440 in Xilinx Virtex-5 FXT */ 1599 .pvr_mask = 0xfffffff0, 1600 .pvr_value = 0x7ff21910, 1601 .cpu_name = "440 in Virtex-5 FXT", 1602 .cpu_features = CPU_FTRS_44X, 1603 .cpu_user_features = COMMON_USER_BOOKE, 1604 .mmu_features = MMU_FTR_TYPE_44x, 1605 .icache_bsize = 32, 1606 .dcache_bsize = 32, 1607 .cpu_setup = __setup_cpu_440x5, 1608 .machine_check = machine_check_440A, 1609 .platform = "ppc440", 1610 }, 1611 { /* 460EX */ 1612 .pvr_mask = 0xffff0002, 1613 .pvr_value = 0x13020002, 1614 .cpu_name = "460EX", 1615 .cpu_features = CPU_FTRS_440x6, 1616 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1617 .mmu_features = MMU_FTR_TYPE_44x, 1618 .icache_bsize = 32, 1619 .dcache_bsize = 32, 1620 .cpu_setup = __setup_cpu_460ex, 1621 .machine_check = machine_check_440A, 1622 .platform = "ppc440", 1623 }, 1624 { /* 460GT */ 1625 .pvr_mask = 0xffff0002, 1626 .pvr_value = 0x13020000, 1627 .cpu_name = "460GT", 1628 .cpu_features = CPU_FTRS_440x6, 1629 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1630 .mmu_features = MMU_FTR_TYPE_44x, 1631 .icache_bsize = 32, 1632 .dcache_bsize = 32, 1633 .cpu_setup = __setup_cpu_460gt, 1634 .machine_check = machine_check_440A, 1635 .platform = "ppc440", 1636 }, 1637 { /* default match */ 1638 .pvr_mask = 0x00000000, 1639 .pvr_value = 0x00000000, 1640 .cpu_name = "(generic 44x PPC)", 1641 .cpu_features = CPU_FTRS_44X, 1642 .cpu_user_features = COMMON_USER_BOOKE, 1643 .mmu_features = MMU_FTR_TYPE_44x, 1644 .icache_bsize = 32, 1645 .dcache_bsize = 32, 1646 .machine_check = machine_check_4xx, 1647 .platform = "ppc440", 1648 } 1649 #endif /* CONFIG_44x */ 1650 #ifdef CONFIG_E200 1651 { /* e200z5 */ 1652 .pvr_mask = 0xfff00000, 1653 .pvr_value = 0x81000000, 1654 .cpu_name = "e200z5", 1655 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1656 .cpu_features = CPU_FTRS_E200, 1657 .cpu_user_features = COMMON_USER_BOOKE | 1658 PPC_FEATURE_HAS_EFP_SINGLE | 1659 PPC_FEATURE_UNIFIED_CACHE, 1660 .mmu_features = MMU_FTR_TYPE_FSL_E, 1661 .dcache_bsize = 32, 1662 .machine_check = machine_check_e200, 1663 .platform = "ppc5554", 1664 }, 1665 { /* e200z6 */ 1666 .pvr_mask = 0xfff00000, 1667 .pvr_value = 0x81100000, 1668 .cpu_name = "e200z6", 1669 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1670 .cpu_features = CPU_FTRS_E200, 1671 .cpu_user_features = COMMON_USER_BOOKE | 1672 PPC_FEATURE_HAS_SPE_COMP | 1673 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1674 PPC_FEATURE_UNIFIED_CACHE, 1675 .mmu_features = MMU_FTR_TYPE_FSL_E, 1676 .dcache_bsize = 32, 1677 .machine_check = machine_check_e200, 1678 .platform = "ppc5554", 1679 }, 1680 { /* default match */ 1681 .pvr_mask = 0x00000000, 1682 .pvr_value = 0x00000000, 1683 .cpu_name = "(generic E200 PPC)", 1684 .cpu_features = CPU_FTRS_E200, 1685 .cpu_user_features = COMMON_USER_BOOKE | 1686 PPC_FEATURE_HAS_EFP_SINGLE | 1687 PPC_FEATURE_UNIFIED_CACHE, 1688 .mmu_features = MMU_FTR_TYPE_FSL_E, 1689 .dcache_bsize = 32, 1690 .machine_check = machine_check_e200, 1691 .platform = "ppc5554", 1692 } 1693 #endif /* CONFIG_E200 */ 1694 #ifdef CONFIG_E500 1695 { /* e500 */ 1696 .pvr_mask = 0xffff0000, 1697 .pvr_value = 0x80200000, 1698 .cpu_name = "e500", 1699 .cpu_features = CPU_FTRS_E500, 1700 .cpu_user_features = COMMON_USER_BOOKE | 1701 PPC_FEATURE_HAS_SPE_COMP | 1702 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1703 .mmu_features = MMU_FTR_TYPE_FSL_E, 1704 .icache_bsize = 32, 1705 .dcache_bsize = 32, 1706 .num_pmcs = 4, 1707 .oprofile_cpu_type = "ppc/e500", 1708 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1709 .machine_check = machine_check_e500, 1710 .platform = "ppc8540", 1711 }, 1712 { /* e500v2 */ 1713 .pvr_mask = 0xffff0000, 1714 .pvr_value = 0x80210000, 1715 .cpu_name = "e500v2", 1716 .cpu_features = CPU_FTRS_E500_2, 1717 .cpu_user_features = COMMON_USER_BOOKE | 1718 PPC_FEATURE_HAS_SPE_COMP | 1719 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1720 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1721 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1722 .icache_bsize = 32, 1723 .dcache_bsize = 32, 1724 .num_pmcs = 4, 1725 .oprofile_cpu_type = "ppc/e500", 1726 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1727 .machine_check = machine_check_e500, 1728 .platform = "ppc8548", 1729 }, 1730 { /* e500mc */ 1731 .pvr_mask = 0xffff0000, 1732 .pvr_value = 0x80230000, 1733 .cpu_name = "e500mc", 1734 .cpu_features = CPU_FTRS_E500MC, 1735 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1736 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1737 .icache_bsize = 64, 1738 .dcache_bsize = 64, 1739 .num_pmcs = 4, 1740 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1741 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1742 .machine_check = machine_check_e500, 1743 .platform = "ppce500mc", 1744 }, 1745 { /* default match */ 1746 .pvr_mask = 0x00000000, 1747 .pvr_value = 0x00000000, 1748 .cpu_name = "(generic E500 PPC)", 1749 .cpu_features = CPU_FTRS_E500, 1750 .cpu_user_features = COMMON_USER_BOOKE | 1751 PPC_FEATURE_HAS_SPE_COMP | 1752 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1753 .mmu_features = MMU_FTR_TYPE_FSL_E, 1754 .icache_bsize = 32, 1755 .dcache_bsize = 32, 1756 .machine_check = machine_check_e500, 1757 .platform = "powerpc", 1758 } 1759 #endif /* CONFIG_E500 */ 1760 #endif /* CONFIG_PPC32 */ 1761 }; 1762 1763 static struct cpu_spec the_cpu_spec; 1764 1765 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1766 { 1767 struct cpu_spec *s = cpu_specs; 1768 struct cpu_spec *t = &the_cpu_spec; 1769 int i; 1770 1771 s = PTRRELOC(s); 1772 t = PTRRELOC(t); 1773 1774 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) 1775 if ((pvr & s->pvr_mask) == s->pvr_value) { 1776 /* 1777 * If we are overriding a previous value derived 1778 * from the real PVR with a new value obtained 1779 * using a logical PVR value, don't modify the 1780 * performance monitor fields. 1781 */ 1782 if (t->num_pmcs && !s->num_pmcs) { 1783 t->cpu_name = s->cpu_name; 1784 t->cpu_features = s->cpu_features; 1785 t->cpu_user_features = s->cpu_user_features; 1786 t->icache_bsize = s->icache_bsize; 1787 t->dcache_bsize = s->dcache_bsize; 1788 t->cpu_setup = s->cpu_setup; 1789 t->cpu_restore = s->cpu_restore; 1790 t->platform = s->platform; 1791 /* 1792 * If we have passed through this logic once 1793 * before and have pulled the default case 1794 * because the real PVR was not found inside 1795 * cpu_specs[], then we are possibly running in 1796 * compatibility mode. In that case, let the 1797 * oprofiler know which set of compatibility 1798 * counters to pull from by making sure the 1799 * oprofile_cpu_type string is set to that of 1800 * compatibility mode. If the oprofile_cpu_type 1801 * already has a value, then we are possibly 1802 * overriding a real PVR with a logical one, and, 1803 * in that case, keep the current value for 1804 * oprofile_cpu_type. 1805 */ 1806 if (t->oprofile_cpu_type == NULL) 1807 t->oprofile_cpu_type = s->oprofile_cpu_type; 1808 } else 1809 *t = *s; 1810 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1811 1812 /* 1813 * Set the base platform string once; assumes 1814 * we're called with real pvr first. 1815 */ 1816 if (*PTRRELOC(&powerpc_base_platform) == NULL) 1817 *PTRRELOC(&powerpc_base_platform) = t->platform; 1818 1819 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1820 /* ppc64 and booke expect identify_cpu to also call 1821 * setup_cpu for that processor. I will consolidate 1822 * that at a later time, for now, just use #ifdef. 1823 * we also don't need to PTRRELOC the function pointer 1824 * on ppc64 and booke as we are running at 0 in real 1825 * mode on ppc64 and reloc_offset is always 0 on booke. 1826 */ 1827 if (s->cpu_setup) { 1828 s->cpu_setup(offset, s); 1829 } 1830 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1831 return s; 1832 } 1833 BUG(); 1834 return NULL; 1835 } 1836