1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Common time prototypes and such for all ppc machines. 4 * 5 * Written by Cort Dougan (cort@cs.nmt.edu) to merge 6 * Paul Mackerras' version and mine for PReP and Pmac. 7 */ 8 9 #ifndef __POWERPC_TIME_H 10 #define __POWERPC_TIME_H 11 12 #ifdef __KERNEL__ 13 #include <linux/types.h> 14 #include <linux/percpu.h> 15 16 #include <asm/processor.h> 17 #include <asm/cpu_has_feature.h> 18 19 /* time.c */ 20 extern unsigned long tb_ticks_per_jiffy; 21 extern unsigned long tb_ticks_per_usec; 22 extern unsigned long tb_ticks_per_sec; 23 extern struct clock_event_device decrementer_clockevent; 24 25 26 extern void generic_calibrate_decr(void); 27 28 /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 29 extern unsigned long ppc_proc_freq; 30 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 31 extern unsigned long ppc_tb_freq; 32 #define DEFAULT_TB_FREQ 125000000UL 33 34 extern bool tb_invalid; 35 36 struct div_result { 37 u64 result_high; 38 u64 result_low; 39 }; 40 41 #ifdef CONFIG_PPC64 42 43 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ 44 #define get_tbl get_tb 45 46 #else 47 48 static inline unsigned long get_tbl(void) 49 { 50 return mftbl(); 51 } 52 53 static inline unsigned int get_tbu(void) 54 { 55 return mftbu(); 56 } 57 #endif /* !CONFIG_PPC64 */ 58 59 static inline u64 get_vtb(void) 60 { 61 #ifdef CONFIG_PPC_BOOK3S_64 62 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 63 return mfspr(SPRN_VTB); 64 #endif 65 return 0; 66 } 67 68 #ifdef CONFIG_PPC64 69 static inline u64 get_tb(void) 70 { 71 return mftb(); 72 } 73 #else /* CONFIG_PPC64 */ 74 static inline u64 get_tb(void) 75 { 76 unsigned int tbhi, tblo, tbhi2; 77 78 do { 79 tbhi = get_tbu(); 80 tblo = get_tbl(); 81 tbhi2 = get_tbu(); 82 } while (tbhi != tbhi2); 83 84 return ((u64)tbhi << 32) | tblo; 85 } 86 #endif /* !CONFIG_PPC64 */ 87 88 static inline u64 get_tb_or_rtc(void) 89 { 90 return get_tb(); 91 } 92 93 static inline void set_tb(unsigned int upper, unsigned int lower) 94 { 95 mtspr(SPRN_TBWL, 0); 96 mtspr(SPRN_TBWU, upper); 97 mtspr(SPRN_TBWL, lower); 98 } 99 100 /* Accessor functions for the decrementer register. 101 * The 4xx doesn't even have a decrementer. I tried to use the 102 * generic timer interrupt code, which seems OK, with the 4xx PIT 103 * in auto-reload mode. The problem is PIT stops counting when it 104 * hits zero. If it would wrap, we could use it just like a decrementer. 105 */ 106 static inline u64 get_dec(void) 107 { 108 #if defined(CONFIG_40x) 109 return (mfspr(SPRN_PIT)); 110 #else 111 return (mfspr(SPRN_DEC)); 112 #endif 113 } 114 115 /* 116 * Note: Book E and 4xx processors differ from other PowerPC processors 117 * in when the decrementer generates its interrupt: on the 1 to 0 118 * transition for Book E/4xx, but on the 0 to -1 transition for others. 119 */ 120 static inline void set_dec(u64 val) 121 { 122 #if defined(CONFIG_40x) 123 mtspr(SPRN_PIT, (u32) val); 124 #else 125 #ifndef CONFIG_BOOKE 126 --val; 127 #endif 128 mtspr(SPRN_DEC, val); 129 #endif /* not 40x */ 130 } 131 132 static inline unsigned long tb_ticks_since(unsigned long tstamp) 133 { 134 return get_tbl() - tstamp; 135 } 136 137 #define mulhwu(x,y) \ 138 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 139 140 #ifdef CONFIG_PPC64 141 #define mulhdu(x,y) \ 142 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 143 #else 144 extern u64 mulhdu(u64, u64); 145 #endif 146 147 extern void div128_by_32(u64 dividend_high, u64 dividend_low, 148 unsigned divisor, struct div_result *dr); 149 150 extern void secondary_cpu_time_init(void); 151 extern void __init time_init(void); 152 153 DECLARE_PER_CPU(u64, decrementers_next_tb); 154 155 /* Convert timebase ticks to nanoseconds */ 156 unsigned long long tb_to_ns(unsigned long long tb_ticks); 157 158 /* SPLPAR */ 159 void accumulate_stolen_time(void); 160 161 #endif /* __KERNEL__ */ 162 #endif /* __POWERPC_TIME_H */ 163