xref: /openbmc/linux/arch/powerpc/include/asm/page_64.h (revision 7aa0727f3302931e698b3a7979ae5b9a4600da4e)
1b8b572e1SStephen Rothwell #ifndef _ASM_POWERPC_PAGE_64_H
2b8b572e1SStephen Rothwell #define _ASM_POWERPC_PAGE_64_H
3b8b572e1SStephen Rothwell 
4b8b572e1SStephen Rothwell /*
5b8b572e1SStephen Rothwell  * Copyright (C) 2001 PPC64 Team, IBM Corp
6b8b572e1SStephen Rothwell  *
7b8b572e1SStephen Rothwell  * This program is free software; you can redistribute it and/or
8b8b572e1SStephen Rothwell  * modify it under the terms of the GNU General Public License
9b8b572e1SStephen Rothwell  * as published by the Free Software Foundation; either version
10b8b572e1SStephen Rothwell  * 2 of the License, or (at your option) any later version.
11b8b572e1SStephen Rothwell  */
12b8b572e1SStephen Rothwell 
13b8b572e1SStephen Rothwell /*
14b8b572e1SStephen Rothwell  * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
15b8b572e1SStephen Rothwell  * specific, every notion of page number shared with the firmware, TCEs,
16b8b572e1SStephen Rothwell  * iommu, etc... still uses a page size of 4K.
17b8b572e1SStephen Rothwell  */
18b8b572e1SStephen Rothwell #define HW_PAGE_SHIFT		12
19b8b572e1SStephen Rothwell #define HW_PAGE_SIZE		(ASM_CONST(1) << HW_PAGE_SHIFT)
20b8b572e1SStephen Rothwell #define HW_PAGE_MASK		(~(HW_PAGE_SIZE-1))
21b8b572e1SStephen Rothwell 
22b8b572e1SStephen Rothwell /*
23b8b572e1SStephen Rothwell  * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
24b8b572e1SStephen Rothwell  * HW_PAGE_SHIFT, that is 4K pages.
25b8b572e1SStephen Rothwell  */
26b8b572e1SStephen Rothwell #define PAGE_FACTOR		(PAGE_SHIFT - HW_PAGE_SHIFT)
27b8b572e1SStephen Rothwell 
28b8b572e1SStephen Rothwell /* Segment size; normal 256M segments */
29b8b572e1SStephen Rothwell #define SID_SHIFT		28
30b8b572e1SStephen Rothwell #define SID_MASK		ASM_CONST(0xfffffffff)
31b8b572e1SStephen Rothwell #define ESID_MASK		0xfffffffff0000000UL
32b8b572e1SStephen Rothwell #define GET_ESID(x)		(((x) >> SID_SHIFT) & SID_MASK)
33b8b572e1SStephen Rothwell 
34b8b572e1SStephen Rothwell /* 1T segments */
35b8b572e1SStephen Rothwell #define SID_SHIFT_1T		40
36b8b572e1SStephen Rothwell #define SID_MASK_1T		0xffffffUL
37b8b572e1SStephen Rothwell #define ESID_MASK_1T		0xffffff0000000000UL
38b8b572e1SStephen Rothwell #define GET_ESID_1T(x)		(((x) >> SID_SHIFT_1T) & SID_MASK_1T)
39b8b572e1SStephen Rothwell 
40b8b572e1SStephen Rothwell #ifndef __ASSEMBLY__
41b8b572e1SStephen Rothwell #include <asm/cache.h>
42b8b572e1SStephen Rothwell 
43b8b572e1SStephen Rothwell typedef unsigned long pte_basic_t;
44b8b572e1SStephen Rothwell 
45b8b572e1SStephen Rothwell static __inline__ void clear_page(void *addr)
46b8b572e1SStephen Rothwell {
47b8b572e1SStephen Rothwell 	unsigned long lines, line_size;
48b8b572e1SStephen Rothwell 
49b8b572e1SStephen Rothwell 	line_size = ppc64_caches.dline_size;
50b8b572e1SStephen Rothwell 	lines = ppc64_caches.dlines_per_page;
51b8b572e1SStephen Rothwell 
52b8b572e1SStephen Rothwell 	__asm__ __volatile__(
53b8b572e1SStephen Rothwell 	"mtctr	%1	# clear_page\n\
54b8b572e1SStephen Rothwell 1:      dcbz	0,%0\n\
55b8b572e1SStephen Rothwell 	add	%0,%0,%3\n\
56b8b572e1SStephen Rothwell 	bdnz+	1b"
57b8b572e1SStephen Rothwell         : "=r" (addr)
58b8b572e1SStephen Rothwell         : "r" (lines), "0" (addr), "r" (line_size)
59b8b572e1SStephen Rothwell 	: "ctr", "memory");
60b8b572e1SStephen Rothwell }
61b8b572e1SStephen Rothwell 
62d988f0e3SAnton Blanchard extern void copy_page(void *to, void *from);
63b8b572e1SStephen Rothwell 
64b8b572e1SStephen Rothwell /* Log 2 of page table size */
65b8b572e1SStephen Rothwell extern u64 ppc64_pft_size;
66b8b572e1SStephen Rothwell 
67b8b572e1SStephen Rothwell #endif /* __ASSEMBLY__ */
68b8b572e1SStephen Rothwell 
69b8b572e1SStephen Rothwell #ifdef CONFIG_PPC_MM_SLICES
70b8b572e1SStephen Rothwell 
71b8b572e1SStephen Rothwell #define SLICE_LOW_SHIFT		28
72b8b572e1SStephen Rothwell #define SLICE_HIGH_SHIFT	40
73b8b572e1SStephen Rothwell 
74b8b572e1SStephen Rothwell #define SLICE_LOW_TOP		(0x100000000ul)
75b8b572e1SStephen Rothwell #define SLICE_NUM_LOW		(SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
76b8b572e1SStephen Rothwell #define SLICE_NUM_HIGH		(PGTABLE_RANGE >> SLICE_HIGH_SHIFT)
77b8b572e1SStephen Rothwell 
78b8b572e1SStephen Rothwell #define GET_LOW_SLICE_INDEX(addr)	((addr) >> SLICE_LOW_SHIFT)
79b8b572e1SStephen Rothwell #define GET_HIGH_SLICE_INDEX(addr)	((addr) >> SLICE_HIGH_SHIFT)
80b8b572e1SStephen Rothwell 
81b8b572e1SStephen Rothwell #ifndef __ASSEMBLY__
82b8b572e1SStephen Rothwell 
83b8b572e1SStephen Rothwell struct slice_mask {
84b8b572e1SStephen Rothwell 	u16 low_slices;
85*7aa0727fSAneesh Kumar K.V 	/*
86*7aa0727fSAneesh Kumar K.V 	 * This should be derived out of PGTABLE_RANGE. For the current
87*7aa0727fSAneesh Kumar K.V 	 * max 64TB, u64 should be ok.
88*7aa0727fSAneesh Kumar K.V 	 */
89*7aa0727fSAneesh Kumar K.V 	u64 high_slices;
90b8b572e1SStephen Rothwell };
91b8b572e1SStephen Rothwell 
92b8b572e1SStephen Rothwell struct mm_struct;
93b8b572e1SStephen Rothwell 
94b8b572e1SStephen Rothwell extern unsigned long slice_get_unmapped_area(unsigned long addr,
95b8b572e1SStephen Rothwell 					     unsigned long len,
96b8b572e1SStephen Rothwell 					     unsigned long flags,
97b8b572e1SStephen Rothwell 					     unsigned int psize,
98b8b572e1SStephen Rothwell 					     int topdown,
99b8b572e1SStephen Rothwell 					     int use_cache);
100b8b572e1SStephen Rothwell 
101b8b572e1SStephen Rothwell extern unsigned int get_slice_psize(struct mm_struct *mm,
102b8b572e1SStephen Rothwell 				    unsigned long addr);
103b8b572e1SStephen Rothwell 
104b8b572e1SStephen Rothwell extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
105b8b572e1SStephen Rothwell extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
106b8b572e1SStephen Rothwell extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
107b8b572e1SStephen Rothwell 				  unsigned long len, unsigned int psize);
108b8b572e1SStephen Rothwell 
109ee7a2aa3SMichael Ellerman #define slice_mm_new_context(mm)	((mm)->context.id == MMU_NO_CONTEXT)
110b8b572e1SStephen Rothwell 
111b8b572e1SStephen Rothwell #endif /* __ASSEMBLY__ */
112b8b572e1SStephen Rothwell #else
113b8b572e1SStephen Rothwell #define slice_init()
11457e2a99fSBenjamin Herrenschmidt #ifdef CONFIG_PPC_STD_MMU_64
115b8b572e1SStephen Rothwell #define get_slice_psize(mm, addr)	((mm)->context.user_psize)
116b8b572e1SStephen Rothwell #define slice_set_user_psize(mm, psize)		\
117b8b572e1SStephen Rothwell do {						\
118b8b572e1SStephen Rothwell 	(mm)->context.user_psize = (psize);	\
119b8b572e1SStephen Rothwell 	(mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
120b8b572e1SStephen Rothwell } while (0)
12157e2a99fSBenjamin Herrenschmidt #else /* CONFIG_PPC_STD_MMU_64 */
12257e2a99fSBenjamin Herrenschmidt #ifdef CONFIG_PPC_64K_PAGES
12357e2a99fSBenjamin Herrenschmidt #define get_slice_psize(mm, addr)	MMU_PAGE_64K
12457e2a99fSBenjamin Herrenschmidt #else /* CONFIG_PPC_64K_PAGES */
12557e2a99fSBenjamin Herrenschmidt #define get_slice_psize(mm, addr)	MMU_PAGE_4K
12657e2a99fSBenjamin Herrenschmidt #endif /* !CONFIG_PPC_64K_PAGES */
12757e2a99fSBenjamin Herrenschmidt #define slice_set_user_psize(mm, psize)	do { BUG(); } while(0)
12857e2a99fSBenjamin Herrenschmidt #endif /* !CONFIG_PPC_STD_MMU_64 */
12957e2a99fSBenjamin Herrenschmidt 
130b8b572e1SStephen Rothwell #define slice_set_range_psize(mm, start, len, psize)	\
131b8b572e1SStephen Rothwell 	slice_set_user_psize((mm), (psize))
132b8b572e1SStephen Rothwell #define slice_mm_new_context(mm)	1
133b8b572e1SStephen Rothwell #endif /* CONFIG_PPC_MM_SLICES */
134b8b572e1SStephen Rothwell 
135b8b572e1SStephen Rothwell #ifdef CONFIG_HUGETLB_PAGE
136b8b572e1SStephen Rothwell 
13776512959SBecky Bruce #ifdef CONFIG_PPC_MM_SLICES
138b8b572e1SStephen Rothwell #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
13976512959SBecky Bruce #endif
140b8b572e1SStephen Rothwell 
141b8b572e1SStephen Rothwell #endif /* !CONFIG_HUGETLB_PAGE */
142b8b572e1SStephen Rothwell 
143b8b572e1SStephen Rothwell #define VM_DATA_DEFAULT_FLAGS \
144cab175f9SDenis Kirjanov 	(is_32bit_task() ? \
145b8b572e1SStephen Rothwell 	 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
146b8b572e1SStephen Rothwell 
147b8b572e1SStephen Rothwell /*
148b8b572e1SStephen Rothwell  * This is the default if a program doesn't have a PT_GNU_STACK
149b8b572e1SStephen Rothwell  * program header entry. The PPC64 ELF ABI has a non executable stack
15025985edcSLucas De Marchi  * stack by default, so in the absence of a PT_GNU_STACK program header
151b8b572e1SStephen Rothwell  * we turn execute permission off.
152b8b572e1SStephen Rothwell  */
153b8b572e1SStephen Rothwell #define VM_STACK_DEFAULT_FLAGS32	(VM_READ | VM_WRITE | VM_EXEC | \
154b8b572e1SStephen Rothwell 					 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
155b8b572e1SStephen Rothwell 
156b8b572e1SStephen Rothwell #define VM_STACK_DEFAULT_FLAGS64	(VM_READ | VM_WRITE | \
157b8b572e1SStephen Rothwell 					 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
158b8b572e1SStephen Rothwell 
159b8b572e1SStephen Rothwell #define VM_STACK_DEFAULT_FLAGS \
160cab175f9SDenis Kirjanov 	(is_32bit_task() ? \
161b8b572e1SStephen Rothwell 	 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
162b8b572e1SStephen Rothwell 
1635b17e1cdSArnd Bergmann #include <asm-generic/getorder.h>
164b8b572e1SStephen Rothwell 
165b8b572e1SStephen Rothwell #endif /* _ASM_POWERPC_PAGE_64_H */
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