1*873e65bcSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2b8b572e1SStephen Rothwell /* 3b8b572e1SStephen Rothwell * PS3 hvcall interface. 4b8b572e1SStephen Rothwell * 5b8b572e1SStephen Rothwell * Copyright (C) 2006 Sony Computer Entertainment Inc. 6b8b572e1SStephen Rothwell * Copyright 2006 Sony Corp. 7b8b572e1SStephen Rothwell * Copyright 2003, 2004 (c) MontaVista Software, Inc. 8b8b572e1SStephen Rothwell */ 9b8b572e1SStephen Rothwell 10b8b572e1SStephen Rothwell #if !defined(_ASM_POWERPC_LV1CALL_H) 11b8b572e1SStephen Rothwell #define _ASM_POWERPC_LV1CALL_H 12b8b572e1SStephen Rothwell 13b8b572e1SStephen Rothwell #if !defined(__ASSEMBLY__) 14b8b572e1SStephen Rothwell 15b8b572e1SStephen Rothwell #include <linux/types.h> 1666b15db6SPaul Gortmaker #include <linux/export.h> 17b8b572e1SStephen Rothwell 18b8b572e1SStephen Rothwell /* lv1 call declaration macros */ 19b8b572e1SStephen Rothwell 20b8b572e1SStephen Rothwell #define LV1_1_IN_ARG_DECL u64 in_1 21b8b572e1SStephen Rothwell #define LV1_2_IN_ARG_DECL LV1_1_IN_ARG_DECL, u64 in_2 22b8b572e1SStephen Rothwell #define LV1_3_IN_ARG_DECL LV1_2_IN_ARG_DECL, u64 in_3 23b8b572e1SStephen Rothwell #define LV1_4_IN_ARG_DECL LV1_3_IN_ARG_DECL, u64 in_4 24b8b572e1SStephen Rothwell #define LV1_5_IN_ARG_DECL LV1_4_IN_ARG_DECL, u64 in_5 25b8b572e1SStephen Rothwell #define LV1_6_IN_ARG_DECL LV1_5_IN_ARG_DECL, u64 in_6 26b8b572e1SStephen Rothwell #define LV1_7_IN_ARG_DECL LV1_6_IN_ARG_DECL, u64 in_7 27b8b572e1SStephen Rothwell #define LV1_8_IN_ARG_DECL LV1_7_IN_ARG_DECL, u64 in_8 28b8b572e1SStephen Rothwell #define LV1_1_OUT_ARG_DECL u64 *out_1 29b8b572e1SStephen Rothwell #define LV1_2_OUT_ARG_DECL LV1_1_OUT_ARG_DECL, u64 *out_2 30b8b572e1SStephen Rothwell #define LV1_3_OUT_ARG_DECL LV1_2_OUT_ARG_DECL, u64 *out_3 31b8b572e1SStephen Rothwell #define LV1_4_OUT_ARG_DECL LV1_3_OUT_ARG_DECL, u64 *out_4 32b8b572e1SStephen Rothwell #define LV1_5_OUT_ARG_DECL LV1_4_OUT_ARG_DECL, u64 *out_5 33b8b572e1SStephen Rothwell #define LV1_6_OUT_ARG_DECL LV1_5_OUT_ARG_DECL, u64 *out_6 34b8b572e1SStephen Rothwell #define LV1_7_OUT_ARG_DECL LV1_6_OUT_ARG_DECL, u64 *out_7 35b8b572e1SStephen Rothwell 36b8b572e1SStephen Rothwell #define LV1_0_IN_0_OUT_ARG_DECL void 37b8b572e1SStephen Rothwell #define LV1_1_IN_0_OUT_ARG_DECL LV1_1_IN_ARG_DECL 38b8b572e1SStephen Rothwell #define LV1_2_IN_0_OUT_ARG_DECL LV1_2_IN_ARG_DECL 39b8b572e1SStephen Rothwell #define LV1_3_IN_0_OUT_ARG_DECL LV1_3_IN_ARG_DECL 40b8b572e1SStephen Rothwell #define LV1_4_IN_0_OUT_ARG_DECL LV1_4_IN_ARG_DECL 41b8b572e1SStephen Rothwell #define LV1_5_IN_0_OUT_ARG_DECL LV1_5_IN_ARG_DECL 42b8b572e1SStephen Rothwell #define LV1_6_IN_0_OUT_ARG_DECL LV1_6_IN_ARG_DECL 43b8b572e1SStephen Rothwell #define LV1_7_IN_0_OUT_ARG_DECL LV1_7_IN_ARG_DECL 44b8b572e1SStephen Rothwell 45b8b572e1SStephen Rothwell #define LV1_0_IN_1_OUT_ARG_DECL LV1_1_OUT_ARG_DECL 46b8b572e1SStephen Rothwell #define LV1_1_IN_1_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 47b8b572e1SStephen Rothwell #define LV1_2_IN_1_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 48b8b572e1SStephen Rothwell #define LV1_3_IN_1_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 49b8b572e1SStephen Rothwell #define LV1_4_IN_1_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 50b8b572e1SStephen Rothwell #define LV1_5_IN_1_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 51b8b572e1SStephen Rothwell #define LV1_6_IN_1_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 52b8b572e1SStephen Rothwell #define LV1_7_IN_1_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 53b8b572e1SStephen Rothwell #define LV1_8_IN_1_OUT_ARG_DECL LV1_8_IN_ARG_DECL, LV1_1_OUT_ARG_DECL 54b8b572e1SStephen Rothwell 55b8b572e1SStephen Rothwell #define LV1_0_IN_2_OUT_ARG_DECL LV1_2_OUT_ARG_DECL 56b8b572e1SStephen Rothwell #define LV1_1_IN_2_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 57b8b572e1SStephen Rothwell #define LV1_2_IN_2_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 58b8b572e1SStephen Rothwell #define LV1_3_IN_2_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 59b8b572e1SStephen Rothwell #define LV1_4_IN_2_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 60b8b572e1SStephen Rothwell #define LV1_5_IN_2_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 61b8b572e1SStephen Rothwell #define LV1_6_IN_2_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 62b8b572e1SStephen Rothwell #define LV1_7_IN_2_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_2_OUT_ARG_DECL 63b8b572e1SStephen Rothwell 64b8b572e1SStephen Rothwell #define LV1_0_IN_3_OUT_ARG_DECL LV1_3_OUT_ARG_DECL 65b8b572e1SStephen Rothwell #define LV1_1_IN_3_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 66b8b572e1SStephen Rothwell #define LV1_2_IN_3_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 67b8b572e1SStephen Rothwell #define LV1_3_IN_3_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 68b8b572e1SStephen Rothwell #define LV1_4_IN_3_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 69b8b572e1SStephen Rothwell #define LV1_5_IN_3_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 70b8b572e1SStephen Rothwell #define LV1_6_IN_3_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 71b8b572e1SStephen Rothwell #define LV1_7_IN_3_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_3_OUT_ARG_DECL 72b8b572e1SStephen Rothwell 73b8b572e1SStephen Rothwell #define LV1_0_IN_4_OUT_ARG_DECL LV1_4_OUT_ARG_DECL 74b8b572e1SStephen Rothwell #define LV1_1_IN_4_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 75b8b572e1SStephen Rothwell #define LV1_2_IN_4_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 76b8b572e1SStephen Rothwell #define LV1_3_IN_4_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 77b8b572e1SStephen Rothwell #define LV1_4_IN_4_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 78b8b572e1SStephen Rothwell #define LV1_5_IN_4_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 79b8b572e1SStephen Rothwell #define LV1_6_IN_4_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 80b8b572e1SStephen Rothwell #define LV1_7_IN_4_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_4_OUT_ARG_DECL 81b8b572e1SStephen Rothwell 82b8b572e1SStephen Rothwell #define LV1_0_IN_5_OUT_ARG_DECL LV1_5_OUT_ARG_DECL 83b8b572e1SStephen Rothwell #define LV1_1_IN_5_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 84b8b572e1SStephen Rothwell #define LV1_2_IN_5_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 85b8b572e1SStephen Rothwell #define LV1_3_IN_5_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 86b8b572e1SStephen Rothwell #define LV1_4_IN_5_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 87b8b572e1SStephen Rothwell #define LV1_5_IN_5_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 88b8b572e1SStephen Rothwell #define LV1_6_IN_5_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 89b8b572e1SStephen Rothwell #define LV1_7_IN_5_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_5_OUT_ARG_DECL 90b8b572e1SStephen Rothwell 91b8b572e1SStephen Rothwell #define LV1_0_IN_6_OUT_ARG_DECL LV1_6_OUT_ARG_DECL 92b8b572e1SStephen Rothwell #define LV1_1_IN_6_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 93b8b572e1SStephen Rothwell #define LV1_2_IN_6_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 94b8b572e1SStephen Rothwell #define LV1_3_IN_6_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 95b8b572e1SStephen Rothwell #define LV1_4_IN_6_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 96b8b572e1SStephen Rothwell #define LV1_5_IN_6_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 97b8b572e1SStephen Rothwell #define LV1_6_IN_6_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 98b8b572e1SStephen Rothwell #define LV1_7_IN_6_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_6_OUT_ARG_DECL 99b8b572e1SStephen Rothwell 100b8b572e1SStephen Rothwell #define LV1_0_IN_7_OUT_ARG_DECL LV1_7_OUT_ARG_DECL 101b8b572e1SStephen Rothwell #define LV1_1_IN_7_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 102b8b572e1SStephen Rothwell #define LV1_2_IN_7_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 103b8b572e1SStephen Rothwell #define LV1_3_IN_7_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 104b8b572e1SStephen Rothwell #define LV1_4_IN_7_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 105b8b572e1SStephen Rothwell #define LV1_5_IN_7_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 106b8b572e1SStephen Rothwell #define LV1_6_IN_7_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 107b8b572e1SStephen Rothwell #define LV1_7_IN_7_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_7_OUT_ARG_DECL 108b8b572e1SStephen Rothwell 109b8b572e1SStephen Rothwell #define LV1_1_IN_ARGS in_1 110b8b572e1SStephen Rothwell #define LV1_2_IN_ARGS LV1_1_IN_ARGS, in_2 111b8b572e1SStephen Rothwell #define LV1_3_IN_ARGS LV1_2_IN_ARGS, in_3 112b8b572e1SStephen Rothwell #define LV1_4_IN_ARGS LV1_3_IN_ARGS, in_4 113b8b572e1SStephen Rothwell #define LV1_5_IN_ARGS LV1_4_IN_ARGS, in_5 114b8b572e1SStephen Rothwell #define LV1_6_IN_ARGS LV1_5_IN_ARGS, in_6 115b8b572e1SStephen Rothwell #define LV1_7_IN_ARGS LV1_6_IN_ARGS, in_7 116b8b572e1SStephen Rothwell #define LV1_8_IN_ARGS LV1_7_IN_ARGS, in_8 117b8b572e1SStephen Rothwell 118b8b572e1SStephen Rothwell #define LV1_1_OUT_ARGS out_1 119b8b572e1SStephen Rothwell #define LV1_2_OUT_ARGS LV1_1_OUT_ARGS, out_2 120b8b572e1SStephen Rothwell #define LV1_3_OUT_ARGS LV1_2_OUT_ARGS, out_3 121b8b572e1SStephen Rothwell #define LV1_4_OUT_ARGS LV1_3_OUT_ARGS, out_4 122b8b572e1SStephen Rothwell #define LV1_5_OUT_ARGS LV1_4_OUT_ARGS, out_5 123b8b572e1SStephen Rothwell #define LV1_6_OUT_ARGS LV1_5_OUT_ARGS, out_6 124b8b572e1SStephen Rothwell #define LV1_7_OUT_ARGS LV1_6_OUT_ARGS, out_7 125b8b572e1SStephen Rothwell 126b8b572e1SStephen Rothwell #define LV1_0_IN_0_OUT_ARGS 127b8b572e1SStephen Rothwell #define LV1_1_IN_0_OUT_ARGS LV1_1_IN_ARGS 128b8b572e1SStephen Rothwell #define LV1_2_IN_0_OUT_ARGS LV1_2_IN_ARGS 129b8b572e1SStephen Rothwell #define LV1_3_IN_0_OUT_ARGS LV1_3_IN_ARGS 130b8b572e1SStephen Rothwell #define LV1_4_IN_0_OUT_ARGS LV1_4_IN_ARGS 131b8b572e1SStephen Rothwell #define LV1_5_IN_0_OUT_ARGS LV1_5_IN_ARGS 132b8b572e1SStephen Rothwell #define LV1_6_IN_0_OUT_ARGS LV1_6_IN_ARGS 133b8b572e1SStephen Rothwell #define LV1_7_IN_0_OUT_ARGS LV1_7_IN_ARGS 134b8b572e1SStephen Rothwell 135b8b572e1SStephen Rothwell #define LV1_0_IN_1_OUT_ARGS LV1_1_OUT_ARGS 136b8b572e1SStephen Rothwell #define LV1_1_IN_1_OUT_ARGS LV1_1_IN_ARGS, LV1_1_OUT_ARGS 137b8b572e1SStephen Rothwell #define LV1_2_IN_1_OUT_ARGS LV1_2_IN_ARGS, LV1_1_OUT_ARGS 138b8b572e1SStephen Rothwell #define LV1_3_IN_1_OUT_ARGS LV1_3_IN_ARGS, LV1_1_OUT_ARGS 139b8b572e1SStephen Rothwell #define LV1_4_IN_1_OUT_ARGS LV1_4_IN_ARGS, LV1_1_OUT_ARGS 140b8b572e1SStephen Rothwell #define LV1_5_IN_1_OUT_ARGS LV1_5_IN_ARGS, LV1_1_OUT_ARGS 141b8b572e1SStephen Rothwell #define LV1_6_IN_1_OUT_ARGS LV1_6_IN_ARGS, LV1_1_OUT_ARGS 142b8b572e1SStephen Rothwell #define LV1_7_IN_1_OUT_ARGS LV1_7_IN_ARGS, LV1_1_OUT_ARGS 143b8b572e1SStephen Rothwell #define LV1_8_IN_1_OUT_ARGS LV1_8_IN_ARGS, LV1_1_OUT_ARGS 144b8b572e1SStephen Rothwell 145b8b572e1SStephen Rothwell #define LV1_0_IN_2_OUT_ARGS LV1_2_OUT_ARGS 146b8b572e1SStephen Rothwell #define LV1_1_IN_2_OUT_ARGS LV1_1_IN_ARGS, LV1_2_OUT_ARGS 147b8b572e1SStephen Rothwell #define LV1_2_IN_2_OUT_ARGS LV1_2_IN_ARGS, LV1_2_OUT_ARGS 148b8b572e1SStephen Rothwell #define LV1_3_IN_2_OUT_ARGS LV1_3_IN_ARGS, LV1_2_OUT_ARGS 149b8b572e1SStephen Rothwell #define LV1_4_IN_2_OUT_ARGS LV1_4_IN_ARGS, LV1_2_OUT_ARGS 150b8b572e1SStephen Rothwell #define LV1_5_IN_2_OUT_ARGS LV1_5_IN_ARGS, LV1_2_OUT_ARGS 151b8b572e1SStephen Rothwell #define LV1_6_IN_2_OUT_ARGS LV1_6_IN_ARGS, LV1_2_OUT_ARGS 152b8b572e1SStephen Rothwell #define LV1_7_IN_2_OUT_ARGS LV1_7_IN_ARGS, LV1_2_OUT_ARGS 153b8b572e1SStephen Rothwell 154b8b572e1SStephen Rothwell #define LV1_0_IN_3_OUT_ARGS LV1_3_OUT_ARGS 155b8b572e1SStephen Rothwell #define LV1_1_IN_3_OUT_ARGS LV1_1_IN_ARGS, LV1_3_OUT_ARGS 156b8b572e1SStephen Rothwell #define LV1_2_IN_3_OUT_ARGS LV1_2_IN_ARGS, LV1_3_OUT_ARGS 157b8b572e1SStephen Rothwell #define LV1_3_IN_3_OUT_ARGS LV1_3_IN_ARGS, LV1_3_OUT_ARGS 158b8b572e1SStephen Rothwell #define LV1_4_IN_3_OUT_ARGS LV1_4_IN_ARGS, LV1_3_OUT_ARGS 159b8b572e1SStephen Rothwell #define LV1_5_IN_3_OUT_ARGS LV1_5_IN_ARGS, LV1_3_OUT_ARGS 160b8b572e1SStephen Rothwell #define LV1_6_IN_3_OUT_ARGS LV1_6_IN_ARGS, LV1_3_OUT_ARGS 161b8b572e1SStephen Rothwell #define LV1_7_IN_3_OUT_ARGS LV1_7_IN_ARGS, LV1_3_OUT_ARGS 162b8b572e1SStephen Rothwell 163b8b572e1SStephen Rothwell #define LV1_0_IN_4_OUT_ARGS LV1_4_OUT_ARGS 164b8b572e1SStephen Rothwell #define LV1_1_IN_4_OUT_ARGS LV1_1_IN_ARGS, LV1_4_OUT_ARGS 165b8b572e1SStephen Rothwell #define LV1_2_IN_4_OUT_ARGS LV1_2_IN_ARGS, LV1_4_OUT_ARGS 166b8b572e1SStephen Rothwell #define LV1_3_IN_4_OUT_ARGS LV1_3_IN_ARGS, LV1_4_OUT_ARGS 167b8b572e1SStephen Rothwell #define LV1_4_IN_4_OUT_ARGS LV1_4_IN_ARGS, LV1_4_OUT_ARGS 168b8b572e1SStephen Rothwell #define LV1_5_IN_4_OUT_ARGS LV1_5_IN_ARGS, LV1_4_OUT_ARGS 169b8b572e1SStephen Rothwell #define LV1_6_IN_4_OUT_ARGS LV1_6_IN_ARGS, LV1_4_OUT_ARGS 170b8b572e1SStephen Rothwell #define LV1_7_IN_4_OUT_ARGS LV1_7_IN_ARGS, LV1_4_OUT_ARGS 171b8b572e1SStephen Rothwell 172b8b572e1SStephen Rothwell #define LV1_0_IN_5_OUT_ARGS LV1_5_OUT_ARGS 173b8b572e1SStephen Rothwell #define LV1_1_IN_5_OUT_ARGS LV1_1_IN_ARGS, LV1_5_OUT_ARGS 174b8b572e1SStephen Rothwell #define LV1_2_IN_5_OUT_ARGS LV1_2_IN_ARGS, LV1_5_OUT_ARGS 175b8b572e1SStephen Rothwell #define LV1_3_IN_5_OUT_ARGS LV1_3_IN_ARGS, LV1_5_OUT_ARGS 176b8b572e1SStephen Rothwell #define LV1_4_IN_5_OUT_ARGS LV1_4_IN_ARGS, LV1_5_OUT_ARGS 177b8b572e1SStephen Rothwell #define LV1_5_IN_5_OUT_ARGS LV1_5_IN_ARGS, LV1_5_OUT_ARGS 178b8b572e1SStephen Rothwell #define LV1_6_IN_5_OUT_ARGS LV1_6_IN_ARGS, LV1_5_OUT_ARGS 179b8b572e1SStephen Rothwell #define LV1_7_IN_5_OUT_ARGS LV1_7_IN_ARGS, LV1_5_OUT_ARGS 180b8b572e1SStephen Rothwell 181b8b572e1SStephen Rothwell #define LV1_0_IN_6_OUT_ARGS LV1_6_OUT_ARGS 182b8b572e1SStephen Rothwell #define LV1_1_IN_6_OUT_ARGS LV1_1_IN_ARGS, LV1_6_OUT_ARGS 183b8b572e1SStephen Rothwell #define LV1_2_IN_6_OUT_ARGS LV1_2_IN_ARGS, LV1_6_OUT_ARGS 184b8b572e1SStephen Rothwell #define LV1_3_IN_6_OUT_ARGS LV1_3_IN_ARGS, LV1_6_OUT_ARGS 185b8b572e1SStephen Rothwell #define LV1_4_IN_6_OUT_ARGS LV1_4_IN_ARGS, LV1_6_OUT_ARGS 186b8b572e1SStephen Rothwell #define LV1_5_IN_6_OUT_ARGS LV1_5_IN_ARGS, LV1_6_OUT_ARGS 187b8b572e1SStephen Rothwell #define LV1_6_IN_6_OUT_ARGS LV1_6_IN_ARGS, LV1_6_OUT_ARGS 188b8b572e1SStephen Rothwell #define LV1_7_IN_6_OUT_ARGS LV1_7_IN_ARGS, LV1_6_OUT_ARGS 189b8b572e1SStephen Rothwell 190b8b572e1SStephen Rothwell #define LV1_0_IN_7_OUT_ARGS LV1_7_OUT_ARGS 191b8b572e1SStephen Rothwell #define LV1_1_IN_7_OUT_ARGS LV1_1_IN_ARGS, LV1_7_OUT_ARGS 192b8b572e1SStephen Rothwell #define LV1_2_IN_7_OUT_ARGS LV1_2_IN_ARGS, LV1_7_OUT_ARGS 193b8b572e1SStephen Rothwell #define LV1_3_IN_7_OUT_ARGS LV1_3_IN_ARGS, LV1_7_OUT_ARGS 194b8b572e1SStephen Rothwell #define LV1_4_IN_7_OUT_ARGS LV1_4_IN_ARGS, LV1_7_OUT_ARGS 195b8b572e1SStephen Rothwell #define LV1_5_IN_7_OUT_ARGS LV1_5_IN_ARGS, LV1_7_OUT_ARGS 196b8b572e1SStephen Rothwell #define LV1_6_IN_7_OUT_ARGS LV1_6_IN_ARGS, LV1_7_OUT_ARGS 197b8b572e1SStephen Rothwell #define LV1_7_IN_7_OUT_ARGS LV1_7_IN_ARGS, LV1_7_OUT_ARGS 198b8b572e1SStephen Rothwell 199b8b572e1SStephen Rothwell /* 200b8b572e1SStephen Rothwell * This LV1_CALL() macro is for use by callers. It expands into an 201b8b572e1SStephen Rothwell * inline call wrapper and an underscored HV call declaration. The 202b8b572e1SStephen Rothwell * wrapper can be used to instrument the lv1 call interface. The 203b8b572e1SStephen Rothwell * file lv1call.S defines its own LV1_CALL() macro to expand into 204b8b572e1SStephen Rothwell * the actual underscored call definition. 205b8b572e1SStephen Rothwell */ 206b8b572e1SStephen Rothwell 207b8b572e1SStephen Rothwell #if !defined(LV1_CALL) 208b8b572e1SStephen Rothwell #define LV1_CALL(name, in, out, num) \ 209b8b572e1SStephen Rothwell extern s64 _lv1_##name(LV1_##in##_IN_##out##_OUT_ARG_DECL); \ 210b8b572e1SStephen Rothwell static inline int lv1_##name(LV1_##in##_IN_##out##_OUT_ARG_DECL) \ 211b8b572e1SStephen Rothwell {return _lv1_##name(LV1_##in##_IN_##out##_OUT_ARGS);} 212b8b572e1SStephen Rothwell #endif 213b8b572e1SStephen Rothwell 214b8b572e1SStephen Rothwell #endif /* !defined(__ASSEMBLY__) */ 215b8b572e1SStephen Rothwell 216b8b572e1SStephen Rothwell /* lv1 call table */ 217b8b572e1SStephen Rothwell 218b8b572e1SStephen Rothwell LV1_CALL(allocate_memory, 4, 2, 0 ) 219b8b572e1SStephen Rothwell LV1_CALL(write_htab_entry, 4, 0, 1 ) 220b8b572e1SStephen Rothwell LV1_CALL(construct_virtual_address_space, 3, 2, 2 ) 221b8b572e1SStephen Rothwell LV1_CALL(invalidate_htab_entries, 5, 0, 3 ) 222b5ecc559SGeoff Levand LV1_CALL(get_virtual_address_space_id_of_ppe, 0, 1, 4 ) 223b8b572e1SStephen Rothwell LV1_CALL(query_logical_partition_address_region_info, 1, 5, 6 ) 224b8b572e1SStephen Rothwell LV1_CALL(select_virtual_address_space, 1, 0, 7 ) 225b8b572e1SStephen Rothwell LV1_CALL(pause, 1, 0, 9 ) 226b8b572e1SStephen Rothwell LV1_CALL(destruct_virtual_address_space, 1, 0, 10 ) 227b8b572e1SStephen Rothwell LV1_CALL(configure_irq_state_bitmap, 3, 0, 11 ) 228b8b572e1SStephen Rothwell LV1_CALL(connect_irq_plug_ext, 5, 0, 12 ) 229b8b572e1SStephen Rothwell LV1_CALL(release_memory, 1, 0, 13 ) 230b8b572e1SStephen Rothwell LV1_CALL(put_iopte, 5, 0, 15 ) 231b8b572e1SStephen Rothwell LV1_CALL(disconnect_irq_plug_ext, 3, 0, 17 ) 232b8b572e1SStephen Rothwell LV1_CALL(construct_event_receive_port, 0, 1, 18 ) 233b8b572e1SStephen Rothwell LV1_CALL(destruct_event_receive_port, 1, 0, 19 ) 234b8b572e1SStephen Rothwell LV1_CALL(send_event_locally, 1, 0, 24 ) 235b8b572e1SStephen Rothwell LV1_CALL(end_of_interrupt, 1, 0, 27 ) 236b8b572e1SStephen Rothwell LV1_CALL(connect_irq_plug, 2, 0, 28 ) 237b8b572e1SStephen Rothwell LV1_CALL(disconnect_irq_plug, 1, 0, 29 ) 238b8b572e1SStephen Rothwell LV1_CALL(end_of_interrupt_ext, 3, 0, 30 ) 239b8b572e1SStephen Rothwell LV1_CALL(did_update_interrupt_mask, 2, 0, 31 ) 240b8b572e1SStephen Rothwell LV1_CALL(shutdown_logical_partition, 1, 0, 44 ) 241b8b572e1SStephen Rothwell LV1_CALL(destruct_logical_spe, 1, 0, 54 ) 242b8b572e1SStephen Rothwell LV1_CALL(construct_logical_spe, 7, 6, 57 ) 243b8b572e1SStephen Rothwell LV1_CALL(set_spe_interrupt_mask, 3, 0, 61 ) 244b8b572e1SStephen Rothwell LV1_CALL(set_spe_transition_notifier, 3, 0, 64 ) 245b8b572e1SStephen Rothwell LV1_CALL(disable_logical_spe, 2, 0, 65 ) 246b8b572e1SStephen Rothwell LV1_CALL(clear_spe_interrupt_status, 4, 0, 66 ) 247b8b572e1SStephen Rothwell LV1_CALL(get_spe_interrupt_status, 2, 1, 67 ) 248b8b572e1SStephen Rothwell LV1_CALL(get_logical_ppe_id, 0, 1, 69 ) 249b8b572e1SStephen Rothwell LV1_CALL(set_interrupt_mask, 5, 0, 73 ) 250b8b572e1SStephen Rothwell LV1_CALL(get_logical_partition_id, 0, 1, 74 ) 251b8b572e1SStephen Rothwell LV1_CALL(configure_execution_time_variable, 1, 0, 77 ) 252b8b572e1SStephen Rothwell LV1_CALL(get_spe_irq_outlet, 2, 1, 78 ) 253b8b572e1SStephen Rothwell LV1_CALL(set_spe_privilege_state_area_1_register, 3, 0, 79 ) 254b8b572e1SStephen Rothwell LV1_CALL(create_repository_node, 6, 0, 90 ) 2557f8cd352SGeoff Levand LV1_CALL(read_repository_node, 5, 2, 91 ) 25608a6b256SGeoff Levand LV1_CALL(write_repository_node, 6, 0, 92 ) 25708a6b256SGeoff Levand LV1_CALL(delete_repository_node, 4, 0, 93 ) 258b8b572e1SStephen Rothwell LV1_CALL(read_htab_entries, 2, 5, 95 ) 259b8b572e1SStephen Rothwell LV1_CALL(set_dabr, 2, 0, 96 ) 260b8b572e1SStephen Rothwell LV1_CALL(get_total_execution_time, 2, 1, 103 ) 261b8b572e1SStephen Rothwell LV1_CALL(allocate_io_segment, 3, 1, 116 ) 262b8b572e1SStephen Rothwell LV1_CALL(release_io_segment, 2, 0, 117 ) 263b8b572e1SStephen Rothwell LV1_CALL(construct_io_irq_outlet, 1, 1, 120 ) 264b8b572e1SStephen Rothwell LV1_CALL(destruct_io_irq_outlet, 1, 0, 121 ) 265b8b572e1SStephen Rothwell LV1_CALL(map_htab, 1, 1, 122 ) 266b8b572e1SStephen Rothwell LV1_CALL(unmap_htab, 1, 0, 123 ) 267816cb49aSGeoff Levand LV1_CALL(get_version_info, 0, 2, 127 ) 268b8b572e1SStephen Rothwell LV1_CALL(insert_htab_entry, 6, 3, 158 ) 269b8b572e1SStephen Rothwell LV1_CALL(read_virtual_uart, 3, 1, 162 ) 270b8b572e1SStephen Rothwell LV1_CALL(write_virtual_uart, 3, 1, 163 ) 271b8b572e1SStephen Rothwell LV1_CALL(set_virtual_uart_param, 3, 0, 164 ) 272b8b572e1SStephen Rothwell LV1_CALL(get_virtual_uart_param, 2, 1, 165 ) 273b8b572e1SStephen Rothwell LV1_CALL(configure_virtual_uart_irq, 1, 1, 166 ) 274b8b572e1SStephen Rothwell LV1_CALL(open_device, 3, 0, 170 ) 275b8b572e1SStephen Rothwell LV1_CALL(close_device, 2, 0, 171 ) 276b8b572e1SStephen Rothwell LV1_CALL(map_device_mmio_region, 5, 1, 172 ) 277b8b572e1SStephen Rothwell LV1_CALL(unmap_device_mmio_region, 3, 0, 173 ) 278b8b572e1SStephen Rothwell LV1_CALL(allocate_device_dma_region, 5, 1, 174 ) 279b8b572e1SStephen Rothwell LV1_CALL(free_device_dma_region, 3, 0, 175 ) 280b8b572e1SStephen Rothwell LV1_CALL(map_device_dma_region, 6, 0, 176 ) 281b8b572e1SStephen Rothwell LV1_CALL(unmap_device_dma_region, 4, 0, 177 ) 282b8b572e1SStephen Rothwell LV1_CALL(net_add_multicast_address, 4, 0, 185 ) 283b8b572e1SStephen Rothwell LV1_CALL(net_remove_multicast_address, 4, 0, 186 ) 284b8b572e1SStephen Rothwell LV1_CALL(net_start_tx_dma, 4, 0, 187 ) 2857652918cSGeoff Levand LV1_CALL(net_stop_tx_dma, 2, 0, 188 ) 286b8b572e1SStephen Rothwell LV1_CALL(net_start_rx_dma, 4, 0, 189 ) 2877652918cSGeoff Levand LV1_CALL(net_stop_rx_dma, 2, 0, 190 ) 288b8b572e1SStephen Rothwell LV1_CALL(net_set_interrupt_status_indicator, 4, 0, 191 ) 289b8b572e1SStephen Rothwell LV1_CALL(net_set_interrupt_mask, 4, 0, 193 ) 290b8b572e1SStephen Rothwell LV1_CALL(net_control, 6, 2, 194 ) 291b8b572e1SStephen Rothwell LV1_CALL(connect_interrupt_event_receive_port, 4, 0, 197 ) 292b8b572e1SStephen Rothwell LV1_CALL(disconnect_interrupt_event_receive_port, 4, 0, 198 ) 293b8b572e1SStephen Rothwell LV1_CALL(get_spe_all_interrupt_statuses, 1, 1, 199 ) 294b8b572e1SStephen Rothwell LV1_CALL(deconfigure_virtual_uart_irq, 0, 0, 202 ) 295b8b572e1SStephen Rothwell LV1_CALL(enable_logical_spe, 2, 0, 207 ) 296b8b572e1SStephen Rothwell LV1_CALL(gpu_open, 1, 0, 210 ) 297b8b572e1SStephen Rothwell LV1_CALL(gpu_close, 0, 0, 211 ) 298b8b572e1SStephen Rothwell LV1_CALL(gpu_device_map, 1, 2, 212 ) 299b8b572e1SStephen Rothwell LV1_CALL(gpu_device_unmap, 1, 0, 213 ) 300b8b572e1SStephen Rothwell LV1_CALL(gpu_memory_allocate, 5, 2, 214 ) 301b8b572e1SStephen Rothwell LV1_CALL(gpu_memory_free, 1, 0, 216 ) 302b8b572e1SStephen Rothwell LV1_CALL(gpu_context_allocate, 2, 5, 217 ) 303b8b572e1SStephen Rothwell LV1_CALL(gpu_context_free, 1, 0, 218 ) 304b8b572e1SStephen Rothwell LV1_CALL(gpu_context_iomap, 5, 0, 221 ) 305b8b572e1SStephen Rothwell LV1_CALL(gpu_context_attribute, 6, 0, 225 ) 306b8b572e1SStephen Rothwell LV1_CALL(gpu_context_intr, 1, 1, 227 ) 3079fce85f7SGeoff Levand LV1_CALL(gpu_attribute, 3, 0, 228 ) 308b8b572e1SStephen Rothwell LV1_CALL(get_rtc, 0, 2, 232 ) 309b8b572e1SStephen Rothwell LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 ) 310b8b572e1SStephen Rothwell LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 ) 311b8b572e1SStephen Rothwell LV1_CALL(stop_ppe_periodic_tracer, 1, 1, 242 ) 312b8b572e1SStephen Rothwell LV1_CALL(storage_read, 6, 1, 245 ) 313b8b572e1SStephen Rothwell LV1_CALL(storage_write, 6, 1, 246 ) 314b8b572e1SStephen Rothwell LV1_CALL(storage_send_device_command, 6, 1, 248 ) 315b8b572e1SStephen Rothwell LV1_CALL(storage_get_async_status, 1, 2, 249 ) 316b8b572e1SStephen Rothwell LV1_CALL(storage_check_async_status, 2, 1, 254 ) 317b8b572e1SStephen Rothwell LV1_CALL(panic, 1, 0, 255 ) 318b8b572e1SStephen Rothwell LV1_CALL(construct_lpm, 6, 3, 140 ) 319b8b572e1SStephen Rothwell LV1_CALL(destruct_lpm, 1, 0, 141 ) 320b8b572e1SStephen Rothwell LV1_CALL(start_lpm, 1, 0, 142 ) 321b8b572e1SStephen Rothwell LV1_CALL(stop_lpm, 1, 1, 143 ) 322b8b572e1SStephen Rothwell LV1_CALL(copy_lpm_trace_buffer, 3, 1, 144 ) 323b8b572e1SStephen Rothwell LV1_CALL(add_lpm_event_bookmark, 5, 0, 145 ) 324b8b572e1SStephen Rothwell LV1_CALL(delete_lpm_event_bookmark, 3, 0, 146 ) 325b8b572e1SStephen Rothwell LV1_CALL(set_lpm_interrupt_mask, 3, 1, 147 ) 326b8b572e1SStephen Rothwell LV1_CALL(get_lpm_interrupt_status, 1, 1, 148 ) 327b8b572e1SStephen Rothwell LV1_CALL(set_lpm_general_control, 5, 2, 149 ) 328b8b572e1SStephen Rothwell LV1_CALL(set_lpm_interval, 3, 1, 150 ) 329b8b572e1SStephen Rothwell LV1_CALL(set_lpm_trigger_control, 3, 1, 151 ) 330b8b572e1SStephen Rothwell LV1_CALL(set_lpm_counter_control, 4, 1, 152 ) 331b8b572e1SStephen Rothwell LV1_CALL(set_lpm_group_control, 3, 1, 153 ) 332b8b572e1SStephen Rothwell LV1_CALL(set_lpm_debug_bus_control, 3, 1, 154 ) 333b8b572e1SStephen Rothwell LV1_CALL(set_lpm_counter, 5, 2, 155 ) 334b8b572e1SStephen Rothwell LV1_CALL(set_lpm_signal, 7, 0, 156 ) 335b8b572e1SStephen Rothwell LV1_CALL(set_lpm_spr_trigger, 2, 0, 157 ) 336b8b572e1SStephen Rothwell 337b8b572e1SStephen Rothwell #endif 338