1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2ee3b93ebSAneesh Kumar K.V #ifndef _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H
3ee3b93ebSAneesh Kumar K.V #define _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H
4ee3b93ebSAneesh Kumar K.V
5ee3b93ebSAneesh Kumar K.V /*
6ee3b93ebSAneesh Kumar K.V * TLB flushing for 64-bit hash-MMU CPUs
7ee3b93ebSAneesh Kumar K.V */
8ee3b93ebSAneesh Kumar K.V
9ee3b93ebSAneesh Kumar K.V #include <linux/percpu.h>
10ee3b93ebSAneesh Kumar K.V #include <asm/page.h>
11ee3b93ebSAneesh Kumar K.V
12ee3b93ebSAneesh Kumar K.V #define PPC64_TLB_BATCH_NR 192
13ee3b93ebSAneesh Kumar K.V
14ee3b93ebSAneesh Kumar K.V struct ppc64_tlb_batch {
15ee3b93ebSAneesh Kumar K.V int active;
16ee3b93ebSAneesh Kumar K.V unsigned long index;
17ee3b93ebSAneesh Kumar K.V struct mm_struct *mm;
18ee3b93ebSAneesh Kumar K.V real_pte_t pte[PPC64_TLB_BATCH_NR];
19ee3b93ebSAneesh Kumar K.V unsigned long vpn[PPC64_TLB_BATCH_NR];
20ee3b93ebSAneesh Kumar K.V unsigned int psize;
21ee3b93ebSAneesh Kumar K.V int ssize;
22ee3b93ebSAneesh Kumar K.V };
23ee3b93ebSAneesh Kumar K.V DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
24ee3b93ebSAneesh Kumar K.V
25ee3b93ebSAneesh Kumar K.V extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
26ee3b93ebSAneesh Kumar K.V
27ee3b93ebSAneesh Kumar K.V #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
28ee3b93ebSAneesh Kumar K.V
arch_enter_lazy_mmu_mode(void)29ee3b93ebSAneesh Kumar K.V static inline void arch_enter_lazy_mmu_mode(void)
30ee3b93ebSAneesh Kumar K.V {
311a472c9dSAneesh Kumar K.V struct ppc64_tlb_batch *batch;
32ee3b93ebSAneesh Kumar K.V
331a472c9dSAneesh Kumar K.V if (radix_enabled())
341a472c9dSAneesh Kumar K.V return;
35*b9ef323eSNicholas Piggin /*
36*b9ef323eSNicholas Piggin * apply_to_page_range can call us this preempt enabled when
37*b9ef323eSNicholas Piggin * operating on kernel page tables.
38*b9ef323eSNicholas Piggin */
39*b9ef323eSNicholas Piggin preempt_disable();
401a472c9dSAneesh Kumar K.V batch = this_cpu_ptr(&ppc64_tlb_batch);
41ee3b93ebSAneesh Kumar K.V batch->active = 1;
42ee3b93ebSAneesh Kumar K.V }
43ee3b93ebSAneesh Kumar K.V
arch_leave_lazy_mmu_mode(void)44ee3b93ebSAneesh Kumar K.V static inline void arch_leave_lazy_mmu_mode(void)
45ee3b93ebSAneesh Kumar K.V {
461a472c9dSAneesh Kumar K.V struct ppc64_tlb_batch *batch;
471a472c9dSAneesh Kumar K.V
481a472c9dSAneesh Kumar K.V if (radix_enabled())
491a472c9dSAneesh Kumar K.V return;
501a472c9dSAneesh Kumar K.V batch = this_cpu_ptr(&ppc64_tlb_batch);
51ee3b93ebSAneesh Kumar K.V
52ee3b93ebSAneesh Kumar K.V if (batch->index)
53ee3b93ebSAneesh Kumar K.V __flush_tlb_pending(batch);
54ee3b93ebSAneesh Kumar K.V batch->active = 0;
55*b9ef323eSNicholas Piggin preempt_enable();
56ee3b93ebSAneesh Kumar K.V }
57ee3b93ebSAneesh Kumar K.V
58ee3b93ebSAneesh Kumar K.V #define arch_flush_lazy_mmu_mode() do {} while (0)
59ee3b93ebSAneesh Kumar K.V
60d4748276SNicholas Piggin extern void hash__tlbiel_all(unsigned int action);
61ee3b93ebSAneesh Kumar K.V
62ee3b93ebSAneesh Kumar K.V extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize,
63ee3b93ebSAneesh Kumar K.V int ssize, unsigned long flags);
64ee3b93ebSAneesh Kumar K.V extern void flush_hash_range(unsigned long number, int local);
65ee3b93ebSAneesh Kumar K.V extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr,
66ee3b93ebSAneesh Kumar K.V pmd_t *pmdp, unsigned int psize, int ssize,
67ee3b93ebSAneesh Kumar K.V unsigned long flags);
68ee3b93ebSAneesh Kumar K.V
69676012a6SAneesh Kumar K.V struct mmu_gather;
70676012a6SAneesh Kumar K.V extern void hash__tlb_flush(struct mmu_gather *tlb);
71387e220aSNicholas Piggin
72387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU
73ee3b93ebSAneesh Kumar K.V /* Private function for use by PCI IO mapping code */
747900757cSAneesh Kumar K.V extern void __flush_hash_table_range(unsigned long start, unsigned long end);
75d368e0c4SAneesh Kumar K.V void flush_hash_table_pmd_range(struct mm_struct *mm, pmd_t *pmd, unsigned long addr);
76387e220aSNicholas Piggin #else
__flush_hash_table_range(unsigned long start,unsigned long end)77387e220aSNicholas Piggin static inline void __flush_hash_table_range(unsigned long start, unsigned long end) { }
78387e220aSNicholas Piggin #endif
79ee3b93ebSAneesh Kumar K.V #endif /* _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H */
80