xref: /openbmc/linux/arch/powerpc/boot/gamecube-head.S (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*2874c5fdSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-or-later */
2b68a24bcSAlbert Herranz/*
3b68a24bcSAlbert Herranz * arch/powerpc/boot/gamecube-head.S
4b68a24bcSAlbert Herranz *
5b68a24bcSAlbert Herranz * Nintendo GameCube bootwrapper entry.
6b68a24bcSAlbert Herranz * Copyright (C) 2004-2009 The GameCube Linux Team
7b68a24bcSAlbert Herranz * Copyright (C) 2008,2009 Albert Herranz
8b68a24bcSAlbert Herranz */
9b68a24bcSAlbert Herranz
10b68a24bcSAlbert Herranz#include "ppc_asm.h"
11b68a24bcSAlbert Herranz
12b68a24bcSAlbert Herranz/*
13b68a24bcSAlbert Herranz * The entry code does no assumptions regarding:
14b68a24bcSAlbert Herranz * - if the data and instruction caches are enabled or not
15b68a24bcSAlbert Herranz * - if the MMU is enabled or not
16b68a24bcSAlbert Herranz *
17b68a24bcSAlbert Herranz * We enable the caches if not already enabled, enable the MMU with an
18b68a24bcSAlbert Herranz * identity mapping scheme and jump to the start code.
19b68a24bcSAlbert Herranz */
20b68a24bcSAlbert Herranz
21b68a24bcSAlbert Herranz	.text
22b68a24bcSAlbert Herranz
23b68a24bcSAlbert Herranz	.globl _zimage_start
24b68a24bcSAlbert Herranz_zimage_start:
25b68a24bcSAlbert Herranz
26b68a24bcSAlbert Herranz	/* turn the MMU off */
27b68a24bcSAlbert Herranz	mfmsr	9
28b68a24bcSAlbert Herranz	rlwinm	9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
29b68a24bcSAlbert Herranz	bcl	20, 31, 1f
30b68a24bcSAlbert Herranz1:
31b68a24bcSAlbert Herranz	mflr	8
32b68a24bcSAlbert Herranz	clrlwi	8, 8, 3		/* convert to a real address */
33b68a24bcSAlbert Herranz	addi	8, 8, _mmu_off - 1b
34b68a24bcSAlbert Herranz	mtsrr0	8
35b68a24bcSAlbert Herranz	mtsrr1	9
36b68a24bcSAlbert Herranz	rfi
37b68a24bcSAlbert Herranz_mmu_off:
38b68a24bcSAlbert Herranz	/* MMU disabled */
39b68a24bcSAlbert Herranz
40b68a24bcSAlbert Herranz	/* setup BATs */
41b68a24bcSAlbert Herranz	isync
42b68a24bcSAlbert Herranz	li      8, 0
43b68a24bcSAlbert Herranz	mtspr	0x210, 8	/* IBAT0U */
44b68a24bcSAlbert Herranz	mtspr	0x212, 8	/* IBAT1U */
45b68a24bcSAlbert Herranz	mtspr	0x214, 8	/* IBAT2U */
46b68a24bcSAlbert Herranz	mtspr	0x216, 8	/* IBAT3U */
47b68a24bcSAlbert Herranz	mtspr	0x218, 8	/* DBAT0U */
48b68a24bcSAlbert Herranz	mtspr	0x21a, 8	/* DBAT1U */
49b68a24bcSAlbert Herranz	mtspr	0x21c, 8	/* DBAT2U */
50b68a24bcSAlbert Herranz	mtspr	0x21e, 8	/* DBAT3U */
51b68a24bcSAlbert Herranz
52b68a24bcSAlbert Herranz	li	8, 0x01ff	/* first 16MiB */
53b68a24bcSAlbert Herranz	li	9, 0x0002	/* rw */
54b68a24bcSAlbert Herranz	mtspr	0x211, 9	/* IBAT0L */
55b68a24bcSAlbert Herranz	mtspr	0x210, 8	/* IBAT0U */
56b68a24bcSAlbert Herranz	mtspr	0x219, 9	/* DBAT0L */
57b68a24bcSAlbert Herranz	mtspr	0x218, 8	/* DBAT0U */
58b68a24bcSAlbert Herranz
59b68a24bcSAlbert Herranz	lis	8, 0x0c00	/* I/O mem */
60b68a24bcSAlbert Herranz	ori	8, 8, 0x3ff	/* 32MiB */
61b68a24bcSAlbert Herranz	lis	9, 0x0c00
62b68a24bcSAlbert Herranz	ori	9, 9, 0x002a	/* uncached, guarded, rw */
63b68a24bcSAlbert Herranz	mtspr	0x21b, 9	/* DBAT1L */
64b68a24bcSAlbert Herranz	mtspr	0x21a, 8	/* DBAT1U */
65b68a24bcSAlbert Herranz
66b68a24bcSAlbert Herranz	lis	8, 0x0100	/* next 8MiB */
67b68a24bcSAlbert Herranz	ori	8, 8, 0x00ff	/* 8MiB */
68b68a24bcSAlbert Herranz	lis	9, 0x0100
69b68a24bcSAlbert Herranz	ori	9, 9, 0x0002	/* rw */
70b68a24bcSAlbert Herranz	mtspr	0x215, 9	/* IBAT2L */
71b68a24bcSAlbert Herranz	mtspr	0x214, 8	/* IBAT2U */
72b68a24bcSAlbert Herranz	mtspr	0x21d, 9	/* DBAT2L */
73b68a24bcSAlbert Herranz	mtspr	0x21c, 8	/* DBAT2U */
74b68a24bcSAlbert Herranz
75b68a24bcSAlbert Herranz	/* enable and invalidate the caches if not already enabled */
76b68a24bcSAlbert Herranz	mfspr	8, 0x3f0	/* HID0 */
77b68a24bcSAlbert Herranz	andi.	0, 8, (1<<15)		/* HID0_ICE */
78b68a24bcSAlbert Herranz	bne	1f
79b68a24bcSAlbert Herranz	ori	8, 8, (1<<15)|(1<<11)	/* HID0_ICE|HID0_ICFI*/
80b68a24bcSAlbert Herranz1:
81b68a24bcSAlbert Herranz	andi.	0, 8, (1<<14)		/* HID0_DCE */
82b68a24bcSAlbert Herranz	bne	1f
83b68a24bcSAlbert Herranz	ori	8, 8, (1<<14)|(1<<10)	/* HID0_DCE|HID0_DCFI*/
84b68a24bcSAlbert Herranz1:
85b68a24bcSAlbert Herranz	mtspr	0x3f0, 8	/* HID0 */
86b68a24bcSAlbert Herranz	isync
87b68a24bcSAlbert Herranz
88b68a24bcSAlbert Herranz	/* initialize arguments */
89b68a24bcSAlbert Herranz	li	3, 0
90b68a24bcSAlbert Herranz	li	4, 0
91b68a24bcSAlbert Herranz	li	5, 0
92b68a24bcSAlbert Herranz
93b68a24bcSAlbert Herranz	/* turn the MMU on */
94b68a24bcSAlbert Herranz	bcl	20, 31, 1f
95b68a24bcSAlbert Herranz1:
96b68a24bcSAlbert Herranz	mflr	8
97b68a24bcSAlbert Herranz	addi	8, 8, _mmu_on - 1b
98b68a24bcSAlbert Herranz	mfmsr	9
99b68a24bcSAlbert Herranz	ori	9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */
100b68a24bcSAlbert Herranz	mtsrr0	8
101b68a24bcSAlbert Herranz	mtsrr1	9
102b68a24bcSAlbert Herranz	sync
103b68a24bcSAlbert Herranz	rfi
104b68a24bcSAlbert Herranz_mmu_on:
105b68a24bcSAlbert Herranz	b _zimage_start_lib
106b68a24bcSAlbert Herranz
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