1*6c712090SMadhulika Madishetty/* 2*6c712090SMadhulika Madishetty * Device Tree Source for AMCC Redwood(460SX) 3*6c712090SMadhulika Madishetty * 4*6c712090SMadhulika Madishetty * Copyright 2008 AMCC <tmarri@amcc.com> 5*6c712090SMadhulika Madishetty * 6*6c712090SMadhulika Madishetty * This file is licensed under the terms of the GNU General Public 7*6c712090SMadhulika Madishetty * License version 2. This program is licensed "as is" without 8*6c712090SMadhulika Madishetty * any warranty of any kind, whether express or implied. 9*6c712090SMadhulika Madishetty */ 10*6c712090SMadhulika Madishetty 11*6c712090SMadhulika Madishetty/dts-v1/; 12*6c712090SMadhulika Madishetty 13*6c712090SMadhulika Madishetty/ { 14*6c712090SMadhulika Madishetty #address-cells = <2>; 15*6c712090SMadhulika Madishetty #size-cells = <1>; 16*6c712090SMadhulika Madishetty model = "amcc,redwood"; 17*6c712090SMadhulika Madishetty compatible = "amcc,redwood"; 18*6c712090SMadhulika Madishetty dcr-parent = <&{/cpus/cpu@0}>; 19*6c712090SMadhulika Madishetty 20*6c712090SMadhulika Madishetty aliases { 21*6c712090SMadhulika Madishetty ethernet0 = &EMAC0; 22*6c712090SMadhulika Madishetty serial0 = &UART0; 23*6c712090SMadhulika Madishetty }; 24*6c712090SMadhulika Madishetty 25*6c712090SMadhulika Madishetty cpus { 26*6c712090SMadhulika Madishetty #address-cells = <1>; 27*6c712090SMadhulika Madishetty #size-cells = <0>; 28*6c712090SMadhulika Madishetty 29*6c712090SMadhulika Madishetty cpu@0 { 30*6c712090SMadhulika Madishetty device_type = "cpu"; 31*6c712090SMadhulika Madishetty model = "PowerPC,460SX"; 32*6c712090SMadhulika Madishetty reg = <0x00000000>; 33*6c712090SMadhulika Madishetty clock-frequency = <0>; /* Filled in by U-Boot */ 34*6c712090SMadhulika Madishetty timebase-frequency = <0>; /* Filled in by U-Boot */ 35*6c712090SMadhulika Madishetty i-cache-line-size = <32>; 36*6c712090SMadhulika Madishetty d-cache-line-size = <32>; 37*6c712090SMadhulika Madishetty i-cache-size = <32768>; 38*6c712090SMadhulika Madishetty d-cache-size = <32768>; 39*6c712090SMadhulika Madishetty dcr-controller; 40*6c712090SMadhulika Madishetty dcr-access-method = "native"; 41*6c712090SMadhulika Madishetty }; 42*6c712090SMadhulika Madishetty }; 43*6c712090SMadhulika Madishetty 44*6c712090SMadhulika Madishetty memory { 45*6c712090SMadhulika Madishetty device_type = "memory"; 46*6c712090SMadhulika Madishetty reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 47*6c712090SMadhulika Madishetty }; 48*6c712090SMadhulika Madishetty 49*6c712090SMadhulika Madishetty UIC0: interrupt-controller0 { 50*6c712090SMadhulika Madishetty compatible = "ibm,uic-460sx","ibm,uic"; 51*6c712090SMadhulika Madishetty interrupt-controller; 52*6c712090SMadhulika Madishetty cell-index = <0>; 53*6c712090SMadhulika Madishetty dcr-reg = <0x0c0 0x009>; 54*6c712090SMadhulika Madishetty #address-cells = <0>; 55*6c712090SMadhulika Madishetty #size-cells = <0>; 56*6c712090SMadhulika Madishetty #interrupt-cells = <2>; 57*6c712090SMadhulika Madishetty }; 58*6c712090SMadhulika Madishetty 59*6c712090SMadhulika Madishetty UIC1: interrupt-controller1 { 60*6c712090SMadhulika Madishetty compatible = "ibm,uic-460sx","ibm,uic"; 61*6c712090SMadhulika Madishetty interrupt-controller; 62*6c712090SMadhulika Madishetty cell-index = <1>; 63*6c712090SMadhulika Madishetty dcr-reg = <0x0d0 0x009>; 64*6c712090SMadhulika Madishetty #address-cells = <0>; 65*6c712090SMadhulika Madishetty #size-cells = <0>; 66*6c712090SMadhulika Madishetty #interrupt-cells = <2>; 67*6c712090SMadhulika Madishetty interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 68*6c712090SMadhulika Madishetty interrupt-parent = <&UIC0>; 69*6c712090SMadhulika Madishetty }; 70*6c712090SMadhulika Madishetty 71*6c712090SMadhulika Madishetty UIC2: interrupt-controller2 { 72*6c712090SMadhulika Madishetty compatible = "ibm,uic-460sx","ibm,uic"; 73*6c712090SMadhulika Madishetty interrupt-controller; 74*6c712090SMadhulika Madishetty cell-index = <2>; 75*6c712090SMadhulika Madishetty dcr-reg = <0x0e0 0x009>; 76*6c712090SMadhulika Madishetty #address-cells = <0>; 77*6c712090SMadhulika Madishetty #size-cells = <0>; 78*6c712090SMadhulika Madishetty #interrupt-cells = <2>; 79*6c712090SMadhulika Madishetty interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 80*6c712090SMadhulika Madishetty interrupt-parent = <&UIC0>; 81*6c712090SMadhulika Madishetty }; 82*6c712090SMadhulika Madishetty 83*6c712090SMadhulika Madishetty UIC3: interrupt-controller3 { 84*6c712090SMadhulika Madishetty compatible = "ibm,uic-460sx","ibm,uic"; 85*6c712090SMadhulika Madishetty interrupt-controller; 86*6c712090SMadhulika Madishetty cell-index = <3>; 87*6c712090SMadhulika Madishetty dcr-reg = <0x0f0 0x009>; 88*6c712090SMadhulika Madishetty #address-cells = <0>; 89*6c712090SMadhulika Madishetty #size-cells = <0>; 90*6c712090SMadhulika Madishetty #interrupt-cells = <2>; 91*6c712090SMadhulika Madishetty interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 92*6c712090SMadhulika Madishetty interrupt-parent = <&UIC0>; 93*6c712090SMadhulika Madishetty }; 94*6c712090SMadhulika Madishetty 95*6c712090SMadhulika Madishetty SDR0: sdr { 96*6c712090SMadhulika Madishetty compatible = "ibm,sdr-460sx"; 97*6c712090SMadhulika Madishetty dcr-reg = <0x00e 0x002>; 98*6c712090SMadhulika Madishetty }; 99*6c712090SMadhulika Madishetty 100*6c712090SMadhulika Madishetty CPR0: cpr { 101*6c712090SMadhulika Madishetty compatible = "ibm,cpr-460sx"; 102*6c712090SMadhulika Madishetty dcr-reg = <0x00c 0x002>; 103*6c712090SMadhulika Madishetty }; 104*6c712090SMadhulika Madishetty 105*6c712090SMadhulika Madishetty plb { 106*6c712090SMadhulika Madishetty compatible = "ibm,plb-460sx", "ibm,plb4"; 107*6c712090SMadhulika Madishetty #address-cells = <2>; 108*6c712090SMadhulika Madishetty #size-cells = <1>; 109*6c712090SMadhulika Madishetty ranges; 110*6c712090SMadhulika Madishetty clock-frequency = <0>; /* Filled in by U-Boot */ 111*6c712090SMadhulika Madishetty 112*6c712090SMadhulika Madishetty SDRAM0: sdram { 113*6c712090SMadhulika Madishetty compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; 114*6c712090SMadhulika Madishetty dcr-reg = <0x010 0x002>; 115*6c712090SMadhulika Madishetty }; 116*6c712090SMadhulika Madishetty 117*6c712090SMadhulika Madishetty MAL0: mcmal { 118*6c712090SMadhulika Madishetty compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; 119*6c712090SMadhulika Madishetty dcr-reg = <0x180 0x62>; 120*6c712090SMadhulika Madishetty num-tx-chans = <4>; 121*6c712090SMadhulika Madishetty num-rx-chans = <32>; 122*6c712090SMadhulika Madishetty #address-cells = <1>; 123*6c712090SMadhulika Madishetty #size-cells = <1>; 124*6c712090SMadhulika Madishetty interrupt-parent = <&UIC1>; 125*6c712090SMadhulika Madishetty interrupts = < /*TXEOB*/ 0x6 0x4 126*6c712090SMadhulika Madishetty /*RXEOB*/ 0x7 0x4 127*6c712090SMadhulika Madishetty /*SERR*/ 0x1 0x4 128*6c712090SMadhulika Madishetty /*TXDE*/ 0x2 0x4 129*6c712090SMadhulika Madishetty /*RXDE*/ 0x3 0x4 130*6c712090SMadhulika Madishetty /*COAL TX0*/ 0x18 0x2 131*6c712090SMadhulika Madishetty /*COAL TX1*/ 0x19 0x2 132*6c712090SMadhulika Madishetty /*COAL TX2*/ 0x1a 0x2 133*6c712090SMadhulika Madishetty /*COAL TX3*/ 0x1b 0x2 134*6c712090SMadhulika Madishetty /*COAL RX0*/ 0x1c 0x2 135*6c712090SMadhulika Madishetty /*COAL RX1*/ 0x1d 0x2 136*6c712090SMadhulika Madishetty /*COAL RX2*/ 0x1e 0x2 137*6c712090SMadhulika Madishetty /*COAL RX3*/ 0x1f 0x2>; 138*6c712090SMadhulika Madishetty }; 139*6c712090SMadhulika Madishetty 140*6c712090SMadhulika Madishetty POB0: opb { 141*6c712090SMadhulika Madishetty compatible = "ibm,opb-460sx", "ibm,opb"; 142*6c712090SMadhulika Madishetty #address-cells = <1>; 143*6c712090SMadhulika Madishetty #size-cells = <1>; 144*6c712090SMadhulika Madishetty ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 145*6c712090SMadhulika Madishetty clock-frequency = <0>; /* Filled in by U-Boot */ 146*6c712090SMadhulika Madishetty 147*6c712090SMadhulika Madishetty EBC0: ebc { 148*6c712090SMadhulika Madishetty compatible = "ibm,ebc-460sx", "ibm,ebc"; 149*6c712090SMadhulika Madishetty dcr-reg = <0x012 0x002>; 150*6c712090SMadhulika Madishetty #address-cells = <2>; 151*6c712090SMadhulika Madishetty #size-cells = <1>; 152*6c712090SMadhulika Madishetty clock-frequency = <0>; /* Filled in by U-Boot */ 153*6c712090SMadhulika Madishetty /* ranges property is supplied by U-Boot */ 154*6c712090SMadhulika Madishetty interrupts = <0x6 0x4>; 155*6c712090SMadhulika Madishetty interrupt-parent = <&UIC1>; 156*6c712090SMadhulika Madishetty 157*6c712090SMadhulika Madishetty nor_flash@0,0 { 158*6c712090SMadhulika Madishetty compatible = "amd,s29gl512n", "cfi-flash"; 159*6c712090SMadhulika Madishetty bank-width = <2>; 160*6c712090SMadhulika Madishetty reg = <0x0000000 0x00000000 0x04000000>; 161*6c712090SMadhulika Madishetty #address-cells = <1>; 162*6c712090SMadhulika Madishetty #size-cells = <1>; 163*6c712090SMadhulika Madishetty partition@0 { 164*6c712090SMadhulika Madishetty label = "kernel"; 165*6c712090SMadhulika Madishetty reg = <0x00000000 0x001e0000>; 166*6c712090SMadhulika Madishetty }; 167*6c712090SMadhulika Madishetty partition@1e0000 { 168*6c712090SMadhulika Madishetty label = "dtb"; 169*6c712090SMadhulika Madishetty reg = <0x001e0000 0x00020000>; 170*6c712090SMadhulika Madishetty }; 171*6c712090SMadhulika Madishetty partition@200000 { 172*6c712090SMadhulika Madishetty label = "ramdisk"; 173*6c712090SMadhulika Madishetty reg = <0x00200000 0x01400000>; 174*6c712090SMadhulika Madishetty }; 175*6c712090SMadhulika Madishetty partition@1600000 { 176*6c712090SMadhulika Madishetty label = "jffs2"; 177*6c712090SMadhulika Madishetty reg = <0x01600000 0x00400000>; 178*6c712090SMadhulika Madishetty }; 179*6c712090SMadhulika Madishetty partition@1a00000 { 180*6c712090SMadhulika Madishetty label = "user"; 181*6c712090SMadhulika Madishetty reg = <0x01a00000 0x02560000>; 182*6c712090SMadhulika Madishetty }; 183*6c712090SMadhulika Madishetty partition@3f60000 { 184*6c712090SMadhulika Madishetty label = "env"; 185*6c712090SMadhulika Madishetty reg = <0x03f60000 0x00040000>; 186*6c712090SMadhulika Madishetty }; 187*6c712090SMadhulika Madishetty partition@3fa0000 { 188*6c712090SMadhulika Madishetty label = "u-boot"; 189*6c712090SMadhulika Madishetty reg = <0x03fa0000 0x00060000>; 190*6c712090SMadhulika Madishetty }; 191*6c712090SMadhulika Madishetty }; 192*6c712090SMadhulika Madishetty }; 193*6c712090SMadhulika Madishetty 194*6c712090SMadhulika Madishetty UART0: serial@ef600200 { 195*6c712090SMadhulika Madishetty device_type = "serial"; 196*6c712090SMadhulika Madishetty compatible = "ns16550"; 197*6c712090SMadhulika Madishetty reg = <0xef600200 0x00000008>; 198*6c712090SMadhulika Madishetty virtual-reg = <0xef600200>; 199*6c712090SMadhulika Madishetty clock-frequency = <0>; /* Filled in by U-Boot */ 200*6c712090SMadhulika Madishetty current-speed = <0>; /* Filled in by U-Boot */ 201*6c712090SMadhulika Madishetty interrupt-parent = <&UIC0>; 202*6c712090SMadhulika Madishetty interrupts = <0x0 0x4>; 203*6c712090SMadhulika Madishetty }; 204*6c712090SMadhulika Madishetty 205*6c712090SMadhulika Madishetty RGMII0: emac-rgmii@ef600900 { 206*6c712090SMadhulika Madishetty compatible = "ibm,rgmii-460sx", "ibm,rgmii"; 207*6c712090SMadhulika Madishetty reg = <0xef600900 0x00000008>; 208*6c712090SMadhulika Madishetty }; 209*6c712090SMadhulika Madishetty 210*6c712090SMadhulika Madishetty EMAC0: ethernet@ef600a00 { 211*6c712090SMadhulika Madishetty device_type = "network"; 212*6c712090SMadhulika Madishetty compatible = "ibm,emac-460sx", "ibm,emac4"; 213*6c712090SMadhulika Madishetty interrupt-parent = <&EMAC0>; 214*6c712090SMadhulika Madishetty interrupts = <0x0 0x1>; 215*6c712090SMadhulika Madishetty #interrupt-cells = <1>; 216*6c712090SMadhulika Madishetty #address-cells = <0>; 217*6c712090SMadhulika Madishetty #size-cells = <0>; 218*6c712090SMadhulika Madishetty interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 219*6c712090SMadhulika Madishetty /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 220*6c712090SMadhulika Madishetty reg = <0xef600a00 0x00000070>; 221*6c712090SMadhulika Madishetty local-mac-address = [000000000000]; /* Filled in by U-Boot */ 222*6c712090SMadhulika Madishetty mal-device = <&MAL0>; 223*6c712090SMadhulika Madishetty mal-tx-channel = <0>; 224*6c712090SMadhulika Madishetty mal-rx-channel = <0>; 225*6c712090SMadhulika Madishetty cell-index = <0>; 226*6c712090SMadhulika Madishetty max-frame-size = <9000>; 227*6c712090SMadhulika Madishetty rx-fifo-size = <4096>; 228*6c712090SMadhulika Madishetty tx-fifo-size = <2048>; 229*6c712090SMadhulika Madishetty phy-mode = "rgmii"; 230*6c712090SMadhulika Madishetty phy-map = <0x00000000>; 231*6c712090SMadhulika Madishetty rgmii-device = <&RGMII0>; 232*6c712090SMadhulika Madishetty rgmii-channel = <0>; 233*6c712090SMadhulika Madishetty has-inverted-stacr-oc; 234*6c712090SMadhulika Madishetty has-new-stacr-staopc; 235*6c712090SMadhulika Madishetty }; 236*6c712090SMadhulika Madishetty 237*6c712090SMadhulika Madishetty }; 238*6c712090SMadhulika Madishetty 239*6c712090SMadhulika Madishetty }; 240*6c712090SMadhulika Madishetty chosen { 241*6c712090SMadhulika Madishetty linux,stdout-path = "/plb/opb/serial@ef600200"; 242*6c712090SMadhulika Madishetty }; 243*6c712090SMadhulika Madishetty 244*6c712090SMadhulika Madishetty}; 245