1*1723d909SXuelin Shi/* 2*1723d909SXuelin Shi * QorIQ RAID 1.0 device tree stub [ controller @ offset 0x320000 ] 3*1723d909SXuelin Shi * 4*1723d909SXuelin Shi * Copyright 2012 Freescale Semiconductor Inc. 5*1723d909SXuelin Shi * 6*1723d909SXuelin Shi * Redistribution and use in source and binary forms, with or without 7*1723d909SXuelin Shi * modification, are permitted provided that the following conditions are met: 8*1723d909SXuelin Shi * * Redistributions of source code must retain the above copyright 9*1723d909SXuelin Shi * notice, this list of conditions and the following disclaimer. 10*1723d909SXuelin Shi * * Redistributions in binary form must reproduce the above copyright 11*1723d909SXuelin Shi * notice, this list of conditions and the following disclaimer in the 12*1723d909SXuelin Shi * documentation and/or other materials provided with the distribution. 13*1723d909SXuelin Shi * * Neither the name of Freescale Semiconductor nor the 14*1723d909SXuelin Shi * names of its contributors may be used to endorse or promote products 15*1723d909SXuelin Shi * derived from this software without specific prior written permission. 16*1723d909SXuelin Shi * 17*1723d909SXuelin Shi * 18*1723d909SXuelin Shi * ALTERNATIVELY, this software may be distributed under the terms of the 19*1723d909SXuelin Shi * GNU General Public License ("GPL") as published by the Free Software 20*1723d909SXuelin Shi * Foundation, either version 2 of that License or (at your option) any 21*1723d909SXuelin Shi * later version. 22*1723d909SXuelin Shi * 23*1723d909SXuelin Shi * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*1723d909SXuelin Shi * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*1723d909SXuelin Shi * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*1723d909SXuelin Shi * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*1723d909SXuelin Shi * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*1723d909SXuelin Shi * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*1723d909SXuelin Shi * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*1723d909SXuelin Shi * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*1723d909SXuelin Shi * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*1723d909SXuelin Shi * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*1723d909SXuelin Shi */ 34*1723d909SXuelin Shi 35*1723d909SXuelin Shiraideng: raideng@320000 { 36*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0"; 37*1723d909SXuelin Shi #address-cells = <1>; 38*1723d909SXuelin Shi #size-cells = <1>; 39*1723d909SXuelin Shi reg = <0x320000 0x10000>; 40*1723d909SXuelin Shi ranges = <0 0x320000 0x10000>; 41*1723d909SXuelin Shi 42*1723d909SXuelin Shi raideng_jq0@1000 { 43*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-queue"; 44*1723d909SXuelin Shi #address-cells = <1>; 45*1723d909SXuelin Shi #size-cells = <1>; 46*1723d909SXuelin Shi reg = <0x1000 0x1000>; 47*1723d909SXuelin Shi ranges = <0x0 0x1000 0x1000>; 48*1723d909SXuelin Shi 49*1723d909SXuelin Shi raideng_jr0: jr@0 { 50*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; 51*1723d909SXuelin Shi reg = <0x0 0x400>; 52*1723d909SXuelin Shi interrupts = <139 2 0 0>; 53*1723d909SXuelin Shi interrupt-parent = <&mpic>; 54*1723d909SXuelin Shi }; 55*1723d909SXuelin Shi 56*1723d909SXuelin Shi raideng_jr1: jr@400 { 57*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; 58*1723d909SXuelin Shi reg = <0x400 0x400>; 59*1723d909SXuelin Shi interrupts = <140 2 0 0>; 60*1723d909SXuelin Shi interrupt-parent = <&mpic>; 61*1723d909SXuelin Shi }; 62*1723d909SXuelin Shi }; 63*1723d909SXuelin Shi 64*1723d909SXuelin Shi raideng_jq1@2000 { 65*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-queue"; 66*1723d909SXuelin Shi #address-cells = <1>; 67*1723d909SXuelin Shi #size-cells = <1>; 68*1723d909SXuelin Shi reg = <0x2000 0x1000>; 69*1723d909SXuelin Shi ranges = <0x0 0x2000 0x1000>; 70*1723d909SXuelin Shi 71*1723d909SXuelin Shi raideng_jr2: jr@0 { 72*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; 73*1723d909SXuelin Shi reg = <0x0 0x400>; 74*1723d909SXuelin Shi interrupts = <141 2 0 0>; 75*1723d909SXuelin Shi interrupt-parent = <&mpic>; 76*1723d909SXuelin Shi }; 77*1723d909SXuelin Shi 78*1723d909SXuelin Shi raideng_jr3: jr@400 { 79*1723d909SXuelin Shi compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; 80*1723d909SXuelin Shi reg = <0x400 0x400>; 81*1723d909SXuelin Shi interrupts = <142 2 0 0>; 82*1723d909SXuelin Shi interrupt-parent = <&mpic>; 83*1723d909SXuelin Shi }; 84*1723d909SXuelin Shi }; 85*1723d909SXuelin Shi}; 86