1b9db022cSKumar Gala/* 2b9db022cSKumar Gala * P4080/P4040 Silicon/SoC Device Tree Source (post include) 3b9db022cSKumar Gala * 4b9db022cSKumar Gala * Copyright 2011 Freescale Semiconductor Inc. 5b9db022cSKumar Gala * 6b9db022cSKumar Gala * Redistribution and use in source and binary forms, with or without 7b9db022cSKumar Gala * modification, are permitted provided that the following conditions are met: 8b9db022cSKumar Gala * * Redistributions of source code must retain the above copyright 9b9db022cSKumar Gala * notice, this list of conditions and the following disclaimer. 10b9db022cSKumar Gala * * Redistributions in binary form must reproduce the above copyright 11b9db022cSKumar Gala * notice, this list of conditions and the following disclaimer in the 12b9db022cSKumar Gala * documentation and/or other materials provided with the distribution. 13b9db022cSKumar Gala * * Neither the name of Freescale Semiconductor nor the 14b9db022cSKumar Gala * names of its contributors may be used to endorse or promote products 15b9db022cSKumar Gala * derived from this software without specific prior written permission. 16b9db022cSKumar Gala * 17b9db022cSKumar Gala * 18b9db022cSKumar Gala * ALTERNATIVELY, this software may be distributed under the terms of the 19b9db022cSKumar Gala * GNU General Public License ("GPL") as published by the Free Software 20b9db022cSKumar Gala * Foundation, either version 2 of that License or (at your option) any 21b9db022cSKumar Gala * later version. 22b9db022cSKumar Gala * 23b9db022cSKumar Gala * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24b9db022cSKumar Gala * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25b9db022cSKumar Gala * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26b9db022cSKumar Gala * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27b9db022cSKumar Gala * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28b9db022cSKumar Gala * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29b9db022cSKumar Gala * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30b9db022cSKumar Gala * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31b9db022cSKumar Gala * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32b9db022cSKumar Gala * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33b9db022cSKumar Gala */ 34b9db022cSKumar Gala 35b9db022cSKumar Gala&lbc { 36b9db022cSKumar Gala compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; 37b9db022cSKumar Gala interrupts = <25 2 0 0>; 38b9db022cSKumar Gala #address-cells = <2>; 39b9db022cSKumar Gala #size-cells = <1>; 40b9db022cSKumar Gala}; 41b9db022cSKumar Gala 42b9db022cSKumar Gala/* controller at 0x200000 */ 43b9db022cSKumar Gala&pci0 { 4414bdc913STimur Tabi compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1"; 45b9db022cSKumar Gala device_type = "pci"; 46b9db022cSKumar Gala #size-cells = <2>; 47b9db022cSKumar Gala #address-cells = <3>; 48b9db022cSKumar Gala bus-range = <0x0 0xff>; 49b9db022cSKumar Gala clock-frequency = <33333333>; 50b9db022cSKumar Gala interrupts = <16 2 1 15>; 510408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 520408753fSTimur Tabi fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 53b9db022cSKumar Gala pcie@0 { 54b9db022cSKumar Gala reg = <0 0 0 0 0>; 55b9db022cSKumar Gala #interrupt-cells = <1>; 56b9db022cSKumar Gala #size-cells = <2>; 57b9db022cSKumar Gala #address-cells = <3>; 58b9db022cSKumar Gala device_type = "pci"; 59b9db022cSKumar Gala interrupts = <16 2 1 15>; 60b9db022cSKumar Gala interrupt-map-mask = <0xf800 0 0 7>; 61b9db022cSKumar Gala interrupt-map = < 62b9db022cSKumar Gala /* IDSEL 0x0 */ 63b9db022cSKumar Gala 0000 0 0 1 &mpic 40 1 0 0 64b9db022cSKumar Gala 0000 0 0 2 &mpic 1 1 0 0 65b9db022cSKumar Gala 0000 0 0 3 &mpic 2 1 0 0 66b9db022cSKumar Gala 0000 0 0 4 &mpic 3 1 0 0 67b9db022cSKumar Gala >; 68b9db022cSKumar Gala }; 69b9db022cSKumar Gala}; 70b9db022cSKumar Gala 71b9db022cSKumar Gala/* controller at 0x201000 */ 72b9db022cSKumar Gala&pci1 { 7314bdc913STimur Tabi compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1"; 74b9db022cSKumar Gala device_type = "pci"; 75b9db022cSKumar Gala #size-cells = <2>; 76b9db022cSKumar Gala #address-cells = <3>; 77b9db022cSKumar Gala bus-range = <0 0xff>; 78b9db022cSKumar Gala clock-frequency = <33333333>; 79b9db022cSKumar Gala interrupts = <16 2 1 14>; 800408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 810408753fSTimur Tabi fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */ 82b9db022cSKumar Gala pcie@0 { 83b9db022cSKumar Gala reg = <0 0 0 0 0>; 84b9db022cSKumar Gala #interrupt-cells = <1>; 85b9db022cSKumar Gala #size-cells = <2>; 86b9db022cSKumar Gala #address-cells = <3>; 87b9db022cSKumar Gala device_type = "pci"; 88b9db022cSKumar Gala interrupts = <16 2 1 14>; 89b9db022cSKumar Gala interrupt-map-mask = <0xf800 0 0 7>; 90b9db022cSKumar Gala interrupt-map = < 91b9db022cSKumar Gala /* IDSEL 0x0 */ 92b9db022cSKumar Gala 0000 0 0 1 &mpic 41 1 0 0 93b9db022cSKumar Gala 0000 0 0 2 &mpic 5 1 0 0 94b9db022cSKumar Gala 0000 0 0 3 &mpic 6 1 0 0 95b9db022cSKumar Gala 0000 0 0 4 &mpic 7 1 0 0 96b9db022cSKumar Gala >; 97b9db022cSKumar Gala }; 98b9db022cSKumar Gala}; 99b9db022cSKumar Gala 100b9db022cSKumar Gala/* controller at 0x202000 */ 101b9db022cSKumar Gala&pci2 { 10214bdc913STimur Tabi compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1"; 103b9db022cSKumar Gala device_type = "pci"; 104b9db022cSKumar Gala #size-cells = <2>; 105b9db022cSKumar Gala #address-cells = <3>; 106b9db022cSKumar Gala bus-range = <0x0 0xff>; 107b9db022cSKumar Gala clock-frequency = <33333333>; 108b9db022cSKumar Gala interrupts = <16 2 1 13>; 1090408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 1100408753fSTimur Tabi fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */ 111b9db022cSKumar Gala pcie@0 { 112b9db022cSKumar Gala reg = <0 0 0 0 0>; 113b9db022cSKumar Gala #interrupt-cells = <1>; 114b9db022cSKumar Gala #size-cells = <2>; 115b9db022cSKumar Gala #address-cells = <3>; 116b9db022cSKumar Gala device_type = "pci"; 117b9db022cSKumar Gala interrupts = <16 2 1 13>; 118b9db022cSKumar Gala interrupt-map-mask = <0xf800 0 0 7>; 119b9db022cSKumar Gala interrupt-map = < 120b9db022cSKumar Gala /* IDSEL 0x0 */ 121b9db022cSKumar Gala 0000 0 0 1 &mpic 42 1 0 0 122b9db022cSKumar Gala 0000 0 0 2 &mpic 9 1 0 0 123b9db022cSKumar Gala 0000 0 0 3 &mpic 10 1 0 0 124b9db022cSKumar Gala 0000 0 0 4 &mpic 11 1 0 0 125b9db022cSKumar Gala >; 126b9db022cSKumar Gala }; 127b9db022cSKumar Gala}; 128b9db022cSKumar Gala 129b9db022cSKumar Gala&rio { 13054986964SKumar Gala compatible = "fsl,srio"; 13154986964SKumar Gala interrupts = <16 2 1 11>; 132b9db022cSKumar Gala #address-cells = <2>; 133b9db022cSKumar Gala #size-cells = <2>; 13454986964SKumar Gala fsl,srio-rmu-handle = <&rmu>; 1350408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 13654986964SKumar Gala ranges; 13754986964SKumar Gala 13854986964SKumar Gala port1 { 13954986964SKumar Gala #address-cells = <2>; 14054986964SKumar Gala #size-cells = <2>; 14154986964SKumar Gala cell-index = <1>; 1420408753fSTimur Tabi fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */ 14354986964SKumar Gala }; 14454986964SKumar Gala 14554986964SKumar Gala port2 { 14654986964SKumar Gala #address-cells = <2>; 14754986964SKumar Gala #size-cells = <2>; 14854986964SKumar Gala cell-index = <2>; 1490408753fSTimur Tabi fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */ 15054986964SKumar Gala }; 151b9db022cSKumar Gala}; 152b9db022cSKumar Gala 153b9db022cSKumar Gala&dcsr { 154b9db022cSKumar Gala #address-cells = <1>; 155b9db022cSKumar Gala #size-cells = <1>; 156b9db022cSKumar Gala compatible = "fsl,dcsr", "simple-bus"; 157b9db022cSKumar Gala 158b9db022cSKumar Gala dcsr-epu@0 { 15937f2808bSStephen George compatible = "fsl,p4080-dcsr-epu", "fsl,dcsr-epu"; 160b9db022cSKumar Gala interrupts = <52 2 0 0 161b9db022cSKumar Gala 84 2 0 0 162b9db022cSKumar Gala 85 2 0 0>; 163b9db022cSKumar Gala reg = <0x0 0x1000>; 164b9db022cSKumar Gala }; 165b9db022cSKumar Gala dcsr-npc { 166b9db022cSKumar Gala compatible = "fsl,dcsr-npc"; 167b9db022cSKumar Gala reg = <0x1000 0x1000 0x1000000 0x8000>; 168b9db022cSKumar Gala }; 169b9db022cSKumar Gala dcsr-nxc@2000 { 170b9db022cSKumar Gala compatible = "fsl,dcsr-nxc"; 171b9db022cSKumar Gala reg = <0x2000 0x1000>; 172b9db022cSKumar Gala }; 173b9db022cSKumar Gala dcsr-corenet { 174b9db022cSKumar Gala compatible = "fsl,dcsr-corenet"; 175b9db022cSKumar Gala reg = <0x8000 0x1000 0xB0000 0x1000>; 176b9db022cSKumar Gala }; 177b9db022cSKumar Gala dcsr-dpaa@9000 { 178b9db022cSKumar Gala compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa"; 179b9db022cSKumar Gala reg = <0x9000 0x1000>; 180b9db022cSKumar Gala }; 181b9db022cSKumar Gala dcsr-ocn@11000 { 182b9db022cSKumar Gala compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn"; 183b9db022cSKumar Gala reg = <0x11000 0x1000>; 184b9db022cSKumar Gala }; 185b9db022cSKumar Gala dcsr-ddr@12000 { 186b9db022cSKumar Gala compatible = "fsl,dcsr-ddr"; 187b9db022cSKumar Gala dev-handle = <&ddr1>; 188b9db022cSKumar Gala reg = <0x12000 0x1000>; 189b9db022cSKumar Gala }; 190b9db022cSKumar Gala dcsr-ddr@13000 { 191b9db022cSKumar Gala compatible = "fsl,dcsr-ddr"; 192b9db022cSKumar Gala dev-handle = <&ddr2>; 193b9db022cSKumar Gala reg = <0x13000 0x1000>; 194b9db022cSKumar Gala }; 195b9db022cSKumar Gala dcsr-nal@18000 { 196b9db022cSKumar Gala compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal"; 197b9db022cSKumar Gala reg = <0x18000 0x1000>; 198b9db022cSKumar Gala }; 199b9db022cSKumar Gala dcsr-rcpm@22000 { 200b9db022cSKumar Gala compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm"; 201b9db022cSKumar Gala reg = <0x22000 0x1000>; 202b9db022cSKumar Gala }; 203b9db022cSKumar Gala dcsr-cpu-sb-proxy@40000 { 204b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 205b9db022cSKumar Gala cpu-handle = <&cpu0>; 206b9db022cSKumar Gala reg = <0x40000 0x1000>; 207b9db022cSKumar Gala }; 208b9db022cSKumar Gala dcsr-cpu-sb-proxy@41000 { 209b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 210b9db022cSKumar Gala cpu-handle = <&cpu1>; 211b9db022cSKumar Gala reg = <0x41000 0x1000>; 212b9db022cSKumar Gala }; 213b9db022cSKumar Gala dcsr-cpu-sb-proxy@42000 { 214b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 215b9db022cSKumar Gala cpu-handle = <&cpu2>; 216b9db022cSKumar Gala reg = <0x42000 0x1000>; 217b9db022cSKumar Gala }; 218b9db022cSKumar Gala dcsr-cpu-sb-proxy@43000 { 219b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 220b9db022cSKumar Gala cpu-handle = <&cpu3>; 221b9db022cSKumar Gala reg = <0x43000 0x1000>; 222b9db022cSKumar Gala }; 223b9db022cSKumar Gala dcsr-cpu-sb-proxy@44000 { 224b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 225b9db022cSKumar Gala cpu-handle = <&cpu4>; 226b9db022cSKumar Gala reg = <0x44000 0x1000>; 227b9db022cSKumar Gala }; 228b9db022cSKumar Gala dcsr-cpu-sb-proxy@45000 { 229b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 230b9db022cSKumar Gala cpu-handle = <&cpu5>; 231b9db022cSKumar Gala reg = <0x45000 0x1000>; 232b9db022cSKumar Gala }; 233b9db022cSKumar Gala dcsr-cpu-sb-proxy@46000 { 234b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 235b9db022cSKumar Gala cpu-handle = <&cpu6>; 236b9db022cSKumar Gala reg = <0x46000 0x1000>; 237b9db022cSKumar Gala }; 238b9db022cSKumar Gala dcsr-cpu-sb-proxy@47000 { 239b9db022cSKumar Gala compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 240b9db022cSKumar Gala cpu-handle = <&cpu7>; 241b9db022cSKumar Gala reg = <0x47000 0x1000>; 242b9db022cSKumar Gala }; 243b9db022cSKumar Gala 244b9db022cSKumar Gala}; 245b9db022cSKumar Gala 246b9db022cSKumar Gala&soc { 247b9db022cSKumar Gala #address-cells = <1>; 248b9db022cSKumar Gala #size-cells = <1>; 249b9db022cSKumar Gala device_type = "soc"; 250b9db022cSKumar Gala compatible = "simple-bus"; 251b9db022cSKumar Gala 252b9db022cSKumar Gala soc-sram-error { 253b9db022cSKumar Gala compatible = "fsl,soc-sram-error"; 254b9db022cSKumar Gala interrupts = <16 2 1 29>; 255b9db022cSKumar Gala }; 256b9db022cSKumar Gala 257b9db022cSKumar Gala corenet-law@0 { 258b9db022cSKumar Gala compatible = "fsl,corenet-law"; 259b9db022cSKumar Gala reg = <0x0 0x1000>; 260b9db022cSKumar Gala fsl,num-laws = <32>; 261b9db022cSKumar Gala }; 262b9db022cSKumar Gala 263b9db022cSKumar Gala ddr1: memory-controller@8000 { 264b9db022cSKumar Gala compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller"; 265b9db022cSKumar Gala reg = <0x8000 0x1000>; 266b9db022cSKumar Gala interrupts = <16 2 1 23>; 267b9db022cSKumar Gala }; 268b9db022cSKumar Gala 269b9db022cSKumar Gala ddr2: memory-controller@9000 { 270b9db022cSKumar Gala compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller"; 271b9db022cSKumar Gala reg = <0x9000 0x1000>; 272b9db022cSKumar Gala interrupts = <16 2 1 22>; 273b9db022cSKumar Gala }; 274b9db022cSKumar Gala 275b9db022cSKumar Gala cpc: l3-cache-controller@10000 { 276b9db022cSKumar Gala compatible = "fsl,p4080-l3-cache-controller", "cache"; 277b9db022cSKumar Gala reg = <0x10000 0x1000 278b9db022cSKumar Gala 0x11000 0x1000>; 279b9db022cSKumar Gala interrupts = <16 2 1 27 280b9db022cSKumar Gala 16 2 1 26>; 281b9db022cSKumar Gala }; 282b9db022cSKumar Gala 283b9db022cSKumar Gala corenet-cf@18000 { 284b9db022cSKumar Gala compatible = "fsl,corenet-cf"; 285b9db022cSKumar Gala reg = <0x18000 0x1000>; 286b9db022cSKumar Gala interrupts = <16 2 1 31>; 287b9db022cSKumar Gala fsl,ccf-num-csdids = <32>; 288b9db022cSKumar Gala fsl,ccf-num-snoopids = <32>; 289b9db022cSKumar Gala }; 290b9db022cSKumar Gala 291b9db022cSKumar Gala iommu@20000 { 292b9db022cSKumar Gala compatible = "fsl,pamu-v1.0", "fsl,pamu"; 2930408753fSTimur Tabi reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */ 2940408753fSTimur Tabi ranges = <0 0x20000 0x5000>; 2950408753fSTimur Tabi #address-cells = <1>; 2960408753fSTimur Tabi #size-cells = <1>; 297b9db022cSKumar Gala interrupts = < 298b9db022cSKumar Gala 24 2 0 0 299b9db022cSKumar Gala 16 2 1 30>; 3000408753fSTimur Tabi 3010408753fSTimur Tabi pamu0: pamu@0 { 3020408753fSTimur Tabi reg = <0 0x1000>; 3030408753fSTimur Tabi fsl,primary-cache-geometry = <32 1>; 3040408753fSTimur Tabi fsl,secondary-cache-geometry = <128 2>; 3050408753fSTimur Tabi }; 3060408753fSTimur Tabi 3070408753fSTimur Tabi pamu1: pamu@1000 { 3080408753fSTimur Tabi reg = <0x1000 0x1000>; 3090408753fSTimur Tabi fsl,primary-cache-geometry = <32 1>; 3100408753fSTimur Tabi fsl,secondary-cache-geometry = <128 2>; 3110408753fSTimur Tabi }; 3120408753fSTimur Tabi 3130408753fSTimur Tabi pamu2: pamu@2000 { 3140408753fSTimur Tabi reg = <0x2000 0x1000>; 3150408753fSTimur Tabi fsl,primary-cache-geometry = <32 1>; 3160408753fSTimur Tabi fsl,secondary-cache-geometry = <128 2>; 3170408753fSTimur Tabi }; 3180408753fSTimur Tabi 3190408753fSTimur Tabi pamu3: pamu@3000 { 3200408753fSTimur Tabi reg = <0x3000 0x1000>; 3210408753fSTimur Tabi fsl,primary-cache-geometry = <32 1>; 3220408753fSTimur Tabi fsl,secondary-cache-geometry = <128 2>; 3230408753fSTimur Tabi }; 3240408753fSTimur Tabi 3250408753fSTimur Tabi pamu4: pamu@4000 { 3260408753fSTimur Tabi reg = <0x4000 0x1000>; 3270408753fSTimur Tabi fsl,primary-cache-geometry = <32 1>; 3280408753fSTimur Tabi fsl,secondary-cache-geometry = <128 2>; 3290408753fSTimur Tabi }; 330b9db022cSKumar Gala }; 331b9db022cSKumar Gala 33254986964SKumar Gala/include/ "qoriq-rmu-0.dtsi" 3330408753fSTimur Tabi rmu@d3000 { 3340408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 3350408753fSTimur Tabi fsl,liodn-reg = <&guts 0x540>; /* RMULIODNR */ 3360408753fSTimur Tabi }; 3370408753fSTimur Tabi 338b9db022cSKumar Gala/include/ "qoriq-mpic.dtsi" 339b9db022cSKumar Gala 340b9db022cSKumar Gala guts: global-utilities@e0000 { 341b9db022cSKumar Gala compatible = "fsl,qoriq-device-config-1.0"; 342b9db022cSKumar Gala reg = <0xe0000 0xe00>; 343b9db022cSKumar Gala fsl,has-rstcr; 344b9db022cSKumar Gala #sleep-cells = <1>; 345b9db022cSKumar Gala fsl,liodn-bits = <12>; 346b9db022cSKumar Gala }; 347b9db022cSKumar Gala 348b9db022cSKumar Gala pins: global-utilities@e0e00 { 349b9db022cSKumar Gala compatible = "fsl,qoriq-pin-control-1.0"; 350b9db022cSKumar Gala reg = <0xe0e00 0x200>; 351b9db022cSKumar Gala #sleep-cells = <2>; 352b9db022cSKumar Gala }; 353b9db022cSKumar Gala 354b9db022cSKumar Gala clockgen: global-utilities@e1000 { 355b9db022cSKumar Gala compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0"; 356*5d1a566eSTang Yuantian ranges = <0x0 0xe1000 0x1000>; 357b9db022cSKumar Gala reg = <0xe1000 0x1000>; 358b9db022cSKumar Gala clock-frequency = <0>; 359*5d1a566eSTang Yuantian #address-cells = <1>; 360*5d1a566eSTang Yuantian #size-cells = <1>; 361*5d1a566eSTang Yuantian 362*5d1a566eSTang Yuantian sysclk: sysclk { 363*5d1a566eSTang Yuantian #clock-cells = <0>; 364*5d1a566eSTang Yuantian compatible = "fsl,qoriq-sysclk-1.0"; 365*5d1a566eSTang Yuantian clock-output-names = "sysclk"; 366*5d1a566eSTang Yuantian }; 367*5d1a566eSTang Yuantian 368*5d1a566eSTang Yuantian pll0: pll0@800 { 369*5d1a566eSTang Yuantian #clock-cells = <1>; 370*5d1a566eSTang Yuantian reg = <0x800 0x4>; 371*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-pll-1.0"; 372*5d1a566eSTang Yuantian clocks = <&sysclk>; 373*5d1a566eSTang Yuantian clock-output-names = "pll0", "pll0-div2"; 374*5d1a566eSTang Yuantian }; 375*5d1a566eSTang Yuantian 376*5d1a566eSTang Yuantian pll1: pll1@820 { 377*5d1a566eSTang Yuantian #clock-cells = <1>; 378*5d1a566eSTang Yuantian reg = <0x820 0x4>; 379*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-pll-1.0"; 380*5d1a566eSTang Yuantian clocks = <&sysclk>; 381*5d1a566eSTang Yuantian clock-output-names = "pll1", "pll1-div2"; 382*5d1a566eSTang Yuantian }; 383*5d1a566eSTang Yuantian 384*5d1a566eSTang Yuantian pll2: pll2@840 { 385*5d1a566eSTang Yuantian #clock-cells = <1>; 386*5d1a566eSTang Yuantian reg = <0x840 0x4>; 387*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-pll-1.0"; 388*5d1a566eSTang Yuantian clocks = <&sysclk>; 389*5d1a566eSTang Yuantian clock-output-names = "pll2", "pll2-div2"; 390*5d1a566eSTang Yuantian }; 391*5d1a566eSTang Yuantian 392*5d1a566eSTang Yuantian pll3: pll3@860 { 393*5d1a566eSTang Yuantian #clock-cells = <1>; 394*5d1a566eSTang Yuantian reg = <0x860 0x4>; 395*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-pll-1.0"; 396*5d1a566eSTang Yuantian clocks = <&sysclk>; 397*5d1a566eSTang Yuantian clock-output-names = "pll3", "pll3-div2"; 398*5d1a566eSTang Yuantian }; 399*5d1a566eSTang Yuantian 400*5d1a566eSTang Yuantian mux0: mux0@0 { 401*5d1a566eSTang Yuantian #clock-cells = <0>; 402*5d1a566eSTang Yuantian reg = <0x0 0x4>; 403*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 404*5d1a566eSTang Yuantian clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 405*5d1a566eSTang Yuantian clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 406*5d1a566eSTang Yuantian clock-output-names = "cmux0"; 407*5d1a566eSTang Yuantian }; 408*5d1a566eSTang Yuantian 409*5d1a566eSTang Yuantian mux1: mux1@20 { 410*5d1a566eSTang Yuantian #clock-cells = <0>; 411*5d1a566eSTang Yuantian reg = <0x20 0x4>; 412*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 413*5d1a566eSTang Yuantian clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 414*5d1a566eSTang Yuantian clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 415*5d1a566eSTang Yuantian clock-output-names = "cmux1"; 416*5d1a566eSTang Yuantian }; 417*5d1a566eSTang Yuantian 418*5d1a566eSTang Yuantian mux2: mux2@40 { 419*5d1a566eSTang Yuantian #clock-cells = <0>; 420*5d1a566eSTang Yuantian reg = <0x40 0x4>; 421*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 422*5d1a566eSTang Yuantian clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 423*5d1a566eSTang Yuantian clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 424*5d1a566eSTang Yuantian clock-output-names = "cmux2"; 425*5d1a566eSTang Yuantian }; 426*5d1a566eSTang Yuantian 427*5d1a566eSTang Yuantian mux3: mux3@60 { 428*5d1a566eSTang Yuantian #clock-cells = <0>; 429*5d1a566eSTang Yuantian reg = <0x60 0x4>; 430*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 431*5d1a566eSTang Yuantian clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 432*5d1a566eSTang Yuantian clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 433*5d1a566eSTang Yuantian clock-output-names = "cmux3"; 434*5d1a566eSTang Yuantian }; 435*5d1a566eSTang Yuantian 436*5d1a566eSTang Yuantian mux4: mux4@80 { 437*5d1a566eSTang Yuantian #clock-cells = <0>; 438*5d1a566eSTang Yuantian reg = <0x80 0x4>; 439*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 440*5d1a566eSTang Yuantian clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; 441*5d1a566eSTang Yuantian clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; 442*5d1a566eSTang Yuantian clock-output-names = "cmux4"; 443*5d1a566eSTang Yuantian }; 444*5d1a566eSTang Yuantian 445*5d1a566eSTang Yuantian mux5: mux5@a0 { 446*5d1a566eSTang Yuantian #clock-cells = <0>; 447*5d1a566eSTang Yuantian reg = <0xa0 0x4>; 448*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 449*5d1a566eSTang Yuantian clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; 450*5d1a566eSTang Yuantian clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; 451*5d1a566eSTang Yuantian clock-output-names = "cmux5"; 452*5d1a566eSTang Yuantian }; 453*5d1a566eSTang Yuantian 454*5d1a566eSTang Yuantian mux6: mux6@c0 { 455*5d1a566eSTang Yuantian #clock-cells = <0>; 456*5d1a566eSTang Yuantian reg = <0xc0 0x4>; 457*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 458*5d1a566eSTang Yuantian clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; 459*5d1a566eSTang Yuantian clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; 460*5d1a566eSTang Yuantian clock-output-names = "cmux6"; 461*5d1a566eSTang Yuantian }; 462*5d1a566eSTang Yuantian 463*5d1a566eSTang Yuantian mux7: mux7@e0 { 464*5d1a566eSTang Yuantian #clock-cells = <0>; 465*5d1a566eSTang Yuantian reg = <0xe0 0x4>; 466*5d1a566eSTang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 467*5d1a566eSTang Yuantian clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; 468*5d1a566eSTang Yuantian clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; 469*5d1a566eSTang Yuantian clock-output-names = "cmux7"; 470*5d1a566eSTang Yuantian }; 471b9db022cSKumar Gala }; 472b9db022cSKumar Gala 473b9db022cSKumar Gala rcpm: global-utilities@e2000 { 474b9db022cSKumar Gala compatible = "fsl,qoriq-rcpm-1.0"; 475b9db022cSKumar Gala reg = <0xe2000 0x1000>; 476b9db022cSKumar Gala #sleep-cells = <1>; 477b9db022cSKumar Gala }; 478b9db022cSKumar Gala 479b9db022cSKumar Gala sfp: sfp@e8000 { 480b9db022cSKumar Gala compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0"; 481b9db022cSKumar Gala reg = <0xe8000 0x1000>; 482b9db022cSKumar Gala }; 483b9db022cSKumar Gala 484b9db022cSKumar Gala serdes: serdes@ea000 { 485b9db022cSKumar Gala compatible = "fsl,p4080-serdes"; 486b9db022cSKumar Gala reg = <0xea000 0x1000>; 487b9db022cSKumar Gala }; 488b9db022cSKumar Gala 489b9db022cSKumar Gala/include/ "qoriq-dma-0.dtsi" 4900408753fSTimur Tabi dma@100300 { 4910408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 4920408753fSTimur Tabi fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */ 4930408753fSTimur Tabi }; 4940408753fSTimur Tabi 495b9db022cSKumar Gala/include/ "qoriq-dma-1.dtsi" 4960408753fSTimur Tabi dma@101300 { 4970408753fSTimur Tabi fsl,iommu-parent = <&pamu0>; 4980408753fSTimur Tabi fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */ 4990408753fSTimur Tabi }; 5000408753fSTimur Tabi 501b9db022cSKumar Gala/include/ "qoriq-espi-0.dtsi" 502b9db022cSKumar Gala spi@110000 { 503b9db022cSKumar Gala fsl,espi-num-chipselects = <4>; 504b9db022cSKumar Gala }; 505b9db022cSKumar Gala 506b9db022cSKumar Gala/include/ "qoriq-esdhc-0.dtsi" 507b9db022cSKumar Gala sdhc@114000 { 5080408753fSTimur Tabi fsl,iommu-parent = <&pamu1>; 5090408753fSTimur Tabi fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 510b9db022cSKumar Gala voltage-ranges = <3300 3300>; 511b9db022cSKumar Gala sdhci,auto-cmd12; 512b9db022cSKumar Gala }; 513b9db022cSKumar Gala 514b9db022cSKumar Gala/include/ "qoriq-i2c-0.dtsi" 515b9db022cSKumar Gala/include/ "qoriq-i2c-1.dtsi" 516b9db022cSKumar Gala/include/ "qoriq-duart-0.dtsi" 517b9db022cSKumar Gala/include/ "qoriq-duart-1.dtsi" 518b9db022cSKumar Gala/include/ "qoriq-gpio-0.dtsi" 519b9db022cSKumar Gala/include/ "qoriq-usb2-mph-0.dtsi" 52009a3017aSShengzhou Liu usb@210000 { 52109a3017aSShengzhou Liu compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 5220408753fSTimur Tabi fsl,iommu-parent = <&pamu1>; 5230408753fSTimur Tabi fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 52409a3017aSShengzhou Liu port0; 52509a3017aSShengzhou Liu }; 526b9db022cSKumar Gala/include/ "qoriq-usb2-dr-0.dtsi" 52709a3017aSShengzhou Liu usb@211000 { 52809a3017aSShengzhou Liu compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 5290408753fSTimur Tabi fsl,iommu-parent = <&pamu1>; 5300408753fSTimur Tabi fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 53109a3017aSShengzhou Liu }; 532b9db022cSKumar Gala/include/ "qoriq-sec4.0-0.dtsi" 5330408753fSTimur Tabicrypto: crypto@300000 { 5340408753fSTimur Tabi fsl,iommu-parent = <&pamu1>; 5350408753fSTimur Tabi }; 536b9db022cSKumar Gala}; 537