1*1a59d1b8SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 2e9ee2924SVictor Gallardo/* 3e9ee2924SVictor Gallardo * Device Tree Source for AMCC Arches (dual 460GT board) 4e9ee2924SVictor Gallardo * 5e9ee2924SVictor Gallardo * (C) Copyright 2008 Applied Micro Circuits Corporation 6e9ee2924SVictor Gallardo * Victor Gallardo <vgallardo@amcc.com> 7e9ee2924SVictor Gallardo * Adam Graham <agraham@amcc.com> 8e9ee2924SVictor Gallardo * 9e9ee2924SVictor Gallardo * Based on the glacier.dts file 10e9ee2924SVictor Gallardo * Stefan Roese <sr@denx.de> 11e9ee2924SVictor Gallardo * Copyright 2008 DENX Software Engineering 12e9ee2924SVictor Gallardo * 13e9ee2924SVictor Gallardo * See file CREDITS for list of people who contributed to this 14e9ee2924SVictor Gallardo * project. 15e9ee2924SVictor Gallardo */ 16e9ee2924SVictor Gallardo 17e9ee2924SVictor Gallardo/dts-v1/; 18e9ee2924SVictor Gallardo 19e9ee2924SVictor Gallardo/ { 20e9ee2924SVictor Gallardo #address-cells = <2>; 21e9ee2924SVictor Gallardo #size-cells = <1>; 22e9ee2924SVictor Gallardo model = "amcc,arches"; 23e9ee2924SVictor Gallardo compatible = "amcc,arches"; 24e9ee2924SVictor Gallardo dcr-parent = <&{/cpus/cpu@0}>; 25e9ee2924SVictor Gallardo 26e9ee2924SVictor Gallardo aliases { 27e9ee2924SVictor Gallardo ethernet0 = &EMAC0; 28e9ee2924SVictor Gallardo ethernet1 = &EMAC1; 29e9ee2924SVictor Gallardo ethernet2 = &EMAC2; 30e9ee2924SVictor Gallardo serial0 = &UART0; 31e9ee2924SVictor Gallardo }; 32e9ee2924SVictor Gallardo 33e9ee2924SVictor Gallardo cpus { 34e9ee2924SVictor Gallardo #address-cells = <1>; 35e9ee2924SVictor Gallardo #size-cells = <0>; 36e9ee2924SVictor Gallardo 37e9ee2924SVictor Gallardo cpu@0 { 38e9ee2924SVictor Gallardo device_type = "cpu"; 39e9ee2924SVictor Gallardo model = "PowerPC,460GT"; 40e9ee2924SVictor Gallardo reg = <0x00000000>; 41e9ee2924SVictor Gallardo clock-frequency = <0>; /* Filled in by U-Boot */ 42e9ee2924SVictor Gallardo timebase-frequency = <0>; /* Filled in by U-Boot */ 43e9ee2924SVictor Gallardo i-cache-line-size = <32>; 44e9ee2924SVictor Gallardo d-cache-line-size = <32>; 45e9ee2924SVictor Gallardo i-cache-size = <32768>; 46e9ee2924SVictor Gallardo d-cache-size = <32768>; 47e9ee2924SVictor Gallardo dcr-controller; 48e9ee2924SVictor Gallardo dcr-access-method = "native"; 496f57518cSStefan Roese next-level-cache = <&L2C0>; 50e9ee2924SVictor Gallardo }; 51e9ee2924SVictor Gallardo }; 52e9ee2924SVictor Gallardo 53e9ee2924SVictor Gallardo memory { 54e9ee2924SVictor Gallardo device_type = "memory"; 55e9ee2924SVictor Gallardo reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 56e9ee2924SVictor Gallardo }; 57e9ee2924SVictor Gallardo 58e9ee2924SVictor Gallardo UIC0: interrupt-controller0 { 59e9ee2924SVictor Gallardo compatible = "ibm,uic-460gt","ibm,uic"; 60e9ee2924SVictor Gallardo interrupt-controller; 61e9ee2924SVictor Gallardo cell-index = <0>; 62e9ee2924SVictor Gallardo dcr-reg = <0x0c0 0x009>; 63e9ee2924SVictor Gallardo #address-cells = <0>; 64e9ee2924SVictor Gallardo #size-cells = <0>; 65e9ee2924SVictor Gallardo #interrupt-cells = <2>; 66e9ee2924SVictor Gallardo }; 67e9ee2924SVictor Gallardo 68e9ee2924SVictor Gallardo UIC1: interrupt-controller1 { 69e9ee2924SVictor Gallardo compatible = "ibm,uic-460gt","ibm,uic"; 70e9ee2924SVictor Gallardo interrupt-controller; 71e9ee2924SVictor Gallardo cell-index = <1>; 72e9ee2924SVictor Gallardo dcr-reg = <0x0d0 0x009>; 73e9ee2924SVictor Gallardo #address-cells = <0>; 74e9ee2924SVictor Gallardo #size-cells = <0>; 75e9ee2924SVictor Gallardo #interrupt-cells = <2>; 76e9ee2924SVictor Gallardo interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 77e9ee2924SVictor Gallardo interrupt-parent = <&UIC0>; 78e9ee2924SVictor Gallardo }; 79e9ee2924SVictor Gallardo 80e9ee2924SVictor Gallardo UIC2: interrupt-controller2 { 81e9ee2924SVictor Gallardo compatible = "ibm,uic-460gt","ibm,uic"; 82e9ee2924SVictor Gallardo interrupt-controller; 83e9ee2924SVictor Gallardo cell-index = <2>; 84e9ee2924SVictor Gallardo dcr-reg = <0x0e0 0x009>; 85e9ee2924SVictor Gallardo #address-cells = <0>; 86e9ee2924SVictor Gallardo #size-cells = <0>; 87e9ee2924SVictor Gallardo #interrupt-cells = <2>; 88e9ee2924SVictor Gallardo interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 89e9ee2924SVictor Gallardo interrupt-parent = <&UIC0>; 90e9ee2924SVictor Gallardo }; 91e9ee2924SVictor Gallardo 92e9ee2924SVictor Gallardo UIC3: interrupt-controller3 { 93e9ee2924SVictor Gallardo compatible = "ibm,uic-460gt","ibm,uic"; 94e9ee2924SVictor Gallardo interrupt-controller; 95e9ee2924SVictor Gallardo cell-index = <3>; 96e9ee2924SVictor Gallardo dcr-reg = <0x0f0 0x009>; 97e9ee2924SVictor Gallardo #address-cells = <0>; 98e9ee2924SVictor Gallardo #size-cells = <0>; 99e9ee2924SVictor Gallardo #interrupt-cells = <2>; 100e9ee2924SVictor Gallardo interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 101e9ee2924SVictor Gallardo interrupt-parent = <&UIC0>; 102e9ee2924SVictor Gallardo }; 103e9ee2924SVictor Gallardo 104e9ee2924SVictor Gallardo SDR0: sdr { 105e9ee2924SVictor Gallardo compatible = "ibm,sdr-460gt"; 106e9ee2924SVictor Gallardo dcr-reg = <0x00e 0x002>; 107e9ee2924SVictor Gallardo }; 108e9ee2924SVictor Gallardo 109e9ee2924SVictor Gallardo CPR0: cpr { 110e9ee2924SVictor Gallardo compatible = "ibm,cpr-460gt"; 111e9ee2924SVictor Gallardo dcr-reg = <0x00c 0x002>; 112e9ee2924SVictor Gallardo }; 113e9ee2924SVictor Gallardo 114f661be6cSStefan Roese L2C0: l2c { 115f661be6cSStefan Roese compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; 116f661be6cSStefan Roese dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ 117f661be6cSStefan Roese 0x030 0x008>; /* L2 cache DCR's */ 118f661be6cSStefan Roese cache-line-size = <32>; /* 32 bytes */ 119f661be6cSStefan Roese cache-size = <262144>; /* L2, 256K */ 120f661be6cSStefan Roese interrupt-parent = <&UIC1>; 121f661be6cSStefan Roese interrupts = <11 1>; 122f661be6cSStefan Roese }; 123f661be6cSStefan Roese 124e9ee2924SVictor Gallardo plb { 125e9ee2924SVictor Gallardo compatible = "ibm,plb-460gt", "ibm,plb4"; 126e9ee2924SVictor Gallardo #address-cells = <2>; 127e9ee2924SVictor Gallardo #size-cells = <1>; 128e9ee2924SVictor Gallardo ranges; 129e9ee2924SVictor Gallardo clock-frequency = <0>; /* Filled in by U-Boot */ 130e9ee2924SVictor Gallardo 131e9ee2924SVictor Gallardo SDRAM0: sdram { 132e9ee2924SVictor Gallardo compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; 133e9ee2924SVictor Gallardo dcr-reg = <0x010 0x002>; 134e9ee2924SVictor Gallardo }; 135e9ee2924SVictor Gallardo 1366f57518cSStefan Roese CRYPTO: crypto@180000 { 1376f57518cSStefan Roese compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto"; 1386f57518cSStefan Roese reg = <4 0x00180000 0x80400>; 1396f57518cSStefan Roese interrupt-parent = <&UIC0>; 1406f57518cSStefan Roese interrupts = <0x1d 0x4>; 1416f57518cSStefan Roese }; 1426f57518cSStefan Roese 143e9ee2924SVictor Gallardo MAL0: mcmal { 144e9ee2924SVictor Gallardo compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; 145e9ee2924SVictor Gallardo dcr-reg = <0x180 0x062>; 146e9ee2924SVictor Gallardo num-tx-chans = <3>; 147e9ee2924SVictor Gallardo num-rx-chans = <24>; 148e9ee2924SVictor Gallardo #address-cells = <0>; 149e9ee2924SVictor Gallardo #size-cells = <0>; 150e9ee2924SVictor Gallardo interrupt-parent = <&UIC2>; 151e9ee2924SVictor Gallardo interrupts = < /*TXEOB*/ 0x6 0x4 152e9ee2924SVictor Gallardo /*RXEOB*/ 0x7 0x4 153e9ee2924SVictor Gallardo /*SERR*/ 0x3 0x4 154e9ee2924SVictor Gallardo /*TXDE*/ 0x4 0x4 155e9ee2924SVictor Gallardo /*RXDE*/ 0x5 0x4>; 156e9ee2924SVictor Gallardo desc-base-addr-high = <0x8>; 157e9ee2924SVictor Gallardo }; 158e9ee2924SVictor Gallardo 159e9ee2924SVictor Gallardo POB0: opb { 160e9ee2924SVictor Gallardo compatible = "ibm,opb-460gt", "ibm,opb"; 161e9ee2924SVictor Gallardo #address-cells = <1>; 162e9ee2924SVictor Gallardo #size-cells = <1>; 163e9ee2924SVictor Gallardo ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 164e9ee2924SVictor Gallardo clock-frequency = <0>; /* Filled in by U-Boot */ 165e9ee2924SVictor Gallardo 166e9ee2924SVictor Gallardo EBC0: ebc { 167e9ee2924SVictor Gallardo compatible = "ibm,ebc-460gt", "ibm,ebc"; 168e9ee2924SVictor Gallardo dcr-reg = <0x012 0x002>; 169e9ee2924SVictor Gallardo #address-cells = <2>; 170e9ee2924SVictor Gallardo #size-cells = <1>; 171e9ee2924SVictor Gallardo clock-frequency = <0>; /* Filled in by U-Boot */ 172e9ee2924SVictor Gallardo /* ranges property is supplied by U-Boot */ 173e9ee2924SVictor Gallardo interrupts = <0x6 0x4>; 174e9ee2924SVictor Gallardo interrupt-parent = <&UIC1>; 175f661be6cSStefan Roese 176f661be6cSStefan Roese nor_flash@0,0 { 177f661be6cSStefan Roese compatible = "amd,s29gl256n", "cfi-flash"; 178f661be6cSStefan Roese bank-width = <2>; 179f661be6cSStefan Roese reg = <0x00000000 0x00000000 0x02000000>; 180f661be6cSStefan Roese #address-cells = <1>; 181f661be6cSStefan Roese #size-cells = <1>; 182f661be6cSStefan Roese partition@0 { 183f661be6cSStefan Roese label = "kernel"; 184f661be6cSStefan Roese reg = <0x00000000 0x001e0000>; 185f661be6cSStefan Roese }; 186f661be6cSStefan Roese partition@1e0000 { 187f661be6cSStefan Roese label = "dtb"; 188f661be6cSStefan Roese reg = <0x001e0000 0x00020000>; 189f661be6cSStefan Roese }; 190f661be6cSStefan Roese partition@200000 { 191f661be6cSStefan Roese label = "root"; 192f661be6cSStefan Roese reg = <0x00200000 0x00200000>; 193f661be6cSStefan Roese }; 194f661be6cSStefan Roese partition@400000 { 195f661be6cSStefan Roese label = "user"; 196f661be6cSStefan Roese reg = <0x00400000 0x01b60000>; 197f661be6cSStefan Roese }; 198f661be6cSStefan Roese partition@1f60000 { 199f661be6cSStefan Roese label = "env"; 200f661be6cSStefan Roese reg = <0x01f60000 0x00040000>; 201f661be6cSStefan Roese }; 202f661be6cSStefan Roese partition@1fa0000 { 203f661be6cSStefan Roese label = "u-boot"; 204f661be6cSStefan Roese reg = <0x01fa0000 0x00060000>; 205f661be6cSStefan Roese }; 206f661be6cSStefan Roese }; 207e9ee2924SVictor Gallardo }; 208e9ee2924SVictor Gallardo 209e9ee2924SVictor Gallardo UART0: serial@ef600300 { 210e9ee2924SVictor Gallardo device_type = "serial"; 211e9ee2924SVictor Gallardo compatible = "ns16550"; 212e9ee2924SVictor Gallardo reg = <0xef600300 0x00000008>; 213e9ee2924SVictor Gallardo virtual-reg = <0xef600300>; 214e9ee2924SVictor Gallardo clock-frequency = <0>; /* Filled in by U-Boot */ 215e9ee2924SVictor Gallardo current-speed = <0>; /* Filled in by U-Boot */ 216e9ee2924SVictor Gallardo interrupt-parent = <&UIC1>; 217e9ee2924SVictor Gallardo interrupts = <0x1 0x4>; 218e9ee2924SVictor Gallardo }; 219e9ee2924SVictor Gallardo 220e9ee2924SVictor Gallardo IIC0: i2c@ef600700 { 221e9ee2924SVictor Gallardo compatible = "ibm,iic-460gt", "ibm,iic"; 222e9ee2924SVictor Gallardo reg = <0xef600700 0x00000014>; 223e9ee2924SVictor Gallardo interrupt-parent = <&UIC0>; 224e9ee2924SVictor Gallardo interrupts = <0x2 0x4>; 225f661be6cSStefan Roese #address-cells = <1>; 226f661be6cSStefan Roese #size-cells = <0>; 227f661be6cSStefan Roese sttm@4a { 228f661be6cSStefan Roese compatible = "ad,ad7414"; 229f661be6cSStefan Roese reg = <0x4a>; 230f661be6cSStefan Roese interrupt-parent = <&UIC1>; 231f661be6cSStefan Roese interrupts = <0x0 0x8>; 232f661be6cSStefan Roese }; 233e9ee2924SVictor Gallardo }; 234e9ee2924SVictor Gallardo 235e9ee2924SVictor Gallardo IIC1: i2c@ef600800 { 236e9ee2924SVictor Gallardo compatible = "ibm,iic-460gt", "ibm,iic"; 237e9ee2924SVictor Gallardo reg = <0xef600800 0x00000014>; 238e9ee2924SVictor Gallardo interrupt-parent = <&UIC0>; 239e9ee2924SVictor Gallardo interrupts = <0x3 0x4>; 240e9ee2924SVictor Gallardo }; 241e9ee2924SVictor Gallardo 242e9ee2924SVictor Gallardo TAH0: emac-tah@ef601350 { 243e9ee2924SVictor Gallardo compatible = "ibm,tah-460gt", "ibm,tah"; 244e9ee2924SVictor Gallardo reg = <0xef601350 0x00000030>; 245e9ee2924SVictor Gallardo }; 246e9ee2924SVictor Gallardo 247e9ee2924SVictor Gallardo TAH1: emac-tah@ef601450 { 248e9ee2924SVictor Gallardo compatible = "ibm,tah-460gt", "ibm,tah"; 249e9ee2924SVictor Gallardo reg = <0xef601450 0x00000030>; 250e9ee2924SVictor Gallardo }; 251e9ee2924SVictor Gallardo 252e9ee2924SVictor Gallardo EMAC0: ethernet@ef600e00 { 253e9ee2924SVictor Gallardo device_type = "network"; 254e9ee2924SVictor Gallardo compatible = "ibm,emac-460gt", "ibm,emac4sync"; 255e9ee2924SVictor Gallardo interrupt-parent = <&EMAC0>; 256e9ee2924SVictor Gallardo interrupts = <0x0 0x1>; 257e9ee2924SVictor Gallardo #interrupt-cells = <1>; 258e9ee2924SVictor Gallardo #address-cells = <0>; 259e9ee2924SVictor Gallardo #size-cells = <0>; 260e9ee2924SVictor Gallardo interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 261e9ee2924SVictor Gallardo /*Wake*/ 0x1 &UIC2 0x14 0x4>; 262e9ee2924SVictor Gallardo reg = <0xef600e00 0x000000c4>; 263e9ee2924SVictor Gallardo local-mac-address = [000000000000]; /* Filled in by U-Boot */ 264e9ee2924SVictor Gallardo mal-device = <&MAL0>; 265e9ee2924SVictor Gallardo mal-tx-channel = <0>; 266e9ee2924SVictor Gallardo mal-rx-channel = <0>; 267e9ee2924SVictor Gallardo cell-index = <0>; 268e9ee2924SVictor Gallardo max-frame-size = <9000>; 269e9ee2924SVictor Gallardo rx-fifo-size = <4096>; 270e9ee2924SVictor Gallardo tx-fifo-size = <2048>; 2716f57518cSStefan Roese rx-fifo-size-gige = <16384>; 272e9ee2924SVictor Gallardo phy-mode = "sgmii"; 273e9ee2924SVictor Gallardo phy-map = <0xffffffff>; 274e9ee2924SVictor Gallardo gpcs-address = <0x0000000a>; 275e9ee2924SVictor Gallardo tah-device = <&TAH0>; 276e9ee2924SVictor Gallardo tah-channel = <0>; 277e9ee2924SVictor Gallardo has-inverted-stacr-oc; 278e9ee2924SVictor Gallardo has-new-stacr-staopc; 279e9ee2924SVictor Gallardo }; 280e9ee2924SVictor Gallardo 281e9ee2924SVictor Gallardo EMAC1: ethernet@ef600f00 { 282e9ee2924SVictor Gallardo device_type = "network"; 283e9ee2924SVictor Gallardo compatible = "ibm,emac-460gt", "ibm,emac4sync"; 284e9ee2924SVictor Gallardo interrupt-parent = <&EMAC1>; 285e9ee2924SVictor Gallardo interrupts = <0x0 0x1>; 286e9ee2924SVictor Gallardo #interrupt-cells = <1>; 287e9ee2924SVictor Gallardo #address-cells = <0>; 288e9ee2924SVictor Gallardo #size-cells = <0>; 289e9ee2924SVictor Gallardo interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 290e9ee2924SVictor Gallardo /*Wake*/ 0x1 &UIC2 0x15 0x4>; 291e9ee2924SVictor Gallardo reg = <0xef600f00 0x000000c4>; 292e9ee2924SVictor Gallardo local-mac-address = [000000000000]; /* Filled in by U-Boot */ 293e9ee2924SVictor Gallardo mal-device = <&MAL0>; 294e9ee2924SVictor Gallardo mal-tx-channel = <1>; 295e9ee2924SVictor Gallardo mal-rx-channel = <8>; 296e9ee2924SVictor Gallardo cell-index = <1>; 297e9ee2924SVictor Gallardo max-frame-size = <9000>; 298e9ee2924SVictor Gallardo rx-fifo-size = <4096>; 299e9ee2924SVictor Gallardo tx-fifo-size = <2048>; 3006f57518cSStefan Roese rx-fifo-size-gige = <16384>; 301e9ee2924SVictor Gallardo phy-mode = "sgmii"; 302e9ee2924SVictor Gallardo phy-map = <0x00000000>; 303e9ee2924SVictor Gallardo gpcs-address = <0x0000000b>; 304e9ee2924SVictor Gallardo tah-device = <&TAH1>; 305e9ee2924SVictor Gallardo tah-channel = <1>; 306e9ee2924SVictor Gallardo has-inverted-stacr-oc; 307e9ee2924SVictor Gallardo has-new-stacr-staopc; 308e9ee2924SVictor Gallardo mdio-device = <&EMAC0>; 309e9ee2924SVictor Gallardo }; 310e9ee2924SVictor Gallardo 311e9ee2924SVictor Gallardo EMAC2: ethernet@ef601100 { 312e9ee2924SVictor Gallardo device_type = "network"; 313e9ee2924SVictor Gallardo compatible = "ibm,emac-460gt", "ibm,emac4sync"; 314e9ee2924SVictor Gallardo interrupt-parent = <&EMAC2>; 315e9ee2924SVictor Gallardo interrupts = <0x0 0x1>; 316e9ee2924SVictor Gallardo #interrupt-cells = <1>; 317e9ee2924SVictor Gallardo #address-cells = <0>; 318e9ee2924SVictor Gallardo #size-cells = <0>; 319e9ee2924SVictor Gallardo interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 320e9ee2924SVictor Gallardo /*Wake*/ 0x1 &UIC2 0x16 0x4>; 321e9ee2924SVictor Gallardo reg = <0xef601100 0x000000c4>; 322e9ee2924SVictor Gallardo local-mac-address = [000000000000]; /* Filled in by U-Boot */ 323e9ee2924SVictor Gallardo mal-device = <&MAL0>; 324e9ee2924SVictor Gallardo mal-tx-channel = <2>; 325e9ee2924SVictor Gallardo mal-rx-channel = <16>; 326e9ee2924SVictor Gallardo cell-index = <2>; 327e9ee2924SVictor Gallardo max-frame-size = <9000>; 328e9ee2924SVictor Gallardo rx-fifo-size = <4096>; 329e9ee2924SVictor Gallardo tx-fifo-size = <2048>; 3306f57518cSStefan Roese rx-fifo-size-gige = <16384>; 3316f57518cSStefan Roese tx-fifo-size-gige = <16384>; /* emac2&3 only */ 332e9ee2924SVictor Gallardo phy-mode = "sgmii"; 333e9ee2924SVictor Gallardo phy-map = <0x00000001>; 334e9ee2924SVictor Gallardo gpcs-address = <0x0000000C>; 335e9ee2924SVictor Gallardo has-inverted-stacr-oc; 336e9ee2924SVictor Gallardo has-new-stacr-staopc; 337e9ee2924SVictor Gallardo mdio-device = <&EMAC0>; 338e9ee2924SVictor Gallardo }; 339e9ee2924SVictor Gallardo }; 340e9ee2924SVictor Gallardo }; 341e9ee2924SVictor Gallardo}; 342