1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2deae26bfSKyle McMartin #ifndef _ASMPARISC_SHMPARAM_H 3deae26bfSKyle McMartin #define _ASMPARISC_SHMPARAM_H 4deae26bfSKyle McMartin 5*3f091387SHelge Deller /* 6*3f091387SHelge Deller * PA-RISC uses virtually indexed & physically tagged (VIPT) caches 7*3f091387SHelge Deller * which has strict requirements when two pages to the same physical 8*3f091387SHelge Deller * address are accessed through different mappings. Read the section 9*3f091387SHelge Deller * "Address Aliasing" in the arch docs for more detail: 10*3f091387SHelge Deller * PA-RISC 1.1 (page 3-6): 11*3f091387SHelge Deller * https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf 12*3f091387SHelge Deller * PA-RISC 2.0 (page F-5): 13*3f091387SHelge Deller * https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf 14*3f091387SHelge Deller * 15*3f091387SHelge Deller * For Linux we allow kernel and userspace to map pages on page size 16*3f091387SHelge Deller * granularity (SHMLBA) but have to ensure that, if two pages are 17*3f091387SHelge Deller * mapped to the same physical address, the virtual and physical 18*3f091387SHelge Deller * addresses modulo SHM_COLOUR are identical. 19*3f091387SHelge Deller */ 200ef36bd2SHelge Deller #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ 210ef36bd2SHelge Deller #define SHM_COLOUR 0x00400000 /* shared mappings colouring */ 22deae26bfSKyle McMartin 23deae26bfSKyle McMartin #endif /* _ASMPARISC_SHMPARAM_H */ 24