11ccea77eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2f27ffc75SLey Foon Tan /*
3f27ffc75SLey Foon Tan * Copyright (C) 2013 Altera Corporation
4f27ffc75SLey Foon Tan * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
5f27ffc75SLey Foon Tan * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
6f27ffc75SLey Foon Tan *
7f27ffc75SLey Foon Tan * based on irq.c from m68k which is:
8f27ffc75SLey Foon Tan *
9f27ffc75SLey Foon Tan * Copyright (C) 2007 Greg Ungerer <gerg@snapgear.com>
10f27ffc75SLey Foon Tan */
11f27ffc75SLey Foon Tan
12f27ffc75SLey Foon Tan #include <linux/init.h>
13f27ffc75SLey Foon Tan #include <linux/interrupt.h>
149bd1cc41SMarc Zyngier #include <linux/irqdomain.h>
15f27ffc75SLey Foon Tan #include <linux/of.h>
16f27ffc75SLey Foon Tan
17f27ffc75SLey Foon Tan static u32 ienable;
18f27ffc75SLey Foon Tan
do_IRQ(int hwirq,struct pt_regs * regs)19f27ffc75SLey Foon Tan asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs)
20f27ffc75SLey Foon Tan {
21f27ffc75SLey Foon Tan struct pt_regs *oldregs = set_irq_regs(regs);
22f27ffc75SLey Foon Tan
23f27ffc75SLey Foon Tan irq_enter();
24*153517d4SMarc Zyngier generic_handle_domain_irq(NULL, hwirq);
25f27ffc75SLey Foon Tan irq_exit();
26f27ffc75SLey Foon Tan
27f27ffc75SLey Foon Tan set_irq_regs(oldregs);
28f27ffc75SLey Foon Tan }
29f27ffc75SLey Foon Tan
chip_unmask(struct irq_data * d)30f27ffc75SLey Foon Tan static void chip_unmask(struct irq_data *d)
31f27ffc75SLey Foon Tan {
32f27ffc75SLey Foon Tan ienable |= (1 << d->hwirq);
33f27ffc75SLey Foon Tan WRCTL(CTL_IENABLE, ienable);
34f27ffc75SLey Foon Tan }
35f27ffc75SLey Foon Tan
chip_mask(struct irq_data * d)36f27ffc75SLey Foon Tan static void chip_mask(struct irq_data *d)
37f27ffc75SLey Foon Tan {
38f27ffc75SLey Foon Tan ienable &= ~(1 << d->hwirq);
39f27ffc75SLey Foon Tan WRCTL(CTL_IENABLE, ienable);
40f27ffc75SLey Foon Tan }
41f27ffc75SLey Foon Tan
42f27ffc75SLey Foon Tan static struct irq_chip m_irq_chip = {
43f27ffc75SLey Foon Tan .name = "NIOS2-INTC",
44f27ffc75SLey Foon Tan .irq_unmask = chip_unmask,
45f27ffc75SLey Foon Tan .irq_mask = chip_mask,
46f27ffc75SLey Foon Tan };
47f27ffc75SLey Foon Tan
irq_map(struct irq_domain * h,unsigned int virq,irq_hw_number_t hw_irq_num)48f27ffc75SLey Foon Tan static int irq_map(struct irq_domain *h, unsigned int virq,
49f27ffc75SLey Foon Tan irq_hw_number_t hw_irq_num)
50f27ffc75SLey Foon Tan {
51f27ffc75SLey Foon Tan irq_set_chip_and_handler(virq, &m_irq_chip, handle_level_irq);
52f27ffc75SLey Foon Tan
53f27ffc75SLey Foon Tan return 0;
54f27ffc75SLey Foon Tan }
55f27ffc75SLey Foon Tan
5657ac76edSTobias Klauser static const struct irq_domain_ops irq_ops = {
57f27ffc75SLey Foon Tan .map = irq_map,
58f27ffc75SLey Foon Tan .xlate = irq_domain_xlate_onecell,
59f27ffc75SLey Foon Tan };
60f27ffc75SLey Foon Tan
init_IRQ(void)61f27ffc75SLey Foon Tan void __init init_IRQ(void)
62f27ffc75SLey Foon Tan {
63f27ffc75SLey Foon Tan struct irq_domain *domain;
64f27ffc75SLey Foon Tan struct device_node *node;
65f27ffc75SLey Foon Tan
66f27ffc75SLey Foon Tan node = of_find_compatible_node(NULL, NULL, "altr,nios2-1.0");
67f27ffc75SLey Foon Tan if (!node)
68f27ffc75SLey Foon Tan node = of_find_compatible_node(NULL, NULL, "altr,nios2-1.1");
69f27ffc75SLey Foon Tan
70f27ffc75SLey Foon Tan BUG_ON(!node);
71f27ffc75SLey Foon Tan
72f27ffc75SLey Foon Tan domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &irq_ops, NULL);
73f27ffc75SLey Foon Tan BUG_ON(!domain);
74f27ffc75SLey Foon Tan
75f27ffc75SLey Foon Tan irq_set_default_host(domain);
76f27ffc75SLey Foon Tan of_node_put(node);
77f27ffc75SLey Foon Tan /* Load the initial ienable value */
78f27ffc75SLey Foon Tan ienable = RDCTL(CTL_IENABLE);
79f27ffc75SLey Foon Tan }
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