xref: /openbmc/linux/arch/mips/txx9/generic/irq_tx4927.c (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
122b1d707SAtsushi Nemoto /*
222b1d707SAtsushi Nemoto  * Common tx4927 irq handler
322b1d707SAtsushi Nemoto  *
422b1d707SAtsushi Nemoto  * Author: MontaVista Software, Inc.
522b1d707SAtsushi Nemoto  *	   source@mvista.com
622b1d707SAtsushi Nemoto  *
722b1d707SAtsushi Nemoto  *  under the terms of the GNU General Public License as published by the
822b1d707SAtsushi Nemoto  *  Free Software Foundation; either version 2 of the License, or (at your
922b1d707SAtsushi Nemoto  *  option) any later version.
1022b1d707SAtsushi Nemoto  *
1122b1d707SAtsushi Nemoto  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
1222b1d707SAtsushi Nemoto  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
1322b1d707SAtsushi Nemoto  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1422b1d707SAtsushi Nemoto  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1522b1d707SAtsushi Nemoto  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
1622b1d707SAtsushi Nemoto  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
1722b1d707SAtsushi Nemoto  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1822b1d707SAtsushi Nemoto  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
1922b1d707SAtsushi Nemoto  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
2022b1d707SAtsushi Nemoto  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2122b1d707SAtsushi Nemoto  *
2222b1d707SAtsushi Nemoto  *  You should have received a copy of the GNU General Public License along
2322b1d707SAtsushi Nemoto  *  with this program; if not, write to the Free Software Foundation, Inc.,
2422b1d707SAtsushi Nemoto  *  675 Mass Ave, Cambridge, MA 02139, USA.
2522b1d707SAtsushi Nemoto  */
2622b1d707SAtsushi Nemoto #include <linux/init.h>
2722b1d707SAtsushi Nemoto #include <linux/interrupt.h>
28ca4d3e67SDavid Howells #include <linux/irq.h>
2922b1d707SAtsushi Nemoto #include <asm/irq_cpu.h>
30edcaf1a6SAtsushi Nemoto #include <asm/txx9/tx4927.h>
3122b1d707SAtsushi Nemoto 
tx4927_irq_init(void)3222b1d707SAtsushi Nemoto void __init tx4927_irq_init(void)
3322b1d707SAtsushi Nemoto {
3474894363SAtsushi Nemoto 	int i;
3574894363SAtsushi Nemoto 
3622b1d707SAtsushi Nemoto 	mips_cpu_irq_init();
3794a4c329SAtsushi Nemoto 	txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
38*e4ec7989SThomas Gleixner 	irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
39edcaf1a6SAtsushi Nemoto 				handle_simple_irq);
4074894363SAtsushi Nemoto 	/* raise priority for errors, timers, SIO */
4174894363SAtsushi Nemoto 	txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
4274894363SAtsushi Nemoto 	txx9_irq_set_pri(TX4927_IR_WTOERR, 7);
4374894363SAtsushi Nemoto 	txx9_irq_set_pri(TX4927_IR_PCIERR, 7);
4474894363SAtsushi Nemoto 	txx9_irq_set_pri(TX4927_IR_PCIPME, 7);
4574894363SAtsushi Nemoto 	for (i = 0; i < TX4927_NUM_IR_TMR; i++)
4674894363SAtsushi Nemoto 		txx9_irq_set_pri(TX4927_IR_TMR(i), 6);
4774894363SAtsushi Nemoto 	for (i = 0; i < TX4927_NUM_IR_SIO; i++)
4874894363SAtsushi Nemoto 		txx9_irq_set_pri(TX4927_IR_SIO(i), 5);
4922b1d707SAtsushi Nemoto }
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