1*df9f5408SRalf Baechle #include <linux/init.h> 2*df9f5408SRalf Baechle #include <linux/if_ether.h> 3*df9f5408SRalf Baechle #include <linux/kernel.h> 4*df9f5408SRalf Baechle #include <linux/platform_device.h> 5*df9f5408SRalf Baechle 6*df9f5408SRalf Baechle #include <asm/paccess.h> 7*df9f5408SRalf Baechle #include <asm/sgi/ip22.h> 8*df9f5408SRalf Baechle #include <asm/sgi/hpc3.h> 9*df9f5408SRalf Baechle #include <asm/sgi/mc.h> 10*df9f5408SRalf Baechle #include <asm/sgi/seeq.h> 11*df9f5408SRalf Baechle #include <asm/sgi/wd.h> 12*df9f5408SRalf Baechle 13*df9f5408SRalf Baechle static struct resource sgiwd93_0_resources[] = { 14*df9f5408SRalf Baechle { 15*df9f5408SRalf Baechle .name = "eth0 irq", 16*df9f5408SRalf Baechle .start = SGI_WD93_0_IRQ, 17*df9f5408SRalf Baechle .end = SGI_WD93_0_IRQ, 18*df9f5408SRalf Baechle .flags = IORESOURCE_IRQ 19*df9f5408SRalf Baechle } 20*df9f5408SRalf Baechle }; 21*df9f5408SRalf Baechle 22*df9f5408SRalf Baechle static struct sgiwd93_platform_data sgiwd93_0_pd = { 23*df9f5408SRalf Baechle .unit = 0, 24*df9f5408SRalf Baechle .irq = SGI_WD93_0_IRQ, 25*df9f5408SRalf Baechle }; 26*df9f5408SRalf Baechle 27*df9f5408SRalf Baechle static struct platform_device sgiwd93_0_device = { 28*df9f5408SRalf Baechle .name = "sgiwd93", 29*df9f5408SRalf Baechle .id = 0, 30*df9f5408SRalf Baechle .num_resources = ARRAY_SIZE(sgiwd93_0_resources), 31*df9f5408SRalf Baechle .resource = sgiwd93_0_resources, 32*df9f5408SRalf Baechle .dev = { 33*df9f5408SRalf Baechle .platform_data = &sgiwd93_0_pd, 34*df9f5408SRalf Baechle }, 35*df9f5408SRalf Baechle }; 36*df9f5408SRalf Baechle 37*df9f5408SRalf Baechle static struct resource sgiwd93_1_resources[] = { 38*df9f5408SRalf Baechle { 39*df9f5408SRalf Baechle .name = "eth0 irq", 40*df9f5408SRalf Baechle .start = SGI_WD93_1_IRQ, 41*df9f5408SRalf Baechle .end = SGI_WD93_1_IRQ, 42*df9f5408SRalf Baechle .flags = IORESOURCE_IRQ 43*df9f5408SRalf Baechle } 44*df9f5408SRalf Baechle }; 45*df9f5408SRalf Baechle 46*df9f5408SRalf Baechle static struct sgiwd93_platform_data sgiwd93_1_pd = { 47*df9f5408SRalf Baechle .unit = 1, 48*df9f5408SRalf Baechle .irq = SGI_WD93_1_IRQ, 49*df9f5408SRalf Baechle }; 50*df9f5408SRalf Baechle 51*df9f5408SRalf Baechle static struct platform_device sgiwd93_1_device = { 52*df9f5408SRalf Baechle .name = "sgiwd93", 53*df9f5408SRalf Baechle .id = 1, 54*df9f5408SRalf Baechle .num_resources = ARRAY_SIZE(sgiwd93_1_resources), 55*df9f5408SRalf Baechle .resource = sgiwd93_1_resources, 56*df9f5408SRalf Baechle .dev = { 57*df9f5408SRalf Baechle .platform_data = &sgiwd93_1_pd, 58*df9f5408SRalf Baechle }, 59*df9f5408SRalf Baechle }; 60*df9f5408SRalf Baechle 61*df9f5408SRalf Baechle /* 62*df9f5408SRalf Baechle * Create a platform device for the GPI port that receives the 63*df9f5408SRalf Baechle * image data from the embedded camera. 64*df9f5408SRalf Baechle */ 65*df9f5408SRalf Baechle static int __init sgiwd93_devinit(void) 66*df9f5408SRalf Baechle { 67*df9f5408SRalf Baechle int res; 68*df9f5408SRalf Baechle 69*df9f5408SRalf Baechle sgiwd93_0_pd.hregs = &hpc3c0->scsi_chan0; 70*df9f5408SRalf Baechle sgiwd93_0_pd.wdregs = (unsigned char *) hpc3c0->scsi0_ext; 71*df9f5408SRalf Baechle 72*df9f5408SRalf Baechle res = platform_device_register(&sgiwd93_0_device); 73*df9f5408SRalf Baechle if (res) 74*df9f5408SRalf Baechle return res; 75*df9f5408SRalf Baechle 76*df9f5408SRalf Baechle if (!ip22_is_fullhouse()) 77*df9f5408SRalf Baechle return 0; 78*df9f5408SRalf Baechle 79*df9f5408SRalf Baechle sgiwd93_1_pd.hregs = &hpc3c0->scsi_chan1; 80*df9f5408SRalf Baechle sgiwd93_1_pd.wdregs = (unsigned char *) hpc3c0->scsi1_ext; 81*df9f5408SRalf Baechle 82*df9f5408SRalf Baechle return platform_device_register(&sgiwd93_1_device); 83*df9f5408SRalf Baechle } 84*df9f5408SRalf Baechle 85*df9f5408SRalf Baechle device_initcall(sgiwd93_devinit); 86*df9f5408SRalf Baechle 87*df9f5408SRalf Baechle static struct resource sgiseeq_0_resources[] = { 88*df9f5408SRalf Baechle { 89*df9f5408SRalf Baechle .name = "eth0 irq", 90*df9f5408SRalf Baechle .start = SGI_ENET_IRQ, 91*df9f5408SRalf Baechle .end = SGI_ENET_IRQ, 92*df9f5408SRalf Baechle .flags = IORESOURCE_IRQ 93*df9f5408SRalf Baechle } 94*df9f5408SRalf Baechle }; 95*df9f5408SRalf Baechle 96*df9f5408SRalf Baechle static struct sgiseeq_platform_data eth0_pd; 97*df9f5408SRalf Baechle 98*df9f5408SRalf Baechle static struct platform_device eth0_device = { 99*df9f5408SRalf Baechle .name = "sgiseeq", 100*df9f5408SRalf Baechle .id = 0, 101*df9f5408SRalf Baechle .num_resources = ARRAY_SIZE(sgiseeq_0_resources), 102*df9f5408SRalf Baechle .resource = sgiseeq_0_resources, 103*df9f5408SRalf Baechle .dev = { 104*df9f5408SRalf Baechle .platform_data = ð0_pd, 105*df9f5408SRalf Baechle }, 106*df9f5408SRalf Baechle }; 107*df9f5408SRalf Baechle 108*df9f5408SRalf Baechle static struct resource sgiseeq_1_resources[] = { 109*df9f5408SRalf Baechle { 110*df9f5408SRalf Baechle .name = "eth1 irq", 111*df9f5408SRalf Baechle .start = SGI_GIO_0_IRQ, 112*df9f5408SRalf Baechle .end = SGI_GIO_0_IRQ, 113*df9f5408SRalf Baechle .flags = IORESOURCE_IRQ 114*df9f5408SRalf Baechle } 115*df9f5408SRalf Baechle }; 116*df9f5408SRalf Baechle 117*df9f5408SRalf Baechle static struct sgiseeq_platform_data eth1_pd; 118*df9f5408SRalf Baechle 119*df9f5408SRalf Baechle static struct platform_device eth1_device = { 120*df9f5408SRalf Baechle .name = "sgiseeq", 121*df9f5408SRalf Baechle .id = 1, 122*df9f5408SRalf Baechle .num_resources = ARRAY_SIZE(sgiseeq_1_resources), 123*df9f5408SRalf Baechle .resource = sgiseeq_1_resources, 124*df9f5408SRalf Baechle .dev = { 125*df9f5408SRalf Baechle .platform_data = ð1_pd, 126*df9f5408SRalf Baechle }, 127*df9f5408SRalf Baechle }; 128*df9f5408SRalf Baechle 129*df9f5408SRalf Baechle /* 130*df9f5408SRalf Baechle * Create a platform device for the GPI port that receives the 131*df9f5408SRalf Baechle * image data from the embedded camera. 132*df9f5408SRalf Baechle */ 133*df9f5408SRalf Baechle static int __init sgiseeq_devinit(void) 134*df9f5408SRalf Baechle { 135*df9f5408SRalf Baechle unsigned int tmp; 136*df9f5408SRalf Baechle int res, i; 137*df9f5408SRalf Baechle 138*df9f5408SRalf Baechle eth0_pd.hpc = hpc3c0; 139*df9f5408SRalf Baechle eth0_pd.irq = SGI_ENET_IRQ; 140*df9f5408SRalf Baechle #define EADDR_NVOFS 250 141*df9f5408SRalf Baechle for (i = 0; i < 3; i++) { 142*df9f5408SRalf Baechle unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i); 143*df9f5408SRalf Baechle 144*df9f5408SRalf Baechle eth0_pd.mac[2 * i] = tmp >> 8; 145*df9f5408SRalf Baechle eth0_pd.mac[2 * i + 1] = tmp & 0xff; 146*df9f5408SRalf Baechle } 147*df9f5408SRalf Baechle 148*df9f5408SRalf Baechle res = platform_device_register(ð0_device); 149*df9f5408SRalf Baechle if (res) 150*df9f5408SRalf Baechle return res; 151*df9f5408SRalf Baechle 152*df9f5408SRalf Baechle /* Second HPC is missing? */ 153*df9f5408SRalf Baechle if (ip22_is_fullhouse() || 154*df9f5408SRalf Baechle !get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1])) 155*df9f5408SRalf Baechle return 0; 156*df9f5408SRalf Baechle 157*df9f5408SRalf Baechle sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 | 158*df9f5408SRalf Baechle SGIMC_GIOPAR_HPC264; 159*df9f5408SRalf Baechle hpc3c1->pbus_piocfg[0][0] = 0x3ffff; 160*df9f5408SRalf Baechle /* interrupt/config register on Challenge S Mezz board */ 161*df9f5408SRalf Baechle hpc3c1->pbus_extregs[0][0] = 0x30; 162*df9f5408SRalf Baechle 163*df9f5408SRalf Baechle eth1_pd.hpc = hpc3c1; 164*df9f5408SRalf Baechle eth1_pd.irq = SGI_GIO_0_IRQ; 165*df9f5408SRalf Baechle #define EADDR_NVOFS 250 166*df9f5408SRalf Baechle for (i = 0; i < 3; i++) { 167*df9f5408SRalf Baechle unsigned short tmp = ip22_eeprom_read(&hpc3c1->eeprom, 168*df9f5408SRalf Baechle EADDR_NVOFS / 2 + i); 169*df9f5408SRalf Baechle 170*df9f5408SRalf Baechle eth1_pd.mac[2 * i] = tmp >> 8; 171*df9f5408SRalf Baechle eth1_pd.mac[2 * i + 1] = tmp & 0xff; 172*df9f5408SRalf Baechle } 173*df9f5408SRalf Baechle 174*df9f5408SRalf Baechle return platform_device_register(ð1_device); 175*df9f5408SRalf Baechle } 176*df9f5408SRalf Baechle 177*df9f5408SRalf Baechle device_initcall(sgiseeq_devinit); 178