173b4390fSRalf Baechle /* 273b4390fSRalf Baechle * RouterBoard 500 specific prom routines 373b4390fSRalf Baechle * 473b4390fSRalf Baechle * Copyright (C) 2003, Peter Sadik <peter.sadik@idt.com> 573b4390fSRalf Baechle * Copyright (C) 2005-2006, P.Christeas <p_christ@hol.gr> 673b4390fSRalf Baechle * Copyright (C) 2007, Gabor Juhos <juhosg@openwrt.org> 773b4390fSRalf Baechle * Felix Fietkau <nbd@openwrt.org> 873b4390fSRalf Baechle * Florian Fainelli <florian@openwrt.org> 973b4390fSRalf Baechle * 1073b4390fSRalf Baechle * This program is free software; you can redistribute it and/or 1173b4390fSRalf Baechle * modify it under the terms of the GNU General Public License 1273b4390fSRalf Baechle * as published by the Free Software Foundation; either version 2 1373b4390fSRalf Baechle * of the License, or (at your option) any later version. 1473b4390fSRalf Baechle * 1573b4390fSRalf Baechle * This program is distributed in the hope that it will be useful, 1673b4390fSRalf Baechle * but WITHOUT ANY WARRANTY; without even the implied warranty of 1773b4390fSRalf Baechle * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1873b4390fSRalf Baechle * GNU General Public License for more details. 1973b4390fSRalf Baechle * 2073b4390fSRalf Baechle * You should have received a copy of the GNU General Public License 2173b4390fSRalf Baechle * along with this program; if not, write to the 2273b4390fSRalf Baechle * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, 2373b4390fSRalf Baechle * Boston, MA 02110-1301, USA. 2473b4390fSRalf Baechle * 2573b4390fSRalf Baechle */ 2673b4390fSRalf Baechle 2773b4390fSRalf Baechle #include <linux/init.h> 2873b4390fSRalf Baechle #include <linux/mm.h> 29*26dd3e4fSPaul Gortmaker #include <linux/export.h> 3073b4390fSRalf Baechle #include <linux/string.h> 3173b4390fSRalf Baechle #include <linux/console.h> 3273b4390fSRalf Baechle #include <linux/bootmem.h> 3373b4390fSRalf Baechle #include <linux/ioport.h> 3473b4390fSRalf Baechle #include <linux/blkdev.h> 3573b4390fSRalf Baechle 3673b4390fSRalf Baechle #include <asm/bootinfo.h> 3773b4390fSRalf Baechle #include <asm/mach-rc32434/ddr.h> 3873b4390fSRalf Baechle #include <asm/mach-rc32434/prom.h> 3973b4390fSRalf Baechle 4073b4390fSRalf Baechle unsigned int idt_cpu_freq = 132000000; 4173b4390fSRalf Baechle EXPORT_SYMBOL(idt_cpu_freq); 4273b4390fSRalf Baechle 4373b4390fSRalf Baechle static struct resource ddr_reg[] = { 4473b4390fSRalf Baechle { 4573b4390fSRalf Baechle .name = "ddr-reg", 4673b4390fSRalf Baechle .start = DDR0_PHYS_ADDR, 4773b4390fSRalf Baechle .end = DDR0_PHYS_ADDR + sizeof(struct ddr_ram), 4873b4390fSRalf Baechle .flags = IORESOURCE_MEM, 4973b4390fSRalf Baechle } 5073b4390fSRalf Baechle }; 5173b4390fSRalf Baechle 5273b4390fSRalf Baechle void __init prom_free_prom_memory(void) 5373b4390fSRalf Baechle { 5473b4390fSRalf Baechle /* No prom memory to free */ 5573b4390fSRalf Baechle } 5673b4390fSRalf Baechle 5773b4390fSRalf Baechle static inline int match_tag(char *arg, const char *tag) 5873b4390fSRalf Baechle { 5973b4390fSRalf Baechle return strncmp(arg, tag, strlen(tag)) == 0; 6073b4390fSRalf Baechle } 6173b4390fSRalf Baechle 6273b4390fSRalf Baechle static inline unsigned long tag2ul(char *arg, const char *tag) 6373b4390fSRalf Baechle { 6473b4390fSRalf Baechle char *num; 6573b4390fSRalf Baechle 6673b4390fSRalf Baechle num = arg + strlen(tag); 6773b4390fSRalf Baechle return simple_strtoul(num, 0, 10); 6873b4390fSRalf Baechle } 6973b4390fSRalf Baechle 7073b4390fSRalf Baechle void __init prom_setup_cmdline(void) 7173b4390fSRalf Baechle { 727580c9c3SDmitri Vorobiev static char cmd_line[COMMAND_LINE_SIZE] __initdata; 7373b4390fSRalf Baechle char *cp, *board; 7473b4390fSRalf Baechle int prom_argc; 7566315e15SRalf Baechle char **prom_argv; 7673b4390fSRalf Baechle int i; 7773b4390fSRalf Baechle 7873b4390fSRalf Baechle prom_argc = fw_arg0; 7973b4390fSRalf Baechle prom_argv = (char **) fw_arg1; 8073b4390fSRalf Baechle 8173b4390fSRalf Baechle cp = cmd_line; 8273b4390fSRalf Baechle /* Note: it is common that parameters start 8373b4390fSRalf Baechle * at argv[1] and not argv[0], 8473b4390fSRalf Baechle * however, our elf loader starts at [0] */ 8573b4390fSRalf Baechle for (i = 0; i < prom_argc; i++) { 8673b4390fSRalf Baechle if (match_tag(prom_argv[i], FREQ_TAG)) { 8773b4390fSRalf Baechle idt_cpu_freq = tag2ul(prom_argv[i], FREQ_TAG); 8873b4390fSRalf Baechle continue; 8973b4390fSRalf Baechle } 9073b4390fSRalf Baechle #ifdef IGNORE_CMDLINE_MEM 9173b4390fSRalf Baechle /* parses out the "mem=xx" arg */ 9273b4390fSRalf Baechle if (match_tag(prom_argv[i], MEM_TAG)) 9373b4390fSRalf Baechle continue; 9473b4390fSRalf Baechle #endif 9573b4390fSRalf Baechle if (i > 0) 9673b4390fSRalf Baechle *(cp++) = ' '; 9773b4390fSRalf Baechle if (match_tag(prom_argv[i], BOARD_TAG)) { 9873b4390fSRalf Baechle board = prom_argv[i] + strlen(BOARD_TAG); 9973b4390fSRalf Baechle 10073b4390fSRalf Baechle if (match_tag(board, BOARD_RB532A)) 10173b4390fSRalf Baechle mips_machtype = MACH_MIKROTIK_RB532A; 10273b4390fSRalf Baechle else 10373b4390fSRalf Baechle mips_machtype = MACH_MIKROTIK_RB532; 10473b4390fSRalf Baechle } 10573b4390fSRalf Baechle 10673b4390fSRalf Baechle strcpy(cp, prom_argv[i]); 10773b4390fSRalf Baechle cp += strlen(prom_argv[i]); 10873b4390fSRalf Baechle } 10973b4390fSRalf Baechle *(cp++) = ' '; 11073b4390fSRalf Baechle 11173b4390fSRalf Baechle i = strlen(arcs_cmdline); 11273b4390fSRalf Baechle if (i > 0) { 11373b4390fSRalf Baechle *(cp++) = ' '; 11473b4390fSRalf Baechle strcpy(cp, arcs_cmdline); 11573b4390fSRalf Baechle cp += strlen(arcs_cmdline); 11673b4390fSRalf Baechle } 1177580c9c3SDmitri Vorobiev cmd_line[COMMAND_LINE_SIZE - 1] = '\0'; 11873b4390fSRalf Baechle 11973b4390fSRalf Baechle strcpy(arcs_cmdline, cmd_line); 12073b4390fSRalf Baechle } 12173b4390fSRalf Baechle 12273b4390fSRalf Baechle void __init prom_init(void) 12373b4390fSRalf Baechle { 12473b4390fSRalf Baechle struct ddr_ram __iomem *ddr; 12515d45cceSRalf Baechle phys_addr_t memsize; 12615d45cceSRalf Baechle phys_addr_t ddrbase; 12773b4390fSRalf Baechle 12873b4390fSRalf Baechle ddr = ioremap_nocache(ddr_reg[0].start, 12973b4390fSRalf Baechle ddr_reg[0].end - ddr_reg[0].start); 13073b4390fSRalf Baechle 13173b4390fSRalf Baechle if (!ddr) { 13273b4390fSRalf Baechle printk(KERN_ERR "Unable to remap DDR register\n"); 13373b4390fSRalf Baechle return; 13473b4390fSRalf Baechle } 13573b4390fSRalf Baechle 13615d45cceSRalf Baechle ddrbase = (phys_addr_t)&ddr->ddrbase; 13715d45cceSRalf Baechle memsize = (phys_addr_t)&ddr->ddrmask; 13873b4390fSRalf Baechle memsize = 0 - memsize; 13973b4390fSRalf Baechle 14073b4390fSRalf Baechle prom_setup_cmdline(); 14173b4390fSRalf Baechle 14273b4390fSRalf Baechle /* give all RAM to boot allocator, 14373b4390fSRalf Baechle * except for the first 0x400 and the last 0x200 bytes */ 14473b4390fSRalf Baechle add_memory_region(ddrbase + 0x400, memsize - 0x600, BOOT_MEM_RAM); 14573b4390fSRalf Baechle } 146