xref: /openbmc/linux/arch/mips/ralink/timer.c (revision 31d6f57d3c65fd75c18ea9a3acebedc6cd60d656)
180ecbd24SJohn Crispin /*
280ecbd24SJohn Crispin  * This program is free software; you can redistribute it and/or modify it
380ecbd24SJohn Crispin  * under the terms of the GNU General Public License version 2 as published
480ecbd24SJohn Crispin  * by the Free Software Foundation.
580ecbd24SJohn Crispin  *
680ecbd24SJohn Crispin  * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
780ecbd24SJohn Crispin */
880ecbd24SJohn Crispin 
980ecbd24SJohn Crispin #include <linux/module.h>
1080ecbd24SJohn Crispin #include <linux/platform_device.h>
1180ecbd24SJohn Crispin #include <linux/interrupt.h>
1280ecbd24SJohn Crispin #include <linux/timer.h>
1380ecbd24SJohn Crispin #include <linux/of_gpio.h>
1480ecbd24SJohn Crispin #include <linux/clk.h>
1580ecbd24SJohn Crispin 
1680ecbd24SJohn Crispin #include <asm/mach-ralink/ralink_regs.h>
1780ecbd24SJohn Crispin 
1880ecbd24SJohn Crispin #define TIMER_REG_TMRSTAT		0x00
1980ecbd24SJohn Crispin #define TIMER_REG_TMR0LOAD		0x10
2080ecbd24SJohn Crispin #define TIMER_REG_TMR0CTL		0x18
2180ecbd24SJohn Crispin 
2280ecbd24SJohn Crispin #define TMRSTAT_TMR0INT			BIT(0)
2380ecbd24SJohn Crispin 
2480ecbd24SJohn Crispin #define TMR0CTL_ENABLE			BIT(7)
2580ecbd24SJohn Crispin #define TMR0CTL_MODE_PERIODIC		BIT(4)
2680ecbd24SJohn Crispin #define TMR0CTL_PRESCALER		1
2780ecbd24SJohn Crispin #define TMR0CTL_PRESCALE_VAL		(0xf - TMR0CTL_PRESCALER)
2880ecbd24SJohn Crispin #define TMR0CTL_PRESCALE_DIV		(65536 / BIT(TMR0CTL_PRESCALER))
2980ecbd24SJohn Crispin 
3080ecbd24SJohn Crispin struct rt_timer {
3180ecbd24SJohn Crispin 	struct device	*dev;
3280ecbd24SJohn Crispin 	void __iomem	*membase;
3380ecbd24SJohn Crispin 	int		irq;
3480ecbd24SJohn Crispin 	unsigned long	timer_freq;
3580ecbd24SJohn Crispin 	unsigned long	timer_div;
3680ecbd24SJohn Crispin };
3780ecbd24SJohn Crispin 
3880ecbd24SJohn Crispin static inline void rt_timer_w32(struct rt_timer *rt, u8 reg, u32 val)
3980ecbd24SJohn Crispin {
4080ecbd24SJohn Crispin 	__raw_writel(val, rt->membase + reg);
4180ecbd24SJohn Crispin }
4280ecbd24SJohn Crispin 
4380ecbd24SJohn Crispin static inline u32 rt_timer_r32(struct rt_timer *rt, u8 reg)
4480ecbd24SJohn Crispin {
4580ecbd24SJohn Crispin 	return __raw_readl(rt->membase + reg);
4680ecbd24SJohn Crispin }
4780ecbd24SJohn Crispin 
4880ecbd24SJohn Crispin static irqreturn_t rt_timer_irq(int irq, void *_rt)
4980ecbd24SJohn Crispin {
5080ecbd24SJohn Crispin 	struct rt_timer *rt =  (struct rt_timer *) _rt;
5180ecbd24SJohn Crispin 
5280ecbd24SJohn Crispin 	rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
5380ecbd24SJohn Crispin 	rt_timer_w32(rt, TIMER_REG_TMRSTAT, TMRSTAT_TMR0INT);
5480ecbd24SJohn Crispin 
5580ecbd24SJohn Crispin 	return IRQ_HANDLED;
5680ecbd24SJohn Crispin }
5780ecbd24SJohn Crispin 
5880ecbd24SJohn Crispin 
5980ecbd24SJohn Crispin static int rt_timer_request(struct rt_timer *rt)
6080ecbd24SJohn Crispin {
61*31d6f57dSMichael Opdenacker 	int err = request_irq(rt->irq, rt_timer_irq, 0,
6280ecbd24SJohn Crispin 						dev_name(rt->dev), rt);
6380ecbd24SJohn Crispin 	if (err) {
6480ecbd24SJohn Crispin 		dev_err(rt->dev, "failed to request irq\n");
6580ecbd24SJohn Crispin 	} else {
6680ecbd24SJohn Crispin 		u32 t = TMR0CTL_MODE_PERIODIC | TMR0CTL_PRESCALE_VAL;
6780ecbd24SJohn Crispin 		rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
6880ecbd24SJohn Crispin 	}
6980ecbd24SJohn Crispin 	return err;
7080ecbd24SJohn Crispin }
7180ecbd24SJohn Crispin 
7280ecbd24SJohn Crispin static void rt_timer_free(struct rt_timer *rt)
7380ecbd24SJohn Crispin {
7480ecbd24SJohn Crispin 	free_irq(rt->irq, rt);
7580ecbd24SJohn Crispin }
7680ecbd24SJohn Crispin 
7780ecbd24SJohn Crispin static int rt_timer_config(struct rt_timer *rt, unsigned long divisor)
7880ecbd24SJohn Crispin {
7980ecbd24SJohn Crispin 	if (rt->timer_freq < divisor)
8080ecbd24SJohn Crispin 		rt->timer_div = rt->timer_freq;
8180ecbd24SJohn Crispin 	else
8280ecbd24SJohn Crispin 		rt->timer_div = divisor;
8380ecbd24SJohn Crispin 
8480ecbd24SJohn Crispin 	rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
8580ecbd24SJohn Crispin 
8680ecbd24SJohn Crispin 	return 0;
8780ecbd24SJohn Crispin }
8880ecbd24SJohn Crispin 
8980ecbd24SJohn Crispin static int rt_timer_enable(struct rt_timer *rt)
9080ecbd24SJohn Crispin {
9180ecbd24SJohn Crispin 	u32 t;
9280ecbd24SJohn Crispin 
9380ecbd24SJohn Crispin 	rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
9480ecbd24SJohn Crispin 
9580ecbd24SJohn Crispin 	t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
9680ecbd24SJohn Crispin 	t |= TMR0CTL_ENABLE;
9780ecbd24SJohn Crispin 	rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
9880ecbd24SJohn Crispin 
9980ecbd24SJohn Crispin 	return 0;
10080ecbd24SJohn Crispin }
10180ecbd24SJohn Crispin 
10280ecbd24SJohn Crispin static void rt_timer_disable(struct rt_timer *rt)
10380ecbd24SJohn Crispin {
10480ecbd24SJohn Crispin 	u32 t;
10580ecbd24SJohn Crispin 
10680ecbd24SJohn Crispin 	t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
10780ecbd24SJohn Crispin 	t &= ~TMR0CTL_ENABLE;
10880ecbd24SJohn Crispin 	rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
10980ecbd24SJohn Crispin }
11080ecbd24SJohn Crispin 
11180ecbd24SJohn Crispin static int rt_timer_probe(struct platform_device *pdev)
11280ecbd24SJohn Crispin {
11380ecbd24SJohn Crispin 	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
11480ecbd24SJohn Crispin 	struct rt_timer *rt;
11580ecbd24SJohn Crispin 	struct clk *clk;
11680ecbd24SJohn Crispin 
11780ecbd24SJohn Crispin 	rt = devm_kzalloc(&pdev->dev, sizeof(*rt), GFP_KERNEL);
11880ecbd24SJohn Crispin 	if (!rt) {
11980ecbd24SJohn Crispin 		dev_err(&pdev->dev, "failed to allocate memory\n");
12080ecbd24SJohn Crispin 		return -ENOMEM;
12180ecbd24SJohn Crispin 	}
12280ecbd24SJohn Crispin 
12380ecbd24SJohn Crispin 	rt->irq = platform_get_irq(pdev, 0);
12480ecbd24SJohn Crispin 	if (!rt->irq) {
12580ecbd24SJohn Crispin 		dev_err(&pdev->dev, "failed to load irq\n");
12680ecbd24SJohn Crispin 		return -ENOENT;
12780ecbd24SJohn Crispin 	}
12880ecbd24SJohn Crispin 
129cd5d5810SWei Yongjun 	rt->membase = devm_ioremap_resource(&pdev->dev, res);
13080ecbd24SJohn Crispin 	if (IS_ERR(rt->membase))
13180ecbd24SJohn Crispin 		return PTR_ERR(rt->membase);
13280ecbd24SJohn Crispin 
13380ecbd24SJohn Crispin 	clk = devm_clk_get(&pdev->dev, NULL);
13480ecbd24SJohn Crispin 	if (IS_ERR(clk)) {
13580ecbd24SJohn Crispin 		dev_err(&pdev->dev, "failed get clock rate\n");
13680ecbd24SJohn Crispin 		return PTR_ERR(clk);
13780ecbd24SJohn Crispin 	}
13880ecbd24SJohn Crispin 
13980ecbd24SJohn Crispin 	rt->timer_freq = clk_get_rate(clk) / TMR0CTL_PRESCALE_DIV;
14080ecbd24SJohn Crispin 	if (!rt->timer_freq)
14180ecbd24SJohn Crispin 		return -EINVAL;
14280ecbd24SJohn Crispin 
14380ecbd24SJohn Crispin 	rt->dev = &pdev->dev;
14480ecbd24SJohn Crispin 	platform_set_drvdata(pdev, rt);
14580ecbd24SJohn Crispin 
14680ecbd24SJohn Crispin 	rt_timer_request(rt);
14780ecbd24SJohn Crispin 	rt_timer_config(rt, 2);
14880ecbd24SJohn Crispin 	rt_timer_enable(rt);
14980ecbd24SJohn Crispin 
15077d84ff8SMasanari Iida 	dev_info(&pdev->dev, "maximum frequency is %luHz\n", rt->timer_freq);
15180ecbd24SJohn Crispin 
15280ecbd24SJohn Crispin 	return 0;
15380ecbd24SJohn Crispin }
15480ecbd24SJohn Crispin 
15580ecbd24SJohn Crispin static int rt_timer_remove(struct platform_device *pdev)
15680ecbd24SJohn Crispin {
15780ecbd24SJohn Crispin 	struct rt_timer *rt = platform_get_drvdata(pdev);
15880ecbd24SJohn Crispin 
15980ecbd24SJohn Crispin 	rt_timer_disable(rt);
16080ecbd24SJohn Crispin 	rt_timer_free(rt);
16180ecbd24SJohn Crispin 
16280ecbd24SJohn Crispin 	return 0;
16380ecbd24SJohn Crispin }
16480ecbd24SJohn Crispin 
16580ecbd24SJohn Crispin static const struct of_device_id rt_timer_match[] = {
16680ecbd24SJohn Crispin 	{ .compatible = "ralink,rt2880-timer" },
16780ecbd24SJohn Crispin 	{},
16880ecbd24SJohn Crispin };
16980ecbd24SJohn Crispin MODULE_DEVICE_TABLE(of, rt_timer_match);
17080ecbd24SJohn Crispin 
17180ecbd24SJohn Crispin static struct platform_driver rt_timer_driver = {
17280ecbd24SJohn Crispin 	.probe = rt_timer_probe,
17380ecbd24SJohn Crispin 	.remove = rt_timer_remove,
17480ecbd24SJohn Crispin 	.driver = {
17580ecbd24SJohn Crispin 		.name		= "rt-timer",
17680ecbd24SJohn Crispin 		.owner          = THIS_MODULE,
17780ecbd24SJohn Crispin 		.of_match_table	= rt_timer_match
17880ecbd24SJohn Crispin 	},
17980ecbd24SJohn Crispin };
18080ecbd24SJohn Crispin 
18180ecbd24SJohn Crispin module_platform_driver(rt_timer_driver);
18280ecbd24SJohn Crispin 
18380ecbd24SJohn Crispin MODULE_DESCRIPTION("Ralink RT2880 timer");
18480ecbd24SJohn Crispin MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
18580ecbd24SJohn Crispin MODULE_LICENSE("GPL");
186