1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2000, 2001 Keith M Wesolowski 7 */ 8 #include <linux/kernel.h> 9 #include <linux/init.h> 10 #include <linux/pci.h> 11 #include <linux/types.h> 12 #include <asm/pci.h> 13 #include <asm/ip32/mace.h> 14 15 #if 0 16 # define DPRINTK(args...) printk(args); 17 #else 18 # define DPRINTK(args...) 19 #endif 20 21 /* 22 * O2 has up to 5 PCI devices connected into the MACE bridge. The device 23 * map looks like this: 24 * 25 * 0 aic7xxx 0 26 * 1 aic7xxx 1 27 * 2 expansion slot 28 * 3 N/C 29 * 4 N/C 30 */ 31 32 static inline int mkaddr(struct pci_bus *bus, unsigned int devfn, 33 unsigned int reg) 34 { 35 return ((bus->number & 0xff) << 16) | 36 ((devfn & 0xff) << 8) | 37 (reg & 0xfc); 38 } 39 40 41 static int 42 mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, 43 int reg, int size, u32 *val) 44 { 45 mace->pci.config_addr = mkaddr(bus, devfn, reg); 46 switch (size) { 47 case 1: 48 *val = mace->pci.config_data.b[(reg & 3) ^ 3]; 49 break; 50 case 2: 51 *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1]; 52 break; 53 case 4: 54 *val = mace->pci.config_data.l; 55 break; 56 } 57 58 DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val); 59 60 return PCIBIOS_SUCCESSFUL; 61 } 62 63 static int 64 mace_pci_write_config(struct pci_bus *bus, unsigned int devfn, 65 int reg, int size, u32 val) 66 { 67 mace->pci.config_addr = mkaddr(bus, devfn, reg); 68 switch (size) { 69 case 1: 70 mace->pci.config_data.b[(reg & 3) ^ 3] = val; 71 break; 72 case 2: 73 mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val; 74 break; 75 case 4: 76 mace->pci.config_data.l = val; 77 break; 78 } 79 80 DPRINTK("write%d: reg=%08x,val=%02x\n", size * 8, reg, val); 81 82 return PCIBIOS_SUCCESSFUL; 83 } 84 85 struct pci_ops mace_pci_ops = { 86 .read = mace_pci_read_config, 87 .write = mace_pci_write_config, 88 }; 89