1*1da177e4SLinus Torvalds /* 2*1da177e4SLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 3*1da177e4SLinus Torvalds * License. See the file "COPYING" in the main directory of this archive 4*1da177e4SLinus Torvalds * for more details. 5*1da177e4SLinus Torvalds * 6*1da177e4SLinus Torvalds * Copyright (C) 2000, 2001 Keith M Wesolowski 7*1da177e4SLinus Torvalds */ 8*1da177e4SLinus Torvalds #include <linux/kernel.h> 9*1da177e4SLinus Torvalds #include <linux/init.h> 10*1da177e4SLinus Torvalds #include <linux/pci.h> 11*1da177e4SLinus Torvalds #include <linux/types.h> 12*1da177e4SLinus Torvalds #include <asm/pci.h> 13*1da177e4SLinus Torvalds #include <asm/ip32/mace.h> 14*1da177e4SLinus Torvalds 15*1da177e4SLinus Torvalds #if 0 16*1da177e4SLinus Torvalds # define DPRINTK(args...) printk(args); 17*1da177e4SLinus Torvalds #else 18*1da177e4SLinus Torvalds # define DPRINTK(args...) 19*1da177e4SLinus Torvalds #endif 20*1da177e4SLinus Torvalds 21*1da177e4SLinus Torvalds /* 22*1da177e4SLinus Torvalds * O2 has up to 5 PCI devices connected into the MACE bridge. The device 23*1da177e4SLinus Torvalds * map looks like this: 24*1da177e4SLinus Torvalds * 25*1da177e4SLinus Torvalds * 0 aic7xxx 0 26*1da177e4SLinus Torvalds * 1 aic7xxx 1 27*1da177e4SLinus Torvalds * 2 expansion slot 28*1da177e4SLinus Torvalds * 3 N/C 29*1da177e4SLinus Torvalds * 4 N/C 30*1da177e4SLinus Torvalds */ 31*1da177e4SLinus Torvalds 32*1da177e4SLinus Torvalds #define chkslot(_bus,_devfn) \ 33*1da177e4SLinus Torvalds do { \ 34*1da177e4SLinus Torvalds if ((_bus)->number > 0 || PCI_SLOT (_devfn) < 1 \ 35*1da177e4SLinus Torvalds || PCI_SLOT (_devfn) > 3) \ 36*1da177e4SLinus Torvalds return PCIBIOS_DEVICE_NOT_FOUND; \ 37*1da177e4SLinus Torvalds } while (0) 38*1da177e4SLinus Torvalds 39*1da177e4SLinus Torvalds #define mkaddr(_devfn, _reg) \ 40*1da177e4SLinus Torvalds ((((_devfn) & 0xffUL) << 8) | ((_reg) & 0xfcUL)) 41*1da177e4SLinus Torvalds 42*1da177e4SLinus Torvalds static int 43*1da177e4SLinus Torvalds mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, 44*1da177e4SLinus Torvalds int reg, int size, u32 *val) 45*1da177e4SLinus Torvalds { 46*1da177e4SLinus Torvalds chkslot(bus, devfn); 47*1da177e4SLinus Torvalds mace->pci.config_addr = mkaddr(devfn, reg); 48*1da177e4SLinus Torvalds switch (size) { 49*1da177e4SLinus Torvalds case 1: 50*1da177e4SLinus Torvalds *val = mace->pci.config_data.b[(reg & 3) ^ 3]; 51*1da177e4SLinus Torvalds break; 52*1da177e4SLinus Torvalds case 2: 53*1da177e4SLinus Torvalds *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1]; 54*1da177e4SLinus Torvalds break; 55*1da177e4SLinus Torvalds case 4: 56*1da177e4SLinus Torvalds *val = mace->pci.config_data.l; 57*1da177e4SLinus Torvalds break; 58*1da177e4SLinus Torvalds } 59*1da177e4SLinus Torvalds 60*1da177e4SLinus Torvalds DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val); 61*1da177e4SLinus Torvalds 62*1da177e4SLinus Torvalds return PCIBIOS_SUCCESSFUL; 63*1da177e4SLinus Torvalds } 64*1da177e4SLinus Torvalds 65*1da177e4SLinus Torvalds static int 66*1da177e4SLinus Torvalds mace_pci_write_config(struct pci_bus *bus, unsigned int devfn, 67*1da177e4SLinus Torvalds int reg, int size, u32 val) 68*1da177e4SLinus Torvalds { 69*1da177e4SLinus Torvalds chkslot(bus, devfn); 70*1da177e4SLinus Torvalds mace->pci.config_addr = mkaddr(devfn, reg); 71*1da177e4SLinus Torvalds switch (size) { 72*1da177e4SLinus Torvalds case 1: 73*1da177e4SLinus Torvalds mace->pci.config_data.b[(reg & 3) ^ 3] = val; 74*1da177e4SLinus Torvalds break; 75*1da177e4SLinus Torvalds case 2: 76*1da177e4SLinus Torvalds mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val; 77*1da177e4SLinus Torvalds break; 78*1da177e4SLinus Torvalds case 4: 79*1da177e4SLinus Torvalds mace->pci.config_data.l = val; 80*1da177e4SLinus Torvalds break; 81*1da177e4SLinus Torvalds } 82*1da177e4SLinus Torvalds 83*1da177e4SLinus Torvalds DPRINTK("write%d: reg=%08x,val=%02x\n", size * 8, reg, val); 84*1da177e4SLinus Torvalds 85*1da177e4SLinus Torvalds return PCIBIOS_SUCCESSFUL; 86*1da177e4SLinus Torvalds } 87*1da177e4SLinus Torvalds 88*1da177e4SLinus Torvalds struct pci_ops mace_pci_ops = { 89*1da177e4SLinus Torvalds .read = mace_pci_read_config, 90*1da177e4SLinus Torvalds .write = mace_pci_write_config, 91*1da177e4SLinus Torvalds }; 92