xref: /openbmc/linux/arch/mips/mm/sc-ip22.c (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1*b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvalds /*
31da177e4SLinus Torvalds  * sc-ip22.c: Indy cache management functions.
41da177e4SLinus Torvalds  *
51da177e4SLinus Torvalds  * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
679add627SJustin P. Mattock  * derived from r4xx0.c by David S. Miller (davem@davemloft.net).
71da177e4SLinus Torvalds  */
81da177e4SLinus Torvalds #include <linux/init.h>
91da177e4SLinus Torvalds #include <linux/kernel.h>
101da177e4SLinus Torvalds #include <linux/sched.h>
111da177e4SLinus Torvalds #include <linux/mm.h>
121da177e4SLinus Torvalds 
131da177e4SLinus Torvalds #include <asm/bcache.h>
141da177e4SLinus Torvalds #include <asm/page.h>
151da177e4SLinus Torvalds #include <asm/bootinfo.h>
161da177e4SLinus Torvalds #include <asm/sgi/ip22.h>
171da177e4SLinus Torvalds #include <asm/sgi/mc.h>
181da177e4SLinus Torvalds 
191da177e4SLinus Torvalds /* Secondary cache size in bytes, if present.  */
201da177e4SLinus Torvalds static unsigned long scache_size;
211da177e4SLinus Torvalds 
221da177e4SLinus Torvalds #undef DEBUG_CACHE
231da177e4SLinus Torvalds 
241da177e4SLinus Torvalds #define SC_SIZE 0x00080000
251da177e4SLinus Torvalds #define SC_LINE 32
261da177e4SLinus Torvalds #define CI_MASK (SC_SIZE - SC_LINE)
271da177e4SLinus Torvalds #define SC_INDEX(n) ((n) & CI_MASK)
281da177e4SLinus Torvalds 
indy_sc_wipe(unsigned long first,unsigned long last)291da177e4SLinus Torvalds static inline void indy_sc_wipe(unsigned long first, unsigned long last)
301da177e4SLinus Torvalds {
311da177e4SLinus Torvalds 	unsigned long tmp;
321da177e4SLinus Torvalds 
331da177e4SLinus Torvalds 	__asm__ __volatile__(
34f9f1c8dbSRalf Baechle 	"	.set	push			# indy_sc_wipe		\n"
35f9f1c8dbSRalf Baechle 	"	.set	noreorder					\n"
36f9f1c8dbSRalf Baechle 	"	.set	mips3						\n"
37f9f1c8dbSRalf Baechle 	"	.set	noat						\n"
38f9f1c8dbSRalf Baechle 	"	mfc0	%2, $12						\n"
39f9f1c8dbSRalf Baechle 	"	li	$1, 0x80		# Go 64 bit		\n"
40f9f1c8dbSRalf Baechle 	"	mtc0	$1, $12						\n"
41f9f1c8dbSRalf Baechle 	"								\n"
42ae2f5e5eSRalf Baechle 	"	#							\n"
43ae2f5e5eSRalf Baechle 	"	# Open code a dli $1, 0x9000000080000000		\n"
44ae2f5e5eSRalf Baechle 	"	#							\n"
45ae2f5e5eSRalf Baechle 	"	# Required because binutils 2.25 will happily accept	\n"
46ae2f5e5eSRalf Baechle 	"	# 64 bit instructions in .set mips3 mode but puke on	\n"
47ae2f5e5eSRalf Baechle 	"	# 64 bit constants when generating 32 bit ELF		\n"
48ae2f5e5eSRalf Baechle 	"	#							\n"
49ae2f5e5eSRalf Baechle 	"	lui	$1,0x9000					\n"
50ae2f5e5eSRalf Baechle 	"	dsll	$1,$1,0x10					\n"
51ae2f5e5eSRalf Baechle 	"	ori	$1,$1,0x8000					\n"
52ae2f5e5eSRalf Baechle 	"	dsll	$1,$1,0x10					\n"
53ae2f5e5eSRalf Baechle 	"								\n"
54f9f1c8dbSRalf Baechle 	"	or	%0, $1			# first line to flush	\n"
55f9f1c8dbSRalf Baechle 	"	or	%1, $1			# last line to flush	\n"
56f9f1c8dbSRalf Baechle 	"	.set	at						\n"
57f9f1c8dbSRalf Baechle 	"								\n"
58f9f1c8dbSRalf Baechle 	"1:	sw	$0, 0(%0)					\n"
59f9f1c8dbSRalf Baechle 	"	bne	%0, %1, 1b					\n"
60f9f1c8dbSRalf Baechle 	"	 daddu	%0, 32						\n"
61f9f1c8dbSRalf Baechle 	"								\n"
62f9f1c8dbSRalf Baechle 	"	mtc0	%2, $12			# Back to 32 bit	\n"
63f9f1c8dbSRalf Baechle 	"	nop				# pipeline hazard	\n"
64f9f1c8dbSRalf Baechle 	"	nop							\n"
65f9f1c8dbSRalf Baechle 	"	nop							\n"
66f9f1c8dbSRalf Baechle 	"	nop							\n"
67f9f1c8dbSRalf Baechle 	"	.set	pop						\n"
681da177e4SLinus Torvalds 	: "=r" (first), "=r" (last), "=&r" (tmp)
691da177e4SLinus Torvalds 	: "0" (first), "1" (last));
701da177e4SLinus Torvalds }
711da177e4SLinus Torvalds 
indy_sc_wback_invalidate(unsigned long addr,unsigned long size)721da177e4SLinus Torvalds static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
731da177e4SLinus Torvalds {
741da177e4SLinus Torvalds 	unsigned long first_line, last_line;
751da177e4SLinus Torvalds 	unsigned long flags;
761da177e4SLinus Torvalds 
771da177e4SLinus Torvalds #ifdef DEBUG_CACHE
781da177e4SLinus Torvalds 	printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size);
791da177e4SLinus Torvalds #endif
801da177e4SLinus Torvalds 
811da177e4SLinus Torvalds 	/* Catch bad driver code */
821da177e4SLinus Torvalds 	BUG_ON(size == 0);
831da177e4SLinus Torvalds 
841da177e4SLinus Torvalds 	/* Which lines to flush?  */
851da177e4SLinus Torvalds 	first_line = SC_INDEX(addr);
861da177e4SLinus Torvalds 	last_line = SC_INDEX(addr + size - 1);
871da177e4SLinus Torvalds 
881da177e4SLinus Torvalds 	local_irq_save(flags);
891da177e4SLinus Torvalds 	if (first_line <= last_line) {
901da177e4SLinus Torvalds 		indy_sc_wipe(first_line, last_line);
911da177e4SLinus Torvalds 		goto out;
921da177e4SLinus Torvalds 	}
931da177e4SLinus Torvalds 
941da177e4SLinus Torvalds 	indy_sc_wipe(first_line, SC_SIZE - SC_LINE);
951da177e4SLinus Torvalds 	indy_sc_wipe(0, last_line);
961da177e4SLinus Torvalds out:
971da177e4SLinus Torvalds 	local_irq_restore(flags);
981da177e4SLinus Torvalds }
991da177e4SLinus Torvalds 
indy_sc_enable(void)1001da177e4SLinus Torvalds static void indy_sc_enable(void)
1011da177e4SLinus Torvalds {
1021da177e4SLinus Torvalds 	unsigned long addr, tmp1, tmp2;
1031da177e4SLinus Torvalds 
1041da177e4SLinus Torvalds 	/* This is really cool... */
1051da177e4SLinus Torvalds #ifdef DEBUG_CACHE
1061da177e4SLinus Torvalds 	printk("Enabling R4600 SCACHE\n");
1071da177e4SLinus Torvalds #endif
1081da177e4SLinus Torvalds 	__asm__ __volatile__(
1091da177e4SLinus Torvalds 	".set\tpush\n\t"
1101da177e4SLinus Torvalds 	".set\tnoreorder\n\t"
1111da177e4SLinus Torvalds 	".set\tmips3\n\t"
1121da177e4SLinus Torvalds 	"mfc0\t%2, $12\n\t"
1131da177e4SLinus Torvalds 	"nop; nop; nop; nop;\n\t"
1141da177e4SLinus Torvalds 	"li\t%1, 0x80\n\t"
1151da177e4SLinus Torvalds 	"mtc0\t%1, $12\n\t"
1161da177e4SLinus Torvalds 	"nop; nop; nop; nop;\n\t"
1171da177e4SLinus Torvalds 	"li\t%0, 0x1\n\t"
1181da177e4SLinus Torvalds 	"dsll\t%0, 31\n\t"
1191da177e4SLinus Torvalds 	"lui\t%1, 0x9000\n\t"
1201da177e4SLinus Torvalds 	"dsll32\t%1, 0\n\t"
1211da177e4SLinus Torvalds 	"or\t%0, %1, %0\n\t"
1221da177e4SLinus Torvalds 	"sb\t$0, 0(%0)\n\t"
1231da177e4SLinus Torvalds 	"mtc0\t$0, $12\n\t"
1241da177e4SLinus Torvalds 	"nop; nop; nop; nop;\n\t"
1251da177e4SLinus Torvalds 	"mtc0\t%2, $12\n\t"
1261da177e4SLinus Torvalds 	"nop; nop; nop; nop;\n\t"
1271da177e4SLinus Torvalds 	".set\tpop"
1281da177e4SLinus Torvalds 	: "=r" (tmp1), "=r" (tmp2), "=r" (addr));
1291da177e4SLinus Torvalds }
1301da177e4SLinus Torvalds 
indy_sc_disable(void)1311da177e4SLinus Torvalds static void indy_sc_disable(void)
1321da177e4SLinus Torvalds {
1331da177e4SLinus Torvalds 	unsigned long tmp1, tmp2, tmp3;
1341da177e4SLinus Torvalds 
1351da177e4SLinus Torvalds #ifdef DEBUG_CACHE
1361da177e4SLinus Torvalds 	printk("Disabling R4600 SCACHE\n");
1371da177e4SLinus Torvalds #endif
1381da177e4SLinus Torvalds 	__asm__ __volatile__(
1391da177e4SLinus Torvalds 	".set\tpush\n\t"
1401da177e4SLinus Torvalds 	".set\tnoreorder\n\t"
1411da177e4SLinus Torvalds 	".set\tmips3\n\t"
1421da177e4SLinus Torvalds 	"li\t%0, 0x1\n\t"
1431da177e4SLinus Torvalds 	"dsll\t%0, 31\n\t"
1441da177e4SLinus Torvalds 	"lui\t%1, 0x9000\n\t"
1451da177e4SLinus Torvalds 	"dsll32\t%1, 0\n\t"
1461da177e4SLinus Torvalds 	"or\t%0, %1, %0\n\t"
1471da177e4SLinus Torvalds 	"mfc0\t%2, $12\n\t"
1481da177e4SLinus Torvalds 	"nop; nop; nop; nop\n\t"
1491da177e4SLinus Torvalds 	"li\t%1, 0x80\n\t"
1501da177e4SLinus Torvalds 	"mtc0\t%1, $12\n\t"
1511da177e4SLinus Torvalds 	"nop; nop; nop; nop\n\t"
1521da177e4SLinus Torvalds 	"sh\t$0, 0(%0)\n\t"
1531da177e4SLinus Torvalds 	"mtc0\t$0, $12\n\t"
1541da177e4SLinus Torvalds 	"nop; nop; nop; nop\n\t"
1551da177e4SLinus Torvalds 	"mtc0\t%2, $12\n\t"
1561da177e4SLinus Torvalds 	"nop; nop; nop; nop\n\t"
1571da177e4SLinus Torvalds 	".set\tpop"
1581da177e4SLinus Torvalds 	: "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
1591da177e4SLinus Torvalds }
1601da177e4SLinus Torvalds 
indy_sc_probe(void)1611da177e4SLinus Torvalds static inline int __init indy_sc_probe(void)
1621da177e4SLinus Torvalds {
1631da177e4SLinus Torvalds 	unsigned int size = ip22_eeprom_read(&sgimc->eeprom, 17);
1641da177e4SLinus Torvalds 	if (size == 0)
1651da177e4SLinus Torvalds 		return 0;
1661da177e4SLinus Torvalds 
1671da177e4SLinus Torvalds 	size <<= PAGE_SHIFT;
1681da177e4SLinus Torvalds 	printk(KERN_INFO "R4600/R5000 SCACHE size %dK, linesize 32 bytes.\n",
1691da177e4SLinus Torvalds 	       size >> 10);
1701da177e4SLinus Torvalds 	scache_size = size;
1711da177e4SLinus Torvalds 
1721da177e4SLinus Torvalds 	return 1;
1731da177e4SLinus Torvalds }
1741da177e4SLinus Torvalds 
17592a76f6dSAdam Buchbinder /* XXX Check with wje if the Indy caches can differentiate between
1761da177e4SLinus Torvalds    writeback + invalidate and just invalidate.	*/
177f43909dfSDmitri Vorobiev static struct bcache_ops indy_sc_ops = {
1781da177e4SLinus Torvalds 	.bc_enable = indy_sc_enable,
1791da177e4SLinus Torvalds 	.bc_disable = indy_sc_disable,
1801da177e4SLinus Torvalds 	.bc_wback_inv = indy_sc_wback_invalidate,
1811da177e4SLinus Torvalds 	.bc_inv = indy_sc_wback_invalidate
1821da177e4SLinus Torvalds };
1831da177e4SLinus Torvalds 
indy_sc_init(void)184078a55fcSPaul Gortmaker void indy_sc_init(void)
1851da177e4SLinus Torvalds {
1861da177e4SLinus Torvalds 	if (indy_sc_probe()) {
1871da177e4SLinus Torvalds 		indy_sc_enable();
1881da177e4SLinus Torvalds 		bcops = &indy_sc_ops;
1891da177e4SLinus Torvalds 	}
1901da177e4SLinus Torvalds }
191