xref: /openbmc/linux/arch/mips/mm/cache.c (revision 96de0e252cedffad61b3cb5e05662c591898e69a)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7  * Copyright (C) 2007 MIPS Technologies, Inc.
8  */
9 #include <linux/fs.h>
10 #include <linux/fcntl.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/linkage.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/mm.h>
17 
18 #include <asm/cacheflush.h>
19 #include <asm/processor.h>
20 #include <asm/cpu.h>
21 #include <asm/cpu-features.h>
22 
23 /* Cache operations. */
24 void (*flush_cache_all)(void);
25 void (*__flush_cache_all)(void);
26 void (*flush_cache_mm)(struct mm_struct *mm);
27 void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
28 	unsigned long end);
29 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
30 	unsigned long pfn);
31 void (*flush_icache_range)(unsigned long start, unsigned long end);
32 
33 /* MIPS specific cache operations */
34 void (*flush_cache_sigtramp)(unsigned long addr);
35 void (*local_flush_data_cache_page)(void * addr);
36 void (*flush_data_cache_page)(unsigned long addr);
37 void (*flush_icache_all)(void);
38 
39 EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
40 EXPORT_SYMBOL(flush_data_cache_page);
41 
42 #ifdef CONFIG_DMA_NONCOHERENT
43 
44 /* DMA cache operations. */
45 void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
46 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
47 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
48 
49 EXPORT_SYMBOL(_dma_cache_wback_inv);
50 
51 #endif /* CONFIG_DMA_NONCOHERENT */
52 
53 /*
54  * We could optimize the case where the cache argument is not BCACHE but
55  * that seems very atypical use ...
56  */
57 asmlinkage int sys_cacheflush(unsigned long addr,
58 	unsigned long bytes, unsigned int cache)
59 {
60 	if (bytes == 0)
61 		return 0;
62 	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
63 		return -EFAULT;
64 
65 	flush_icache_range(addr, addr + bytes);
66 
67 	return 0;
68 }
69 
70 void __flush_dcache_page(struct page *page)
71 {
72 	struct address_space *mapping = page_mapping(page);
73 	unsigned long addr;
74 
75 	if (PageHighMem(page))
76 		return;
77 	if (mapping && !mapping_mapped(mapping)) {
78 		SetPageDcacheDirty(page);
79 		return;
80 	}
81 
82 	/*
83 	 * We could delay the flush for the !page_mapping case too.  But that
84 	 * case is for exec env/arg pages and those are %99 certainly going to
85 	 * get faulted into the tlb (and thus flushed) anyways.
86 	 */
87 	addr = (unsigned long) page_address(page);
88 	flush_data_cache_page(addr);
89 }
90 
91 EXPORT_SYMBOL(__flush_dcache_page);
92 
93 void __flush_anon_page(struct page *page, unsigned long vmaddr)
94 {
95 	if (pages_do_alias((unsigned long)page_address(page), vmaddr)) {
96 		void *kaddr;
97 
98 		kaddr = kmap_coherent(page, vmaddr);
99 		flush_data_cache_page((unsigned long)kaddr);
100 		kunmap_coherent();
101 	}
102 }
103 
104 EXPORT_SYMBOL(__flush_anon_page);
105 
106 void __update_cache(struct vm_area_struct *vma, unsigned long address,
107 	pte_t pte)
108 {
109 	struct page *page;
110 	unsigned long pfn, addr;
111 	int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
112 
113 	pfn = pte_pfn(pte);
114 	if (unlikely(!pfn_valid(pfn)))
115 		return;
116 	page = pfn_to_page(pfn);
117 	if (page_mapping(page) && Page_dcache_dirty(page)) {
118 		addr = (unsigned long) page_address(page);
119 		if (exec || pages_do_alias(addr, address & PAGE_MASK))
120 			flush_data_cache_page(addr);
121 		ClearPageDcacheDirty(page);
122 	}
123 }
124 
125 static char cache_panic[] __initdata = "Yeee, unsupported cache architecture.";
126 
127 void __init cpu_cache_init(void)
128 {
129 	if (cpu_has_3k_cache) {
130 		extern void __weak r3k_cache_init(void);
131 
132 		r3k_cache_init();
133 		return;
134 	}
135 	if (cpu_has_6k_cache) {
136 		extern void __weak r6k_cache_init(void);
137 
138 		r6k_cache_init();
139 		return;
140 	}
141 	if (cpu_has_4k_cache) {
142 		extern void __weak r4k_cache_init(void);
143 
144 		r4k_cache_init();
145 		return;
146 	}
147 	if (cpu_has_8k_cache) {
148 		extern void __weak r8k_cache_init(void);
149 
150 		r8k_cache_init();
151 		return;
152 	}
153 	if (cpu_has_tx39_cache) {
154 		extern void __weak tx39_cache_init(void);
155 
156 		tx39_cache_init();
157 		return;
158 	}
159 
160 	panic(cache_panic);
161 }
162 
163 int __weak __uncached_access(struct file *file, unsigned long addr)
164 {
165 	if (file->f_flags & O_SYNC)
166 		return 1;
167 
168 	return addr >= __pa(high_memory);
169 }
170