xref: /openbmc/linux/arch/mips/loongson2ef/common/init.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
171e2f4ddSJiaxun Yang // SPDX-License-Identifier: GPL-2.0-or-later
271e2f4ddSJiaxun Yang /*
371e2f4ddSJiaxun Yang  * Copyright (C) 2009 Lemote Inc.
471e2f4ddSJiaxun Yang  * Author: Wu Zhangjin, wuzhangjin@gmail.com
571e2f4ddSJiaxun Yang  */
671e2f4ddSJiaxun Yang 
771e2f4ddSJiaxun Yang #include <linux/memblock.h>
871e2f4ddSJiaxun Yang #include <asm/bootinfo.h>
971e2f4ddSJiaxun Yang #include <asm/traps.h>
1071e2f4ddSJiaxun Yang #include <asm/smp-ops.h>
1171e2f4ddSJiaxun Yang #include <asm/cacheflush.h>
1275cac781SJiaxun Yang #include <asm/fw/fw.h>
1371e2f4ddSJiaxun Yang 
1471e2f4ddSJiaxun Yang #include <loongson.h>
1571e2f4ddSJiaxun Yang 
1671e2f4ddSJiaxun Yang /* Loongson CPU address windows config space base address */
1771e2f4ddSJiaxun Yang unsigned long __maybe_unused _loongson_addrwincfg_base;
1871e2f4ddSJiaxun Yang 
mips_nmi_setup(void)1971e2f4ddSJiaxun Yang static void __init mips_nmi_setup(void)
2071e2f4ddSJiaxun Yang {
2171e2f4ddSJiaxun Yang 	void *base;
2271e2f4ddSJiaxun Yang 
2371e2f4ddSJiaxun Yang 	base = (void *)(CAC_BASE + 0x380);
24*f39293fdSBen Hutchings 	memcpy(base, except_vec_nmi, 0x80);
2571e2f4ddSJiaxun Yang 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
2671e2f4ddSJiaxun Yang }
2771e2f4ddSJiaxun Yang 
prom_init(void)2871e2f4ddSJiaxun Yang void __init prom_init(void)
2971e2f4ddSJiaxun Yang {
3071e2f4ddSJiaxun Yang #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
3171e2f4ddSJiaxun Yang 	_loongson_addrwincfg_base = (unsigned long)
3271e2f4ddSJiaxun Yang 		ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE);
3371e2f4ddSJiaxun Yang #endif
3471e2f4ddSJiaxun Yang 
3575cac781SJiaxun Yang 	fw_init_cmdline();
3675cac781SJiaxun Yang 	prom_init_machtype();
3771e2f4ddSJiaxun Yang 	prom_init_env();
3871e2f4ddSJiaxun Yang 
3971e2f4ddSJiaxun Yang 	/* init base address of io space */
4071e2f4ddSJiaxun Yang 	set_io_port_base((unsigned long)
4171e2f4ddSJiaxun Yang 		ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
4271e2f4ddSJiaxun Yang 	prom_init_memory();
4371e2f4ddSJiaxun Yang 
4471e2f4ddSJiaxun Yang 	/*init the uart base address */
4571e2f4ddSJiaxun Yang 	prom_init_uart_base();
4671e2f4ddSJiaxun Yang 	board_nmi_handler_setup = mips_nmi_setup;
4771e2f4ddSJiaxun Yang }
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