1*d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2215ed200SJohn Crispin /*
3215ed200SJohn Crispin *
497b92108SJohn Crispin * Copyright (C) 2010 John Crispin <john@phrozen.org>
5a5c1aad8SHauke Mehrtens * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
6215ed200SJohn Crispin */
7215ed200SJohn Crispin
8215ed200SJohn Crispin #include <linux/export.h>
9215ed200SJohn Crispin #include <linux/clk.h>
10215ed200SJohn Crispin #include <asm/bootinfo.h>
11215ed200SJohn Crispin #include <asm/time.h>
12215ed200SJohn Crispin
13215ed200SJohn Crispin #include <lantiq_soc.h>
14215ed200SJohn Crispin
15215ed200SJohn Crispin #include "../prom.h"
16215ed200SJohn Crispin
17215ed200SJohn Crispin #define SOC_DANUBE "Danube"
18215ed200SJohn Crispin #define SOC_TWINPASS "Twinpass"
19215ed200SJohn Crispin #define SOC_AMAZON_SE "Amazon_SE"
20215ed200SJohn Crispin #define SOC_AR9 "AR9"
21a5c1aad8SHauke Mehrtens #define SOC_GR9 "GRX200"
22a5c1aad8SHauke Mehrtens #define SOC_VR9 "xRX200"
2313648d72SHauke Mehrtens #define SOC_VRX220 "xRX220"
24a5c1aad8SHauke Mehrtens #define SOC_AR10 "xRX300"
25a5c1aad8SHauke Mehrtens #define SOC_GRX390 "xRX330"
26215ed200SJohn Crispin
27215ed200SJohn Crispin #define COMP_DANUBE "lantiq,danube"
28215ed200SJohn Crispin #define COMP_TWINPASS "lantiq,twinpass"
29215ed200SJohn Crispin #define COMP_AMAZON_SE "lantiq,ase"
30215ed200SJohn Crispin #define COMP_AR9 "lantiq,ar9"
31215ed200SJohn Crispin #define COMP_GR9 "lantiq,gr9"
32215ed200SJohn Crispin #define COMP_VR9 "lantiq,vr9"
33a5c1aad8SHauke Mehrtens #define COMP_AR10 "lantiq,ar10"
34a5c1aad8SHauke Mehrtens #define COMP_GRX390 "lantiq,grx390"
35215ed200SJohn Crispin
36215ed200SJohn Crispin #define PART_SHIFT 12
37215ed200SJohn Crispin #define PART_MASK 0x0FFFFFFF
38215ed200SJohn Crispin #define REV_SHIFT 28
39215ed200SJohn Crispin #define REV_MASK 0xF0000000
40215ed200SJohn Crispin
ltq_soc_detect(struct ltq_soc_info * i)41215ed200SJohn Crispin void __init ltq_soc_detect(struct ltq_soc_info *i)
42215ed200SJohn Crispin {
43215ed200SJohn Crispin i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
44215ed200SJohn Crispin i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
45215ed200SJohn Crispin sprintf(i->rev_type, "1.%d", i->rev);
46215ed200SJohn Crispin switch (i->partnum) {
47215ed200SJohn Crispin case SOC_ID_DANUBE1:
48215ed200SJohn Crispin case SOC_ID_DANUBE2:
49215ed200SJohn Crispin i->name = SOC_DANUBE;
50215ed200SJohn Crispin i->type = SOC_TYPE_DANUBE;
51215ed200SJohn Crispin i->compatible = COMP_DANUBE;
52215ed200SJohn Crispin break;
53215ed200SJohn Crispin
54215ed200SJohn Crispin case SOC_ID_TWINPASS:
55215ed200SJohn Crispin i->name = SOC_TWINPASS;
56215ed200SJohn Crispin i->type = SOC_TYPE_DANUBE;
57215ed200SJohn Crispin i->compatible = COMP_TWINPASS;
58215ed200SJohn Crispin break;
59215ed200SJohn Crispin
60215ed200SJohn Crispin case SOC_ID_ARX188:
61215ed200SJohn Crispin case SOC_ID_ARX168_1:
62215ed200SJohn Crispin case SOC_ID_ARX168_2:
63215ed200SJohn Crispin case SOC_ID_ARX182:
64215ed200SJohn Crispin i->name = SOC_AR9;
65215ed200SJohn Crispin i->type = SOC_TYPE_AR9;
66215ed200SJohn Crispin i->compatible = COMP_AR9;
67215ed200SJohn Crispin break;
68215ed200SJohn Crispin
69215ed200SJohn Crispin case SOC_ID_GRX188:
70215ed200SJohn Crispin case SOC_ID_GRX168:
71215ed200SJohn Crispin i->name = SOC_GR9;
72215ed200SJohn Crispin i->type = SOC_TYPE_AR9;
73215ed200SJohn Crispin i->compatible = COMP_GR9;
74215ed200SJohn Crispin break;
75215ed200SJohn Crispin
76215ed200SJohn Crispin case SOC_ID_AMAZON_SE_1:
77215ed200SJohn Crispin case SOC_ID_AMAZON_SE_2:
78215ed200SJohn Crispin #ifdef CONFIG_PCI
79215ed200SJohn Crispin panic("ase is only supported for non pci kernels");
80215ed200SJohn Crispin #endif
81215ed200SJohn Crispin i->name = SOC_AMAZON_SE;
82215ed200SJohn Crispin i->type = SOC_TYPE_AMAZON_SE;
83215ed200SJohn Crispin i->compatible = COMP_AMAZON_SE;
84215ed200SJohn Crispin break;
85215ed200SJohn Crispin
86215ed200SJohn Crispin case SOC_ID_VRX282:
87215ed200SJohn Crispin case SOC_ID_VRX268:
88215ed200SJohn Crispin case SOC_ID_VRX288:
89215ed200SJohn Crispin i->name = SOC_VR9;
90215ed200SJohn Crispin i->type = SOC_TYPE_VR9;
91215ed200SJohn Crispin i->compatible = COMP_VR9;
92215ed200SJohn Crispin break;
93215ed200SJohn Crispin
94215ed200SJohn Crispin case SOC_ID_GRX268:
95215ed200SJohn Crispin case SOC_ID_GRX288:
96215ed200SJohn Crispin i->name = SOC_GR9;
97215ed200SJohn Crispin i->type = SOC_TYPE_VR9;
98215ed200SJohn Crispin i->compatible = COMP_GR9;
99215ed200SJohn Crispin break;
100215ed200SJohn Crispin
101215ed200SJohn Crispin case SOC_ID_VRX268_2:
102215ed200SJohn Crispin case SOC_ID_VRX288_2:
103215ed200SJohn Crispin i->name = SOC_VR9;
104215ed200SJohn Crispin i->type = SOC_TYPE_VR9_2;
105215ed200SJohn Crispin i->compatible = COMP_VR9;
106215ed200SJohn Crispin break;
107215ed200SJohn Crispin
10813648d72SHauke Mehrtens case SOC_ID_VRX220:
10913648d72SHauke Mehrtens i->name = SOC_VRX220;
11013648d72SHauke Mehrtens i->type = SOC_TYPE_VRX220;
11113648d72SHauke Mehrtens i->compatible = COMP_VR9;
11213648d72SHauke Mehrtens break;
11313648d72SHauke Mehrtens
114215ed200SJohn Crispin case SOC_ID_GRX282_2:
115215ed200SJohn Crispin case SOC_ID_GRX288_2:
116215ed200SJohn Crispin i->name = SOC_GR9;
117215ed200SJohn Crispin i->type = SOC_TYPE_VR9_2;
118215ed200SJohn Crispin i->compatible = COMP_GR9;
119215ed200SJohn Crispin break;
120215ed200SJohn Crispin
121a5c1aad8SHauke Mehrtens case SOC_ID_ARX362:
122a5c1aad8SHauke Mehrtens case SOC_ID_ARX368:
123a5c1aad8SHauke Mehrtens case SOC_ID_ARX382:
124a5c1aad8SHauke Mehrtens case SOC_ID_ARX388:
125a5c1aad8SHauke Mehrtens case SOC_ID_URX388:
126a5c1aad8SHauke Mehrtens i->name = SOC_AR10;
127a5c1aad8SHauke Mehrtens i->type = SOC_TYPE_AR10;
128a5c1aad8SHauke Mehrtens i->compatible = COMP_AR10;
129a5c1aad8SHauke Mehrtens break;
130a5c1aad8SHauke Mehrtens
131a5c1aad8SHauke Mehrtens case SOC_ID_GRX383:
132a5c1aad8SHauke Mehrtens case SOC_ID_GRX369:
133a5c1aad8SHauke Mehrtens case SOC_ID_GRX387:
134a5c1aad8SHauke Mehrtens case SOC_ID_GRX389:
135a5c1aad8SHauke Mehrtens i->name = SOC_GRX390;
136a5c1aad8SHauke Mehrtens i->type = SOC_TYPE_GRX390;
137a5c1aad8SHauke Mehrtens i->compatible = COMP_GRX390;
138a5c1aad8SHauke Mehrtens break;
139a5c1aad8SHauke Mehrtens
140215ed200SJohn Crispin default:
141215ed200SJohn Crispin unreachable();
142215ed200SJohn Crispin break;
143215ed200SJohn Crispin }
144215ed200SJohn Crispin }
145