1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1992 Linus Torvalds 7 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle 8 */ 9 #include <linux/clockchips.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/spinlock.h> 14 15 #include <asm/irq_cpu.h> 16 #include <asm/i8253.h> 17 #include <asm/i8259.h> 18 #include <asm/io.h> 19 #include <asm/jazz.h> 20 #include <asm/pgtable.h> 21 22 static DEFINE_SPINLOCK(r4030_lock); 23 24 static void enable_r4030_irq(unsigned int irq) 25 { 26 unsigned int mask = 1 << (irq - JAZZ_IRQ_START); 27 unsigned long flags; 28 29 spin_lock_irqsave(&r4030_lock, flags); 30 mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 31 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 32 spin_unlock_irqrestore(&r4030_lock, flags); 33 } 34 35 void disable_r4030_irq(unsigned int irq) 36 { 37 unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START)); 38 unsigned long flags; 39 40 spin_lock_irqsave(&r4030_lock, flags); 41 mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 42 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 43 spin_unlock_irqrestore(&r4030_lock, flags); 44 } 45 46 static struct irq_chip r4030_irq_type = { 47 .name = "R4030", 48 .ack = disable_r4030_irq, 49 .mask = disable_r4030_irq, 50 .mask_ack = disable_r4030_irq, 51 .unmask = enable_r4030_irq, 52 }; 53 54 void __init init_r4030_ints(void) 55 { 56 int i; 57 58 for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++) 59 set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); 60 61 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 62 r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ 63 r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */ 64 } 65 66 /* 67 * On systems with i8259-style interrupt controllers we assume for 68 * driver compatibility reasons interrupts 0 - 15 to be the i8259 69 * interrupts even if the hardware uses a different interrupt numbering. 70 */ 71 void __init arch_init_irq(void) 72 { 73 /* 74 * this is a hack to get back the still needed wired mapping 75 * killed by init_mm() 76 */ 77 78 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ 79 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); 80 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ 81 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); 82 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ 83 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); 84 85 init_i8259_irqs(); /* Integrated i8259 */ 86 mips_cpu_irq_init(); 87 init_r4030_ints(); 88 89 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1); 90 } 91 92 asmlinkage void plat_irq_dispatch(void) 93 { 94 unsigned int pending = read_c0_cause() & read_c0_status(); 95 unsigned int irq; 96 97 if (pending & IE_IRQ4) { 98 r4030_read_reg32(JAZZ_TIMER_REGISTER); 99 do_IRQ(JAZZ_TIMER_IRQ); 100 } else if (pending & IE_IRQ2) 101 do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK)); 102 else if (pending & IE_IRQ1) { 103 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; 104 if (likely(irq > 0)) 105 do_IRQ(irq + JAZZ_IRQ_START - 1); 106 else 107 panic("Unimplemented loc_no_irq handler"); 108 } 109 } 110 111 static void r4030_set_mode(enum clock_event_mode mode, 112 struct clock_event_device *evt) 113 { 114 /* Nothing to do ... */ 115 } 116 117 struct clock_event_device r4030_clockevent = { 118 .name = "r4030", 119 .features = CLOCK_EVT_FEAT_PERIODIC, 120 .rating = 100, 121 .irq = JAZZ_TIMER_IRQ, 122 .cpumask = CPU_MASK_CPU0, 123 .set_mode = r4030_set_mode, 124 }; 125 126 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) 127 { 128 r4030_clockevent.event_handler(&r4030_clockevent); 129 130 return IRQ_HANDLED; 131 } 132 133 static struct irqaction r4030_timer_irqaction = { 134 .handler = r4030_timer_interrupt, 135 .flags = IRQF_DISABLED, 136 .mask = CPU_MASK_CPU0, 137 .name = "timer", 138 }; 139 140 void __init plat_time_init(void) 141 { 142 struct irqaction *irq = &r4030_timer_irqaction; 143 144 BUG_ON(HZ != 100); 145 146 /* 147 * Set clock to 100Hz. 148 * 149 * The R4030 timer receives an input clock of 1kHz which is divieded by 150 * a programmable 4-bit divider. This makes it fairly inflexible. 151 */ 152 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); 153 setup_irq(JAZZ_TIMER_IRQ, irq); 154 155 clockevents_register_device(&r4030_clockevent); 156 setup_pit_timer(); 157 } 158