190e8cacdSRalf Baechle /* 290e8cacdSRalf Baechle * Format of an instruction in memory. 390e8cacdSRalf Baechle * 490e8cacdSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 590e8cacdSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 690e8cacdSRalf Baechle * for more details. 790e8cacdSRalf Baechle * 890e8cacdSRalf Baechle * Copyright (C) 1996, 2000 by Ralf Baechle 990e8cacdSRalf Baechle * Copyright (C) 2006 by Thiemo Seufer 102aa9fd06SSteven J. Hill * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 11aa1af47fSLeonid Yegoshin * Copyright (C) 2014 Imagination Technologies Ltd. 1290e8cacdSRalf Baechle */ 1390e8cacdSRalf Baechle #ifndef _UAPI_ASM_INST_H 1490e8cacdSRalf Baechle #define _UAPI_ASM_INST_H 1590e8cacdSRalf Baechle 1664a17a0fSRalf Baechle #include <asm/bitfield.h> 1764a17a0fSRalf Baechle 1890e8cacdSRalf Baechle /* 1990e8cacdSRalf Baechle * Major opcodes; before MIPS IV cop1x was called cop3. 2090e8cacdSRalf Baechle */ 2190e8cacdSRalf Baechle enum major_op { 2290e8cacdSRalf Baechle spec_op, bcond_op, j_op, jal_op, 2390e8cacdSRalf Baechle beq_op, bne_op, blez_op, bgtz_op, 2490e8cacdSRalf Baechle addi_op, addiu_op, slti_op, sltiu_op, 2590e8cacdSRalf Baechle andi_op, ori_op, xori_op, lui_op, 2690e8cacdSRalf Baechle cop0_op, cop1_op, cop2_op, cop1x_op, 2790e8cacdSRalf Baechle beql_op, bnel_op, blezl_op, bgtzl_op, 2890e8cacdSRalf Baechle daddi_op, daddiu_op, ldl_op, ldr_op, 2990e8cacdSRalf Baechle spec2_op, jalx_op, mdmx_op, spec3_op, 3090e8cacdSRalf Baechle lb_op, lh_op, lwl_op, lw_op, 3190e8cacdSRalf Baechle lbu_op, lhu_op, lwr_op, lwu_op, 3290e8cacdSRalf Baechle sb_op, sh_op, swl_op, sw_op, 3390e8cacdSRalf Baechle sdl_op, sdr_op, swr_op, cache_op, 3490e8cacdSRalf Baechle ll_op, lwc1_op, lwc2_op, pref_op, 3590e8cacdSRalf Baechle lld_op, ldc1_op, ldc2_op, ld_op, 3690e8cacdSRalf Baechle sc_op, swc1_op, swc2_op, major_3b_op, 3790e8cacdSRalf Baechle scd_op, sdc1_op, sdc2_op, sd_op 3890e8cacdSRalf Baechle }; 3990e8cacdSRalf Baechle 4090e8cacdSRalf Baechle /* 4190e8cacdSRalf Baechle * func field of spec opcode. 4290e8cacdSRalf Baechle */ 4390e8cacdSRalf Baechle enum spec_op { 4490e8cacdSRalf Baechle sll_op, movc_op, srl_op, sra_op, 4590e8cacdSRalf Baechle sllv_op, pmon_op, srlv_op, srav_op, 4690e8cacdSRalf Baechle jr_op, jalr_op, movz_op, movn_op, 4790e8cacdSRalf Baechle syscall_op, break_op, spim_op, sync_op, 4890e8cacdSRalf Baechle mfhi_op, mthi_op, mflo_op, mtlo_op, 4990e8cacdSRalf Baechle dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op, 5090e8cacdSRalf Baechle mult_op, multu_op, div_op, divu_op, 5190e8cacdSRalf Baechle dmult_op, dmultu_op, ddiv_op, ddivu_op, 5290e8cacdSRalf Baechle add_op, addu_op, sub_op, subu_op, 5390e8cacdSRalf Baechle and_op, or_op, xor_op, nor_op, 5490e8cacdSRalf Baechle spec3_unused_op, spec4_unused_op, slt_op, sltu_op, 5590e8cacdSRalf Baechle dadd_op, daddu_op, dsub_op, dsubu_op, 5690e8cacdSRalf Baechle tge_op, tgeu_op, tlt_op, tltu_op, 5790e8cacdSRalf Baechle teq_op, spec5_unused_op, tne_op, spec6_unused_op, 5890e8cacdSRalf Baechle dsll_op, spec7_unused_op, dsrl_op, dsra_op, 5990e8cacdSRalf Baechle dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op 6090e8cacdSRalf Baechle }; 6190e8cacdSRalf Baechle 6290e8cacdSRalf Baechle /* 6390e8cacdSRalf Baechle * func field of spec2 opcode. 6490e8cacdSRalf Baechle */ 6590e8cacdSRalf Baechle enum spec2_op { 6690e8cacdSRalf Baechle madd_op, maddu_op, mul_op, spec2_3_unused_op, 6790e8cacdSRalf Baechle msub_op, msubu_op, /* more unused ops */ 6890e8cacdSRalf Baechle clz_op = 0x20, clo_op, 6990e8cacdSRalf Baechle dclz_op = 0x24, dclo_op, 7090e8cacdSRalf Baechle sdbpp_op = 0x3f 7190e8cacdSRalf Baechle }; 7290e8cacdSRalf Baechle 7390e8cacdSRalf Baechle /* 7490e8cacdSRalf Baechle * func field of spec3 opcode. 7590e8cacdSRalf Baechle */ 7690e8cacdSRalf Baechle enum spec3_op { 7790e8cacdSRalf Baechle ext_op, dextm_op, dextu_op, dext_op, 7890e8cacdSRalf Baechle ins_op, dinsm_op, dinsu_op, dins_op, 796f5bb424SPaul Burton yield_op = 0x09, lx_op = 0x0a, 806f5bb424SPaul Burton lwle_op = 0x19, lwre_op = 0x1a, 816f5bb424SPaul Burton cachee_op = 0x1b, sbe_op = 0x1c, 826f5bb424SPaul Burton she_op = 0x1d, sce_op = 0x1e, 836f5bb424SPaul Burton swe_op = 0x1f, bshfl_op = 0x20, 846f5bb424SPaul Burton swle_op = 0x21, swre_op = 0x22, 856f5bb424SPaul Burton prefe_op = 0x23, dbshfl_op = 0x24, 866f5bb424SPaul Burton lbue_op = 0x28, lhue_op = 0x29, 876f5bb424SPaul Burton lbe_op = 0x2c, lhe_op = 0x2d, 886f5bb424SPaul Burton lle_op = 0x2e, lwe_op = 0x2f, 896f5bb424SPaul Burton rdhwr_op = 0x3b 9090e8cacdSRalf Baechle }; 9190e8cacdSRalf Baechle 9290e8cacdSRalf Baechle /* 9390e8cacdSRalf Baechle * rt field of bcond opcodes. 9490e8cacdSRalf Baechle */ 9590e8cacdSRalf Baechle enum rt_op { 9690e8cacdSRalf Baechle bltz_op, bgez_op, bltzl_op, bgezl_op, 9790e8cacdSRalf Baechle spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07, 9890e8cacdSRalf Baechle tgei_op, tgeiu_op, tlti_op, tltiu_op, 9990e8cacdSRalf Baechle teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op, 10090e8cacdSRalf Baechle bltzal_op, bgezal_op, bltzall_op, bgezall_op, 10190e8cacdSRalf Baechle rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17, 10290e8cacdSRalf Baechle rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b, 10390e8cacdSRalf Baechle bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f 10490e8cacdSRalf Baechle }; 10590e8cacdSRalf Baechle 10690e8cacdSRalf Baechle /* 10790e8cacdSRalf Baechle * rs field of cop opcodes. 10890e8cacdSRalf Baechle */ 10990e8cacdSRalf Baechle enum cop_op { 11090e8cacdSRalf Baechle mfc_op = 0x00, dmfc_op = 0x01, 111*e2965cd0SSteven J. Hill cfc_op = 0x02, mfhc0_op = 0x02, 112*e2965cd0SSteven J. Hill mfhc_op = 0x03, mtc_op = 0x04, 113*e2965cd0SSteven J. Hill dmtc_op = 0x05, ctc_op = 0x06, 114*e2965cd0SSteven J. Hill mthc0_op = 0x06, mthc_op = 0x07, 11590e8cacdSRalf Baechle bc_op = 0x08, cop_op = 0x10, 11690e8cacdSRalf Baechle copm_op = 0x18 11790e8cacdSRalf Baechle }; 11890e8cacdSRalf Baechle 11990e8cacdSRalf Baechle /* 12090e8cacdSRalf Baechle * rt field of cop.bc_op opcodes 12190e8cacdSRalf Baechle */ 12290e8cacdSRalf Baechle enum bcop_op { 12390e8cacdSRalf Baechle bcf_op, bct_op, bcfl_op, bctl_op 12490e8cacdSRalf Baechle }; 12590e8cacdSRalf Baechle 12690e8cacdSRalf Baechle /* 12790e8cacdSRalf Baechle * func field of cop0 coi opcodes. 12890e8cacdSRalf Baechle */ 12990e8cacdSRalf Baechle enum cop0_coi_func { 13090e8cacdSRalf Baechle tlbr_op = 0x01, tlbwi_op = 0x02, 13190e8cacdSRalf Baechle tlbwr_op = 0x06, tlbp_op = 0x08, 132b0a3eae2SPaul Burton rfe_op = 0x10, eret_op = 0x18, 133b0a3eae2SPaul Burton wait_op = 0x20, 13490e8cacdSRalf Baechle }; 13590e8cacdSRalf Baechle 13690e8cacdSRalf Baechle /* 13790e8cacdSRalf Baechle * func field of cop0 com opcodes. 13890e8cacdSRalf Baechle */ 13990e8cacdSRalf Baechle enum cop0_com_func { 14090e8cacdSRalf Baechle tlbr1_op = 0x01, tlbw_op = 0x02, 14190e8cacdSRalf Baechle tlbp1_op = 0x08, dctr_op = 0x09, 14290e8cacdSRalf Baechle dctw_op = 0x0a 14390e8cacdSRalf Baechle }; 14490e8cacdSRalf Baechle 14590e8cacdSRalf Baechle /* 14690e8cacdSRalf Baechle * fmt field of cop1 opcodes. 14790e8cacdSRalf Baechle */ 14890e8cacdSRalf Baechle enum cop1_fmt { 14990e8cacdSRalf Baechle s_fmt, d_fmt, e_fmt, q_fmt, 15090e8cacdSRalf Baechle w_fmt, l_fmt 15190e8cacdSRalf Baechle }; 15290e8cacdSRalf Baechle 15390e8cacdSRalf Baechle /* 15490e8cacdSRalf Baechle * func field of cop1 instructions using d, s or w format. 15590e8cacdSRalf Baechle */ 15690e8cacdSRalf Baechle enum cop1_sdw_func { 15790e8cacdSRalf Baechle fadd_op = 0x00, fsub_op = 0x01, 15890e8cacdSRalf Baechle fmul_op = 0x02, fdiv_op = 0x03, 15990e8cacdSRalf Baechle fsqrt_op = 0x04, fabs_op = 0x05, 16090e8cacdSRalf Baechle fmov_op = 0x06, fneg_op = 0x07, 16190e8cacdSRalf Baechle froundl_op = 0x08, ftruncl_op = 0x09, 16290e8cacdSRalf Baechle fceill_op = 0x0a, ffloorl_op = 0x0b, 16390e8cacdSRalf Baechle fround_op = 0x0c, ftrunc_op = 0x0d, 16490e8cacdSRalf Baechle fceil_op = 0x0e, ffloor_op = 0x0f, 16590e8cacdSRalf Baechle fmovc_op = 0x11, fmovz_op = 0x12, 16690e8cacdSRalf Baechle fmovn_op = 0x13, frecip_op = 0x15, 16790e8cacdSRalf Baechle frsqrt_op = 0x16, fcvts_op = 0x20, 16890e8cacdSRalf Baechle fcvtd_op = 0x21, fcvte_op = 0x22, 16990e8cacdSRalf Baechle fcvtw_op = 0x24, fcvtl_op = 0x25, 17090e8cacdSRalf Baechle fcmp_op = 0x30 17190e8cacdSRalf Baechle }; 17290e8cacdSRalf Baechle 17390e8cacdSRalf Baechle /* 17490e8cacdSRalf Baechle * func field of cop1x opcodes (MIPS IV). 17590e8cacdSRalf Baechle */ 17690e8cacdSRalf Baechle enum cop1x_func { 17790e8cacdSRalf Baechle lwxc1_op = 0x00, ldxc1_op = 0x01, 17851061b88SDeng-Cheng Zhu swxc1_op = 0x08, sdxc1_op = 0x09, 17951061b88SDeng-Cheng Zhu pfetch_op = 0x0f, madd_s_op = 0x20, 18090e8cacdSRalf Baechle madd_d_op = 0x21, madd_e_op = 0x22, 18190e8cacdSRalf Baechle msub_s_op = 0x28, msub_d_op = 0x29, 18290e8cacdSRalf Baechle msub_e_op = 0x2a, nmadd_s_op = 0x30, 18390e8cacdSRalf Baechle nmadd_d_op = 0x31, nmadd_e_op = 0x32, 18490e8cacdSRalf Baechle nmsub_s_op = 0x38, nmsub_d_op = 0x39, 18590e8cacdSRalf Baechle nmsub_e_op = 0x3a 18690e8cacdSRalf Baechle }; 18790e8cacdSRalf Baechle 18890e8cacdSRalf Baechle /* 18990e8cacdSRalf Baechle * func field for mad opcodes (MIPS IV). 19090e8cacdSRalf Baechle */ 19190e8cacdSRalf Baechle enum mad_func { 19290e8cacdSRalf Baechle madd_fp_op = 0x08, msub_fp_op = 0x0a, 19390e8cacdSRalf Baechle nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e 19490e8cacdSRalf Baechle }; 19590e8cacdSRalf Baechle 19690e8cacdSRalf Baechle /* 19790e8cacdSRalf Baechle * func field for special3 lx opcodes (Cavium Octeon). 19890e8cacdSRalf Baechle */ 19990e8cacdSRalf Baechle enum lx_func { 20090e8cacdSRalf Baechle lwx_op = 0x00, 20190e8cacdSRalf Baechle lhx_op = 0x04, 20290e8cacdSRalf Baechle lbux_op = 0x06, 20390e8cacdSRalf Baechle ldx_op = 0x08, 20490e8cacdSRalf Baechle lwux_op = 0x10, 20590e8cacdSRalf Baechle lhux_op = 0x14, 20690e8cacdSRalf Baechle lbx_op = 0x16, 20790e8cacdSRalf Baechle }; 20890e8cacdSRalf Baechle 20990e8cacdSRalf Baechle /* 210ab9e4fa0SMarkos Chandras * BSHFL opcodes 211ab9e4fa0SMarkos Chandras */ 212ab9e4fa0SMarkos Chandras enum bshfl_func { 213ab9e4fa0SMarkos Chandras wsbh_op = 0x2, 214ab9e4fa0SMarkos Chandras dshd_op = 0x5, 215ab9e4fa0SMarkos Chandras seb_op = 0x10, 216ab9e4fa0SMarkos Chandras seh_op = 0x18, 217ab9e4fa0SMarkos Chandras }; 218ab9e4fa0SMarkos Chandras 219ab9e4fa0SMarkos Chandras /* 2202aa9fd06SSteven J. Hill * (microMIPS) Major opcodes. 2212aa9fd06SSteven J. Hill */ 2222aa9fd06SSteven J. Hill enum mm_major_op { 2232aa9fd06SSteven J. Hill mm_pool32a_op, mm_pool16a_op, mm_lbu16_op, mm_move16_op, 2242aa9fd06SSteven J. Hill mm_addi32_op, mm_lbu32_op, mm_sb32_op, mm_lb32_op, 2252aa9fd06SSteven J. Hill mm_pool32b_op, mm_pool16b_op, mm_lhu16_op, mm_andi16_op, 2262aa9fd06SSteven J. Hill mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op, 2272aa9fd06SSteven J. Hill mm_pool32i_op, mm_pool16c_op, mm_lwsp16_op, mm_pool16d_op, 2282aa9fd06SSteven J. Hill mm_ori32_op, mm_pool32f_op, mm_reserved1_op, mm_reserved2_op, 2292aa9fd06SSteven J. Hill mm_pool32c_op, mm_lwgp16_op, mm_lw16_op, mm_pool16e_op, 2302aa9fd06SSteven J. Hill mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op, 2312aa9fd06SSteven J. Hill mm_reserved4_op, mm_pool16f_op, mm_sb16_op, mm_beqz16_op, 2322aa9fd06SSteven J. Hill mm_slti32_op, mm_beq32_op, mm_swc132_op, mm_lwc132_op, 2332aa9fd06SSteven J. Hill mm_reserved5_op, mm_reserved6_op, mm_sh16_op, mm_bnez16_op, 2342aa9fd06SSteven J. Hill mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op, 2352aa9fd06SSteven J. Hill mm_reserved7_op, mm_reserved8_op, mm_swsp16_op, mm_b16_op, 2362aa9fd06SSteven J. Hill mm_andi32_op, mm_j32_op, mm_sd32_op, mm_ld32_op, 2372aa9fd06SSteven J. Hill mm_reserved11_op, mm_reserved12_op, mm_sw16_op, mm_li16_op, 2382aa9fd06SSteven J. Hill mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op, 2392aa9fd06SSteven J. Hill }; 2402aa9fd06SSteven J. Hill 2412aa9fd06SSteven J. Hill /* 2422aa9fd06SSteven J. Hill * (microMIPS) POOL32I minor opcodes. 2432aa9fd06SSteven J. Hill */ 2442aa9fd06SSteven J. Hill enum mm_32i_minor_op { 2452aa9fd06SSteven J. Hill mm_bltz_op, mm_bltzal_op, mm_bgez_op, mm_bgezal_op, 2462aa9fd06SSteven J. Hill mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op, 2472aa9fd06SSteven J. Hill mm_tlti_op, mm_tgei_op, mm_tltiu_op, mm_tgeiu_op, 2482aa9fd06SSteven J. Hill mm_tnei_op, mm_lui_op, mm_teqi_op, mm_reserved13_op, 2492aa9fd06SSteven J. Hill mm_synci_op, mm_bltzals_op, mm_reserved14_op, mm_bgezals_op, 2502aa9fd06SSteven J. Hill mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op, 2512aa9fd06SSteven J. Hill mm_reserved17_op, mm_reserved18_op, mm_bposge64_op, mm_bposge32_op, 2522aa9fd06SSteven J. Hill mm_bc1f_op, mm_bc1t_op, mm_reserved19_op, mm_reserved20_op, 2532aa9fd06SSteven J. Hill mm_bc1any2f_op, mm_bc1any2t_op, mm_bc1any4f_op, mm_bc1any4t_op, 2542aa9fd06SSteven J. Hill }; 2552aa9fd06SSteven J. Hill 2562aa9fd06SSteven J. Hill /* 2572aa9fd06SSteven J. Hill * (microMIPS) POOL32A minor opcodes. 2582aa9fd06SSteven J. Hill */ 2592aa9fd06SSteven J. Hill enum mm_32a_minor_op { 2602aa9fd06SSteven J. Hill mm_sll32_op = 0x000, 2612aa9fd06SSteven J. Hill mm_ins_op = 0x00c, 262bef581baSMarkos Chandras mm_sllv32_op = 0x010, 2632aa9fd06SSteven J. Hill mm_ext_op = 0x02c, 2642aa9fd06SSteven J. Hill mm_pool32axf_op = 0x03c, 2652aa9fd06SSteven J. Hill mm_srl32_op = 0x040, 2662aa9fd06SSteven J. Hill mm_sra_op = 0x080, 267f31318fdSMarkos Chandras mm_srlv32_op = 0x090, 2682aa9fd06SSteven J. Hill mm_rotr_op = 0x0c0, 2692aa9fd06SSteven J. Hill mm_lwxs_op = 0x118, 2702aa9fd06SSteven J. Hill mm_addu32_op = 0x150, 2712aa9fd06SSteven J. Hill mm_subu32_op = 0x1d0, 272ab9e4fa0SMarkos Chandras mm_wsbh_op = 0x1ec, 273a8e897adSMarkos Chandras mm_mul_op = 0x210, 2742aa9fd06SSteven J. Hill mm_and_op = 0x250, 2752aa9fd06SSteven J. Hill mm_or32_op = 0x290, 2762aa9fd06SSteven J. Hill mm_xor32_op = 0x310, 2777682f9e8SMarkos Chandras mm_slt_op = 0x350, 278e8ef868bSMarkos Chandras mm_sltu_op = 0x390, 2792aa9fd06SSteven J. Hill }; 2802aa9fd06SSteven J. Hill 2812aa9fd06SSteven J. Hill /* 2822aa9fd06SSteven J. Hill * (microMIPS) POOL32B functions. 2832aa9fd06SSteven J. Hill */ 2842aa9fd06SSteven J. Hill enum mm_32b_func { 2852aa9fd06SSteven J. Hill mm_lwc2_func = 0x0, 2862aa9fd06SSteven J. Hill mm_lwp_func = 0x1, 2872aa9fd06SSteven J. Hill mm_ldc2_func = 0x2, 2882aa9fd06SSteven J. Hill mm_ldp_func = 0x4, 2892aa9fd06SSteven J. Hill mm_lwm32_func = 0x5, 2902aa9fd06SSteven J. Hill mm_cache_func = 0x6, 2912aa9fd06SSteven J. Hill mm_ldm_func = 0x7, 2922aa9fd06SSteven J. Hill mm_swc2_func = 0x8, 2932aa9fd06SSteven J. Hill mm_swp_func = 0x9, 2942aa9fd06SSteven J. Hill mm_sdc2_func = 0xa, 2952aa9fd06SSteven J. Hill mm_sdp_func = 0xc, 2962aa9fd06SSteven J. Hill mm_swm32_func = 0xd, 2972aa9fd06SSteven J. Hill mm_sdm_func = 0xf, 2982aa9fd06SSteven J. Hill }; 2992aa9fd06SSteven J. Hill 3002aa9fd06SSteven J. Hill /* 3012aa9fd06SSteven J. Hill * (microMIPS) POOL32C functions. 3022aa9fd06SSteven J. Hill */ 3032aa9fd06SSteven J. Hill enum mm_32c_func { 3042aa9fd06SSteven J. Hill mm_pref_func = 0x2, 3052aa9fd06SSteven J. Hill mm_ll_func = 0x3, 3062aa9fd06SSteven J. Hill mm_swr_func = 0x9, 3072aa9fd06SSteven J. Hill mm_sc_func = 0xb, 3082aa9fd06SSteven J. Hill mm_lwu_func = 0xe, 3092aa9fd06SSteven J. Hill }; 3102aa9fd06SSteven J. Hill 3112aa9fd06SSteven J. Hill /* 3122aa9fd06SSteven J. Hill * (microMIPS) POOL32AXF minor opcodes. 3132aa9fd06SSteven J. Hill */ 3142aa9fd06SSteven J. Hill enum mm_32axf_minor_op { 3152aa9fd06SSteven J. Hill mm_mfc0_op = 0x003, 3162aa9fd06SSteven J. Hill mm_mtc0_op = 0x00b, 3172aa9fd06SSteven J. Hill mm_tlbp_op = 0x00d, 318f3ec7a23SMarkos Chandras mm_mfhi32_op = 0x035, 3192aa9fd06SSteven J. Hill mm_jalr_op = 0x03c, 3202aa9fd06SSteven J. Hill mm_tlbr_op = 0x04d, 32116d21a81SMarkos Chandras mm_mflo32_op = 0x075, 3222aa9fd06SSteven J. Hill mm_jalrhb_op = 0x07c, 3232aa9fd06SSteven J. Hill mm_tlbwi_op = 0x08d, 3242aa9fd06SSteven J. Hill mm_tlbwr_op = 0x0cd, 3252aa9fd06SSteven J. Hill mm_jalrs_op = 0x13c, 3262aa9fd06SSteven J. Hill mm_jalrshb_op = 0x17c, 3277ed82ad1SPaul Burton mm_sync_op = 0x1ad, 3282aa9fd06SSteven J. Hill mm_syscall_op = 0x22d, 329f263839aSPaul Burton mm_wait_op = 0x24d, 3302aa9fd06SSteven J. Hill mm_eret_op = 0x3cd, 3314c12a854SMarkos Chandras mm_divu_op = 0x5dc, 3322aa9fd06SSteven J. Hill }; 3332aa9fd06SSteven J. Hill 3342aa9fd06SSteven J. Hill /* 3352aa9fd06SSteven J. Hill * (microMIPS) POOL32F minor opcodes. 3362aa9fd06SSteven J. Hill */ 3372aa9fd06SSteven J. Hill enum mm_32f_minor_op { 3382aa9fd06SSteven J. Hill mm_32f_00_op = 0x00, 3392aa9fd06SSteven J. Hill mm_32f_01_op = 0x01, 3402aa9fd06SSteven J. Hill mm_32f_02_op = 0x02, 3412aa9fd06SSteven J. Hill mm_32f_10_op = 0x08, 3422aa9fd06SSteven J. Hill mm_32f_11_op = 0x09, 3432aa9fd06SSteven J. Hill mm_32f_12_op = 0x0a, 3442aa9fd06SSteven J. Hill mm_32f_20_op = 0x10, 3452aa9fd06SSteven J. Hill mm_32f_30_op = 0x18, 3462aa9fd06SSteven J. Hill mm_32f_40_op = 0x20, 3472aa9fd06SSteven J. Hill mm_32f_41_op = 0x21, 3482aa9fd06SSteven J. Hill mm_32f_42_op = 0x22, 3492aa9fd06SSteven J. Hill mm_32f_50_op = 0x28, 3502aa9fd06SSteven J. Hill mm_32f_51_op = 0x29, 3512aa9fd06SSteven J. Hill mm_32f_52_op = 0x2a, 3522aa9fd06SSteven J. Hill mm_32f_60_op = 0x30, 3532aa9fd06SSteven J. Hill mm_32f_70_op = 0x38, 3542aa9fd06SSteven J. Hill mm_32f_73_op = 0x3b, 3552aa9fd06SSteven J. Hill mm_32f_74_op = 0x3c, 3562aa9fd06SSteven J. Hill }; 3572aa9fd06SSteven J. Hill 3582aa9fd06SSteven J. Hill /* 3592aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3602aa9fd06SSteven J. Hill */ 3612aa9fd06SSteven J. Hill enum mm_32f_10_minor_op { 3622aa9fd06SSteven J. Hill mm_lwxc1_op = 0x1, 3632aa9fd06SSteven J. Hill mm_swxc1_op, 3642aa9fd06SSteven J. Hill mm_ldxc1_op, 3652aa9fd06SSteven J. Hill mm_sdxc1_op, 3662aa9fd06SSteven J. Hill mm_luxc1_op, 3672aa9fd06SSteven J. Hill mm_suxc1_op, 3682aa9fd06SSteven J. Hill }; 3692aa9fd06SSteven J. Hill 3702aa9fd06SSteven J. Hill enum mm_32f_func { 3712aa9fd06SSteven J. Hill mm_lwxc1_func = 0x048, 3722aa9fd06SSteven J. Hill mm_swxc1_func = 0x088, 3732aa9fd06SSteven J. Hill mm_ldxc1_func = 0x0c8, 3742aa9fd06SSteven J. Hill mm_sdxc1_func = 0x108, 3752aa9fd06SSteven J. Hill }; 3762aa9fd06SSteven J. Hill 3772aa9fd06SSteven J. Hill /* 3782aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3792aa9fd06SSteven J. Hill */ 3802aa9fd06SSteven J. Hill enum mm_32f_40_minor_op { 3812aa9fd06SSteven J. Hill mm_fmovf_op, 3822aa9fd06SSteven J. Hill mm_fmovt_op, 3832aa9fd06SSteven J. Hill }; 3842aa9fd06SSteven J. Hill 3852aa9fd06SSteven J. Hill /* 3862aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3872aa9fd06SSteven J. Hill */ 3882aa9fd06SSteven J. Hill enum mm_32f_60_minor_op { 3892aa9fd06SSteven J. Hill mm_fadd_op, 3902aa9fd06SSteven J. Hill mm_fsub_op, 3912aa9fd06SSteven J. Hill mm_fmul_op, 3922aa9fd06SSteven J. Hill mm_fdiv_op, 3932aa9fd06SSteven J. Hill }; 3942aa9fd06SSteven J. Hill 3952aa9fd06SSteven J. Hill /* 3962aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3972aa9fd06SSteven J. Hill */ 3982aa9fd06SSteven J. Hill enum mm_32f_70_minor_op { 3992aa9fd06SSteven J. Hill mm_fmovn_op, 4002aa9fd06SSteven J. Hill mm_fmovz_op, 4012aa9fd06SSteven J. Hill }; 4022aa9fd06SSteven J. Hill 4032aa9fd06SSteven J. Hill /* 4042aa9fd06SSteven J. Hill * (microMIPS) POOL32FXF secondary minor opcodes for POOL32F. 4052aa9fd06SSteven J. Hill */ 4062aa9fd06SSteven J. Hill enum mm_32f_73_minor_op { 4072aa9fd06SSteven J. Hill mm_fmov0_op = 0x01, 4082aa9fd06SSteven J. Hill mm_fcvtl_op = 0x04, 4092aa9fd06SSteven J. Hill mm_movf0_op = 0x05, 4102aa9fd06SSteven J. Hill mm_frsqrt_op = 0x08, 4112aa9fd06SSteven J. Hill mm_ffloorl_op = 0x0c, 4122aa9fd06SSteven J. Hill mm_fabs0_op = 0x0d, 4132aa9fd06SSteven J. Hill mm_fcvtw_op = 0x24, 4142aa9fd06SSteven J. Hill mm_movt0_op = 0x25, 4152aa9fd06SSteven J. Hill mm_fsqrt_op = 0x28, 4162aa9fd06SSteven J. Hill mm_ffloorw_op = 0x2c, 4172aa9fd06SSteven J. Hill mm_fneg0_op = 0x2d, 4182aa9fd06SSteven J. Hill mm_cfc1_op = 0x40, 4192aa9fd06SSteven J. Hill mm_frecip_op = 0x48, 4202aa9fd06SSteven J. Hill mm_fceill_op = 0x4c, 4212aa9fd06SSteven J. Hill mm_fcvtd0_op = 0x4d, 4222aa9fd06SSteven J. Hill mm_ctc1_op = 0x60, 4232aa9fd06SSteven J. Hill mm_fceilw_op = 0x6c, 4242aa9fd06SSteven J. Hill mm_fcvts0_op = 0x6d, 4252aa9fd06SSteven J. Hill mm_mfc1_op = 0x80, 4262aa9fd06SSteven J. Hill mm_fmov1_op = 0x81, 4272aa9fd06SSteven J. Hill mm_movf1_op = 0x85, 4282aa9fd06SSteven J. Hill mm_ftruncl_op = 0x8c, 4292aa9fd06SSteven J. Hill mm_fabs1_op = 0x8d, 4302aa9fd06SSteven J. Hill mm_mtc1_op = 0xa0, 4312aa9fd06SSteven J. Hill mm_movt1_op = 0xa5, 4322aa9fd06SSteven J. Hill mm_ftruncw_op = 0xac, 4332aa9fd06SSteven J. Hill mm_fneg1_op = 0xad, 4349355e59cSSteven J. Hill mm_mfhc1_op = 0xc0, 4352aa9fd06SSteven J. Hill mm_froundl_op = 0xcc, 4362aa9fd06SSteven J. Hill mm_fcvtd1_op = 0xcd, 4379355e59cSSteven J. Hill mm_mthc1_op = 0xe0, 4382aa9fd06SSteven J. Hill mm_froundw_op = 0xec, 4392aa9fd06SSteven J. Hill mm_fcvts1_op = 0xed, 4402aa9fd06SSteven J. Hill }; 4412aa9fd06SSteven J. Hill 4422aa9fd06SSteven J. Hill /* 4432aa9fd06SSteven J. Hill * (microMIPS) POOL16C minor opcodes. 4442aa9fd06SSteven J. Hill */ 4452aa9fd06SSteven J. Hill enum mm_16c_minor_op { 4462aa9fd06SSteven J. Hill mm_lwm16_op = 0x04, 4472aa9fd06SSteven J. Hill mm_swm16_op = 0x05, 448dfb033f0STony Wu mm_jr16_op = 0x0c, 449dfb033f0STony Wu mm_jrc_op = 0x0d, 450dfb033f0STony Wu mm_jalr16_op = 0x0e, 451dfb033f0STony Wu mm_jalrs16_op = 0x0f, 452dfb033f0STony Wu mm_jraddiusp_op = 0x18, 4532aa9fd06SSteven J. Hill }; 4542aa9fd06SSteven J. Hill 4552aa9fd06SSteven J. Hill /* 4562aa9fd06SSteven J. Hill * (microMIPS) POOL16D minor opcodes. 4572aa9fd06SSteven J. Hill */ 4582aa9fd06SSteven J. Hill enum mm_16d_minor_op { 4592aa9fd06SSteven J. Hill mm_addius5_func, 4602aa9fd06SSteven J. Hill mm_addiusp_func, 4612aa9fd06SSteven J. Hill }; 4622aa9fd06SSteven J. Hill 4632aa9fd06SSteven J. Hill /* 464cd574704SSteven J. Hill * (MIPS16e) opcodes. 465cd574704SSteven J. Hill */ 466cd574704SSteven J. Hill enum MIPS16e_ops { 467cd574704SSteven J. Hill MIPS16e_jal_op = 003, 468cd574704SSteven J. Hill MIPS16e_ld_op = 007, 469cd574704SSteven J. Hill MIPS16e_i8_op = 014, 470cd574704SSteven J. Hill MIPS16e_sd_op = 017, 471cd574704SSteven J. Hill MIPS16e_lb_op = 020, 472cd574704SSteven J. Hill MIPS16e_lh_op = 021, 473cd574704SSteven J. Hill MIPS16e_lwsp_op = 022, 474cd574704SSteven J. Hill MIPS16e_lw_op = 023, 475cd574704SSteven J. Hill MIPS16e_lbu_op = 024, 476cd574704SSteven J. Hill MIPS16e_lhu_op = 025, 477cd574704SSteven J. Hill MIPS16e_lwpc_op = 026, 478cd574704SSteven J. Hill MIPS16e_lwu_op = 027, 479cd574704SSteven J. Hill MIPS16e_sb_op = 030, 480cd574704SSteven J. Hill MIPS16e_sh_op = 031, 481cd574704SSteven J. Hill MIPS16e_swsp_op = 032, 482cd574704SSteven J. Hill MIPS16e_sw_op = 033, 483cd574704SSteven J. Hill MIPS16e_rr_op = 035, 484cd574704SSteven J. Hill MIPS16e_extend_op = 036, 485cd574704SSteven J. Hill MIPS16e_i64_op = 037, 486cd574704SSteven J. Hill }; 487cd574704SSteven J. Hill 488cd574704SSteven J. Hill enum MIPS16e_i64_func { 489cd574704SSteven J. Hill MIPS16e_ldsp_func, 490cd574704SSteven J. Hill MIPS16e_sdsp_func, 491cd574704SSteven J. Hill MIPS16e_sdrasp_func, 492cd574704SSteven J. Hill MIPS16e_dadjsp_func, 493cd574704SSteven J. Hill MIPS16e_ldpc_func, 494cd574704SSteven J. Hill }; 495cd574704SSteven J. Hill 496cd574704SSteven J. Hill enum MIPS16e_rr_func { 497cd574704SSteven J. Hill MIPS16e_jr_func, 498cd574704SSteven J. Hill }; 499cd574704SSteven J. Hill 500cd574704SSteven J. Hill enum MIPS6e_i8_func { 501cd574704SSteven J. Hill MIPS16e_swrasp_func = 02, 502cd574704SSteven J. Hill }; 503cd574704SSteven J. Hill 504cd574704SSteven J. Hill /* 505102cedc3SLeonid Yegoshin * (microMIPS & MIPS16e) NOP instruction. 506102cedc3SLeonid Yegoshin */ 507102cedc3SLeonid Yegoshin #define MM_NOP16 0x0c00 508102cedc3SLeonid Yegoshin 50985dfaf08SRalf Baechle struct j_format { 5108471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ 5118471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int target : 26, 51285dfaf08SRalf Baechle ;)) 51385dfaf08SRalf Baechle }; 51485dfaf08SRalf Baechle 51585dfaf08SRalf Baechle struct i_format { /* signed immediate format */ 5168471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5178471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 5188471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 5198471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 16, 52085dfaf08SRalf Baechle ;)))) 52185dfaf08SRalf Baechle }; 52285dfaf08SRalf Baechle 52385dfaf08SRalf Baechle struct u_format { /* unsigned immediate format */ 5248471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5258471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 5268471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 5278471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int uimmediate : 16, 52885dfaf08SRalf Baechle ;)))) 52985dfaf08SRalf Baechle }; 53085dfaf08SRalf Baechle 53185dfaf08SRalf Baechle struct c_format { /* Cache (>= R6000) format */ 5328471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5338471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 5348471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int c_op : 3, 5358471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int cache : 2, 5368471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int simmediate : 16, 53785dfaf08SRalf Baechle ;))))) 53885dfaf08SRalf Baechle }; 53985dfaf08SRalf Baechle 54085dfaf08SRalf Baechle struct r_format { /* Register format */ 5418471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5428471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 5438471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 5448471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rd : 5, 5458471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int re : 5, 5468471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 54785dfaf08SRalf Baechle ;)))))) 54885dfaf08SRalf Baechle }; 54985dfaf08SRalf Baechle 55085dfaf08SRalf Baechle struct p_format { /* Performance counter format (R10000) */ 5518471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5528471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 5538471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 5548471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rd : 5, 5558471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int re : 5, 5568471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 55785dfaf08SRalf Baechle ;)))))) 55885dfaf08SRalf Baechle }; 55985dfaf08SRalf Baechle 56085dfaf08SRalf Baechle struct f_format { /* FPU register format */ 5618471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5628471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 1, 5638471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 4, 5648471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 5658471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rd : 5, 5668471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int re : 5, 5678471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 56885dfaf08SRalf Baechle ;))))))) 56985dfaf08SRalf Baechle }; 57085dfaf08SRalf Baechle 57185dfaf08SRalf Baechle struct ma_format { /* FPU multiply and add format (MIPS IV) */ 5728471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5738471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fr : 5, 5748471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ft : 5, 5758471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 5768471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 5778471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 4, 5788471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 2, 57985dfaf08SRalf Baechle ;))))))) 58085dfaf08SRalf Baechle }; 58185dfaf08SRalf Baechle 58285dfaf08SRalf Baechle struct b_format { /* BREAK and SYSCALL */ 5838471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5848471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int code : 20, 5858471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 58685dfaf08SRalf Baechle ;))) 58785dfaf08SRalf Baechle }; 58885dfaf08SRalf Baechle 5898fba1e58SRalf Baechle struct ps_format { /* MIPS-3D / paired single format */ 5908471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 5918471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 5928471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ft : 5, 5938471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 5948471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 5958471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 5968fba1e58SRalf Baechle ;)))))) 5978fba1e58SRalf Baechle }; 5988fba1e58SRalf Baechle 5998fba1e58SRalf Baechle struct v_format { /* MDMX vector format */ 6008471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6018471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int sel : 4, 6028471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 1, 6038471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int vt : 5, 6048471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int vs : 5, 6058471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int vd : 5, 6068471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6078fba1e58SRalf Baechle ;))))))) 6088fba1e58SRalf Baechle }; 6098fba1e58SRalf Baechle 610aa1af47fSLeonid Yegoshin struct spec3_format { /* SPEC3 */ 6118471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode:6, 6128471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs:5, 6138471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt:5, 6148471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate:9, 6158471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func:7, 616aa1af47fSLeonid Yegoshin ;))))) 617aa1af47fSLeonid Yegoshin }; 618aa1af47fSLeonid Yegoshin 6192aa9fd06SSteven J. Hill /* 6202aa9fd06SSteven J. Hill * microMIPS instruction formats (32-bit length) 6212aa9fd06SSteven J. Hill * 6222aa9fd06SSteven J. Hill * NOTE: 6232aa9fd06SSteven J. Hill * Parenthesis denote whether the format is a microMIPS instruction or 6242aa9fd06SSteven J. Hill * if it is MIPS32 instruction re-encoded for use in the microMIPS ASE. 6252aa9fd06SSteven J. Hill */ 6262aa9fd06SSteven J. Hill struct fb_format { /* FPU branch format (MIPS32) */ 6278471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6288471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int bc : 5, 6298471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int cc : 3, 6308471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int flag : 2, 6318471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 16, 6322aa9fd06SSteven J. Hill ;))))) 6332aa9fd06SSteven J. Hill }; 6342aa9fd06SSteven J. Hill 6352aa9fd06SSteven J. Hill struct fp0_format { /* FPU multiply and add format (MIPS32) */ 6368471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6378471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 5, 6388471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ft : 5, 6398471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 6408471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 6418471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6422aa9fd06SSteven J. Hill ;)))))) 6432aa9fd06SSteven J. Hill }; 6442aa9fd06SSteven J. Hill 6452aa9fd06SSteven J. Hill struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */ 6468471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6478471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ft : 5, 6488471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 6498471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 6508471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 3, 6518471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int op : 2, 6528471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6532aa9fd06SSteven J. Hill ;))))))) 6542aa9fd06SSteven J. Hill }; 6552aa9fd06SSteven J. Hill 6562aa9fd06SSteven J. Hill struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */ 6578471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6588471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int op : 5, 6598471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 6608471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 6618471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 6628471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6632aa9fd06SSteven J. Hill ;)))))) 6642aa9fd06SSteven J. Hill }; 6652aa9fd06SSteven J. Hill 6662aa9fd06SSteven J. Hill struct mm_fp1_format { /* FPU mfc1 and cfc1 format (microMIPS) */ 6678471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6688471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 6698471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 6708471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 2, 6718471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int op : 8, 6728471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6732aa9fd06SSteven J. Hill ;)))))) 6742aa9fd06SSteven J. Hill }; 6752aa9fd06SSteven J. Hill 6762aa9fd06SSteven J. Hill struct mm_fp2_format { /* FPU movt and movf format (microMIPS) */ 6778471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6788471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 6798471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 6808471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int cc : 3, 6818471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int zero : 2, 6828471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 2, 6838471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int op : 3, 6848471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6852aa9fd06SSteven J. Hill ;)))))))) 6862aa9fd06SSteven J. Hill }; 6872aa9fd06SSteven J. Hill 6882aa9fd06SSteven J. Hill struct mm_fp3_format { /* FPU abs and neg format (microMIPS) */ 6898471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 6908471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 6918471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 6928471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 3, 6938471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int op : 7, 6948471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 6952aa9fd06SSteven J. Hill ;)))))) 6962aa9fd06SSteven J. Hill }; 6972aa9fd06SSteven J. Hill 6982aa9fd06SSteven J. Hill struct mm_fp4_format { /* FPU c.cond format (microMIPS) */ 6998471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7008471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 7018471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 7028471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int cc : 3, 7038471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fmt : 3, 7048471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int cond : 4, 7058471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 7062aa9fd06SSteven J. Hill ;))))))) 7072aa9fd06SSteven J. Hill }; 7082aa9fd06SSteven J. Hill 7092aa9fd06SSteven J. Hill struct mm_fp5_format { /* FPU lwxc1 and swxc1 format (microMIPS) */ 7108471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7118471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int index : 5, 7128471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int base : 5, 7138471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 7148471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int op : 5, 7158471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 7162aa9fd06SSteven J. Hill ;)))))) 7172aa9fd06SSteven J. Hill }; 7182aa9fd06SSteven J. Hill 7192aa9fd06SSteven J. Hill struct fp6_format { /* FPU madd and msub format (MIPS IV) */ 7208471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7218471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fr : 5, 7228471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ft : 5, 7238471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 7248471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 7258471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 7262aa9fd06SSteven J. Hill ;)))))) 7272aa9fd06SSteven J. Hill }; 7282aa9fd06SSteven J. Hill 7292aa9fd06SSteven J. Hill struct mm_fp6_format { /* FPU madd and msub format (microMIPS) */ 7308471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7318471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ft : 5, 7328471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fs : 5, 7338471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fd : 5, 7348471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int fr : 5, 7358471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 6, 7362aa9fd06SSteven J. Hill ;)))))) 7372aa9fd06SSteven J. Hill }; 7382aa9fd06SSteven J. Hill 7392aa9fd06SSteven J. Hill struct mm_i_format { /* Immediate format (microMIPS) */ 7408471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7418471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 7428471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 5, 7438471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 16, 7442aa9fd06SSteven J. Hill ;)))) 7452aa9fd06SSteven J. Hill }; 7462aa9fd06SSteven J. Hill 7472aa9fd06SSteven J. Hill struct mm_m_format { /* Multi-word load/store format (microMIPS) */ 7488471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7498471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rd : 5, 7508471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int base : 5, 7518471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 4, 7528471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 12, 7532aa9fd06SSteven J. Hill ;))))) 7542aa9fd06SSteven J. Hill }; 7552aa9fd06SSteven J. Hill 7562aa9fd06SSteven J. Hill struct mm_x_format { /* Scaled indexed load format (microMIPS) */ 7578471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7588471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int index : 5, 7598471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int base : 5, 7608471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rd : 5, 7618471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 11, 7622aa9fd06SSteven J. Hill ;))))) 7632aa9fd06SSteven J. Hill }; 7642aa9fd06SSteven J. Hill 7652aa9fd06SSteven J. Hill /* 7662aa9fd06SSteven J. Hill * microMIPS instruction formats (16-bit length) 7672aa9fd06SSteven J. Hill */ 7682aa9fd06SSteven J. Hill struct mm_b0_format { /* Unconditional branch format (microMIPS) */ 7698471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7708471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 10, 7718471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7722aa9fd06SSteven J. Hill ;))) 7732aa9fd06SSteven J. Hill }; 7742aa9fd06SSteven J. Hill 7752aa9fd06SSteven J. Hill struct mm_b1_format { /* Conditional branch format (microMIPS) */ 7768471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7778471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rs : 3, 7788471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 7, 7798471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7802aa9fd06SSteven J. Hill ;)))) 7812aa9fd06SSteven J. Hill }; 7822aa9fd06SSteven J. Hill 7832aa9fd06SSteven J. Hill struct mm16_m_format { /* Multi-word load/store format */ 7848471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7858471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 4, 7868471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rlist : 2, 7878471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm : 4, 7888471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7892aa9fd06SSteven J. Hill ;))))) 7902aa9fd06SSteven J. Hill }; 7912aa9fd06SSteven J. Hill 7922aa9fd06SSteven J. Hill struct mm16_rb_format { /* Signed immediate format */ 7938471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 7948471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 3, 7958471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int base : 3, 7968471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 4, 7978471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7982aa9fd06SSteven J. Hill ;))))) 7992aa9fd06SSteven J. Hill }; 8002aa9fd06SSteven J. Hill 8012aa9fd06SSteven J. Hill struct mm16_r3_format { /* Load from global pointer format */ 8028471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 8038471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 3, 8048471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 7, 8058471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 8062aa9fd06SSteven J. Hill ;)))) 8072aa9fd06SSteven J. Hill }; 8082aa9fd06SSteven J. Hill 8092aa9fd06SSteven J. Hill struct mm16_r5_format { /* Load/store from stack pointer format */ 8108471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 6, 8118471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rt : 5, 8128471ac1bSRalf Baechle __BITFIELD_FIELD(signed int simmediate : 5, 8138471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 8142aa9fd06SSteven J. Hill ;)))) 8152aa9fd06SSteven J. Hill }; 8162aa9fd06SSteven J. Hill 817cd574704SSteven J. Hill /* 818cd574704SSteven J. Hill * MIPS16e instruction formats (16-bit length) 819cd574704SSteven J. Hill */ 820cd574704SSteven J. Hill struct m16e_rr { 8218471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8228471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rx : 3, 8238471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int nd : 1, 8248471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int l : 1, 8258471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ra : 1, 8268471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 5, 827cd574704SSteven J. Hill ;)))))) 828cd574704SSteven J. Hill }; 829cd574704SSteven J. Hill 830cd574704SSteven J. Hill struct m16e_jal { 8318471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8328471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int x : 1, 8338471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm20_16 : 5, 8348471ac1bSRalf Baechle __BITFIELD_FIELD(signed int imm25_21 : 5, 835cd574704SSteven J. Hill ;)))) 836cd574704SSteven J. Hill }; 837cd574704SSteven J. Hill 838cd574704SSteven J. Hill struct m16e_i64 { 8398471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8408471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 3, 8418471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm : 8, 842cd574704SSteven J. Hill ;))) 843cd574704SSteven J. Hill }; 844cd574704SSteven J. Hill 845cd574704SSteven J. Hill struct m16e_ri64 { 8468471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8478471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 3, 8488471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ry : 3, 8498471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm : 5, 850cd574704SSteven J. Hill ;)))) 851cd574704SSteven J. Hill }; 852cd574704SSteven J. Hill 853cd574704SSteven J. Hill struct m16e_ri { 8548471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8558471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rx : 3, 8568471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm : 8, 857cd574704SSteven J. Hill ;))) 858cd574704SSteven J. Hill }; 859cd574704SSteven J. Hill 860cd574704SSteven J. Hill struct m16e_rri { 8618471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8628471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int rx : 3, 8638471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int ry : 3, 8648471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm : 5, 865cd574704SSteven J. Hill ;)))) 866cd574704SSteven J. Hill }; 867cd574704SSteven J. Hill 868cd574704SSteven J. Hill struct m16e_i8 { 8698471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int opcode : 5, 8708471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int func : 3, 8718471ac1bSRalf Baechle __BITFIELD_FIELD(unsigned int imm : 8, 872cd574704SSteven J. Hill ;))) 873cd574704SSteven J. Hill }; 874cd574704SSteven J. Hill 87590e8cacdSRalf Baechle union mips_instruction { 87690e8cacdSRalf Baechle unsigned int word; 87790e8cacdSRalf Baechle unsigned short halfword[2]; 87890e8cacdSRalf Baechle unsigned char byte[4]; 87990e8cacdSRalf Baechle struct j_format j_format; 88090e8cacdSRalf Baechle struct i_format i_format; 88190e8cacdSRalf Baechle struct u_format u_format; 88290e8cacdSRalf Baechle struct c_format c_format; 88390e8cacdSRalf Baechle struct r_format r_format; 88490e8cacdSRalf Baechle struct p_format p_format; 88590e8cacdSRalf Baechle struct f_format f_format; 88690e8cacdSRalf Baechle struct ma_format ma_format; 88790e8cacdSRalf Baechle struct b_format b_format; 8888fba1e58SRalf Baechle struct ps_format ps_format; 8898fba1e58SRalf Baechle struct v_format v_format; 890aa1af47fSLeonid Yegoshin struct spec3_format spec3_format; 8912aa9fd06SSteven J. Hill struct fb_format fb_format; 8922aa9fd06SSteven J. Hill struct fp0_format fp0_format; 8932aa9fd06SSteven J. Hill struct mm_fp0_format mm_fp0_format; 8942aa9fd06SSteven J. Hill struct fp1_format fp1_format; 8952aa9fd06SSteven J. Hill struct mm_fp1_format mm_fp1_format; 8962aa9fd06SSteven J. Hill struct mm_fp2_format mm_fp2_format; 8972aa9fd06SSteven J. Hill struct mm_fp3_format mm_fp3_format; 8982aa9fd06SSteven J. Hill struct mm_fp4_format mm_fp4_format; 8992aa9fd06SSteven J. Hill struct mm_fp5_format mm_fp5_format; 9002aa9fd06SSteven J. Hill struct fp6_format fp6_format; 9012aa9fd06SSteven J. Hill struct mm_fp6_format mm_fp6_format; 9022aa9fd06SSteven J. Hill struct mm_i_format mm_i_format; 9032aa9fd06SSteven J. Hill struct mm_m_format mm_m_format; 9042aa9fd06SSteven J. Hill struct mm_x_format mm_x_format; 9052aa9fd06SSteven J. Hill struct mm_b0_format mm_b0_format; 9062aa9fd06SSteven J. Hill struct mm_b1_format mm_b1_format; 9072aa9fd06SSteven J. Hill struct mm16_m_format mm16_m_format ; 9082aa9fd06SSteven J. Hill struct mm16_rb_format mm16_rb_format; 9092aa9fd06SSteven J. Hill struct mm16_r3_format mm16_r3_format; 9102aa9fd06SSteven J. Hill struct mm16_r5_format mm16_r5_format; 91190e8cacdSRalf Baechle }; 91290e8cacdSRalf Baechle 913cd574704SSteven J. Hill union mips16e_instruction { 914cd574704SSteven J. Hill unsigned int full : 16; 915cd574704SSteven J. Hill struct m16e_rr rr; 916cd574704SSteven J. Hill struct m16e_jal jal; 917cd574704SSteven J. Hill struct m16e_i64 i64; 918cd574704SSteven J. Hill struct m16e_ri64 ri64; 919cd574704SSteven J. Hill struct m16e_ri ri; 920cd574704SSteven J. Hill struct m16e_rri rri; 921cd574704SSteven J. Hill struct m16e_i8 i8; 922cd574704SSteven J. Hill }; 923cd574704SSteven J. Hill 92490e8cacdSRalf Baechle #endif /* _UAPI_ASM_INST_H */ 925