xref: /openbmc/linux/arch/mips/include/uapi/asm/inst.h (revision b6d5c4eda7a771e72b3640500e026d72c4f64419)
190e8cacdSRalf Baechle /*
290e8cacdSRalf Baechle  * Format of an instruction in memory.
390e8cacdSRalf Baechle  *
490e8cacdSRalf Baechle  * This file is subject to the terms and conditions of the GNU General Public
590e8cacdSRalf Baechle  * License.  See the file "COPYING" in the main directory of this archive
690e8cacdSRalf Baechle  * for more details.
790e8cacdSRalf Baechle  *
890e8cacdSRalf Baechle  * Copyright (C) 1996, 2000 by Ralf Baechle
990e8cacdSRalf Baechle  * Copyright (C) 2006 by Thiemo Seufer
102aa9fd06SSteven J. Hill  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
11aa1af47fSLeonid Yegoshin  * Copyright (C) 2014 Imagination Technologies Ltd.
1290e8cacdSRalf Baechle  */
1390e8cacdSRalf Baechle #ifndef _UAPI_ASM_INST_H
1490e8cacdSRalf Baechle #define _UAPI_ASM_INST_H
1590e8cacdSRalf Baechle 
1664a17a0fSRalf Baechle #include <asm/bitfield.h>
1764a17a0fSRalf Baechle 
1890e8cacdSRalf Baechle /*
1990e8cacdSRalf Baechle  * Major opcodes; before MIPS IV cop1x was called cop3.
2090e8cacdSRalf Baechle  */
2190e8cacdSRalf Baechle enum major_op {
2290e8cacdSRalf Baechle 	spec_op, bcond_op, j_op, jal_op,
2390e8cacdSRalf Baechle 	beq_op, bne_op, blez_op, bgtz_op,
24c893ce38SMarkos Chandras 	addi_op, cbcond0_op = addi_op, addiu_op, slti_op, sltiu_op,
2590e8cacdSRalf Baechle 	andi_op, ori_op, xori_op, lui_op,
2690e8cacdSRalf Baechle 	cop0_op, cop1_op, cop2_op, cop1x_op,
2790e8cacdSRalf Baechle 	beql_op, bnel_op, blezl_op, bgtzl_op,
2810d962d5SMarkos Chandras 	daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op,
296701ca2dSLeonid Yegoshin 	spec2_op, jalx_op, mdmx_op, msa_op = mdmx_op, spec3_op,
3090e8cacdSRalf Baechle 	lb_op, lh_op, lwl_op, lw_op,
3190e8cacdSRalf Baechle 	lbu_op, lhu_op, lwr_op, lwu_op,
3290e8cacdSRalf Baechle 	sb_op, sh_op, swl_op, sw_op,
3390e8cacdSRalf Baechle 	sdl_op, sdr_op, swr_op, cache_op,
348467ca01SMarkos Chandras 	ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op,
3569b9a2fdSMarkos Chandras 	lld_op, ldc1_op, ldc2_op, beqzcjic_op = ldc2_op, ld_op,
3684fef630SMarkos Chandras 	sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op,
3728d6f93dSMarkos Chandras 	scd_op, sdc1_op, sdc2_op, bnezcjialc_op = sdc2_op, sd_op
3890e8cacdSRalf Baechle };
3990e8cacdSRalf Baechle 
4090e8cacdSRalf Baechle /*
4190e8cacdSRalf Baechle  * func field of spec opcode.
4290e8cacdSRalf Baechle  */
4390e8cacdSRalf Baechle enum spec_op {
4490e8cacdSRalf Baechle 	sll_op, movc_op, srl_op, sra_op,
4590e8cacdSRalf Baechle 	sllv_op, pmon_op, srlv_op, srav_op,
4690e8cacdSRalf Baechle 	jr_op, jalr_op, movz_op, movn_op,
4790e8cacdSRalf Baechle 	syscall_op, break_op, spim_op, sync_op,
4890e8cacdSRalf Baechle 	mfhi_op, mthi_op, mflo_op, mtlo_op,
4990e8cacdSRalf Baechle 	dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op,
5090e8cacdSRalf Baechle 	mult_op, multu_op, div_op, divu_op,
5190e8cacdSRalf Baechle 	dmult_op, dmultu_op, ddiv_op, ddivu_op,
5290e8cacdSRalf Baechle 	add_op, addu_op, sub_op, subu_op,
5390e8cacdSRalf Baechle 	and_op, or_op, xor_op, nor_op,
5490e8cacdSRalf Baechle 	spec3_unused_op, spec4_unused_op, slt_op, sltu_op,
5590e8cacdSRalf Baechle 	dadd_op, daddu_op, dsub_op, dsubu_op,
5690e8cacdSRalf Baechle 	tge_op, tgeu_op, tlt_op, tltu_op,
5790e8cacdSRalf Baechle 	teq_op, spec5_unused_op, tne_op, spec6_unused_op,
5890e8cacdSRalf Baechle 	dsll_op, spec7_unused_op, dsrl_op, dsra_op,
5990e8cacdSRalf Baechle 	dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op
6090e8cacdSRalf Baechle };
6190e8cacdSRalf Baechle 
6290e8cacdSRalf Baechle /*
6390e8cacdSRalf Baechle  * func field of spec2 opcode.
6490e8cacdSRalf Baechle  */
6590e8cacdSRalf Baechle enum spec2_op {
6690e8cacdSRalf Baechle 	madd_op, maddu_op, mul_op, spec2_3_unused_op,
6790e8cacdSRalf Baechle 	msub_op, msubu_op, /* more unused ops */
6890e8cacdSRalf Baechle 	clz_op = 0x20, clo_op,
6990e8cacdSRalf Baechle 	dclz_op = 0x24, dclo_op,
7090e8cacdSRalf Baechle 	sdbpp_op = 0x3f
7190e8cacdSRalf Baechle };
7290e8cacdSRalf Baechle 
7390e8cacdSRalf Baechle /*
7490e8cacdSRalf Baechle  * func field of spec3 opcode.
7590e8cacdSRalf Baechle  */
7690e8cacdSRalf Baechle enum spec3_op {
7790e8cacdSRalf Baechle 	ext_op, dextm_op, dextu_op, dext_op,
7890e8cacdSRalf Baechle 	ins_op, dinsm_op, dinsu_op, dins_op,
796f5bb424SPaul Burton 	yield_op  = 0x09, lx_op     = 0x0a,
806f5bb424SPaul Burton 	lwle_op   = 0x19, lwre_op   = 0x1a,
816f5bb424SPaul Burton 	cachee_op = 0x1b, sbe_op    = 0x1c,
826f5bb424SPaul Burton 	she_op    = 0x1d, sce_op    = 0x1e,
836f5bb424SPaul Burton 	swe_op    = 0x1f, bshfl_op  = 0x20,
846f5bb424SPaul Burton 	swle_op   = 0x21, swre_op   = 0x22,
856f5bb424SPaul Burton 	prefe_op  = 0x23, dbshfl_op = 0x24,
86a168b8f1SLeonid Yegoshin 	cache6_op = 0x25, sc6_op    = 0x26,
87a168b8f1SLeonid Yegoshin 	scd6_op   = 0x27, lbue_op   = 0x28,
88a168b8f1SLeonid Yegoshin 	lhue_op   = 0x29, lbe_op    = 0x2c,
89a168b8f1SLeonid Yegoshin 	lhe_op    = 0x2d, lle_op    = 0x2e,
90a168b8f1SLeonid Yegoshin 	lwe_op    = 0x2f, pref6_op  = 0x35,
91a168b8f1SLeonid Yegoshin 	ll6_op    = 0x36, lld6_op   = 0x37,
926f5bb424SPaul Burton 	rdhwr_op  = 0x3b
9390e8cacdSRalf Baechle };
9490e8cacdSRalf Baechle 
9590e8cacdSRalf Baechle /*
9690e8cacdSRalf Baechle  * rt field of bcond opcodes.
9790e8cacdSRalf Baechle  */
9890e8cacdSRalf Baechle enum rt_op {
9990e8cacdSRalf Baechle 	bltz_op, bgez_op, bltzl_op, bgezl_op,
10090e8cacdSRalf Baechle 	spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
10190e8cacdSRalf Baechle 	tgei_op, tgeiu_op, tlti_op, tltiu_op,
10290e8cacdSRalf Baechle 	teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
10390e8cacdSRalf Baechle 	bltzal_op, bgezal_op, bltzall_op, bgezall_op,
10490e8cacdSRalf Baechle 	rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17,
10590e8cacdSRalf Baechle 	rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b,
10690e8cacdSRalf Baechle 	bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f
10790e8cacdSRalf Baechle };
10890e8cacdSRalf Baechle 
10990e8cacdSRalf Baechle /*
11090e8cacdSRalf Baechle  * rs field of cop opcodes.
11190e8cacdSRalf Baechle  */
11290e8cacdSRalf Baechle enum cop_op {
11390e8cacdSRalf Baechle 	mfc_op	      = 0x00, dmfc_op	    = 0x01,
114e2965cd0SSteven J. Hill 	cfc_op	      = 0x02, mfhc0_op	    = 0x02,
115e2965cd0SSteven J. Hill 	mfhc_op       = 0x03, mtc_op	    = 0x04,
116e2965cd0SSteven J. Hill 	dmtc_op	      = 0x05, ctc_op	    = 0x06,
117e2965cd0SSteven J. Hill 	mthc0_op      = 0x06, mthc_op	    = 0x07,
118c8a34581SMarkos Chandras 	bc_op	      = 0x08, bc1eqz_op     = 0x09,
119b2c59635SJames Hogan 	mfmc0_op      = 0x0b, bc1nez_op     = 0x0d,
120b2c59635SJames Hogan 	wrpgpr_op     = 0x0e, cop_op	    = 0x10,
12190e8cacdSRalf Baechle 	copm_op	      = 0x18
12290e8cacdSRalf Baechle };
12390e8cacdSRalf Baechle 
12490e8cacdSRalf Baechle /*
12590e8cacdSRalf Baechle  * rt field of cop.bc_op opcodes
12690e8cacdSRalf Baechle  */
12790e8cacdSRalf Baechle enum bcop_op {
12890e8cacdSRalf Baechle 	bcf_op, bct_op, bcfl_op, bctl_op
12990e8cacdSRalf Baechle };
13090e8cacdSRalf Baechle 
13190e8cacdSRalf Baechle /*
13290e8cacdSRalf Baechle  * func field of cop0 coi opcodes.
13390e8cacdSRalf Baechle  */
13490e8cacdSRalf Baechle enum cop0_coi_func {
13590e8cacdSRalf Baechle 	tlbr_op	      = 0x01, tlbwi_op	    = 0x02,
13690e8cacdSRalf Baechle 	tlbwr_op      = 0x06, tlbp_op	    = 0x08,
137b0a3eae2SPaul Burton 	rfe_op	      = 0x10, eret_op	    = 0x18,
138b0a3eae2SPaul Burton 	wait_op       = 0x20,
13990e8cacdSRalf Baechle };
14090e8cacdSRalf Baechle 
14190e8cacdSRalf Baechle /*
14290e8cacdSRalf Baechle  * func field of cop0 com opcodes.
14390e8cacdSRalf Baechle  */
14490e8cacdSRalf Baechle enum cop0_com_func {
14590e8cacdSRalf Baechle 	tlbr1_op      = 0x01, tlbw_op	    = 0x02,
14690e8cacdSRalf Baechle 	tlbp1_op      = 0x08, dctr_op	    = 0x09,
14790e8cacdSRalf Baechle 	dctw_op	      = 0x0a
14890e8cacdSRalf Baechle };
14990e8cacdSRalf Baechle 
15090e8cacdSRalf Baechle /*
15190e8cacdSRalf Baechle  * fmt field of cop1 opcodes.
15290e8cacdSRalf Baechle  */
15390e8cacdSRalf Baechle enum cop1_fmt {
15490e8cacdSRalf Baechle 	s_fmt, d_fmt, e_fmt, q_fmt,
15590e8cacdSRalf Baechle 	w_fmt, l_fmt
15690e8cacdSRalf Baechle };
15790e8cacdSRalf Baechle 
15890e8cacdSRalf Baechle /*
15990e8cacdSRalf Baechle  * func field of cop1 instructions using d, s or w format.
16090e8cacdSRalf Baechle  */
16190e8cacdSRalf Baechle enum cop1_sdw_func {
16290e8cacdSRalf Baechle 	fadd_op	     =	0x00, fsub_op	   =  0x01,
16390e8cacdSRalf Baechle 	fmul_op	     =	0x02, fdiv_op	   =  0x03,
16490e8cacdSRalf Baechle 	fsqrt_op     =	0x04, fabs_op	   =  0x05,
16590e8cacdSRalf Baechle 	fmov_op	     =	0x06, fneg_op	   =  0x07,
16690e8cacdSRalf Baechle 	froundl_op   =	0x08, ftruncl_op   =  0x09,
16790e8cacdSRalf Baechle 	fceill_op    =	0x0a, ffloorl_op   =  0x0b,
16890e8cacdSRalf Baechle 	fround_op    =	0x0c, ftrunc_op	   =  0x0d,
16990e8cacdSRalf Baechle 	fceil_op     =	0x0e, ffloor_op	   =  0x0f,
170*b6d5c4edSPaul Burton 	fsel_op      =  0x10,
17190e8cacdSRalf Baechle 	fmovc_op     =	0x11, fmovz_op	   =  0x12,
172107d3400SMarkos Chandras 	fmovn_op     =	0x13, fseleqz_op   =  0x14,
173107d3400SMarkos Chandras 	frecip_op    =  0x15, frsqrt_op    =  0x16,
174107d3400SMarkos Chandras 	fselnez_op   =  0x17, fmaddf_op    =  0x18,
175107d3400SMarkos Chandras 	fmsubf_op    =  0x19, frint_op     =  0x1a,
176107d3400SMarkos Chandras 	fclass_op    =  0x1b, fmin_op      =  0x1c,
177107d3400SMarkos Chandras 	fmina_op     =  0x1d, fmax_op      =  0x1e,
178107d3400SMarkos Chandras 	fmaxa_op     =  0x1f, fcvts_op     =  0x20,
17990e8cacdSRalf Baechle 	fcvtd_op     =	0x21, fcvte_op	   =  0x22,
18090e8cacdSRalf Baechle 	fcvtw_op     =	0x24, fcvtl_op	   =  0x25,
18190e8cacdSRalf Baechle 	fcmp_op	     =	0x30
18290e8cacdSRalf Baechle };
18390e8cacdSRalf Baechle 
18490e8cacdSRalf Baechle /*
18590e8cacdSRalf Baechle  * func field of cop1x opcodes (MIPS IV).
18690e8cacdSRalf Baechle  */
18790e8cacdSRalf Baechle enum cop1x_func {
18890e8cacdSRalf Baechle 	lwxc1_op     =	0x00, ldxc1_op	   =  0x01,
18951061b88SDeng-Cheng Zhu 	swxc1_op     =  0x08, sdxc1_op	   =  0x09,
19051061b88SDeng-Cheng Zhu 	pfetch_op    =	0x0f, madd_s_op	   =  0x20,
19190e8cacdSRalf Baechle 	madd_d_op    =	0x21, madd_e_op	   =  0x22,
19290e8cacdSRalf Baechle 	msub_s_op    =	0x28, msub_d_op	   =  0x29,
19390e8cacdSRalf Baechle 	msub_e_op    =	0x2a, nmadd_s_op   =  0x30,
19490e8cacdSRalf Baechle 	nmadd_d_op   =	0x31, nmadd_e_op   =  0x32,
19590e8cacdSRalf Baechle 	nmsub_s_op   =	0x38, nmsub_d_op   =  0x39,
19690e8cacdSRalf Baechle 	nmsub_e_op   =	0x3a
19790e8cacdSRalf Baechle };
19890e8cacdSRalf Baechle 
19990e8cacdSRalf Baechle /*
20090e8cacdSRalf Baechle  * func field for mad opcodes (MIPS IV).
20190e8cacdSRalf Baechle  */
20290e8cacdSRalf Baechle enum mad_func {
20390e8cacdSRalf Baechle 	madd_fp_op	= 0x08, msub_fp_op	= 0x0a,
20490e8cacdSRalf Baechle 	nmadd_fp_op	= 0x0c, nmsub_fp_op	= 0x0e
20590e8cacdSRalf Baechle };
20690e8cacdSRalf Baechle 
20790e8cacdSRalf Baechle /*
208380cd582SHuacai Chen  * func field for page table walker (Loongson-3).
209380cd582SHuacai Chen  */
210380cd582SHuacai Chen enum ptw_func {
211380cd582SHuacai Chen 	lwdir_op = 0x00,
212380cd582SHuacai Chen 	lwpte_op = 0x01,
213380cd582SHuacai Chen 	lddir_op = 0x02,
214380cd582SHuacai Chen 	ldpte_op = 0x03,
215380cd582SHuacai Chen };
216380cd582SHuacai Chen 
217380cd582SHuacai Chen /*
21890e8cacdSRalf Baechle  * func field for special3 lx opcodes (Cavium Octeon).
21990e8cacdSRalf Baechle  */
22090e8cacdSRalf Baechle enum lx_func {
22190e8cacdSRalf Baechle 	lwx_op	= 0x00,
22290e8cacdSRalf Baechle 	lhx_op	= 0x04,
22390e8cacdSRalf Baechle 	lbux_op = 0x06,
22490e8cacdSRalf Baechle 	ldx_op	= 0x08,
22590e8cacdSRalf Baechle 	lwux_op = 0x10,
22690e8cacdSRalf Baechle 	lhux_op = 0x14,
22790e8cacdSRalf Baechle 	lbx_op	= 0x16,
22890e8cacdSRalf Baechle };
22990e8cacdSRalf Baechle 
23090e8cacdSRalf Baechle /*
231ab9e4fa0SMarkos Chandras  * BSHFL opcodes
232ab9e4fa0SMarkos Chandras  */
233ab9e4fa0SMarkos Chandras enum bshfl_func {
234ab9e4fa0SMarkos Chandras 	wsbh_op = 0x2,
235ab9e4fa0SMarkos Chandras 	dshd_op = 0x5,
236ab9e4fa0SMarkos Chandras 	seb_op  = 0x10,
237ab9e4fa0SMarkos Chandras 	seh_op  = 0x18,
238ab9e4fa0SMarkos Chandras };
239ab9e4fa0SMarkos Chandras 
240ab9e4fa0SMarkos Chandras /*
2416701ca2dSLeonid Yegoshin  * func field for MSA MI10 format.
2426701ca2dSLeonid Yegoshin  */
2436701ca2dSLeonid Yegoshin enum msa_mi10_func {
2446701ca2dSLeonid Yegoshin 	msa_ld_op = 8,
2456701ca2dSLeonid Yegoshin 	msa_st_op = 9,
2466701ca2dSLeonid Yegoshin };
2476701ca2dSLeonid Yegoshin 
2486701ca2dSLeonid Yegoshin /*
2496701ca2dSLeonid Yegoshin  * MSA 2 bit format fields.
2506701ca2dSLeonid Yegoshin  */
2516701ca2dSLeonid Yegoshin enum msa_2b_fmt {
2526701ca2dSLeonid Yegoshin 	msa_fmt_b = 0,
2536701ca2dSLeonid Yegoshin 	msa_fmt_h = 1,
2546701ca2dSLeonid Yegoshin 	msa_fmt_w = 2,
2556701ca2dSLeonid Yegoshin 	msa_fmt_d = 3,
2566701ca2dSLeonid Yegoshin };
2576701ca2dSLeonid Yegoshin 
2586701ca2dSLeonid Yegoshin /*
2592aa9fd06SSteven J. Hill  * (microMIPS) Major opcodes.
2602aa9fd06SSteven J. Hill  */
2612aa9fd06SSteven J. Hill enum mm_major_op {
2622aa9fd06SSteven J. Hill 	mm_pool32a_op, mm_pool16a_op, mm_lbu16_op, mm_move16_op,
2632aa9fd06SSteven J. Hill 	mm_addi32_op, mm_lbu32_op, mm_sb32_op, mm_lb32_op,
2642aa9fd06SSteven J. Hill 	mm_pool32b_op, mm_pool16b_op, mm_lhu16_op, mm_andi16_op,
2652aa9fd06SSteven J. Hill 	mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op,
2662aa9fd06SSteven J. Hill 	mm_pool32i_op, mm_pool16c_op, mm_lwsp16_op, mm_pool16d_op,
2672aa9fd06SSteven J. Hill 	mm_ori32_op, mm_pool32f_op, mm_reserved1_op, mm_reserved2_op,
2682aa9fd06SSteven J. Hill 	mm_pool32c_op, mm_lwgp16_op, mm_lw16_op, mm_pool16e_op,
2692aa9fd06SSteven J. Hill 	mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op,
2702aa9fd06SSteven J. Hill 	mm_reserved4_op, mm_pool16f_op, mm_sb16_op, mm_beqz16_op,
2712aa9fd06SSteven J. Hill 	mm_slti32_op, mm_beq32_op, mm_swc132_op, mm_lwc132_op,
2722aa9fd06SSteven J. Hill 	mm_reserved5_op, mm_reserved6_op, mm_sh16_op, mm_bnez16_op,
2732aa9fd06SSteven J. Hill 	mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op,
2742aa9fd06SSteven J. Hill 	mm_reserved7_op, mm_reserved8_op, mm_swsp16_op, mm_b16_op,
2752aa9fd06SSteven J. Hill 	mm_andi32_op, mm_j32_op, mm_sd32_op, mm_ld32_op,
2762aa9fd06SSteven J. Hill 	mm_reserved11_op, mm_reserved12_op, mm_sw16_op, mm_li16_op,
2772aa9fd06SSteven J. Hill 	mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op,
2782aa9fd06SSteven J. Hill };
2792aa9fd06SSteven J. Hill 
2802aa9fd06SSteven J. Hill /*
2812aa9fd06SSteven J. Hill  * (microMIPS) POOL32I minor opcodes.
2822aa9fd06SSteven J. Hill  */
2832aa9fd06SSteven J. Hill enum mm_32i_minor_op {
2842aa9fd06SSteven J. Hill 	mm_bltz_op, mm_bltzal_op, mm_bgez_op, mm_bgezal_op,
2852aa9fd06SSteven J. Hill 	mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op,
2862aa9fd06SSteven J. Hill 	mm_tlti_op, mm_tgei_op, mm_tltiu_op, mm_tgeiu_op,
2872aa9fd06SSteven J. Hill 	mm_tnei_op, mm_lui_op, mm_teqi_op, mm_reserved13_op,
2882aa9fd06SSteven J. Hill 	mm_synci_op, mm_bltzals_op, mm_reserved14_op, mm_bgezals_op,
2892aa9fd06SSteven J. Hill 	mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op,
2902aa9fd06SSteven J. Hill 	mm_reserved17_op, mm_reserved18_op, mm_bposge64_op, mm_bposge32_op,
2912aa9fd06SSteven J. Hill 	mm_bc1f_op, mm_bc1t_op, mm_reserved19_op, mm_reserved20_op,
2922aa9fd06SSteven J. Hill 	mm_bc1any2f_op, mm_bc1any2t_op, mm_bc1any4f_op, mm_bc1any4t_op,
2932aa9fd06SSteven J. Hill };
2942aa9fd06SSteven J. Hill 
2952aa9fd06SSteven J. Hill /*
2962aa9fd06SSteven J. Hill  * (microMIPS) POOL32A minor opcodes.
2972aa9fd06SSteven J. Hill  */
2982aa9fd06SSteven J. Hill enum mm_32a_minor_op {
2992aa9fd06SSteven J. Hill 	mm_sll32_op = 0x000,
3002aa9fd06SSteven J. Hill 	mm_ins_op = 0x00c,
301bef581baSMarkos Chandras 	mm_sllv32_op = 0x010,
3022aa9fd06SSteven J. Hill 	mm_ext_op = 0x02c,
3032aa9fd06SSteven J. Hill 	mm_pool32axf_op = 0x03c,
3042aa9fd06SSteven J. Hill 	mm_srl32_op = 0x040,
3052aa9fd06SSteven J. Hill 	mm_sra_op = 0x080,
306f31318fdSMarkos Chandras 	mm_srlv32_op = 0x090,
3072aa9fd06SSteven J. Hill 	mm_rotr_op = 0x0c0,
3082aa9fd06SSteven J. Hill 	mm_lwxs_op = 0x118,
3092aa9fd06SSteven J. Hill 	mm_addu32_op = 0x150,
3102aa9fd06SSteven J. Hill 	mm_subu32_op = 0x1d0,
311ab9e4fa0SMarkos Chandras 	mm_wsbh_op = 0x1ec,
312a8e897adSMarkos Chandras 	mm_mul_op = 0x210,
3132aa9fd06SSteven J. Hill 	mm_and_op = 0x250,
3142aa9fd06SSteven J. Hill 	mm_or32_op = 0x290,
3152aa9fd06SSteven J. Hill 	mm_xor32_op = 0x310,
3167682f9e8SMarkos Chandras 	mm_slt_op = 0x350,
317e8ef868bSMarkos Chandras 	mm_sltu_op = 0x390,
3182aa9fd06SSteven J. Hill };
3192aa9fd06SSteven J. Hill 
3202aa9fd06SSteven J. Hill /*
3212aa9fd06SSteven J. Hill  * (microMIPS) POOL32B functions.
3222aa9fd06SSteven J. Hill  */
3232aa9fd06SSteven J. Hill enum mm_32b_func {
3242aa9fd06SSteven J. Hill 	mm_lwc2_func = 0x0,
3252aa9fd06SSteven J. Hill 	mm_lwp_func = 0x1,
3262aa9fd06SSteven J. Hill 	mm_ldc2_func = 0x2,
3272aa9fd06SSteven J. Hill 	mm_ldp_func = 0x4,
3282aa9fd06SSteven J. Hill 	mm_lwm32_func = 0x5,
3292aa9fd06SSteven J. Hill 	mm_cache_func = 0x6,
3302aa9fd06SSteven J. Hill 	mm_ldm_func = 0x7,
3312aa9fd06SSteven J. Hill 	mm_swc2_func = 0x8,
3322aa9fd06SSteven J. Hill 	mm_swp_func = 0x9,
3332aa9fd06SSteven J. Hill 	mm_sdc2_func = 0xa,
3342aa9fd06SSteven J. Hill 	mm_sdp_func = 0xc,
3352aa9fd06SSteven J. Hill 	mm_swm32_func = 0xd,
3362aa9fd06SSteven J. Hill 	mm_sdm_func = 0xf,
3372aa9fd06SSteven J. Hill };
3382aa9fd06SSteven J. Hill 
3392aa9fd06SSteven J. Hill /*
3402aa9fd06SSteven J. Hill  * (microMIPS) POOL32C functions.
3412aa9fd06SSteven J. Hill  */
3422aa9fd06SSteven J. Hill enum mm_32c_func {
3432aa9fd06SSteven J. Hill 	mm_pref_func = 0x2,
3442aa9fd06SSteven J. Hill 	mm_ll_func = 0x3,
3452aa9fd06SSteven J. Hill 	mm_swr_func = 0x9,
3462aa9fd06SSteven J. Hill 	mm_sc_func = 0xb,
3472aa9fd06SSteven J. Hill 	mm_lwu_func = 0xe,
3482aa9fd06SSteven J. Hill };
3492aa9fd06SSteven J. Hill 
3502aa9fd06SSteven J. Hill /*
3512aa9fd06SSteven J. Hill  * (microMIPS) POOL32AXF minor opcodes.
3522aa9fd06SSteven J. Hill  */
3532aa9fd06SSteven J. Hill enum mm_32axf_minor_op {
3542aa9fd06SSteven J. Hill 	mm_mfc0_op = 0x003,
3552aa9fd06SSteven J. Hill 	mm_mtc0_op = 0x00b,
3562aa9fd06SSteven J. Hill 	mm_tlbp_op = 0x00d,
357f3ec7a23SMarkos Chandras 	mm_mfhi32_op = 0x035,
3582aa9fd06SSteven J. Hill 	mm_jalr_op = 0x03c,
3592aa9fd06SSteven J. Hill 	mm_tlbr_op = 0x04d,
36016d21a81SMarkos Chandras 	mm_mflo32_op = 0x075,
3612aa9fd06SSteven J. Hill 	mm_jalrhb_op = 0x07c,
3622aa9fd06SSteven J. Hill 	mm_tlbwi_op = 0x08d,
3632aa9fd06SSteven J. Hill 	mm_tlbwr_op = 0x0cd,
3642aa9fd06SSteven J. Hill 	mm_jalrs_op = 0x13c,
3652aa9fd06SSteven J. Hill 	mm_jalrshb_op = 0x17c,
3667ed82ad1SPaul Burton 	mm_sync_op = 0x1ad,
3672aa9fd06SSteven J. Hill 	mm_syscall_op = 0x22d,
368f263839aSPaul Burton 	mm_wait_op = 0x24d,
3692aa9fd06SSteven J. Hill 	mm_eret_op = 0x3cd,
3704c12a854SMarkos Chandras 	mm_divu_op = 0x5dc,
3712aa9fd06SSteven J. Hill };
3722aa9fd06SSteven J. Hill 
3732aa9fd06SSteven J. Hill /*
3742aa9fd06SSteven J. Hill  * (microMIPS) POOL32F minor opcodes.
3752aa9fd06SSteven J. Hill  */
3762aa9fd06SSteven J. Hill enum mm_32f_minor_op {
3772aa9fd06SSteven J. Hill 	mm_32f_00_op = 0x00,
3782aa9fd06SSteven J. Hill 	mm_32f_01_op = 0x01,
3792aa9fd06SSteven J. Hill 	mm_32f_02_op = 0x02,
3802aa9fd06SSteven J. Hill 	mm_32f_10_op = 0x08,
3812aa9fd06SSteven J. Hill 	mm_32f_11_op = 0x09,
3822aa9fd06SSteven J. Hill 	mm_32f_12_op = 0x0a,
3832aa9fd06SSteven J. Hill 	mm_32f_20_op = 0x10,
3842aa9fd06SSteven J. Hill 	mm_32f_30_op = 0x18,
3852aa9fd06SSteven J. Hill 	mm_32f_40_op = 0x20,
3862aa9fd06SSteven J. Hill 	mm_32f_41_op = 0x21,
3872aa9fd06SSteven J. Hill 	mm_32f_42_op = 0x22,
3882aa9fd06SSteven J. Hill 	mm_32f_50_op = 0x28,
3892aa9fd06SSteven J. Hill 	mm_32f_51_op = 0x29,
3902aa9fd06SSteven J. Hill 	mm_32f_52_op = 0x2a,
3912aa9fd06SSteven J. Hill 	mm_32f_60_op = 0x30,
3922aa9fd06SSteven J. Hill 	mm_32f_70_op = 0x38,
3932aa9fd06SSteven J. Hill 	mm_32f_73_op = 0x3b,
3942aa9fd06SSteven J. Hill 	mm_32f_74_op = 0x3c,
3952aa9fd06SSteven J. Hill };
3962aa9fd06SSteven J. Hill 
3972aa9fd06SSteven J. Hill /*
3982aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
3992aa9fd06SSteven J. Hill  */
4002aa9fd06SSteven J. Hill enum mm_32f_10_minor_op {
4012aa9fd06SSteven J. Hill 	mm_lwxc1_op = 0x1,
4022aa9fd06SSteven J. Hill 	mm_swxc1_op,
4032aa9fd06SSteven J. Hill 	mm_ldxc1_op,
4042aa9fd06SSteven J. Hill 	mm_sdxc1_op,
4052aa9fd06SSteven J. Hill 	mm_luxc1_op,
4062aa9fd06SSteven J. Hill 	mm_suxc1_op,
4072aa9fd06SSteven J. Hill };
4082aa9fd06SSteven J. Hill 
4092aa9fd06SSteven J. Hill enum mm_32f_func {
4102aa9fd06SSteven J. Hill 	mm_lwxc1_func = 0x048,
4112aa9fd06SSteven J. Hill 	mm_swxc1_func = 0x088,
4122aa9fd06SSteven J. Hill 	mm_ldxc1_func = 0x0c8,
4132aa9fd06SSteven J. Hill 	mm_sdxc1_func = 0x108,
4142aa9fd06SSteven J. Hill };
4152aa9fd06SSteven J. Hill 
4162aa9fd06SSteven J. Hill /*
4172aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
4182aa9fd06SSteven J. Hill  */
4192aa9fd06SSteven J. Hill enum mm_32f_40_minor_op {
4202aa9fd06SSteven J. Hill 	mm_fmovf_op,
4212aa9fd06SSteven J. Hill 	mm_fmovt_op,
4222aa9fd06SSteven J. Hill };
4232aa9fd06SSteven J. Hill 
4242aa9fd06SSteven J. Hill /*
4252aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
4262aa9fd06SSteven J. Hill  */
4272aa9fd06SSteven J. Hill enum mm_32f_60_minor_op {
4282aa9fd06SSteven J. Hill 	mm_fadd_op,
4292aa9fd06SSteven J. Hill 	mm_fsub_op,
4302aa9fd06SSteven J. Hill 	mm_fmul_op,
4312aa9fd06SSteven J. Hill 	mm_fdiv_op,
4322aa9fd06SSteven J. Hill };
4332aa9fd06SSteven J. Hill 
4342aa9fd06SSteven J. Hill /*
4352aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
4362aa9fd06SSteven J. Hill  */
4372aa9fd06SSteven J. Hill enum mm_32f_70_minor_op {
4382aa9fd06SSteven J. Hill 	mm_fmovn_op,
4392aa9fd06SSteven J. Hill 	mm_fmovz_op,
4402aa9fd06SSteven J. Hill };
4412aa9fd06SSteven J. Hill 
4422aa9fd06SSteven J. Hill /*
4432aa9fd06SSteven J. Hill  * (microMIPS) POOL32FXF secondary minor opcodes for POOL32F.
4442aa9fd06SSteven J. Hill  */
4452aa9fd06SSteven J. Hill enum mm_32f_73_minor_op {
4462aa9fd06SSteven J. Hill 	mm_fmov0_op = 0x01,
4472aa9fd06SSteven J. Hill 	mm_fcvtl_op = 0x04,
4482aa9fd06SSteven J. Hill 	mm_movf0_op = 0x05,
4492aa9fd06SSteven J. Hill 	mm_frsqrt_op = 0x08,
4502aa9fd06SSteven J. Hill 	mm_ffloorl_op = 0x0c,
4512aa9fd06SSteven J. Hill 	mm_fabs0_op = 0x0d,
4522aa9fd06SSteven J. Hill 	mm_fcvtw_op = 0x24,
4532aa9fd06SSteven J. Hill 	mm_movt0_op = 0x25,
4542aa9fd06SSteven J. Hill 	mm_fsqrt_op = 0x28,
4552aa9fd06SSteven J. Hill 	mm_ffloorw_op = 0x2c,
4562aa9fd06SSteven J. Hill 	mm_fneg0_op = 0x2d,
4572aa9fd06SSteven J. Hill 	mm_cfc1_op = 0x40,
4582aa9fd06SSteven J. Hill 	mm_frecip_op = 0x48,
4592aa9fd06SSteven J. Hill 	mm_fceill_op = 0x4c,
4602aa9fd06SSteven J. Hill 	mm_fcvtd0_op = 0x4d,
4612aa9fd06SSteven J. Hill 	mm_ctc1_op = 0x60,
4622aa9fd06SSteven J. Hill 	mm_fceilw_op = 0x6c,
4632aa9fd06SSteven J. Hill 	mm_fcvts0_op = 0x6d,
4642aa9fd06SSteven J. Hill 	mm_mfc1_op = 0x80,
4652aa9fd06SSteven J. Hill 	mm_fmov1_op = 0x81,
4662aa9fd06SSteven J. Hill 	mm_movf1_op = 0x85,
4672aa9fd06SSteven J. Hill 	mm_ftruncl_op = 0x8c,
4682aa9fd06SSteven J. Hill 	mm_fabs1_op = 0x8d,
4692aa9fd06SSteven J. Hill 	mm_mtc1_op = 0xa0,
4702aa9fd06SSteven J. Hill 	mm_movt1_op = 0xa5,
4712aa9fd06SSteven J. Hill 	mm_ftruncw_op = 0xac,
4722aa9fd06SSteven J. Hill 	mm_fneg1_op = 0xad,
4739355e59cSSteven J. Hill 	mm_mfhc1_op = 0xc0,
4742aa9fd06SSteven J. Hill 	mm_froundl_op = 0xcc,
4752aa9fd06SSteven J. Hill 	mm_fcvtd1_op = 0xcd,
4769355e59cSSteven J. Hill 	mm_mthc1_op = 0xe0,
4772aa9fd06SSteven J. Hill 	mm_froundw_op = 0xec,
4782aa9fd06SSteven J. Hill 	mm_fcvts1_op = 0xed,
4792aa9fd06SSteven J. Hill };
4802aa9fd06SSteven J. Hill 
4812aa9fd06SSteven J. Hill /*
4822aa9fd06SSteven J. Hill  * (microMIPS) POOL16C minor opcodes.
4832aa9fd06SSteven J. Hill  */
4842aa9fd06SSteven J. Hill enum mm_16c_minor_op {
4852aa9fd06SSteven J. Hill 	mm_lwm16_op = 0x04,
4862aa9fd06SSteven J. Hill 	mm_swm16_op = 0x05,
487dfb033f0STony Wu 	mm_jr16_op = 0x0c,
488dfb033f0STony Wu 	mm_jrc_op = 0x0d,
489dfb033f0STony Wu 	mm_jalr16_op = 0x0e,
490dfb033f0STony Wu 	mm_jalrs16_op = 0x0f,
491dfb033f0STony Wu 	mm_jraddiusp_op = 0x18,
4922aa9fd06SSteven J. Hill };
4932aa9fd06SSteven J. Hill 
4942aa9fd06SSteven J. Hill /*
4952aa9fd06SSteven J. Hill  * (microMIPS) POOL16D minor opcodes.
4962aa9fd06SSteven J. Hill  */
4972aa9fd06SSteven J. Hill enum mm_16d_minor_op {
4982aa9fd06SSteven J. Hill 	mm_addius5_func,
4992aa9fd06SSteven J. Hill 	mm_addiusp_func,
5002aa9fd06SSteven J. Hill };
5012aa9fd06SSteven J. Hill 
5022aa9fd06SSteven J. Hill /*
503cd574704SSteven J. Hill  * (MIPS16e) opcodes.
504cd574704SSteven J. Hill  */
505cd574704SSteven J. Hill enum MIPS16e_ops {
506cd574704SSteven J. Hill 	MIPS16e_jal_op = 003,
507cd574704SSteven J. Hill 	MIPS16e_ld_op = 007,
508cd574704SSteven J. Hill 	MIPS16e_i8_op = 014,
509cd574704SSteven J. Hill 	MIPS16e_sd_op = 017,
510cd574704SSteven J. Hill 	MIPS16e_lb_op = 020,
511cd574704SSteven J. Hill 	MIPS16e_lh_op = 021,
512cd574704SSteven J. Hill 	MIPS16e_lwsp_op = 022,
513cd574704SSteven J. Hill 	MIPS16e_lw_op = 023,
514cd574704SSteven J. Hill 	MIPS16e_lbu_op = 024,
515cd574704SSteven J. Hill 	MIPS16e_lhu_op = 025,
516cd574704SSteven J. Hill 	MIPS16e_lwpc_op = 026,
517cd574704SSteven J. Hill 	MIPS16e_lwu_op = 027,
518cd574704SSteven J. Hill 	MIPS16e_sb_op = 030,
519cd574704SSteven J. Hill 	MIPS16e_sh_op = 031,
520cd574704SSteven J. Hill 	MIPS16e_swsp_op = 032,
521cd574704SSteven J. Hill 	MIPS16e_sw_op = 033,
522cd574704SSteven J. Hill 	MIPS16e_rr_op = 035,
523cd574704SSteven J. Hill 	MIPS16e_extend_op = 036,
524cd574704SSteven J. Hill 	MIPS16e_i64_op = 037,
525cd574704SSteven J. Hill };
526cd574704SSteven J. Hill 
527cd574704SSteven J. Hill enum MIPS16e_i64_func {
528cd574704SSteven J. Hill 	MIPS16e_ldsp_func,
529cd574704SSteven J. Hill 	MIPS16e_sdsp_func,
530cd574704SSteven J. Hill 	MIPS16e_sdrasp_func,
531cd574704SSteven J. Hill 	MIPS16e_dadjsp_func,
532cd574704SSteven J. Hill 	MIPS16e_ldpc_func,
533cd574704SSteven J. Hill };
534cd574704SSteven J. Hill 
535cd574704SSteven J. Hill enum MIPS16e_rr_func {
536cd574704SSteven J. Hill 	MIPS16e_jr_func,
537cd574704SSteven J. Hill };
538cd574704SSteven J. Hill 
539cd574704SSteven J. Hill enum MIPS6e_i8_func {
540cd574704SSteven J. Hill 	MIPS16e_swrasp_func = 02,
541cd574704SSteven J. Hill };
542cd574704SSteven J. Hill 
543cd574704SSteven J. Hill /*
54429e28003SMaciej W. Rozycki  * (microMIPS) NOP instruction.
545102cedc3SLeonid Yegoshin  */
546102cedc3SLeonid Yegoshin #define MM_NOP16	0x0c00
547102cedc3SLeonid Yegoshin 
54885dfaf08SRalf Baechle struct j_format {
5498471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
5508471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int target : 26,
55185dfaf08SRalf Baechle 	;))
55285dfaf08SRalf Baechle };
55385dfaf08SRalf Baechle 
55485dfaf08SRalf Baechle struct i_format {			/* signed immediate format */
5558471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5568471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5578471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5588471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 16,
55985dfaf08SRalf Baechle 	;))))
56085dfaf08SRalf Baechle };
56185dfaf08SRalf Baechle 
56285dfaf08SRalf Baechle struct u_format {			/* unsigned immediate format */
5638471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5648471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5658471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5668471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int uimmediate : 16,
56785dfaf08SRalf Baechle 	;))))
56885dfaf08SRalf Baechle };
56985dfaf08SRalf Baechle 
57085dfaf08SRalf Baechle struct c_format {			/* Cache (>= R6000) format */
5718471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5728471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5738471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int c_op : 3,
5748471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cache : 2,
5758471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int simmediate : 16,
57685dfaf08SRalf Baechle 	;)))))
57785dfaf08SRalf Baechle };
57885dfaf08SRalf Baechle 
57985dfaf08SRalf Baechle struct r_format {			/* Register format */
5808471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5818471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5828471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5838471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
5848471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int re : 5,
5858471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
58685dfaf08SRalf Baechle 	;))))))
58785dfaf08SRalf Baechle };
58885dfaf08SRalf Baechle 
58985dfaf08SRalf Baechle struct p_format {		/* Performance counter format (R10000) */
5908471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5918471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5928471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5938471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
5948471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int re : 5,
5958471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
59685dfaf08SRalf Baechle 	;))))))
59785dfaf08SRalf Baechle };
59885dfaf08SRalf Baechle 
59985dfaf08SRalf Baechle struct f_format {			/* FPU register format */
6008471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6018471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 1,
6028471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 4,
6038471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
6048471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
6058471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int re : 5,
6068471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
60785dfaf08SRalf Baechle 	;)))))))
60885dfaf08SRalf Baechle };
60985dfaf08SRalf Baechle 
61085dfaf08SRalf Baechle struct ma_format {		/* FPU multiply and add format (MIPS IV) */
6118471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6128471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fr : 5,
6138471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
6148471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6158471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6168471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 4,
6178471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 2,
61885dfaf08SRalf Baechle 	;)))))))
61985dfaf08SRalf Baechle };
62085dfaf08SRalf Baechle 
62185dfaf08SRalf Baechle struct b_format {			/* BREAK and SYSCALL */
6228471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6238471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int code : 20,
6248471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
62585dfaf08SRalf Baechle 	;)))
62685dfaf08SRalf Baechle };
62785dfaf08SRalf Baechle 
6288fba1e58SRalf Baechle struct ps_format {			/* MIPS-3D / paired single format */
6298471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6308471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
6318471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
6328471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6338471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6348471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6358fba1e58SRalf Baechle 	;))))))
6368fba1e58SRalf Baechle };
6378fba1e58SRalf Baechle 
6388fba1e58SRalf Baechle struct v_format {				/* MDMX vector format */
6398471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6408471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int sel : 4,
6418471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 1,
6428471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int vt : 5,
6438471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int vs : 5,
6448471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int vd : 5,
6458471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6468fba1e58SRalf Baechle 	;)))))))
6478fba1e58SRalf Baechle };
6488fba1e58SRalf Baechle 
6496701ca2dSLeonid Yegoshin struct msa_mi10_format {		/* MSA MI10 */
6506701ca2dSLeonid Yegoshin 	__BITFIELD_FIELD(unsigned int opcode : 6,
6516701ca2dSLeonid Yegoshin 	__BITFIELD_FIELD(signed int s10 : 10,
6526701ca2dSLeonid Yegoshin 	__BITFIELD_FIELD(unsigned int rs : 5,
6536701ca2dSLeonid Yegoshin 	__BITFIELD_FIELD(unsigned int wd : 5,
6546701ca2dSLeonid Yegoshin 	__BITFIELD_FIELD(unsigned int func : 4,
6556701ca2dSLeonid Yegoshin 	__BITFIELD_FIELD(unsigned int df : 2,
6566701ca2dSLeonid Yegoshin 	;))))))
6576701ca2dSLeonid Yegoshin };
6586701ca2dSLeonid Yegoshin 
659aa1af47fSLeonid Yegoshin struct spec3_format {   /* SPEC3 */
6608471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode:6,
6618471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs:5,
6628471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt:5,
6638471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate:9,
6648471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func:7,
665aa1af47fSLeonid Yegoshin 	;)))))
666aa1af47fSLeonid Yegoshin };
667aa1af47fSLeonid Yegoshin 
6682aa9fd06SSteven J. Hill /*
6692aa9fd06SSteven J. Hill  * microMIPS instruction formats (32-bit length)
6702aa9fd06SSteven J. Hill  *
6712aa9fd06SSteven J. Hill  * NOTE:
6722aa9fd06SSteven J. Hill  *	Parenthesis denote whether the format is a microMIPS instruction or
6732aa9fd06SSteven J. Hill  *	if it is MIPS32 instruction re-encoded for use in the microMIPS ASE.
6742aa9fd06SSteven J. Hill  */
6752aa9fd06SSteven J. Hill struct fb_format {		/* FPU branch format (MIPS32) */
6768471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6778471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int bc : 5,
6788471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cc : 3,
6798471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int flag : 2,
6808471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 16,
6812aa9fd06SSteven J. Hill 	;)))))
6822aa9fd06SSteven J. Hill };
6832aa9fd06SSteven J. Hill 
6842aa9fd06SSteven J. Hill struct fp0_format {		/* FPU multiply and add format (MIPS32) */
6858471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6868471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 5,
6878471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
6888471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6898471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6908471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6912aa9fd06SSteven J. Hill 	;))))))
6922aa9fd06SSteven J. Hill };
6932aa9fd06SSteven J. Hill 
69429e28003SMaciej W. Rozycki struct mm_fp0_format {		/* FPU multiply and add format (microMIPS) */
6958471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6968471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
6978471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6988471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6998471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 3,
7008471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 2,
7018471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7022aa9fd06SSteven J. Hill 	;)))))))
7032aa9fd06SSteven J. Hill };
7042aa9fd06SSteven J. Hill 
7052aa9fd06SSteven J. Hill struct fp1_format {		/* FPU mfc1 and cfc1 format (MIPS32) */
7068471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7078471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 5,
7088471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
7098471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7108471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7118471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7122aa9fd06SSteven J. Hill 	;))))))
7132aa9fd06SSteven J. Hill };
7142aa9fd06SSteven J. Hill 
7152aa9fd06SSteven J. Hill struct mm_fp1_format {		/* FPU mfc1 and cfc1 format (microMIPS) */
7168471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7178471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
7188471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7198471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 2,
7208471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 8,
7218471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7222aa9fd06SSteven J. Hill 	;))))))
7232aa9fd06SSteven J. Hill };
7242aa9fd06SSteven J. Hill 
7252aa9fd06SSteven J. Hill struct mm_fp2_format {		/* FPU movt and movf format (microMIPS) */
7268471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7278471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7288471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7298471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cc : 3,
7308471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int zero : 2,
7318471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 2,
7328471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 3,
7338471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7342aa9fd06SSteven J. Hill 	;))))))))
7352aa9fd06SSteven J. Hill };
7362aa9fd06SSteven J. Hill 
7372aa9fd06SSteven J. Hill struct mm_fp3_format {		/* FPU abs and neg format (microMIPS) */
7388471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7398471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
7408471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7418471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 3,
7428471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 7,
7438471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7442aa9fd06SSteven J. Hill 	;))))))
7452aa9fd06SSteven J. Hill };
7462aa9fd06SSteven J. Hill 
7472aa9fd06SSteven J. Hill struct mm_fp4_format {		/* FPU c.cond format (microMIPS) */
7488471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7498471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
7508471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7518471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cc : 3,
7528471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 3,
7538471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cond : 4,
7548471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7552aa9fd06SSteven J. Hill 	;)))))))
7562aa9fd06SSteven J. Hill };
7572aa9fd06SSteven J. Hill 
7582aa9fd06SSteven J. Hill struct mm_fp5_format {		/* FPU lwxc1 and swxc1 format (microMIPS) */
7598471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7608471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int index : 5,
7618471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 5,
7628471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7638471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 5,
7648471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7652aa9fd06SSteven J. Hill 	;))))))
7662aa9fd06SSteven J. Hill };
7672aa9fd06SSteven J. Hill 
7682aa9fd06SSteven J. Hill struct fp6_format {		/* FPU madd and msub format (MIPS IV) */
7698471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7708471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fr : 5,
7718471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
7728471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7738471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7748471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7752aa9fd06SSteven J. Hill 	;))))))
7762aa9fd06SSteven J. Hill };
7772aa9fd06SSteven J. Hill 
7782aa9fd06SSteven J. Hill struct mm_fp6_format {		/* FPU madd and msub format (microMIPS) */
7798471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7808471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
7818471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7828471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7838471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fr : 5,
7848471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7852aa9fd06SSteven J. Hill 	;))))))
7862aa9fd06SSteven J. Hill };
7872aa9fd06SSteven J. Hill 
7882aa9fd06SSteven J. Hill struct mm_i_format {		/* Immediate format (microMIPS) */
7898471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7908471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
7918471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
7928471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 16,
7932aa9fd06SSteven J. Hill 	;))))
7942aa9fd06SSteven J. Hill };
7952aa9fd06SSteven J. Hill 
7962aa9fd06SSteven J. Hill struct mm_m_format {		/* Multi-word load/store format (microMIPS) */
7978471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7988471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
7998471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 5,
8008471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 4,
8018471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 12,
8022aa9fd06SSteven J. Hill 	;)))))
8032aa9fd06SSteven J. Hill };
8042aa9fd06SSteven J. Hill 
8052aa9fd06SSteven J. Hill struct mm_x_format {		/* Scaled indexed load format (microMIPS) */
8068471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8078471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int index : 5,
8088471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 5,
8098471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
8108471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 11,
8112aa9fd06SSteven J. Hill 	;)))))
8122aa9fd06SSteven J. Hill };
8132aa9fd06SSteven J. Hill 
81469a1e6cbSMaciej W. Rozycki struct mm_a_format {		/* ADDIUPC format (microMIPS) */
81569a1e6cbSMaciej W. Rozycki 	__BITFIELD_FIELD(unsigned int opcode : 6,
81669a1e6cbSMaciej W. Rozycki 	__BITFIELD_FIELD(unsigned int rs : 3,
81769a1e6cbSMaciej W. Rozycki 	__BITFIELD_FIELD(signed int simmediate : 23,
81869a1e6cbSMaciej W. Rozycki 	;)))
81969a1e6cbSMaciej W. Rozycki };
82069a1e6cbSMaciej W. Rozycki 
8212aa9fd06SSteven J. Hill /*
8222aa9fd06SSteven J. Hill  * microMIPS instruction formats (16-bit length)
8232aa9fd06SSteven J. Hill  */
8242aa9fd06SSteven J. Hill struct mm_b0_format {		/* Unconditional branch format (microMIPS) */
8258471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8268471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 10,
8278471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8282aa9fd06SSteven J. Hill 	;)))
8292aa9fd06SSteven J. Hill };
8302aa9fd06SSteven J. Hill 
8312aa9fd06SSteven J. Hill struct mm_b1_format {		/* Conditional branch format (microMIPS) */
8328471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8338471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 3,
8348471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 7,
8358471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8362aa9fd06SSteven J. Hill 	;))))
8372aa9fd06SSteven J. Hill };
8382aa9fd06SSteven J. Hill 
8392aa9fd06SSteven J. Hill struct mm16_m_format {		/* Multi-word load/store format */
8408471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8418471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 4,
8428471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rlist : 2,
8438471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 4,
8448471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8452aa9fd06SSteven J. Hill 	;)))))
8462aa9fd06SSteven J. Hill };
8472aa9fd06SSteven J. Hill 
8482aa9fd06SSteven J. Hill struct mm16_rb_format {		/* Signed immediate format */
8498471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8508471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 3,
8518471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 3,
8528471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 4,
8538471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8542aa9fd06SSteven J. Hill 	;)))))
8552aa9fd06SSteven J. Hill };
8562aa9fd06SSteven J. Hill 
8572aa9fd06SSteven J. Hill struct mm16_r3_format {		/* Load from global pointer format */
8588471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8598471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 3,
8608471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 7,
8618471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8622aa9fd06SSteven J. Hill 	;))))
8632aa9fd06SSteven J. Hill };
8642aa9fd06SSteven J. Hill 
8652aa9fd06SSteven J. Hill struct mm16_r5_format {		/* Load/store from stack pointer format */
8668471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8678471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
8688471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 5,
8698471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8702aa9fd06SSteven J. Hill 	;))))
8712aa9fd06SSteven J. Hill };
8722aa9fd06SSteven J. Hill 
873cd574704SSteven J. Hill /*
874cd574704SSteven J. Hill  * MIPS16e instruction formats (16-bit length)
875cd574704SSteven J. Hill  */
876cd574704SSteven J. Hill struct m16e_rr {
8778471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8788471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rx : 3,
8798471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int nd : 1,
8808471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int l : 1,
8818471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ra : 1,
8828471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 5,
883cd574704SSteven J. Hill 	;))))))
884cd574704SSteven J. Hill };
885cd574704SSteven J. Hill 
886cd574704SSteven J. Hill struct m16e_jal {
8878471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8888471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int x : 1,
8898471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm20_16 : 5,
8908471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int imm25_21 : 5,
891cd574704SSteven J. Hill 	;))))
892cd574704SSteven J. Hill };
893cd574704SSteven J. Hill 
894cd574704SSteven J. Hill struct m16e_i64 {
8958471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8968471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 3,
8978471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 8,
898cd574704SSteven J. Hill 	;)))
899cd574704SSteven J. Hill };
900cd574704SSteven J. Hill 
901cd574704SSteven J. Hill struct m16e_ri64 {
9028471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
9038471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 3,
9048471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ry : 3,
9058471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 5,
906cd574704SSteven J. Hill 	;))))
907cd574704SSteven J. Hill };
908cd574704SSteven J. Hill 
909cd574704SSteven J. Hill struct m16e_ri {
9108471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
9118471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rx : 3,
9128471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 8,
913cd574704SSteven J. Hill 	;)))
914cd574704SSteven J. Hill };
915cd574704SSteven J. Hill 
916cd574704SSteven J. Hill struct m16e_rri {
9178471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
9188471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rx : 3,
9198471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ry : 3,
9208471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 5,
921cd574704SSteven J. Hill 	;))))
922cd574704SSteven J. Hill };
923cd574704SSteven J. Hill 
924cd574704SSteven J. Hill struct m16e_i8 {
9258471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
9268471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 3,
9278471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 8,
928cd574704SSteven J. Hill 	;)))
929cd574704SSteven J. Hill };
930cd574704SSteven J. Hill 
93190e8cacdSRalf Baechle union mips_instruction {
93290e8cacdSRalf Baechle 	unsigned int word;
93390e8cacdSRalf Baechle 	unsigned short halfword[2];
93490e8cacdSRalf Baechle 	unsigned char byte[4];
93590e8cacdSRalf Baechle 	struct j_format j_format;
93690e8cacdSRalf Baechle 	struct i_format i_format;
93790e8cacdSRalf Baechle 	struct u_format u_format;
93890e8cacdSRalf Baechle 	struct c_format c_format;
93990e8cacdSRalf Baechle 	struct r_format r_format;
94090e8cacdSRalf Baechle 	struct p_format p_format;
94190e8cacdSRalf Baechle 	struct f_format f_format;
94290e8cacdSRalf Baechle 	struct ma_format ma_format;
9436701ca2dSLeonid Yegoshin 	struct msa_mi10_format msa_mi10_format;
94490e8cacdSRalf Baechle 	struct b_format b_format;
9458fba1e58SRalf Baechle 	struct ps_format ps_format;
9468fba1e58SRalf Baechle 	struct v_format v_format;
947aa1af47fSLeonid Yegoshin 	struct spec3_format spec3_format;
9482aa9fd06SSteven J. Hill 	struct fb_format fb_format;
9492aa9fd06SSteven J. Hill 	struct fp0_format fp0_format;
9502aa9fd06SSteven J. Hill 	struct mm_fp0_format mm_fp0_format;
9512aa9fd06SSteven J. Hill 	struct fp1_format fp1_format;
9522aa9fd06SSteven J. Hill 	struct mm_fp1_format mm_fp1_format;
9532aa9fd06SSteven J. Hill 	struct mm_fp2_format mm_fp2_format;
9542aa9fd06SSteven J. Hill 	struct mm_fp3_format mm_fp3_format;
9552aa9fd06SSteven J. Hill 	struct mm_fp4_format mm_fp4_format;
9562aa9fd06SSteven J. Hill 	struct mm_fp5_format mm_fp5_format;
9572aa9fd06SSteven J. Hill 	struct fp6_format fp6_format;
9582aa9fd06SSteven J. Hill 	struct mm_fp6_format mm_fp6_format;
9592aa9fd06SSteven J. Hill 	struct mm_i_format mm_i_format;
9602aa9fd06SSteven J. Hill 	struct mm_m_format mm_m_format;
9612aa9fd06SSteven J. Hill 	struct mm_x_format mm_x_format;
96269a1e6cbSMaciej W. Rozycki 	struct mm_a_format mm_a_format;
9632aa9fd06SSteven J. Hill 	struct mm_b0_format mm_b0_format;
9642aa9fd06SSteven J. Hill 	struct mm_b1_format mm_b1_format;
9652aa9fd06SSteven J. Hill 	struct mm16_m_format mm16_m_format ;
9662aa9fd06SSteven J. Hill 	struct mm16_rb_format mm16_rb_format;
9672aa9fd06SSteven J. Hill 	struct mm16_r3_format mm16_r3_format;
9682aa9fd06SSteven J. Hill 	struct mm16_r5_format mm16_r5_format;
96990e8cacdSRalf Baechle };
97090e8cacdSRalf Baechle 
971cd574704SSteven J. Hill union mips16e_instruction {
972cd574704SSteven J. Hill 	unsigned int full : 16;
973cd574704SSteven J. Hill 	struct m16e_rr rr;
974cd574704SSteven J. Hill 	struct m16e_jal jal;
975cd574704SSteven J. Hill 	struct m16e_i64 i64;
976cd574704SSteven J. Hill 	struct m16e_ri64 ri64;
977cd574704SSteven J. Hill 	struct m16e_ri ri;
978cd574704SSteven J. Hill 	struct m16e_rri rri;
979cd574704SSteven J. Hill 	struct m16e_i8 i8;
980cd574704SSteven J. Hill };
981cd574704SSteven J. Hill 
98290e8cacdSRalf Baechle #endif /* _UAPI_ASM_INST_H */
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