xref: /openbmc/linux/arch/mips/include/uapi/asm/inst.h (revision a8e897ad00d3cfd0ab9029978f0c3f8ecd6fba61) 
190e8cacdSRalf Baechle /*
290e8cacdSRalf Baechle  * Format of an instruction in memory.
390e8cacdSRalf Baechle  *
490e8cacdSRalf Baechle  * This file is subject to the terms and conditions of the GNU General Public
590e8cacdSRalf Baechle  * License.  See the file "COPYING" in the main directory of this archive
690e8cacdSRalf Baechle  * for more details.
790e8cacdSRalf Baechle  *
890e8cacdSRalf Baechle  * Copyright (C) 1996, 2000 by Ralf Baechle
990e8cacdSRalf Baechle  * Copyright (C) 2006 by Thiemo Seufer
102aa9fd06SSteven J. Hill  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
11aa1af47fSLeonid Yegoshin  * Copyright (C) 2014 Imagination Technologies Ltd.
1290e8cacdSRalf Baechle  */
1390e8cacdSRalf Baechle #ifndef _UAPI_ASM_INST_H
1490e8cacdSRalf Baechle #define _UAPI_ASM_INST_H
1590e8cacdSRalf Baechle 
1664a17a0fSRalf Baechle #include <asm/bitfield.h>
1764a17a0fSRalf Baechle 
1890e8cacdSRalf Baechle /*
1990e8cacdSRalf Baechle  * Major opcodes; before MIPS IV cop1x was called cop3.
2090e8cacdSRalf Baechle  */
2190e8cacdSRalf Baechle enum major_op {
2290e8cacdSRalf Baechle 	spec_op, bcond_op, j_op, jal_op,
2390e8cacdSRalf Baechle 	beq_op, bne_op, blez_op, bgtz_op,
2490e8cacdSRalf Baechle 	addi_op, addiu_op, slti_op, sltiu_op,
2590e8cacdSRalf Baechle 	andi_op, ori_op, xori_op, lui_op,
2690e8cacdSRalf Baechle 	cop0_op, cop1_op, cop2_op, cop1x_op,
2790e8cacdSRalf Baechle 	beql_op, bnel_op, blezl_op, bgtzl_op,
2890e8cacdSRalf Baechle 	daddi_op, daddiu_op, ldl_op, ldr_op,
2990e8cacdSRalf Baechle 	spec2_op, jalx_op, mdmx_op, spec3_op,
3090e8cacdSRalf Baechle 	lb_op, lh_op, lwl_op, lw_op,
3190e8cacdSRalf Baechle 	lbu_op, lhu_op, lwr_op, lwu_op,
3290e8cacdSRalf Baechle 	sb_op, sh_op, swl_op, sw_op,
3390e8cacdSRalf Baechle 	sdl_op, sdr_op, swr_op, cache_op,
3490e8cacdSRalf Baechle 	ll_op, lwc1_op, lwc2_op, pref_op,
3590e8cacdSRalf Baechle 	lld_op, ldc1_op, ldc2_op, ld_op,
3690e8cacdSRalf Baechle 	sc_op, swc1_op, swc2_op, major_3b_op,
3790e8cacdSRalf Baechle 	scd_op, sdc1_op, sdc2_op, sd_op
3890e8cacdSRalf Baechle };
3990e8cacdSRalf Baechle 
4090e8cacdSRalf Baechle /*
4190e8cacdSRalf Baechle  * func field of spec opcode.
4290e8cacdSRalf Baechle  */
4390e8cacdSRalf Baechle enum spec_op {
4490e8cacdSRalf Baechle 	sll_op, movc_op, srl_op, sra_op,
4590e8cacdSRalf Baechle 	sllv_op, pmon_op, srlv_op, srav_op,
4690e8cacdSRalf Baechle 	jr_op, jalr_op, movz_op, movn_op,
4790e8cacdSRalf Baechle 	syscall_op, break_op, spim_op, sync_op,
4890e8cacdSRalf Baechle 	mfhi_op, mthi_op, mflo_op, mtlo_op,
4990e8cacdSRalf Baechle 	dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op,
5090e8cacdSRalf Baechle 	mult_op, multu_op, div_op, divu_op,
5190e8cacdSRalf Baechle 	dmult_op, dmultu_op, ddiv_op, ddivu_op,
5290e8cacdSRalf Baechle 	add_op, addu_op, sub_op, subu_op,
5390e8cacdSRalf Baechle 	and_op, or_op, xor_op, nor_op,
5490e8cacdSRalf Baechle 	spec3_unused_op, spec4_unused_op, slt_op, sltu_op,
5590e8cacdSRalf Baechle 	dadd_op, daddu_op, dsub_op, dsubu_op,
5690e8cacdSRalf Baechle 	tge_op, tgeu_op, tlt_op, tltu_op,
5790e8cacdSRalf Baechle 	teq_op, spec5_unused_op, tne_op, spec6_unused_op,
5890e8cacdSRalf Baechle 	dsll_op, spec7_unused_op, dsrl_op, dsra_op,
5990e8cacdSRalf Baechle 	dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op
6090e8cacdSRalf Baechle };
6190e8cacdSRalf Baechle 
6290e8cacdSRalf Baechle /*
6390e8cacdSRalf Baechle  * func field of spec2 opcode.
6490e8cacdSRalf Baechle  */
6590e8cacdSRalf Baechle enum spec2_op {
6690e8cacdSRalf Baechle 	madd_op, maddu_op, mul_op, spec2_3_unused_op,
6790e8cacdSRalf Baechle 	msub_op, msubu_op, /* more unused ops */
6890e8cacdSRalf Baechle 	clz_op = 0x20, clo_op,
6990e8cacdSRalf Baechle 	dclz_op = 0x24, dclo_op,
7090e8cacdSRalf Baechle 	sdbpp_op = 0x3f
7190e8cacdSRalf Baechle };
7290e8cacdSRalf Baechle 
7390e8cacdSRalf Baechle /*
7490e8cacdSRalf Baechle  * func field of spec3 opcode.
7590e8cacdSRalf Baechle  */
7690e8cacdSRalf Baechle enum spec3_op {
7790e8cacdSRalf Baechle 	ext_op, dextm_op, dextu_op, dext_op,
7890e8cacdSRalf Baechle 	ins_op, dinsm_op, dinsu_op, dins_op,
796f5bb424SPaul Burton 	yield_op  = 0x09, lx_op     = 0x0a,
806f5bb424SPaul Burton 	lwle_op   = 0x19, lwre_op   = 0x1a,
816f5bb424SPaul Burton 	cachee_op = 0x1b, sbe_op    = 0x1c,
826f5bb424SPaul Burton 	she_op    = 0x1d, sce_op    = 0x1e,
836f5bb424SPaul Burton 	swe_op    = 0x1f, bshfl_op  = 0x20,
846f5bb424SPaul Burton 	swle_op   = 0x21, swre_op   = 0x22,
856f5bb424SPaul Burton 	prefe_op  = 0x23, dbshfl_op = 0x24,
866f5bb424SPaul Burton 	lbue_op   = 0x28, lhue_op   = 0x29,
876f5bb424SPaul Burton 	lbe_op    = 0x2c, lhe_op    = 0x2d,
886f5bb424SPaul Burton 	lle_op    = 0x2e, lwe_op    = 0x2f,
896f5bb424SPaul Burton 	rdhwr_op  = 0x3b
9090e8cacdSRalf Baechle };
9190e8cacdSRalf Baechle 
9290e8cacdSRalf Baechle /*
9390e8cacdSRalf Baechle  * rt field of bcond opcodes.
9490e8cacdSRalf Baechle  */
9590e8cacdSRalf Baechle enum rt_op {
9690e8cacdSRalf Baechle 	bltz_op, bgez_op, bltzl_op, bgezl_op,
9790e8cacdSRalf Baechle 	spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
9890e8cacdSRalf Baechle 	tgei_op, tgeiu_op, tlti_op, tltiu_op,
9990e8cacdSRalf Baechle 	teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
10090e8cacdSRalf Baechle 	bltzal_op, bgezal_op, bltzall_op, bgezall_op,
10190e8cacdSRalf Baechle 	rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17,
10290e8cacdSRalf Baechle 	rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b,
10390e8cacdSRalf Baechle 	bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f
10490e8cacdSRalf Baechle };
10590e8cacdSRalf Baechle 
10690e8cacdSRalf Baechle /*
10790e8cacdSRalf Baechle  * rs field of cop opcodes.
10890e8cacdSRalf Baechle  */
10990e8cacdSRalf Baechle enum cop_op {
11090e8cacdSRalf Baechle 	mfc_op	      = 0x00, dmfc_op	    = 0x01,
1111ac94400SLeonid Yegoshin 	cfc_op	      = 0x02, mfhc_op	    = 0x03,
1121ac94400SLeonid Yegoshin 	mtc_op        = 0x04, dmtc_op	    = 0x05,
1131ac94400SLeonid Yegoshin 	ctc_op	      = 0x06, mthc_op	    = 0x07,
11490e8cacdSRalf Baechle 	bc_op	      = 0x08, cop_op	    = 0x10,
11590e8cacdSRalf Baechle 	copm_op	      = 0x18
11690e8cacdSRalf Baechle };
11790e8cacdSRalf Baechle 
11890e8cacdSRalf Baechle /*
11990e8cacdSRalf Baechle  * rt field of cop.bc_op opcodes
12090e8cacdSRalf Baechle  */
12190e8cacdSRalf Baechle enum bcop_op {
12290e8cacdSRalf Baechle 	bcf_op, bct_op, bcfl_op, bctl_op
12390e8cacdSRalf Baechle };
12490e8cacdSRalf Baechle 
12590e8cacdSRalf Baechle /*
12690e8cacdSRalf Baechle  * func field of cop0 coi opcodes.
12790e8cacdSRalf Baechle  */
12890e8cacdSRalf Baechle enum cop0_coi_func {
12990e8cacdSRalf Baechle 	tlbr_op	      = 0x01, tlbwi_op	    = 0x02,
13090e8cacdSRalf Baechle 	tlbwr_op      = 0x06, tlbp_op	    = 0x08,
131b0a3eae2SPaul Burton 	rfe_op	      = 0x10, eret_op	    = 0x18,
132b0a3eae2SPaul Burton 	wait_op       = 0x20,
13390e8cacdSRalf Baechle };
13490e8cacdSRalf Baechle 
13590e8cacdSRalf Baechle /*
13690e8cacdSRalf Baechle  * func field of cop0 com opcodes.
13790e8cacdSRalf Baechle  */
13890e8cacdSRalf Baechle enum cop0_com_func {
13990e8cacdSRalf Baechle 	tlbr1_op      = 0x01, tlbw_op	    = 0x02,
14090e8cacdSRalf Baechle 	tlbp1_op      = 0x08, dctr_op	    = 0x09,
14190e8cacdSRalf Baechle 	dctw_op	      = 0x0a
14290e8cacdSRalf Baechle };
14390e8cacdSRalf Baechle 
14490e8cacdSRalf Baechle /*
14590e8cacdSRalf Baechle  * fmt field of cop1 opcodes.
14690e8cacdSRalf Baechle  */
14790e8cacdSRalf Baechle enum cop1_fmt {
14890e8cacdSRalf Baechle 	s_fmt, d_fmt, e_fmt, q_fmt,
14990e8cacdSRalf Baechle 	w_fmt, l_fmt
15090e8cacdSRalf Baechle };
15190e8cacdSRalf Baechle 
15290e8cacdSRalf Baechle /*
15390e8cacdSRalf Baechle  * func field of cop1 instructions using d, s or w format.
15490e8cacdSRalf Baechle  */
15590e8cacdSRalf Baechle enum cop1_sdw_func {
15690e8cacdSRalf Baechle 	fadd_op	     =	0x00, fsub_op	   =  0x01,
15790e8cacdSRalf Baechle 	fmul_op	     =	0x02, fdiv_op	   =  0x03,
15890e8cacdSRalf Baechle 	fsqrt_op     =	0x04, fabs_op	   =  0x05,
15990e8cacdSRalf Baechle 	fmov_op	     =	0x06, fneg_op	   =  0x07,
16090e8cacdSRalf Baechle 	froundl_op   =	0x08, ftruncl_op   =  0x09,
16190e8cacdSRalf Baechle 	fceill_op    =	0x0a, ffloorl_op   =  0x0b,
16290e8cacdSRalf Baechle 	fround_op    =	0x0c, ftrunc_op	   =  0x0d,
16390e8cacdSRalf Baechle 	fceil_op     =	0x0e, ffloor_op	   =  0x0f,
16490e8cacdSRalf Baechle 	fmovc_op     =	0x11, fmovz_op	   =  0x12,
16590e8cacdSRalf Baechle 	fmovn_op     =	0x13, frecip_op	   =  0x15,
16690e8cacdSRalf Baechle 	frsqrt_op    =	0x16, fcvts_op	   =  0x20,
16790e8cacdSRalf Baechle 	fcvtd_op     =	0x21, fcvte_op	   =  0x22,
16890e8cacdSRalf Baechle 	fcvtw_op     =	0x24, fcvtl_op	   =  0x25,
16990e8cacdSRalf Baechle 	fcmp_op	     =	0x30
17090e8cacdSRalf Baechle };
17190e8cacdSRalf Baechle 
17290e8cacdSRalf Baechle /*
17390e8cacdSRalf Baechle  * func field of cop1x opcodes (MIPS IV).
17490e8cacdSRalf Baechle  */
17590e8cacdSRalf Baechle enum cop1x_func {
17690e8cacdSRalf Baechle 	lwxc1_op     =	0x00, ldxc1_op	   =  0x01,
17751061b88SDeng-Cheng Zhu 	swxc1_op     =  0x08, sdxc1_op	   =  0x09,
17851061b88SDeng-Cheng Zhu 	pfetch_op    =	0x0f, madd_s_op	   =  0x20,
17990e8cacdSRalf Baechle 	madd_d_op    =	0x21, madd_e_op	   =  0x22,
18090e8cacdSRalf Baechle 	msub_s_op    =	0x28, msub_d_op	   =  0x29,
18190e8cacdSRalf Baechle 	msub_e_op    =	0x2a, nmadd_s_op   =  0x30,
18290e8cacdSRalf Baechle 	nmadd_d_op   =	0x31, nmadd_e_op   =  0x32,
18390e8cacdSRalf Baechle 	nmsub_s_op   =	0x38, nmsub_d_op   =  0x39,
18490e8cacdSRalf Baechle 	nmsub_e_op   =	0x3a
18590e8cacdSRalf Baechle };
18690e8cacdSRalf Baechle 
18790e8cacdSRalf Baechle /*
18890e8cacdSRalf Baechle  * func field for mad opcodes (MIPS IV).
18990e8cacdSRalf Baechle  */
19090e8cacdSRalf Baechle enum mad_func {
19190e8cacdSRalf Baechle 	madd_fp_op	= 0x08, msub_fp_op	= 0x0a,
19290e8cacdSRalf Baechle 	nmadd_fp_op	= 0x0c, nmsub_fp_op	= 0x0e
19390e8cacdSRalf Baechle };
19490e8cacdSRalf Baechle 
19590e8cacdSRalf Baechle /*
19690e8cacdSRalf Baechle  * func field for special3 lx opcodes (Cavium Octeon).
19790e8cacdSRalf Baechle  */
19890e8cacdSRalf Baechle enum lx_func {
19990e8cacdSRalf Baechle 	lwx_op	= 0x00,
20090e8cacdSRalf Baechle 	lhx_op	= 0x04,
20190e8cacdSRalf Baechle 	lbux_op = 0x06,
20290e8cacdSRalf Baechle 	ldx_op	= 0x08,
20390e8cacdSRalf Baechle 	lwux_op = 0x10,
20490e8cacdSRalf Baechle 	lhux_op = 0x14,
20590e8cacdSRalf Baechle 	lbx_op	= 0x16,
20690e8cacdSRalf Baechle };
20790e8cacdSRalf Baechle 
20890e8cacdSRalf Baechle /*
209ab9e4fa0SMarkos Chandras  * BSHFL opcodes
210ab9e4fa0SMarkos Chandras  */
211ab9e4fa0SMarkos Chandras enum bshfl_func {
212ab9e4fa0SMarkos Chandras 	wsbh_op = 0x2,
213ab9e4fa0SMarkos Chandras 	dshd_op = 0x5,
214ab9e4fa0SMarkos Chandras 	seb_op  = 0x10,
215ab9e4fa0SMarkos Chandras 	seh_op  = 0x18,
216ab9e4fa0SMarkos Chandras };
217ab9e4fa0SMarkos Chandras 
218ab9e4fa0SMarkos Chandras /*
2192aa9fd06SSteven J. Hill  * (microMIPS) Major opcodes.
2202aa9fd06SSteven J. Hill  */
2212aa9fd06SSteven J. Hill enum mm_major_op {
2222aa9fd06SSteven J. Hill 	mm_pool32a_op, mm_pool16a_op, mm_lbu16_op, mm_move16_op,
2232aa9fd06SSteven J. Hill 	mm_addi32_op, mm_lbu32_op, mm_sb32_op, mm_lb32_op,
2242aa9fd06SSteven J. Hill 	mm_pool32b_op, mm_pool16b_op, mm_lhu16_op, mm_andi16_op,
2252aa9fd06SSteven J. Hill 	mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op,
2262aa9fd06SSteven J. Hill 	mm_pool32i_op, mm_pool16c_op, mm_lwsp16_op, mm_pool16d_op,
2272aa9fd06SSteven J. Hill 	mm_ori32_op, mm_pool32f_op, mm_reserved1_op, mm_reserved2_op,
2282aa9fd06SSteven J. Hill 	mm_pool32c_op, mm_lwgp16_op, mm_lw16_op, mm_pool16e_op,
2292aa9fd06SSteven J. Hill 	mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op,
2302aa9fd06SSteven J. Hill 	mm_reserved4_op, mm_pool16f_op, mm_sb16_op, mm_beqz16_op,
2312aa9fd06SSteven J. Hill 	mm_slti32_op, mm_beq32_op, mm_swc132_op, mm_lwc132_op,
2322aa9fd06SSteven J. Hill 	mm_reserved5_op, mm_reserved6_op, mm_sh16_op, mm_bnez16_op,
2332aa9fd06SSteven J. Hill 	mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op,
2342aa9fd06SSteven J. Hill 	mm_reserved7_op, mm_reserved8_op, mm_swsp16_op, mm_b16_op,
2352aa9fd06SSteven J. Hill 	mm_andi32_op, mm_j32_op, mm_sd32_op, mm_ld32_op,
2362aa9fd06SSteven J. Hill 	mm_reserved11_op, mm_reserved12_op, mm_sw16_op, mm_li16_op,
2372aa9fd06SSteven J. Hill 	mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op,
2382aa9fd06SSteven J. Hill };
2392aa9fd06SSteven J. Hill 
2402aa9fd06SSteven J. Hill /*
2412aa9fd06SSteven J. Hill  * (microMIPS) POOL32I minor opcodes.
2422aa9fd06SSteven J. Hill  */
2432aa9fd06SSteven J. Hill enum mm_32i_minor_op {
2442aa9fd06SSteven J. Hill 	mm_bltz_op, mm_bltzal_op, mm_bgez_op, mm_bgezal_op,
2452aa9fd06SSteven J. Hill 	mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op,
2462aa9fd06SSteven J. Hill 	mm_tlti_op, mm_tgei_op, mm_tltiu_op, mm_tgeiu_op,
2472aa9fd06SSteven J. Hill 	mm_tnei_op, mm_lui_op, mm_teqi_op, mm_reserved13_op,
2482aa9fd06SSteven J. Hill 	mm_synci_op, mm_bltzals_op, mm_reserved14_op, mm_bgezals_op,
2492aa9fd06SSteven J. Hill 	mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op,
2502aa9fd06SSteven J. Hill 	mm_reserved17_op, mm_reserved18_op, mm_bposge64_op, mm_bposge32_op,
2512aa9fd06SSteven J. Hill 	mm_bc1f_op, mm_bc1t_op, mm_reserved19_op, mm_reserved20_op,
2522aa9fd06SSteven J. Hill 	mm_bc1any2f_op, mm_bc1any2t_op, mm_bc1any4f_op, mm_bc1any4t_op,
2532aa9fd06SSteven J. Hill };
2542aa9fd06SSteven J. Hill 
2552aa9fd06SSteven J. Hill /*
2562aa9fd06SSteven J. Hill  * (microMIPS) POOL32A minor opcodes.
2572aa9fd06SSteven J. Hill  */
2582aa9fd06SSteven J. Hill enum mm_32a_minor_op {
2592aa9fd06SSteven J. Hill 	mm_sll32_op = 0x000,
2602aa9fd06SSteven J. Hill 	mm_ins_op = 0x00c,
261bef581baSMarkos Chandras 	mm_sllv32_op = 0x010,
2622aa9fd06SSteven J. Hill 	mm_ext_op = 0x02c,
2632aa9fd06SSteven J. Hill 	mm_pool32axf_op = 0x03c,
2642aa9fd06SSteven J. Hill 	mm_srl32_op = 0x040,
2652aa9fd06SSteven J. Hill 	mm_sra_op = 0x080,
266f31318fdSMarkos Chandras 	mm_srlv32_op = 0x090,
2672aa9fd06SSteven J. Hill 	mm_rotr_op = 0x0c0,
2682aa9fd06SSteven J. Hill 	mm_lwxs_op = 0x118,
2692aa9fd06SSteven J. Hill 	mm_addu32_op = 0x150,
2702aa9fd06SSteven J. Hill 	mm_subu32_op = 0x1d0,
271ab9e4fa0SMarkos Chandras 	mm_wsbh_op = 0x1ec,
272*a8e897adSMarkos Chandras 	mm_mul_op = 0x210,
2732aa9fd06SSteven J. Hill 	mm_and_op = 0x250,
2742aa9fd06SSteven J. Hill 	mm_or32_op = 0x290,
2752aa9fd06SSteven J. Hill 	mm_xor32_op = 0x310,
276e8ef868bSMarkos Chandras 	mm_sltu_op = 0x390,
2772aa9fd06SSteven J. Hill };
2782aa9fd06SSteven J. Hill 
2792aa9fd06SSteven J. Hill /*
2802aa9fd06SSteven J. Hill  * (microMIPS) POOL32B functions.
2812aa9fd06SSteven J. Hill  */
2822aa9fd06SSteven J. Hill enum mm_32b_func {
2832aa9fd06SSteven J. Hill 	mm_lwc2_func = 0x0,
2842aa9fd06SSteven J. Hill 	mm_lwp_func = 0x1,
2852aa9fd06SSteven J. Hill 	mm_ldc2_func = 0x2,
2862aa9fd06SSteven J. Hill 	mm_ldp_func = 0x4,
2872aa9fd06SSteven J. Hill 	mm_lwm32_func = 0x5,
2882aa9fd06SSteven J. Hill 	mm_cache_func = 0x6,
2892aa9fd06SSteven J. Hill 	mm_ldm_func = 0x7,
2902aa9fd06SSteven J. Hill 	mm_swc2_func = 0x8,
2912aa9fd06SSteven J. Hill 	mm_swp_func = 0x9,
2922aa9fd06SSteven J. Hill 	mm_sdc2_func = 0xa,
2932aa9fd06SSteven J. Hill 	mm_sdp_func = 0xc,
2942aa9fd06SSteven J. Hill 	mm_swm32_func = 0xd,
2952aa9fd06SSteven J. Hill 	mm_sdm_func = 0xf,
2962aa9fd06SSteven J. Hill };
2972aa9fd06SSteven J. Hill 
2982aa9fd06SSteven J. Hill /*
2992aa9fd06SSteven J. Hill  * (microMIPS) POOL32C functions.
3002aa9fd06SSteven J. Hill  */
3012aa9fd06SSteven J. Hill enum mm_32c_func {
3022aa9fd06SSteven J. Hill 	mm_pref_func = 0x2,
3032aa9fd06SSteven J. Hill 	mm_ll_func = 0x3,
3042aa9fd06SSteven J. Hill 	mm_swr_func = 0x9,
3052aa9fd06SSteven J. Hill 	mm_sc_func = 0xb,
3062aa9fd06SSteven J. Hill 	mm_lwu_func = 0xe,
3072aa9fd06SSteven J. Hill };
3082aa9fd06SSteven J. Hill 
3092aa9fd06SSteven J. Hill /*
3102aa9fd06SSteven J. Hill  * (microMIPS) POOL32AXF minor opcodes.
3112aa9fd06SSteven J. Hill  */
3122aa9fd06SSteven J. Hill enum mm_32axf_minor_op {
3132aa9fd06SSteven J. Hill 	mm_mfc0_op = 0x003,
3142aa9fd06SSteven J. Hill 	mm_mtc0_op = 0x00b,
3152aa9fd06SSteven J. Hill 	mm_tlbp_op = 0x00d,
316f3ec7a23SMarkos Chandras 	mm_mfhi32_op = 0x035,
3172aa9fd06SSteven J. Hill 	mm_jalr_op = 0x03c,
3182aa9fd06SSteven J. Hill 	mm_tlbr_op = 0x04d,
3192aa9fd06SSteven J. Hill 	mm_jalrhb_op = 0x07c,
3202aa9fd06SSteven J. Hill 	mm_tlbwi_op = 0x08d,
3212aa9fd06SSteven J. Hill 	mm_tlbwr_op = 0x0cd,
3222aa9fd06SSteven J. Hill 	mm_jalrs_op = 0x13c,
3232aa9fd06SSteven J. Hill 	mm_jalrshb_op = 0x17c,
3247ed82ad1SPaul Burton 	mm_sync_op = 0x1ad,
3252aa9fd06SSteven J. Hill 	mm_syscall_op = 0x22d,
326f263839aSPaul Burton 	mm_wait_op = 0x24d,
3272aa9fd06SSteven J. Hill 	mm_eret_op = 0x3cd,
3284c12a854SMarkos Chandras 	mm_divu_op = 0x5dc,
3292aa9fd06SSteven J. Hill };
3302aa9fd06SSteven J. Hill 
3312aa9fd06SSteven J. Hill /*
3322aa9fd06SSteven J. Hill  * (microMIPS) POOL32F minor opcodes.
3332aa9fd06SSteven J. Hill  */
3342aa9fd06SSteven J. Hill enum mm_32f_minor_op {
3352aa9fd06SSteven J. Hill 	mm_32f_00_op = 0x00,
3362aa9fd06SSteven J. Hill 	mm_32f_01_op = 0x01,
3372aa9fd06SSteven J. Hill 	mm_32f_02_op = 0x02,
3382aa9fd06SSteven J. Hill 	mm_32f_10_op = 0x08,
3392aa9fd06SSteven J. Hill 	mm_32f_11_op = 0x09,
3402aa9fd06SSteven J. Hill 	mm_32f_12_op = 0x0a,
3412aa9fd06SSteven J. Hill 	mm_32f_20_op = 0x10,
3422aa9fd06SSteven J. Hill 	mm_32f_30_op = 0x18,
3432aa9fd06SSteven J. Hill 	mm_32f_40_op = 0x20,
3442aa9fd06SSteven J. Hill 	mm_32f_41_op = 0x21,
3452aa9fd06SSteven J. Hill 	mm_32f_42_op = 0x22,
3462aa9fd06SSteven J. Hill 	mm_32f_50_op = 0x28,
3472aa9fd06SSteven J. Hill 	mm_32f_51_op = 0x29,
3482aa9fd06SSteven J. Hill 	mm_32f_52_op = 0x2a,
3492aa9fd06SSteven J. Hill 	mm_32f_60_op = 0x30,
3502aa9fd06SSteven J. Hill 	mm_32f_70_op = 0x38,
3512aa9fd06SSteven J. Hill 	mm_32f_73_op = 0x3b,
3522aa9fd06SSteven J. Hill 	mm_32f_74_op = 0x3c,
3532aa9fd06SSteven J. Hill };
3542aa9fd06SSteven J. Hill 
3552aa9fd06SSteven J. Hill /*
3562aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
3572aa9fd06SSteven J. Hill  */
3582aa9fd06SSteven J. Hill enum mm_32f_10_minor_op {
3592aa9fd06SSteven J. Hill 	mm_lwxc1_op = 0x1,
3602aa9fd06SSteven J. Hill 	mm_swxc1_op,
3612aa9fd06SSteven J. Hill 	mm_ldxc1_op,
3622aa9fd06SSteven J. Hill 	mm_sdxc1_op,
3632aa9fd06SSteven J. Hill 	mm_luxc1_op,
3642aa9fd06SSteven J. Hill 	mm_suxc1_op,
3652aa9fd06SSteven J. Hill };
3662aa9fd06SSteven J. Hill 
3672aa9fd06SSteven J. Hill enum mm_32f_func {
3682aa9fd06SSteven J. Hill 	mm_lwxc1_func = 0x048,
3692aa9fd06SSteven J. Hill 	mm_swxc1_func = 0x088,
3702aa9fd06SSteven J. Hill 	mm_ldxc1_func = 0x0c8,
3712aa9fd06SSteven J. Hill 	mm_sdxc1_func = 0x108,
3722aa9fd06SSteven J. Hill };
3732aa9fd06SSteven J. Hill 
3742aa9fd06SSteven J. Hill /*
3752aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
3762aa9fd06SSteven J. Hill  */
3772aa9fd06SSteven J. Hill enum mm_32f_40_minor_op {
3782aa9fd06SSteven J. Hill 	mm_fmovf_op,
3792aa9fd06SSteven J. Hill 	mm_fmovt_op,
3802aa9fd06SSteven J. Hill };
3812aa9fd06SSteven J. Hill 
3822aa9fd06SSteven J. Hill /*
3832aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
3842aa9fd06SSteven J. Hill  */
3852aa9fd06SSteven J. Hill enum mm_32f_60_minor_op {
3862aa9fd06SSteven J. Hill 	mm_fadd_op,
3872aa9fd06SSteven J. Hill 	mm_fsub_op,
3882aa9fd06SSteven J. Hill 	mm_fmul_op,
3892aa9fd06SSteven J. Hill 	mm_fdiv_op,
3902aa9fd06SSteven J. Hill };
3912aa9fd06SSteven J. Hill 
3922aa9fd06SSteven J. Hill /*
3932aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
3942aa9fd06SSteven J. Hill  */
3952aa9fd06SSteven J. Hill enum mm_32f_70_minor_op {
3962aa9fd06SSteven J. Hill 	mm_fmovn_op,
3972aa9fd06SSteven J. Hill 	mm_fmovz_op,
3982aa9fd06SSteven J. Hill };
3992aa9fd06SSteven J. Hill 
4002aa9fd06SSteven J. Hill /*
4012aa9fd06SSteven J. Hill  * (microMIPS) POOL32FXF secondary minor opcodes for POOL32F.
4022aa9fd06SSteven J. Hill  */
4032aa9fd06SSteven J. Hill enum mm_32f_73_minor_op {
4042aa9fd06SSteven J. Hill 	mm_fmov0_op = 0x01,
4052aa9fd06SSteven J. Hill 	mm_fcvtl_op = 0x04,
4062aa9fd06SSteven J. Hill 	mm_movf0_op = 0x05,
4072aa9fd06SSteven J. Hill 	mm_frsqrt_op = 0x08,
4082aa9fd06SSteven J. Hill 	mm_ffloorl_op = 0x0c,
4092aa9fd06SSteven J. Hill 	mm_fabs0_op = 0x0d,
4102aa9fd06SSteven J. Hill 	mm_fcvtw_op = 0x24,
4112aa9fd06SSteven J. Hill 	mm_movt0_op = 0x25,
4122aa9fd06SSteven J. Hill 	mm_fsqrt_op = 0x28,
4132aa9fd06SSteven J. Hill 	mm_ffloorw_op = 0x2c,
4142aa9fd06SSteven J. Hill 	mm_fneg0_op = 0x2d,
4152aa9fd06SSteven J. Hill 	mm_cfc1_op = 0x40,
4162aa9fd06SSteven J. Hill 	mm_frecip_op = 0x48,
4172aa9fd06SSteven J. Hill 	mm_fceill_op = 0x4c,
4182aa9fd06SSteven J. Hill 	mm_fcvtd0_op = 0x4d,
4192aa9fd06SSteven J. Hill 	mm_ctc1_op = 0x60,
4202aa9fd06SSteven J. Hill 	mm_fceilw_op = 0x6c,
4212aa9fd06SSteven J. Hill 	mm_fcvts0_op = 0x6d,
4222aa9fd06SSteven J. Hill 	mm_mfc1_op = 0x80,
4232aa9fd06SSteven J. Hill 	mm_fmov1_op = 0x81,
4242aa9fd06SSteven J. Hill 	mm_movf1_op = 0x85,
4252aa9fd06SSteven J. Hill 	mm_ftruncl_op = 0x8c,
4262aa9fd06SSteven J. Hill 	mm_fabs1_op = 0x8d,
4272aa9fd06SSteven J. Hill 	mm_mtc1_op = 0xa0,
4282aa9fd06SSteven J. Hill 	mm_movt1_op = 0xa5,
4292aa9fd06SSteven J. Hill 	mm_ftruncw_op = 0xac,
4302aa9fd06SSteven J. Hill 	mm_fneg1_op = 0xad,
4319355e59cSSteven J. Hill 	mm_mfhc1_op = 0xc0,
4322aa9fd06SSteven J. Hill 	mm_froundl_op = 0xcc,
4332aa9fd06SSteven J. Hill 	mm_fcvtd1_op = 0xcd,
4349355e59cSSteven J. Hill 	mm_mthc1_op = 0xe0,
4352aa9fd06SSteven J. Hill 	mm_froundw_op = 0xec,
4362aa9fd06SSteven J. Hill 	mm_fcvts1_op = 0xed,
4372aa9fd06SSteven J. Hill };
4382aa9fd06SSteven J. Hill 
4392aa9fd06SSteven J. Hill /*
4402aa9fd06SSteven J. Hill  * (microMIPS) POOL16C minor opcodes.
4412aa9fd06SSteven J. Hill  */
4422aa9fd06SSteven J. Hill enum mm_16c_minor_op {
4432aa9fd06SSteven J. Hill 	mm_lwm16_op = 0x04,
4442aa9fd06SSteven J. Hill 	mm_swm16_op = 0x05,
445dfb033f0STony Wu 	mm_jr16_op = 0x0c,
446dfb033f0STony Wu 	mm_jrc_op = 0x0d,
447dfb033f0STony Wu 	mm_jalr16_op = 0x0e,
448dfb033f0STony Wu 	mm_jalrs16_op = 0x0f,
449dfb033f0STony Wu 	mm_jraddiusp_op = 0x18,
4502aa9fd06SSteven J. Hill };
4512aa9fd06SSteven J. Hill 
4522aa9fd06SSteven J. Hill /*
4532aa9fd06SSteven J. Hill  * (microMIPS) POOL16D minor opcodes.
4542aa9fd06SSteven J. Hill  */
4552aa9fd06SSteven J. Hill enum mm_16d_minor_op {
4562aa9fd06SSteven J. Hill 	mm_addius5_func,
4572aa9fd06SSteven J. Hill 	mm_addiusp_func,
4582aa9fd06SSteven J. Hill };
4592aa9fd06SSteven J. Hill 
4602aa9fd06SSteven J. Hill /*
461cd574704SSteven J. Hill  * (MIPS16e) opcodes.
462cd574704SSteven J. Hill  */
463cd574704SSteven J. Hill enum MIPS16e_ops {
464cd574704SSteven J. Hill 	MIPS16e_jal_op = 003,
465cd574704SSteven J. Hill 	MIPS16e_ld_op = 007,
466cd574704SSteven J. Hill 	MIPS16e_i8_op = 014,
467cd574704SSteven J. Hill 	MIPS16e_sd_op = 017,
468cd574704SSteven J. Hill 	MIPS16e_lb_op = 020,
469cd574704SSteven J. Hill 	MIPS16e_lh_op = 021,
470cd574704SSteven J. Hill 	MIPS16e_lwsp_op = 022,
471cd574704SSteven J. Hill 	MIPS16e_lw_op = 023,
472cd574704SSteven J. Hill 	MIPS16e_lbu_op = 024,
473cd574704SSteven J. Hill 	MIPS16e_lhu_op = 025,
474cd574704SSteven J. Hill 	MIPS16e_lwpc_op = 026,
475cd574704SSteven J. Hill 	MIPS16e_lwu_op = 027,
476cd574704SSteven J. Hill 	MIPS16e_sb_op = 030,
477cd574704SSteven J. Hill 	MIPS16e_sh_op = 031,
478cd574704SSteven J. Hill 	MIPS16e_swsp_op = 032,
479cd574704SSteven J. Hill 	MIPS16e_sw_op = 033,
480cd574704SSteven J. Hill 	MIPS16e_rr_op = 035,
481cd574704SSteven J. Hill 	MIPS16e_extend_op = 036,
482cd574704SSteven J. Hill 	MIPS16e_i64_op = 037,
483cd574704SSteven J. Hill };
484cd574704SSteven J. Hill 
485cd574704SSteven J. Hill enum MIPS16e_i64_func {
486cd574704SSteven J. Hill 	MIPS16e_ldsp_func,
487cd574704SSteven J. Hill 	MIPS16e_sdsp_func,
488cd574704SSteven J. Hill 	MIPS16e_sdrasp_func,
489cd574704SSteven J. Hill 	MIPS16e_dadjsp_func,
490cd574704SSteven J. Hill 	MIPS16e_ldpc_func,
491cd574704SSteven J. Hill };
492cd574704SSteven J. Hill 
493cd574704SSteven J. Hill enum MIPS16e_rr_func {
494cd574704SSteven J. Hill 	MIPS16e_jr_func,
495cd574704SSteven J. Hill };
496cd574704SSteven J. Hill 
497cd574704SSteven J. Hill enum MIPS6e_i8_func {
498cd574704SSteven J. Hill 	MIPS16e_swrasp_func = 02,
499cd574704SSteven J. Hill };
500cd574704SSteven J. Hill 
501cd574704SSteven J. Hill /*
502102cedc3SLeonid Yegoshin  * (microMIPS & MIPS16e) NOP instruction.
503102cedc3SLeonid Yegoshin  */
504102cedc3SLeonid Yegoshin #define MM_NOP16	0x0c00
505102cedc3SLeonid Yegoshin 
50685dfaf08SRalf Baechle struct j_format {
5078471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
5088471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int target : 26,
50985dfaf08SRalf Baechle 	;))
51085dfaf08SRalf Baechle };
51185dfaf08SRalf Baechle 
51285dfaf08SRalf Baechle struct i_format {			/* signed immediate format */
5138471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5148471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5158471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5168471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 16,
51785dfaf08SRalf Baechle 	;))))
51885dfaf08SRalf Baechle };
51985dfaf08SRalf Baechle 
52085dfaf08SRalf Baechle struct u_format {			/* unsigned immediate format */
5218471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5228471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5238471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5248471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int uimmediate : 16,
52585dfaf08SRalf Baechle 	;))))
52685dfaf08SRalf Baechle };
52785dfaf08SRalf Baechle 
52885dfaf08SRalf Baechle struct c_format {			/* Cache (>= R6000) format */
5298471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5308471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5318471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int c_op : 3,
5328471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cache : 2,
5338471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int simmediate : 16,
53485dfaf08SRalf Baechle 	;)))))
53585dfaf08SRalf Baechle };
53685dfaf08SRalf Baechle 
53785dfaf08SRalf Baechle struct r_format {			/* Register format */
5388471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5398471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5408471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5418471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
5428471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int re : 5,
5438471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
54485dfaf08SRalf Baechle 	;))))))
54585dfaf08SRalf Baechle };
54685dfaf08SRalf Baechle 
54785dfaf08SRalf Baechle struct p_format {		/* Performance counter format (R10000) */
5488471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5498471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5508471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5518471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
5528471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int re : 5,
5538471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
55485dfaf08SRalf Baechle 	;))))))
55585dfaf08SRalf Baechle };
55685dfaf08SRalf Baechle 
55785dfaf08SRalf Baechle struct f_format {			/* FPU register format */
5588471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5598471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 1,
5608471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 4,
5618471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
5628471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
5638471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int re : 5,
5648471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
56585dfaf08SRalf Baechle 	;)))))))
56685dfaf08SRalf Baechle };
56785dfaf08SRalf Baechle 
56885dfaf08SRalf Baechle struct ma_format {		/* FPU multiply and add format (MIPS IV) */
5698471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5708471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fr : 5,
5718471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
5728471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
5738471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
5748471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 4,
5758471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 2,
57685dfaf08SRalf Baechle 	;)))))))
57785dfaf08SRalf Baechle };
57885dfaf08SRalf Baechle 
57985dfaf08SRalf Baechle struct b_format {			/* BREAK and SYSCALL */
5808471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5818471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int code : 20,
5828471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
58385dfaf08SRalf Baechle 	;)))
58485dfaf08SRalf Baechle };
58585dfaf08SRalf Baechle 
5868fba1e58SRalf Baechle struct ps_format {			/* MIPS-3D / paired single format */
5878471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5888471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
5898471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
5908471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
5918471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
5928471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
5938fba1e58SRalf Baechle 	;))))))
5948fba1e58SRalf Baechle };
5958fba1e58SRalf Baechle 
5968fba1e58SRalf Baechle struct v_format {				/* MDMX vector format */
5978471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
5988471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int sel : 4,
5998471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 1,
6008471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int vt : 5,
6018471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int vs : 5,
6028471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int vd : 5,
6038471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6048fba1e58SRalf Baechle 	;)))))))
6058fba1e58SRalf Baechle };
6068fba1e58SRalf Baechle 
607aa1af47fSLeonid Yegoshin struct spec3_format {   /* SPEC3 */
6088471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode:6,
6098471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs:5,
6108471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt:5,
6118471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate:9,
6128471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func:7,
613aa1af47fSLeonid Yegoshin 	;)))))
614aa1af47fSLeonid Yegoshin };
615aa1af47fSLeonid Yegoshin 
6162aa9fd06SSteven J. Hill /*
6172aa9fd06SSteven J. Hill  * microMIPS instruction formats (32-bit length)
6182aa9fd06SSteven J. Hill  *
6192aa9fd06SSteven J. Hill  * NOTE:
6202aa9fd06SSteven J. Hill  *	Parenthesis denote whether the format is a microMIPS instruction or
6212aa9fd06SSteven J. Hill  *	if it is MIPS32 instruction re-encoded for use in the microMIPS ASE.
6222aa9fd06SSteven J. Hill  */
6232aa9fd06SSteven J. Hill struct fb_format {		/* FPU branch format (MIPS32) */
6248471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6258471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int bc : 5,
6268471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cc : 3,
6278471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int flag : 2,
6288471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 16,
6292aa9fd06SSteven J. Hill 	;)))))
6302aa9fd06SSteven J. Hill };
6312aa9fd06SSteven J. Hill 
6322aa9fd06SSteven J. Hill struct fp0_format {		/* FPU multiply and add format (MIPS32) */
6338471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6348471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 5,
6358471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
6368471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6378471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6388471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6392aa9fd06SSteven J. Hill 	;))))))
6402aa9fd06SSteven J. Hill };
6412aa9fd06SSteven J. Hill 
6422aa9fd06SSteven J. Hill struct mm_fp0_format {		/* FPU multipy and add format (microMIPS) */
6438471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6448471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
6458471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6468471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6478471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 3,
6488471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 2,
6498471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6502aa9fd06SSteven J. Hill 	;)))))))
6512aa9fd06SSteven J. Hill };
6522aa9fd06SSteven J. Hill 
6532aa9fd06SSteven J. Hill struct fp1_format {		/* FPU mfc1 and cfc1 format (MIPS32) */
6548471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6558471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 5,
6568471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
6578471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6588471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6598471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6602aa9fd06SSteven J. Hill 	;))))))
6612aa9fd06SSteven J. Hill };
6622aa9fd06SSteven J. Hill 
6632aa9fd06SSteven J. Hill struct mm_fp1_format {		/* FPU mfc1 and cfc1 format (microMIPS) */
6648471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6658471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
6668471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6678471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 2,
6688471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 8,
6698471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6702aa9fd06SSteven J. Hill 	;))))))
6712aa9fd06SSteven J. Hill };
6722aa9fd06SSteven J. Hill 
6732aa9fd06SSteven J. Hill struct mm_fp2_format {		/* FPU movt and movf format (microMIPS) */
6748471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6758471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
6768471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6778471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cc : 3,
6788471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int zero : 2,
6798471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 2,
6808471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 3,
6818471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6822aa9fd06SSteven J. Hill 	;))))))))
6832aa9fd06SSteven J. Hill };
6842aa9fd06SSteven J. Hill 
6852aa9fd06SSteven J. Hill struct mm_fp3_format {		/* FPU abs and neg format (microMIPS) */
6868471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6878471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
6888471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6898471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 3,
6908471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 7,
6918471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
6922aa9fd06SSteven J. Hill 	;))))))
6932aa9fd06SSteven J. Hill };
6942aa9fd06SSteven J. Hill 
6952aa9fd06SSteven J. Hill struct mm_fp4_format {		/* FPU c.cond format (microMIPS) */
6968471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
6978471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
6988471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
6998471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cc : 3,
7008471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fmt : 3,
7018471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int cond : 4,
7028471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7032aa9fd06SSteven J. Hill 	;)))))))
7042aa9fd06SSteven J. Hill };
7052aa9fd06SSteven J. Hill 
7062aa9fd06SSteven J. Hill struct mm_fp5_format {		/* FPU lwxc1 and swxc1 format (microMIPS) */
7078471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7088471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int index : 5,
7098471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 5,
7108471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7118471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int op : 5,
7128471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7132aa9fd06SSteven J. Hill 	;))))))
7142aa9fd06SSteven J. Hill };
7152aa9fd06SSteven J. Hill 
7162aa9fd06SSteven J. Hill struct fp6_format {		/* FPU madd and msub format (MIPS IV) */
7178471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7188471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fr : 5,
7198471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
7208471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7218471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7228471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7232aa9fd06SSteven J. Hill 	;))))))
7242aa9fd06SSteven J. Hill };
7252aa9fd06SSteven J. Hill 
7262aa9fd06SSteven J. Hill struct mm_fp6_format {		/* FPU madd and msub format (microMIPS) */
7278471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7288471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ft : 5,
7298471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fs : 5,
7308471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fd : 5,
7318471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int fr : 5,
7328471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 6,
7332aa9fd06SSteven J. Hill 	;))))))
7342aa9fd06SSteven J. Hill };
7352aa9fd06SSteven J. Hill 
7362aa9fd06SSteven J. Hill struct mm_i_format {		/* Immediate format (microMIPS) */
7378471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7388471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
7398471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 5,
7408471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 16,
7412aa9fd06SSteven J. Hill 	;))))
7422aa9fd06SSteven J. Hill };
7432aa9fd06SSteven J. Hill 
7442aa9fd06SSteven J. Hill struct mm_m_format {		/* Multi-word load/store format (microMIPS) */
7458471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7468471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
7478471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 5,
7488471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 4,
7498471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 12,
7502aa9fd06SSteven J. Hill 	;)))))
7512aa9fd06SSteven J. Hill };
7522aa9fd06SSteven J. Hill 
7532aa9fd06SSteven J. Hill struct mm_x_format {		/* Scaled indexed load format (microMIPS) */
7548471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7558471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int index : 5,
7568471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 5,
7578471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rd : 5,
7588471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 11,
7592aa9fd06SSteven J. Hill 	;)))))
7602aa9fd06SSteven J. Hill };
7612aa9fd06SSteven J. Hill 
7622aa9fd06SSteven J. Hill /*
7632aa9fd06SSteven J. Hill  * microMIPS instruction formats (16-bit length)
7642aa9fd06SSteven J. Hill  */
7652aa9fd06SSteven J. Hill struct mm_b0_format {		/* Unconditional branch format (microMIPS) */
7668471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7678471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 10,
7688471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
7692aa9fd06SSteven J. Hill 	;)))
7702aa9fd06SSteven J. Hill };
7712aa9fd06SSteven J. Hill 
7722aa9fd06SSteven J. Hill struct mm_b1_format {		/* Conditional branch format (microMIPS) */
7738471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7748471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rs : 3,
7758471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 7,
7768471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
7772aa9fd06SSteven J. Hill 	;))))
7782aa9fd06SSteven J. Hill };
7792aa9fd06SSteven J. Hill 
7802aa9fd06SSteven J. Hill struct mm16_m_format {		/* Multi-word load/store format */
7818471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7828471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 4,
7838471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rlist : 2,
7848471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 4,
7858471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
7862aa9fd06SSteven J. Hill 	;)))))
7872aa9fd06SSteven J. Hill };
7882aa9fd06SSteven J. Hill 
7892aa9fd06SSteven J. Hill struct mm16_rb_format {		/* Signed immediate format */
7908471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
7918471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 3,
7928471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int base : 3,
7938471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 4,
7948471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
7952aa9fd06SSteven J. Hill 	;)))))
7962aa9fd06SSteven J. Hill };
7972aa9fd06SSteven J. Hill 
7982aa9fd06SSteven J. Hill struct mm16_r3_format {		/* Load from global pointer format */
7998471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8008471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 3,
8018471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 7,
8028471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8032aa9fd06SSteven J. Hill 	;))))
8042aa9fd06SSteven J. Hill };
8052aa9fd06SSteven J. Hill 
8062aa9fd06SSteven J. Hill struct mm16_r5_format {		/* Load/store from stack pointer format */
8078471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 6,
8088471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rt : 5,
8098471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int simmediate : 5,
8108471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
8112aa9fd06SSteven J. Hill 	;))))
8122aa9fd06SSteven J. Hill };
8132aa9fd06SSteven J. Hill 
814cd574704SSteven J. Hill /*
815cd574704SSteven J. Hill  * MIPS16e instruction formats (16-bit length)
816cd574704SSteven J. Hill  */
817cd574704SSteven J. Hill struct m16e_rr {
8188471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8198471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rx : 3,
8208471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int nd : 1,
8218471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int l : 1,
8228471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ra : 1,
8238471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 5,
824cd574704SSteven J. Hill 	;))))))
825cd574704SSteven J. Hill };
826cd574704SSteven J. Hill 
827cd574704SSteven J. Hill struct m16e_jal {
8288471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8298471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int x : 1,
8308471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm20_16 : 5,
8318471ac1bSRalf Baechle 	__BITFIELD_FIELD(signed int imm25_21 : 5,
832cd574704SSteven J. Hill 	;))))
833cd574704SSteven J. Hill };
834cd574704SSteven J. Hill 
835cd574704SSteven J. Hill struct m16e_i64 {
8368471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8378471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 3,
8388471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 8,
839cd574704SSteven J. Hill 	;)))
840cd574704SSteven J. Hill };
841cd574704SSteven J. Hill 
842cd574704SSteven J. Hill struct m16e_ri64 {
8438471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8448471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 3,
8458471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ry : 3,
8468471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 5,
847cd574704SSteven J. Hill 	;))))
848cd574704SSteven J. Hill };
849cd574704SSteven J. Hill 
850cd574704SSteven J. Hill struct m16e_ri {
8518471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8528471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rx : 3,
8538471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 8,
854cd574704SSteven J. Hill 	;)))
855cd574704SSteven J. Hill };
856cd574704SSteven J. Hill 
857cd574704SSteven J. Hill struct m16e_rri {
8588471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8598471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int rx : 3,
8608471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int ry : 3,
8618471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 5,
862cd574704SSteven J. Hill 	;))))
863cd574704SSteven J. Hill };
864cd574704SSteven J. Hill 
865cd574704SSteven J. Hill struct m16e_i8 {
8668471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int opcode : 5,
8678471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int func : 3,
8688471ac1bSRalf Baechle 	__BITFIELD_FIELD(unsigned int imm : 8,
869cd574704SSteven J. Hill 	;)))
870cd574704SSteven J. Hill };
871cd574704SSteven J. Hill 
87290e8cacdSRalf Baechle union mips_instruction {
87390e8cacdSRalf Baechle 	unsigned int word;
87490e8cacdSRalf Baechle 	unsigned short halfword[2];
87590e8cacdSRalf Baechle 	unsigned char byte[4];
87690e8cacdSRalf Baechle 	struct j_format j_format;
87790e8cacdSRalf Baechle 	struct i_format i_format;
87890e8cacdSRalf Baechle 	struct u_format u_format;
87990e8cacdSRalf Baechle 	struct c_format c_format;
88090e8cacdSRalf Baechle 	struct r_format r_format;
88190e8cacdSRalf Baechle 	struct p_format p_format;
88290e8cacdSRalf Baechle 	struct f_format f_format;
88390e8cacdSRalf Baechle 	struct ma_format ma_format;
88490e8cacdSRalf Baechle 	struct b_format b_format;
8858fba1e58SRalf Baechle 	struct ps_format ps_format;
8868fba1e58SRalf Baechle 	struct v_format v_format;
887aa1af47fSLeonid Yegoshin 	struct spec3_format spec3_format;
8882aa9fd06SSteven J. Hill 	struct fb_format fb_format;
8892aa9fd06SSteven J. Hill 	struct fp0_format fp0_format;
8902aa9fd06SSteven J. Hill 	struct mm_fp0_format mm_fp0_format;
8912aa9fd06SSteven J. Hill 	struct fp1_format fp1_format;
8922aa9fd06SSteven J. Hill 	struct mm_fp1_format mm_fp1_format;
8932aa9fd06SSteven J. Hill 	struct mm_fp2_format mm_fp2_format;
8942aa9fd06SSteven J. Hill 	struct mm_fp3_format mm_fp3_format;
8952aa9fd06SSteven J. Hill 	struct mm_fp4_format mm_fp4_format;
8962aa9fd06SSteven J. Hill 	struct mm_fp5_format mm_fp5_format;
8972aa9fd06SSteven J. Hill 	struct fp6_format fp6_format;
8982aa9fd06SSteven J. Hill 	struct mm_fp6_format mm_fp6_format;
8992aa9fd06SSteven J. Hill 	struct mm_i_format mm_i_format;
9002aa9fd06SSteven J. Hill 	struct mm_m_format mm_m_format;
9012aa9fd06SSteven J. Hill 	struct mm_x_format mm_x_format;
9022aa9fd06SSteven J. Hill 	struct mm_b0_format mm_b0_format;
9032aa9fd06SSteven J. Hill 	struct mm_b1_format mm_b1_format;
9042aa9fd06SSteven J. Hill 	struct mm16_m_format mm16_m_format ;
9052aa9fd06SSteven J. Hill 	struct mm16_rb_format mm16_rb_format;
9062aa9fd06SSteven J. Hill 	struct mm16_r3_format mm16_r3_format;
9072aa9fd06SSteven J. Hill 	struct mm16_r5_format mm16_r5_format;
90890e8cacdSRalf Baechle };
90990e8cacdSRalf Baechle 
910cd574704SSteven J. Hill union mips16e_instruction {
911cd574704SSteven J. Hill 	unsigned int full : 16;
912cd574704SSteven J. Hill 	struct m16e_rr rr;
913cd574704SSteven J. Hill 	struct m16e_jal jal;
914cd574704SSteven J. Hill 	struct m16e_i64 i64;
915cd574704SSteven J. Hill 	struct m16e_ri64 ri64;
916cd574704SSteven J. Hill 	struct m16e_ri ri;
917cd574704SSteven J. Hill 	struct m16e_rri rri;
918cd574704SSteven J. Hill 	struct m16e_i8 i8;
919cd574704SSteven J. Hill };
920cd574704SSteven J. Hill 
92190e8cacdSRalf Baechle #endif /* _UAPI_ASM_INST_H */
922