1*90e8cacdSRalf Baechle /* 2*90e8cacdSRalf Baechle * Format of an instruction in memory. 3*90e8cacdSRalf Baechle * 4*90e8cacdSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 5*90e8cacdSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 6*90e8cacdSRalf Baechle * for more details. 7*90e8cacdSRalf Baechle * 8*90e8cacdSRalf Baechle * Copyright (C) 1996, 2000 by Ralf Baechle 9*90e8cacdSRalf Baechle * Copyright (C) 2006 by Thiemo Seufer 10*90e8cacdSRalf Baechle */ 11*90e8cacdSRalf Baechle #ifndef _UAPI_ASM_INST_H 12*90e8cacdSRalf Baechle #define _UAPI_ASM_INST_H 13*90e8cacdSRalf Baechle 14*90e8cacdSRalf Baechle /* 15*90e8cacdSRalf Baechle * Major opcodes; before MIPS IV cop1x was called cop3. 16*90e8cacdSRalf Baechle */ 17*90e8cacdSRalf Baechle enum major_op { 18*90e8cacdSRalf Baechle spec_op, bcond_op, j_op, jal_op, 19*90e8cacdSRalf Baechle beq_op, bne_op, blez_op, bgtz_op, 20*90e8cacdSRalf Baechle addi_op, addiu_op, slti_op, sltiu_op, 21*90e8cacdSRalf Baechle andi_op, ori_op, xori_op, lui_op, 22*90e8cacdSRalf Baechle cop0_op, cop1_op, cop2_op, cop1x_op, 23*90e8cacdSRalf Baechle beql_op, bnel_op, blezl_op, bgtzl_op, 24*90e8cacdSRalf Baechle daddi_op, daddiu_op, ldl_op, ldr_op, 25*90e8cacdSRalf Baechle spec2_op, jalx_op, mdmx_op, spec3_op, 26*90e8cacdSRalf Baechle lb_op, lh_op, lwl_op, lw_op, 27*90e8cacdSRalf Baechle lbu_op, lhu_op, lwr_op, lwu_op, 28*90e8cacdSRalf Baechle sb_op, sh_op, swl_op, sw_op, 29*90e8cacdSRalf Baechle sdl_op, sdr_op, swr_op, cache_op, 30*90e8cacdSRalf Baechle ll_op, lwc1_op, lwc2_op, pref_op, 31*90e8cacdSRalf Baechle lld_op, ldc1_op, ldc2_op, ld_op, 32*90e8cacdSRalf Baechle sc_op, swc1_op, swc2_op, major_3b_op, 33*90e8cacdSRalf Baechle scd_op, sdc1_op, sdc2_op, sd_op 34*90e8cacdSRalf Baechle }; 35*90e8cacdSRalf Baechle 36*90e8cacdSRalf Baechle /* 37*90e8cacdSRalf Baechle * func field of spec opcode. 38*90e8cacdSRalf Baechle */ 39*90e8cacdSRalf Baechle enum spec_op { 40*90e8cacdSRalf Baechle sll_op, movc_op, srl_op, sra_op, 41*90e8cacdSRalf Baechle sllv_op, pmon_op, srlv_op, srav_op, 42*90e8cacdSRalf Baechle jr_op, jalr_op, movz_op, movn_op, 43*90e8cacdSRalf Baechle syscall_op, break_op, spim_op, sync_op, 44*90e8cacdSRalf Baechle mfhi_op, mthi_op, mflo_op, mtlo_op, 45*90e8cacdSRalf Baechle dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op, 46*90e8cacdSRalf Baechle mult_op, multu_op, div_op, divu_op, 47*90e8cacdSRalf Baechle dmult_op, dmultu_op, ddiv_op, ddivu_op, 48*90e8cacdSRalf Baechle add_op, addu_op, sub_op, subu_op, 49*90e8cacdSRalf Baechle and_op, or_op, xor_op, nor_op, 50*90e8cacdSRalf Baechle spec3_unused_op, spec4_unused_op, slt_op, sltu_op, 51*90e8cacdSRalf Baechle dadd_op, daddu_op, dsub_op, dsubu_op, 52*90e8cacdSRalf Baechle tge_op, tgeu_op, tlt_op, tltu_op, 53*90e8cacdSRalf Baechle teq_op, spec5_unused_op, tne_op, spec6_unused_op, 54*90e8cacdSRalf Baechle dsll_op, spec7_unused_op, dsrl_op, dsra_op, 55*90e8cacdSRalf Baechle dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op 56*90e8cacdSRalf Baechle }; 57*90e8cacdSRalf Baechle 58*90e8cacdSRalf Baechle /* 59*90e8cacdSRalf Baechle * func field of spec2 opcode. 60*90e8cacdSRalf Baechle */ 61*90e8cacdSRalf Baechle enum spec2_op { 62*90e8cacdSRalf Baechle madd_op, maddu_op, mul_op, spec2_3_unused_op, 63*90e8cacdSRalf Baechle msub_op, msubu_op, /* more unused ops */ 64*90e8cacdSRalf Baechle clz_op = 0x20, clo_op, 65*90e8cacdSRalf Baechle dclz_op = 0x24, dclo_op, 66*90e8cacdSRalf Baechle sdbpp_op = 0x3f 67*90e8cacdSRalf Baechle }; 68*90e8cacdSRalf Baechle 69*90e8cacdSRalf Baechle /* 70*90e8cacdSRalf Baechle * func field of spec3 opcode. 71*90e8cacdSRalf Baechle */ 72*90e8cacdSRalf Baechle enum spec3_op { 73*90e8cacdSRalf Baechle ext_op, dextm_op, dextu_op, dext_op, 74*90e8cacdSRalf Baechle ins_op, dinsm_op, dinsu_op, dins_op, 75*90e8cacdSRalf Baechle lx_op = 0x0a, 76*90e8cacdSRalf Baechle bshfl_op = 0x20, 77*90e8cacdSRalf Baechle dbshfl_op = 0x24, 78*90e8cacdSRalf Baechle rdhwr_op = 0x3b 79*90e8cacdSRalf Baechle }; 80*90e8cacdSRalf Baechle 81*90e8cacdSRalf Baechle /* 82*90e8cacdSRalf Baechle * rt field of bcond opcodes. 83*90e8cacdSRalf Baechle */ 84*90e8cacdSRalf Baechle enum rt_op { 85*90e8cacdSRalf Baechle bltz_op, bgez_op, bltzl_op, bgezl_op, 86*90e8cacdSRalf Baechle spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07, 87*90e8cacdSRalf Baechle tgei_op, tgeiu_op, tlti_op, tltiu_op, 88*90e8cacdSRalf Baechle teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op, 89*90e8cacdSRalf Baechle bltzal_op, bgezal_op, bltzall_op, bgezall_op, 90*90e8cacdSRalf Baechle rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17, 91*90e8cacdSRalf Baechle rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b, 92*90e8cacdSRalf Baechle bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f 93*90e8cacdSRalf Baechle }; 94*90e8cacdSRalf Baechle 95*90e8cacdSRalf Baechle /* 96*90e8cacdSRalf Baechle * rs field of cop opcodes. 97*90e8cacdSRalf Baechle */ 98*90e8cacdSRalf Baechle enum cop_op { 99*90e8cacdSRalf Baechle mfc_op = 0x00, dmfc_op = 0x01, 100*90e8cacdSRalf Baechle cfc_op = 0x02, mtc_op = 0x04, 101*90e8cacdSRalf Baechle dmtc_op = 0x05, ctc_op = 0x06, 102*90e8cacdSRalf Baechle bc_op = 0x08, cop_op = 0x10, 103*90e8cacdSRalf Baechle copm_op = 0x18 104*90e8cacdSRalf Baechle }; 105*90e8cacdSRalf Baechle 106*90e8cacdSRalf Baechle /* 107*90e8cacdSRalf Baechle * rt field of cop.bc_op opcodes 108*90e8cacdSRalf Baechle */ 109*90e8cacdSRalf Baechle enum bcop_op { 110*90e8cacdSRalf Baechle bcf_op, bct_op, bcfl_op, bctl_op 111*90e8cacdSRalf Baechle }; 112*90e8cacdSRalf Baechle 113*90e8cacdSRalf Baechle /* 114*90e8cacdSRalf Baechle * func field of cop0 coi opcodes. 115*90e8cacdSRalf Baechle */ 116*90e8cacdSRalf Baechle enum cop0_coi_func { 117*90e8cacdSRalf Baechle tlbr_op = 0x01, tlbwi_op = 0x02, 118*90e8cacdSRalf Baechle tlbwr_op = 0x06, tlbp_op = 0x08, 119*90e8cacdSRalf Baechle rfe_op = 0x10, eret_op = 0x18 120*90e8cacdSRalf Baechle }; 121*90e8cacdSRalf Baechle 122*90e8cacdSRalf Baechle /* 123*90e8cacdSRalf Baechle * func field of cop0 com opcodes. 124*90e8cacdSRalf Baechle */ 125*90e8cacdSRalf Baechle enum cop0_com_func { 126*90e8cacdSRalf Baechle tlbr1_op = 0x01, tlbw_op = 0x02, 127*90e8cacdSRalf Baechle tlbp1_op = 0x08, dctr_op = 0x09, 128*90e8cacdSRalf Baechle dctw_op = 0x0a 129*90e8cacdSRalf Baechle }; 130*90e8cacdSRalf Baechle 131*90e8cacdSRalf Baechle /* 132*90e8cacdSRalf Baechle * fmt field of cop1 opcodes. 133*90e8cacdSRalf Baechle */ 134*90e8cacdSRalf Baechle enum cop1_fmt { 135*90e8cacdSRalf Baechle s_fmt, d_fmt, e_fmt, q_fmt, 136*90e8cacdSRalf Baechle w_fmt, l_fmt 137*90e8cacdSRalf Baechle }; 138*90e8cacdSRalf Baechle 139*90e8cacdSRalf Baechle /* 140*90e8cacdSRalf Baechle * func field of cop1 instructions using d, s or w format. 141*90e8cacdSRalf Baechle */ 142*90e8cacdSRalf Baechle enum cop1_sdw_func { 143*90e8cacdSRalf Baechle fadd_op = 0x00, fsub_op = 0x01, 144*90e8cacdSRalf Baechle fmul_op = 0x02, fdiv_op = 0x03, 145*90e8cacdSRalf Baechle fsqrt_op = 0x04, fabs_op = 0x05, 146*90e8cacdSRalf Baechle fmov_op = 0x06, fneg_op = 0x07, 147*90e8cacdSRalf Baechle froundl_op = 0x08, ftruncl_op = 0x09, 148*90e8cacdSRalf Baechle fceill_op = 0x0a, ffloorl_op = 0x0b, 149*90e8cacdSRalf Baechle fround_op = 0x0c, ftrunc_op = 0x0d, 150*90e8cacdSRalf Baechle fceil_op = 0x0e, ffloor_op = 0x0f, 151*90e8cacdSRalf Baechle fmovc_op = 0x11, fmovz_op = 0x12, 152*90e8cacdSRalf Baechle fmovn_op = 0x13, frecip_op = 0x15, 153*90e8cacdSRalf Baechle frsqrt_op = 0x16, fcvts_op = 0x20, 154*90e8cacdSRalf Baechle fcvtd_op = 0x21, fcvte_op = 0x22, 155*90e8cacdSRalf Baechle fcvtw_op = 0x24, fcvtl_op = 0x25, 156*90e8cacdSRalf Baechle fcmp_op = 0x30 157*90e8cacdSRalf Baechle }; 158*90e8cacdSRalf Baechle 159*90e8cacdSRalf Baechle /* 160*90e8cacdSRalf Baechle * func field of cop1x opcodes (MIPS IV). 161*90e8cacdSRalf Baechle */ 162*90e8cacdSRalf Baechle enum cop1x_func { 163*90e8cacdSRalf Baechle lwxc1_op = 0x00, ldxc1_op = 0x01, 164*90e8cacdSRalf Baechle pfetch_op = 0x07, swxc1_op = 0x08, 165*90e8cacdSRalf Baechle sdxc1_op = 0x09, madd_s_op = 0x20, 166*90e8cacdSRalf Baechle madd_d_op = 0x21, madd_e_op = 0x22, 167*90e8cacdSRalf Baechle msub_s_op = 0x28, msub_d_op = 0x29, 168*90e8cacdSRalf Baechle msub_e_op = 0x2a, nmadd_s_op = 0x30, 169*90e8cacdSRalf Baechle nmadd_d_op = 0x31, nmadd_e_op = 0x32, 170*90e8cacdSRalf Baechle nmsub_s_op = 0x38, nmsub_d_op = 0x39, 171*90e8cacdSRalf Baechle nmsub_e_op = 0x3a 172*90e8cacdSRalf Baechle }; 173*90e8cacdSRalf Baechle 174*90e8cacdSRalf Baechle /* 175*90e8cacdSRalf Baechle * func field for mad opcodes (MIPS IV). 176*90e8cacdSRalf Baechle */ 177*90e8cacdSRalf Baechle enum mad_func { 178*90e8cacdSRalf Baechle madd_fp_op = 0x08, msub_fp_op = 0x0a, 179*90e8cacdSRalf Baechle nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e 180*90e8cacdSRalf Baechle }; 181*90e8cacdSRalf Baechle 182*90e8cacdSRalf Baechle /* 183*90e8cacdSRalf Baechle * func field for special3 lx opcodes (Cavium Octeon). 184*90e8cacdSRalf Baechle */ 185*90e8cacdSRalf Baechle enum lx_func { 186*90e8cacdSRalf Baechle lwx_op = 0x00, 187*90e8cacdSRalf Baechle lhx_op = 0x04, 188*90e8cacdSRalf Baechle lbux_op = 0x06, 189*90e8cacdSRalf Baechle ldx_op = 0x08, 190*90e8cacdSRalf Baechle lwux_op = 0x10, 191*90e8cacdSRalf Baechle lhux_op = 0x14, 192*90e8cacdSRalf Baechle lbx_op = 0x16, 193*90e8cacdSRalf Baechle }; 194*90e8cacdSRalf Baechle 195*90e8cacdSRalf Baechle /* 196*90e8cacdSRalf Baechle * Damn ... bitfields depend from byteorder :-( 197*90e8cacdSRalf Baechle */ 198*90e8cacdSRalf Baechle #ifdef __MIPSEB__ 199*90e8cacdSRalf Baechle struct j_format { /* Jump format */ 200*90e8cacdSRalf Baechle unsigned int opcode : 6; 201*90e8cacdSRalf Baechle unsigned int target : 26; 202*90e8cacdSRalf Baechle }; 203*90e8cacdSRalf Baechle 204*90e8cacdSRalf Baechle struct i_format { /* Immediate format (addi, lw, ...) */ 205*90e8cacdSRalf Baechle unsigned int opcode : 6; 206*90e8cacdSRalf Baechle unsigned int rs : 5; 207*90e8cacdSRalf Baechle unsigned int rt : 5; 208*90e8cacdSRalf Baechle signed int simmediate : 16; 209*90e8cacdSRalf Baechle }; 210*90e8cacdSRalf Baechle 211*90e8cacdSRalf Baechle struct u_format { /* Unsigned immediate format (ori, xori, ...) */ 212*90e8cacdSRalf Baechle unsigned int opcode : 6; 213*90e8cacdSRalf Baechle unsigned int rs : 5; 214*90e8cacdSRalf Baechle unsigned int rt : 5; 215*90e8cacdSRalf Baechle unsigned int uimmediate : 16; 216*90e8cacdSRalf Baechle }; 217*90e8cacdSRalf Baechle 218*90e8cacdSRalf Baechle struct c_format { /* Cache (>= R6000) format */ 219*90e8cacdSRalf Baechle unsigned int opcode : 6; 220*90e8cacdSRalf Baechle unsigned int rs : 5; 221*90e8cacdSRalf Baechle unsigned int c_op : 3; 222*90e8cacdSRalf Baechle unsigned int cache : 2; 223*90e8cacdSRalf Baechle unsigned int simmediate : 16; 224*90e8cacdSRalf Baechle }; 225*90e8cacdSRalf Baechle 226*90e8cacdSRalf Baechle struct r_format { /* Register format */ 227*90e8cacdSRalf Baechle unsigned int opcode : 6; 228*90e8cacdSRalf Baechle unsigned int rs : 5; 229*90e8cacdSRalf Baechle unsigned int rt : 5; 230*90e8cacdSRalf Baechle unsigned int rd : 5; 231*90e8cacdSRalf Baechle unsigned int re : 5; 232*90e8cacdSRalf Baechle unsigned int func : 6; 233*90e8cacdSRalf Baechle }; 234*90e8cacdSRalf Baechle 235*90e8cacdSRalf Baechle struct p_format { /* Performance counter format (R10000) */ 236*90e8cacdSRalf Baechle unsigned int opcode : 6; 237*90e8cacdSRalf Baechle unsigned int rs : 5; 238*90e8cacdSRalf Baechle unsigned int rt : 5; 239*90e8cacdSRalf Baechle unsigned int rd : 5; 240*90e8cacdSRalf Baechle unsigned int re : 5; 241*90e8cacdSRalf Baechle unsigned int func : 6; 242*90e8cacdSRalf Baechle }; 243*90e8cacdSRalf Baechle 244*90e8cacdSRalf Baechle struct f_format { /* FPU register format */ 245*90e8cacdSRalf Baechle unsigned int opcode : 6; 246*90e8cacdSRalf Baechle unsigned int : 1; 247*90e8cacdSRalf Baechle unsigned int fmt : 4; 248*90e8cacdSRalf Baechle unsigned int rt : 5; 249*90e8cacdSRalf Baechle unsigned int rd : 5; 250*90e8cacdSRalf Baechle unsigned int re : 5; 251*90e8cacdSRalf Baechle unsigned int func : 6; 252*90e8cacdSRalf Baechle }; 253*90e8cacdSRalf Baechle 254*90e8cacdSRalf Baechle struct ma_format { /* FPU multiply and add format (MIPS IV) */ 255*90e8cacdSRalf Baechle unsigned int opcode : 6; 256*90e8cacdSRalf Baechle unsigned int fr : 5; 257*90e8cacdSRalf Baechle unsigned int ft : 5; 258*90e8cacdSRalf Baechle unsigned int fs : 5; 259*90e8cacdSRalf Baechle unsigned int fd : 5; 260*90e8cacdSRalf Baechle unsigned int func : 4; 261*90e8cacdSRalf Baechle unsigned int fmt : 2; 262*90e8cacdSRalf Baechle }; 263*90e8cacdSRalf Baechle 264*90e8cacdSRalf Baechle struct b_format { /* BREAK and SYSCALL */ 265*90e8cacdSRalf Baechle unsigned int opcode:6; 266*90e8cacdSRalf Baechle unsigned int code:20; 267*90e8cacdSRalf Baechle unsigned int func:6; 268*90e8cacdSRalf Baechle }; 269*90e8cacdSRalf Baechle 270*90e8cacdSRalf Baechle #elif defined(__MIPSEL__) 271*90e8cacdSRalf Baechle 272*90e8cacdSRalf Baechle struct j_format { /* Jump format */ 273*90e8cacdSRalf Baechle unsigned int target : 26; 274*90e8cacdSRalf Baechle unsigned int opcode : 6; 275*90e8cacdSRalf Baechle }; 276*90e8cacdSRalf Baechle 277*90e8cacdSRalf Baechle struct i_format { /* Immediate format */ 278*90e8cacdSRalf Baechle signed int simmediate : 16; 279*90e8cacdSRalf Baechle unsigned int rt : 5; 280*90e8cacdSRalf Baechle unsigned int rs : 5; 281*90e8cacdSRalf Baechle unsigned int opcode : 6; 282*90e8cacdSRalf Baechle }; 283*90e8cacdSRalf Baechle 284*90e8cacdSRalf Baechle struct u_format { /* Unsigned immediate format */ 285*90e8cacdSRalf Baechle unsigned int uimmediate : 16; 286*90e8cacdSRalf Baechle unsigned int rt : 5; 287*90e8cacdSRalf Baechle unsigned int rs : 5; 288*90e8cacdSRalf Baechle unsigned int opcode : 6; 289*90e8cacdSRalf Baechle }; 290*90e8cacdSRalf Baechle 291*90e8cacdSRalf Baechle struct c_format { /* Cache (>= R6000) format */ 292*90e8cacdSRalf Baechle unsigned int simmediate : 16; 293*90e8cacdSRalf Baechle unsigned int cache : 2; 294*90e8cacdSRalf Baechle unsigned int c_op : 3; 295*90e8cacdSRalf Baechle unsigned int rs : 5; 296*90e8cacdSRalf Baechle unsigned int opcode : 6; 297*90e8cacdSRalf Baechle }; 298*90e8cacdSRalf Baechle 299*90e8cacdSRalf Baechle struct r_format { /* Register format */ 300*90e8cacdSRalf Baechle unsigned int func : 6; 301*90e8cacdSRalf Baechle unsigned int re : 5; 302*90e8cacdSRalf Baechle unsigned int rd : 5; 303*90e8cacdSRalf Baechle unsigned int rt : 5; 304*90e8cacdSRalf Baechle unsigned int rs : 5; 305*90e8cacdSRalf Baechle unsigned int opcode : 6; 306*90e8cacdSRalf Baechle }; 307*90e8cacdSRalf Baechle 308*90e8cacdSRalf Baechle struct p_format { /* Performance counter format (R10000) */ 309*90e8cacdSRalf Baechle unsigned int func : 6; 310*90e8cacdSRalf Baechle unsigned int re : 5; 311*90e8cacdSRalf Baechle unsigned int rd : 5; 312*90e8cacdSRalf Baechle unsigned int rt : 5; 313*90e8cacdSRalf Baechle unsigned int rs : 5; 314*90e8cacdSRalf Baechle unsigned int opcode : 6; 315*90e8cacdSRalf Baechle }; 316*90e8cacdSRalf Baechle 317*90e8cacdSRalf Baechle struct f_format { /* FPU register format */ 318*90e8cacdSRalf Baechle unsigned int func : 6; 319*90e8cacdSRalf Baechle unsigned int re : 5; 320*90e8cacdSRalf Baechle unsigned int rd : 5; 321*90e8cacdSRalf Baechle unsigned int rt : 5; 322*90e8cacdSRalf Baechle unsigned int fmt : 4; 323*90e8cacdSRalf Baechle unsigned int : 1; 324*90e8cacdSRalf Baechle unsigned int opcode : 6; 325*90e8cacdSRalf Baechle }; 326*90e8cacdSRalf Baechle 327*90e8cacdSRalf Baechle struct ma_format { /* FPU multiply and add format (MIPS IV) */ 328*90e8cacdSRalf Baechle unsigned int fmt : 2; 329*90e8cacdSRalf Baechle unsigned int func : 4; 330*90e8cacdSRalf Baechle unsigned int fd : 5; 331*90e8cacdSRalf Baechle unsigned int fs : 5; 332*90e8cacdSRalf Baechle unsigned int ft : 5; 333*90e8cacdSRalf Baechle unsigned int fr : 5; 334*90e8cacdSRalf Baechle unsigned int opcode : 6; 335*90e8cacdSRalf Baechle }; 336*90e8cacdSRalf Baechle 337*90e8cacdSRalf Baechle struct b_format { /* BREAK and SYSCALL */ 338*90e8cacdSRalf Baechle unsigned int func:6; 339*90e8cacdSRalf Baechle unsigned int code:20; 340*90e8cacdSRalf Baechle unsigned int opcode:6; 341*90e8cacdSRalf Baechle }; 342*90e8cacdSRalf Baechle 343*90e8cacdSRalf Baechle #else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */ 344*90e8cacdSRalf Baechle #error "MIPS but neither __MIPSEL__ nor __MIPSEB__?" 345*90e8cacdSRalf Baechle #endif 346*90e8cacdSRalf Baechle 347*90e8cacdSRalf Baechle union mips_instruction { 348*90e8cacdSRalf Baechle unsigned int word; 349*90e8cacdSRalf Baechle unsigned short halfword[2]; 350*90e8cacdSRalf Baechle unsigned char byte[4]; 351*90e8cacdSRalf Baechle struct j_format j_format; 352*90e8cacdSRalf Baechle struct i_format i_format; 353*90e8cacdSRalf Baechle struct u_format u_format; 354*90e8cacdSRalf Baechle struct c_format c_format; 355*90e8cacdSRalf Baechle struct r_format r_format; 356*90e8cacdSRalf Baechle struct p_format p_format; 357*90e8cacdSRalf Baechle struct f_format f_format; 358*90e8cacdSRalf Baechle struct ma_format ma_format; 359*90e8cacdSRalf Baechle struct b_format b_format; 360*90e8cacdSRalf Baechle }; 361*90e8cacdSRalf Baechle 362*90e8cacdSRalf Baechle #endif /* _UAPI_ASM_INST_H */ 363