190e8cacdSRalf Baechle /* 290e8cacdSRalf Baechle * Format of an instruction in memory. 390e8cacdSRalf Baechle * 490e8cacdSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 590e8cacdSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 690e8cacdSRalf Baechle * for more details. 790e8cacdSRalf Baechle * 890e8cacdSRalf Baechle * Copyright (C) 1996, 2000 by Ralf Baechle 990e8cacdSRalf Baechle * Copyright (C) 2006 by Thiemo Seufer 102aa9fd06SSteven J. Hill * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 1190e8cacdSRalf Baechle */ 1290e8cacdSRalf Baechle #ifndef _UAPI_ASM_INST_H 1390e8cacdSRalf Baechle #define _UAPI_ASM_INST_H 1490e8cacdSRalf Baechle 1590e8cacdSRalf Baechle /* 1690e8cacdSRalf Baechle * Major opcodes; before MIPS IV cop1x was called cop3. 1790e8cacdSRalf Baechle */ 1890e8cacdSRalf Baechle enum major_op { 1990e8cacdSRalf Baechle spec_op, bcond_op, j_op, jal_op, 2090e8cacdSRalf Baechle beq_op, bne_op, blez_op, bgtz_op, 2190e8cacdSRalf Baechle addi_op, addiu_op, slti_op, sltiu_op, 2290e8cacdSRalf Baechle andi_op, ori_op, xori_op, lui_op, 2390e8cacdSRalf Baechle cop0_op, cop1_op, cop2_op, cop1x_op, 2490e8cacdSRalf Baechle beql_op, bnel_op, blezl_op, bgtzl_op, 2590e8cacdSRalf Baechle daddi_op, daddiu_op, ldl_op, ldr_op, 2690e8cacdSRalf Baechle spec2_op, jalx_op, mdmx_op, spec3_op, 2790e8cacdSRalf Baechle lb_op, lh_op, lwl_op, lw_op, 2890e8cacdSRalf Baechle lbu_op, lhu_op, lwr_op, lwu_op, 2990e8cacdSRalf Baechle sb_op, sh_op, swl_op, sw_op, 3090e8cacdSRalf Baechle sdl_op, sdr_op, swr_op, cache_op, 3190e8cacdSRalf Baechle ll_op, lwc1_op, lwc2_op, pref_op, 3290e8cacdSRalf Baechle lld_op, ldc1_op, ldc2_op, ld_op, 3390e8cacdSRalf Baechle sc_op, swc1_op, swc2_op, major_3b_op, 3490e8cacdSRalf Baechle scd_op, sdc1_op, sdc2_op, sd_op 3590e8cacdSRalf Baechle }; 3690e8cacdSRalf Baechle 3790e8cacdSRalf Baechle /* 3890e8cacdSRalf Baechle * func field of spec opcode. 3990e8cacdSRalf Baechle */ 4090e8cacdSRalf Baechle enum spec_op { 4190e8cacdSRalf Baechle sll_op, movc_op, srl_op, sra_op, 4290e8cacdSRalf Baechle sllv_op, pmon_op, srlv_op, srav_op, 4390e8cacdSRalf Baechle jr_op, jalr_op, movz_op, movn_op, 4490e8cacdSRalf Baechle syscall_op, break_op, spim_op, sync_op, 4590e8cacdSRalf Baechle mfhi_op, mthi_op, mflo_op, mtlo_op, 4690e8cacdSRalf Baechle dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op, 4790e8cacdSRalf Baechle mult_op, multu_op, div_op, divu_op, 4890e8cacdSRalf Baechle dmult_op, dmultu_op, ddiv_op, ddivu_op, 4990e8cacdSRalf Baechle add_op, addu_op, sub_op, subu_op, 5090e8cacdSRalf Baechle and_op, or_op, xor_op, nor_op, 5190e8cacdSRalf Baechle spec3_unused_op, spec4_unused_op, slt_op, sltu_op, 5290e8cacdSRalf Baechle dadd_op, daddu_op, dsub_op, dsubu_op, 5390e8cacdSRalf Baechle tge_op, tgeu_op, tlt_op, tltu_op, 5490e8cacdSRalf Baechle teq_op, spec5_unused_op, tne_op, spec6_unused_op, 5590e8cacdSRalf Baechle dsll_op, spec7_unused_op, dsrl_op, dsra_op, 5690e8cacdSRalf Baechle dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op 5790e8cacdSRalf Baechle }; 5890e8cacdSRalf Baechle 5990e8cacdSRalf Baechle /* 6090e8cacdSRalf Baechle * func field of spec2 opcode. 6190e8cacdSRalf Baechle */ 6290e8cacdSRalf Baechle enum spec2_op { 6390e8cacdSRalf Baechle madd_op, maddu_op, mul_op, spec2_3_unused_op, 6490e8cacdSRalf Baechle msub_op, msubu_op, /* more unused ops */ 6590e8cacdSRalf Baechle clz_op = 0x20, clo_op, 6690e8cacdSRalf Baechle dclz_op = 0x24, dclo_op, 6790e8cacdSRalf Baechle sdbpp_op = 0x3f 6890e8cacdSRalf Baechle }; 6990e8cacdSRalf Baechle 7090e8cacdSRalf Baechle /* 7190e8cacdSRalf Baechle * func field of spec3 opcode. 7290e8cacdSRalf Baechle */ 7390e8cacdSRalf Baechle enum spec3_op { 7490e8cacdSRalf Baechle ext_op, dextm_op, dextu_op, dext_op, 7590e8cacdSRalf Baechle ins_op, dinsm_op, dinsu_op, dins_op, 7690e8cacdSRalf Baechle lx_op = 0x0a, 7790e8cacdSRalf Baechle bshfl_op = 0x20, 7890e8cacdSRalf Baechle dbshfl_op = 0x24, 7990e8cacdSRalf Baechle rdhwr_op = 0x3b 8090e8cacdSRalf Baechle }; 8190e8cacdSRalf Baechle 8290e8cacdSRalf Baechle /* 8390e8cacdSRalf Baechle * rt field of bcond opcodes. 8490e8cacdSRalf Baechle */ 8590e8cacdSRalf Baechle enum rt_op { 8690e8cacdSRalf Baechle bltz_op, bgez_op, bltzl_op, bgezl_op, 8790e8cacdSRalf Baechle spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07, 8890e8cacdSRalf Baechle tgei_op, tgeiu_op, tlti_op, tltiu_op, 8990e8cacdSRalf Baechle teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op, 9090e8cacdSRalf Baechle bltzal_op, bgezal_op, bltzall_op, bgezall_op, 9190e8cacdSRalf Baechle rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17, 9290e8cacdSRalf Baechle rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b, 9390e8cacdSRalf Baechle bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f 9490e8cacdSRalf Baechle }; 9590e8cacdSRalf Baechle 9690e8cacdSRalf Baechle /* 9790e8cacdSRalf Baechle * rs field of cop opcodes. 9890e8cacdSRalf Baechle */ 9990e8cacdSRalf Baechle enum cop_op { 10090e8cacdSRalf Baechle mfc_op = 0x00, dmfc_op = 0x01, 1011ac94400SLeonid Yegoshin cfc_op = 0x02, mfhc_op = 0x03, 1021ac94400SLeonid Yegoshin mtc_op = 0x04, dmtc_op = 0x05, 1031ac94400SLeonid Yegoshin ctc_op = 0x06, mthc_op = 0x07, 10490e8cacdSRalf Baechle bc_op = 0x08, cop_op = 0x10, 10590e8cacdSRalf Baechle copm_op = 0x18 10690e8cacdSRalf Baechle }; 10790e8cacdSRalf Baechle 10890e8cacdSRalf Baechle /* 10990e8cacdSRalf Baechle * rt field of cop.bc_op opcodes 11090e8cacdSRalf Baechle */ 11190e8cacdSRalf Baechle enum bcop_op { 11290e8cacdSRalf Baechle bcf_op, bct_op, bcfl_op, bctl_op 11390e8cacdSRalf Baechle }; 11490e8cacdSRalf Baechle 11590e8cacdSRalf Baechle /* 11690e8cacdSRalf Baechle * func field of cop0 coi opcodes. 11790e8cacdSRalf Baechle */ 11890e8cacdSRalf Baechle enum cop0_coi_func { 11990e8cacdSRalf Baechle tlbr_op = 0x01, tlbwi_op = 0x02, 12090e8cacdSRalf Baechle tlbwr_op = 0x06, tlbp_op = 0x08, 12190e8cacdSRalf Baechle rfe_op = 0x10, eret_op = 0x18 12290e8cacdSRalf Baechle }; 12390e8cacdSRalf Baechle 12490e8cacdSRalf Baechle /* 12590e8cacdSRalf Baechle * func field of cop0 com opcodes. 12690e8cacdSRalf Baechle */ 12790e8cacdSRalf Baechle enum cop0_com_func { 12890e8cacdSRalf Baechle tlbr1_op = 0x01, tlbw_op = 0x02, 12990e8cacdSRalf Baechle tlbp1_op = 0x08, dctr_op = 0x09, 13090e8cacdSRalf Baechle dctw_op = 0x0a 13190e8cacdSRalf Baechle }; 13290e8cacdSRalf Baechle 13390e8cacdSRalf Baechle /* 13490e8cacdSRalf Baechle * fmt field of cop1 opcodes. 13590e8cacdSRalf Baechle */ 13690e8cacdSRalf Baechle enum cop1_fmt { 13790e8cacdSRalf Baechle s_fmt, d_fmt, e_fmt, q_fmt, 13890e8cacdSRalf Baechle w_fmt, l_fmt 13990e8cacdSRalf Baechle }; 14090e8cacdSRalf Baechle 14190e8cacdSRalf Baechle /* 14290e8cacdSRalf Baechle * func field of cop1 instructions using d, s or w format. 14390e8cacdSRalf Baechle */ 14490e8cacdSRalf Baechle enum cop1_sdw_func { 14590e8cacdSRalf Baechle fadd_op = 0x00, fsub_op = 0x01, 14690e8cacdSRalf Baechle fmul_op = 0x02, fdiv_op = 0x03, 14790e8cacdSRalf Baechle fsqrt_op = 0x04, fabs_op = 0x05, 14890e8cacdSRalf Baechle fmov_op = 0x06, fneg_op = 0x07, 14990e8cacdSRalf Baechle froundl_op = 0x08, ftruncl_op = 0x09, 15090e8cacdSRalf Baechle fceill_op = 0x0a, ffloorl_op = 0x0b, 15190e8cacdSRalf Baechle fround_op = 0x0c, ftrunc_op = 0x0d, 15290e8cacdSRalf Baechle fceil_op = 0x0e, ffloor_op = 0x0f, 15390e8cacdSRalf Baechle fmovc_op = 0x11, fmovz_op = 0x12, 15490e8cacdSRalf Baechle fmovn_op = 0x13, frecip_op = 0x15, 15590e8cacdSRalf Baechle frsqrt_op = 0x16, fcvts_op = 0x20, 15690e8cacdSRalf Baechle fcvtd_op = 0x21, fcvte_op = 0x22, 15790e8cacdSRalf Baechle fcvtw_op = 0x24, fcvtl_op = 0x25, 15890e8cacdSRalf Baechle fcmp_op = 0x30 15990e8cacdSRalf Baechle }; 16090e8cacdSRalf Baechle 16190e8cacdSRalf Baechle /* 16290e8cacdSRalf Baechle * func field of cop1x opcodes (MIPS IV). 16390e8cacdSRalf Baechle */ 16490e8cacdSRalf Baechle enum cop1x_func { 16590e8cacdSRalf Baechle lwxc1_op = 0x00, ldxc1_op = 0x01, 166*51061b88SDeng-Cheng Zhu swxc1_op = 0x08, sdxc1_op = 0x09, 167*51061b88SDeng-Cheng Zhu pfetch_op = 0x0f, madd_s_op = 0x20, 16890e8cacdSRalf Baechle madd_d_op = 0x21, madd_e_op = 0x22, 16990e8cacdSRalf Baechle msub_s_op = 0x28, msub_d_op = 0x29, 17090e8cacdSRalf Baechle msub_e_op = 0x2a, nmadd_s_op = 0x30, 17190e8cacdSRalf Baechle nmadd_d_op = 0x31, nmadd_e_op = 0x32, 17290e8cacdSRalf Baechle nmsub_s_op = 0x38, nmsub_d_op = 0x39, 17390e8cacdSRalf Baechle nmsub_e_op = 0x3a 17490e8cacdSRalf Baechle }; 17590e8cacdSRalf Baechle 17690e8cacdSRalf Baechle /* 17790e8cacdSRalf Baechle * func field for mad opcodes (MIPS IV). 17890e8cacdSRalf Baechle */ 17990e8cacdSRalf Baechle enum mad_func { 18090e8cacdSRalf Baechle madd_fp_op = 0x08, msub_fp_op = 0x0a, 18190e8cacdSRalf Baechle nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e 18290e8cacdSRalf Baechle }; 18390e8cacdSRalf Baechle 18490e8cacdSRalf Baechle /* 18590e8cacdSRalf Baechle * func field for special3 lx opcodes (Cavium Octeon). 18690e8cacdSRalf Baechle */ 18790e8cacdSRalf Baechle enum lx_func { 18890e8cacdSRalf Baechle lwx_op = 0x00, 18990e8cacdSRalf Baechle lhx_op = 0x04, 19090e8cacdSRalf Baechle lbux_op = 0x06, 19190e8cacdSRalf Baechle ldx_op = 0x08, 19290e8cacdSRalf Baechle lwux_op = 0x10, 19390e8cacdSRalf Baechle lhux_op = 0x14, 19490e8cacdSRalf Baechle lbx_op = 0x16, 19590e8cacdSRalf Baechle }; 19690e8cacdSRalf Baechle 19790e8cacdSRalf Baechle /* 1982aa9fd06SSteven J. Hill * (microMIPS) Major opcodes. 1992aa9fd06SSteven J. Hill */ 2002aa9fd06SSteven J. Hill enum mm_major_op { 2012aa9fd06SSteven J. Hill mm_pool32a_op, mm_pool16a_op, mm_lbu16_op, mm_move16_op, 2022aa9fd06SSteven J. Hill mm_addi32_op, mm_lbu32_op, mm_sb32_op, mm_lb32_op, 2032aa9fd06SSteven J. Hill mm_pool32b_op, mm_pool16b_op, mm_lhu16_op, mm_andi16_op, 2042aa9fd06SSteven J. Hill mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op, 2052aa9fd06SSteven J. Hill mm_pool32i_op, mm_pool16c_op, mm_lwsp16_op, mm_pool16d_op, 2062aa9fd06SSteven J. Hill mm_ori32_op, mm_pool32f_op, mm_reserved1_op, mm_reserved2_op, 2072aa9fd06SSteven J. Hill mm_pool32c_op, mm_lwgp16_op, mm_lw16_op, mm_pool16e_op, 2082aa9fd06SSteven J. Hill mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op, 2092aa9fd06SSteven J. Hill mm_reserved4_op, mm_pool16f_op, mm_sb16_op, mm_beqz16_op, 2102aa9fd06SSteven J. Hill mm_slti32_op, mm_beq32_op, mm_swc132_op, mm_lwc132_op, 2112aa9fd06SSteven J. Hill mm_reserved5_op, mm_reserved6_op, mm_sh16_op, mm_bnez16_op, 2122aa9fd06SSteven J. Hill mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op, 2132aa9fd06SSteven J. Hill mm_reserved7_op, mm_reserved8_op, mm_swsp16_op, mm_b16_op, 2142aa9fd06SSteven J. Hill mm_andi32_op, mm_j32_op, mm_sd32_op, mm_ld32_op, 2152aa9fd06SSteven J. Hill mm_reserved11_op, mm_reserved12_op, mm_sw16_op, mm_li16_op, 2162aa9fd06SSteven J. Hill mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op, 2172aa9fd06SSteven J. Hill }; 2182aa9fd06SSteven J. Hill 2192aa9fd06SSteven J. Hill /* 2202aa9fd06SSteven J. Hill * (microMIPS) POOL32I minor opcodes. 2212aa9fd06SSteven J. Hill */ 2222aa9fd06SSteven J. Hill enum mm_32i_minor_op { 2232aa9fd06SSteven J. Hill mm_bltz_op, mm_bltzal_op, mm_bgez_op, mm_bgezal_op, 2242aa9fd06SSteven J. Hill mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op, 2252aa9fd06SSteven J. Hill mm_tlti_op, mm_tgei_op, mm_tltiu_op, mm_tgeiu_op, 2262aa9fd06SSteven J. Hill mm_tnei_op, mm_lui_op, mm_teqi_op, mm_reserved13_op, 2272aa9fd06SSteven J. Hill mm_synci_op, mm_bltzals_op, mm_reserved14_op, mm_bgezals_op, 2282aa9fd06SSteven J. Hill mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op, 2292aa9fd06SSteven J. Hill mm_reserved17_op, mm_reserved18_op, mm_bposge64_op, mm_bposge32_op, 2302aa9fd06SSteven J. Hill mm_bc1f_op, mm_bc1t_op, mm_reserved19_op, mm_reserved20_op, 2312aa9fd06SSteven J. Hill mm_bc1any2f_op, mm_bc1any2t_op, mm_bc1any4f_op, mm_bc1any4t_op, 2322aa9fd06SSteven J. Hill }; 2332aa9fd06SSteven J. Hill 2342aa9fd06SSteven J. Hill /* 2352aa9fd06SSteven J. Hill * (microMIPS) POOL32A minor opcodes. 2362aa9fd06SSteven J. Hill */ 2372aa9fd06SSteven J. Hill enum mm_32a_minor_op { 2382aa9fd06SSteven J. Hill mm_sll32_op = 0x000, 2392aa9fd06SSteven J. Hill mm_ins_op = 0x00c, 2402aa9fd06SSteven J. Hill mm_ext_op = 0x02c, 2412aa9fd06SSteven J. Hill mm_pool32axf_op = 0x03c, 2422aa9fd06SSteven J. Hill mm_srl32_op = 0x040, 2432aa9fd06SSteven J. Hill mm_sra_op = 0x080, 2442aa9fd06SSteven J. Hill mm_rotr_op = 0x0c0, 2452aa9fd06SSteven J. Hill mm_lwxs_op = 0x118, 2462aa9fd06SSteven J. Hill mm_addu32_op = 0x150, 2472aa9fd06SSteven J. Hill mm_subu32_op = 0x1d0, 2482aa9fd06SSteven J. Hill mm_and_op = 0x250, 2492aa9fd06SSteven J. Hill mm_or32_op = 0x290, 2502aa9fd06SSteven J. Hill mm_xor32_op = 0x310, 2512aa9fd06SSteven J. Hill }; 2522aa9fd06SSteven J. Hill 2532aa9fd06SSteven J. Hill /* 2542aa9fd06SSteven J. Hill * (microMIPS) POOL32B functions. 2552aa9fd06SSteven J. Hill */ 2562aa9fd06SSteven J. Hill enum mm_32b_func { 2572aa9fd06SSteven J. Hill mm_lwc2_func = 0x0, 2582aa9fd06SSteven J. Hill mm_lwp_func = 0x1, 2592aa9fd06SSteven J. Hill mm_ldc2_func = 0x2, 2602aa9fd06SSteven J. Hill mm_ldp_func = 0x4, 2612aa9fd06SSteven J. Hill mm_lwm32_func = 0x5, 2622aa9fd06SSteven J. Hill mm_cache_func = 0x6, 2632aa9fd06SSteven J. Hill mm_ldm_func = 0x7, 2642aa9fd06SSteven J. Hill mm_swc2_func = 0x8, 2652aa9fd06SSteven J. Hill mm_swp_func = 0x9, 2662aa9fd06SSteven J. Hill mm_sdc2_func = 0xa, 2672aa9fd06SSteven J. Hill mm_sdp_func = 0xc, 2682aa9fd06SSteven J. Hill mm_swm32_func = 0xd, 2692aa9fd06SSteven J. Hill mm_sdm_func = 0xf, 2702aa9fd06SSteven J. Hill }; 2712aa9fd06SSteven J. Hill 2722aa9fd06SSteven J. Hill /* 2732aa9fd06SSteven J. Hill * (microMIPS) POOL32C functions. 2742aa9fd06SSteven J. Hill */ 2752aa9fd06SSteven J. Hill enum mm_32c_func { 2762aa9fd06SSteven J. Hill mm_pref_func = 0x2, 2772aa9fd06SSteven J. Hill mm_ll_func = 0x3, 2782aa9fd06SSteven J. Hill mm_swr_func = 0x9, 2792aa9fd06SSteven J. Hill mm_sc_func = 0xb, 2802aa9fd06SSteven J. Hill mm_lwu_func = 0xe, 2812aa9fd06SSteven J. Hill }; 2822aa9fd06SSteven J. Hill 2832aa9fd06SSteven J. Hill /* 2842aa9fd06SSteven J. Hill * (microMIPS) POOL32AXF minor opcodes. 2852aa9fd06SSteven J. Hill */ 2862aa9fd06SSteven J. Hill enum mm_32axf_minor_op { 2872aa9fd06SSteven J. Hill mm_mfc0_op = 0x003, 2882aa9fd06SSteven J. Hill mm_mtc0_op = 0x00b, 2892aa9fd06SSteven J. Hill mm_tlbp_op = 0x00d, 2902aa9fd06SSteven J. Hill mm_jalr_op = 0x03c, 2912aa9fd06SSteven J. Hill mm_tlbr_op = 0x04d, 2922aa9fd06SSteven J. Hill mm_jalrhb_op = 0x07c, 2932aa9fd06SSteven J. Hill mm_tlbwi_op = 0x08d, 2942aa9fd06SSteven J. Hill mm_tlbwr_op = 0x0cd, 2952aa9fd06SSteven J. Hill mm_jalrs_op = 0x13c, 2962aa9fd06SSteven J. Hill mm_jalrshb_op = 0x17c, 2972aa9fd06SSteven J. Hill mm_syscall_op = 0x22d, 2982aa9fd06SSteven J. Hill mm_eret_op = 0x3cd, 2992aa9fd06SSteven J. Hill }; 3002aa9fd06SSteven J. Hill 3012aa9fd06SSteven J. Hill /* 3022aa9fd06SSteven J. Hill * (microMIPS) POOL32F minor opcodes. 3032aa9fd06SSteven J. Hill */ 3042aa9fd06SSteven J. Hill enum mm_32f_minor_op { 3052aa9fd06SSteven J. Hill mm_32f_00_op = 0x00, 3062aa9fd06SSteven J. Hill mm_32f_01_op = 0x01, 3072aa9fd06SSteven J. Hill mm_32f_02_op = 0x02, 3082aa9fd06SSteven J. Hill mm_32f_10_op = 0x08, 3092aa9fd06SSteven J. Hill mm_32f_11_op = 0x09, 3102aa9fd06SSteven J. Hill mm_32f_12_op = 0x0a, 3112aa9fd06SSteven J. Hill mm_32f_20_op = 0x10, 3122aa9fd06SSteven J. Hill mm_32f_30_op = 0x18, 3132aa9fd06SSteven J. Hill mm_32f_40_op = 0x20, 3142aa9fd06SSteven J. Hill mm_32f_41_op = 0x21, 3152aa9fd06SSteven J. Hill mm_32f_42_op = 0x22, 3162aa9fd06SSteven J. Hill mm_32f_50_op = 0x28, 3172aa9fd06SSteven J. Hill mm_32f_51_op = 0x29, 3182aa9fd06SSteven J. Hill mm_32f_52_op = 0x2a, 3192aa9fd06SSteven J. Hill mm_32f_60_op = 0x30, 3202aa9fd06SSteven J. Hill mm_32f_70_op = 0x38, 3212aa9fd06SSteven J. Hill mm_32f_73_op = 0x3b, 3222aa9fd06SSteven J. Hill mm_32f_74_op = 0x3c, 3232aa9fd06SSteven J. Hill }; 3242aa9fd06SSteven J. Hill 3252aa9fd06SSteven J. Hill /* 3262aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3272aa9fd06SSteven J. Hill */ 3282aa9fd06SSteven J. Hill enum mm_32f_10_minor_op { 3292aa9fd06SSteven J. Hill mm_lwxc1_op = 0x1, 3302aa9fd06SSteven J. Hill mm_swxc1_op, 3312aa9fd06SSteven J. Hill mm_ldxc1_op, 3322aa9fd06SSteven J. Hill mm_sdxc1_op, 3332aa9fd06SSteven J. Hill mm_luxc1_op, 3342aa9fd06SSteven J. Hill mm_suxc1_op, 3352aa9fd06SSteven J. Hill }; 3362aa9fd06SSteven J. Hill 3372aa9fd06SSteven J. Hill enum mm_32f_func { 3382aa9fd06SSteven J. Hill mm_lwxc1_func = 0x048, 3392aa9fd06SSteven J. Hill mm_swxc1_func = 0x088, 3402aa9fd06SSteven J. Hill mm_ldxc1_func = 0x0c8, 3412aa9fd06SSteven J. Hill mm_sdxc1_func = 0x108, 3422aa9fd06SSteven J. Hill }; 3432aa9fd06SSteven J. Hill 3442aa9fd06SSteven J. Hill /* 3452aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3462aa9fd06SSteven J. Hill */ 3472aa9fd06SSteven J. Hill enum mm_32f_40_minor_op { 3482aa9fd06SSteven J. Hill mm_fmovf_op, 3492aa9fd06SSteven J. Hill mm_fmovt_op, 3502aa9fd06SSteven J. Hill }; 3512aa9fd06SSteven J. Hill 3522aa9fd06SSteven J. Hill /* 3532aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3542aa9fd06SSteven J. Hill */ 3552aa9fd06SSteven J. Hill enum mm_32f_60_minor_op { 3562aa9fd06SSteven J. Hill mm_fadd_op, 3572aa9fd06SSteven J. Hill mm_fsub_op, 3582aa9fd06SSteven J. Hill mm_fmul_op, 3592aa9fd06SSteven J. Hill mm_fdiv_op, 3602aa9fd06SSteven J. Hill }; 3612aa9fd06SSteven J. Hill 3622aa9fd06SSteven J. Hill /* 3632aa9fd06SSteven J. Hill * (microMIPS) POOL32F secondary minor opcodes. 3642aa9fd06SSteven J. Hill */ 3652aa9fd06SSteven J. Hill enum mm_32f_70_minor_op { 3662aa9fd06SSteven J. Hill mm_fmovn_op, 3672aa9fd06SSteven J. Hill mm_fmovz_op, 3682aa9fd06SSteven J. Hill }; 3692aa9fd06SSteven J. Hill 3702aa9fd06SSteven J. Hill /* 3712aa9fd06SSteven J. Hill * (microMIPS) POOL32FXF secondary minor opcodes for POOL32F. 3722aa9fd06SSteven J. Hill */ 3732aa9fd06SSteven J. Hill enum mm_32f_73_minor_op { 3742aa9fd06SSteven J. Hill mm_fmov0_op = 0x01, 3752aa9fd06SSteven J. Hill mm_fcvtl_op = 0x04, 3762aa9fd06SSteven J. Hill mm_movf0_op = 0x05, 3772aa9fd06SSteven J. Hill mm_frsqrt_op = 0x08, 3782aa9fd06SSteven J. Hill mm_ffloorl_op = 0x0c, 3792aa9fd06SSteven J. Hill mm_fabs0_op = 0x0d, 3802aa9fd06SSteven J. Hill mm_fcvtw_op = 0x24, 3812aa9fd06SSteven J. Hill mm_movt0_op = 0x25, 3822aa9fd06SSteven J. Hill mm_fsqrt_op = 0x28, 3832aa9fd06SSteven J. Hill mm_ffloorw_op = 0x2c, 3842aa9fd06SSteven J. Hill mm_fneg0_op = 0x2d, 3852aa9fd06SSteven J. Hill mm_cfc1_op = 0x40, 3862aa9fd06SSteven J. Hill mm_frecip_op = 0x48, 3872aa9fd06SSteven J. Hill mm_fceill_op = 0x4c, 3882aa9fd06SSteven J. Hill mm_fcvtd0_op = 0x4d, 3892aa9fd06SSteven J. Hill mm_ctc1_op = 0x60, 3902aa9fd06SSteven J. Hill mm_fceilw_op = 0x6c, 3912aa9fd06SSteven J. Hill mm_fcvts0_op = 0x6d, 3922aa9fd06SSteven J. Hill mm_mfc1_op = 0x80, 3932aa9fd06SSteven J. Hill mm_fmov1_op = 0x81, 3942aa9fd06SSteven J. Hill mm_movf1_op = 0x85, 3952aa9fd06SSteven J. Hill mm_ftruncl_op = 0x8c, 3962aa9fd06SSteven J. Hill mm_fabs1_op = 0x8d, 3972aa9fd06SSteven J. Hill mm_mtc1_op = 0xa0, 3982aa9fd06SSteven J. Hill mm_movt1_op = 0xa5, 3992aa9fd06SSteven J. Hill mm_ftruncw_op = 0xac, 4002aa9fd06SSteven J. Hill mm_fneg1_op = 0xad, 4019355e59cSSteven J. Hill mm_mfhc1_op = 0xc0, 4022aa9fd06SSteven J. Hill mm_froundl_op = 0xcc, 4032aa9fd06SSteven J. Hill mm_fcvtd1_op = 0xcd, 4049355e59cSSteven J. Hill mm_mthc1_op = 0xe0, 4052aa9fd06SSteven J. Hill mm_froundw_op = 0xec, 4062aa9fd06SSteven J. Hill mm_fcvts1_op = 0xed, 4072aa9fd06SSteven J. Hill }; 4082aa9fd06SSteven J. Hill 4092aa9fd06SSteven J. Hill /* 4102aa9fd06SSteven J. Hill * (microMIPS) POOL16C minor opcodes. 4112aa9fd06SSteven J. Hill */ 4122aa9fd06SSteven J. Hill enum mm_16c_minor_op { 4132aa9fd06SSteven J. Hill mm_lwm16_op = 0x04, 4142aa9fd06SSteven J. Hill mm_swm16_op = 0x05, 415dfb033f0STony Wu mm_jr16_op = 0x0c, 416dfb033f0STony Wu mm_jrc_op = 0x0d, 417dfb033f0STony Wu mm_jalr16_op = 0x0e, 418dfb033f0STony Wu mm_jalrs16_op = 0x0f, 419dfb033f0STony Wu mm_jraddiusp_op = 0x18, 4202aa9fd06SSteven J. Hill }; 4212aa9fd06SSteven J. Hill 4222aa9fd06SSteven J. Hill /* 4232aa9fd06SSteven J. Hill * (microMIPS) POOL16D minor opcodes. 4242aa9fd06SSteven J. Hill */ 4252aa9fd06SSteven J. Hill enum mm_16d_minor_op { 4262aa9fd06SSteven J. Hill mm_addius5_func, 4272aa9fd06SSteven J. Hill mm_addiusp_func, 4282aa9fd06SSteven J. Hill }; 4292aa9fd06SSteven J. Hill 4302aa9fd06SSteven J. Hill /* 431cd574704SSteven J. Hill * (MIPS16e) opcodes. 432cd574704SSteven J. Hill */ 433cd574704SSteven J. Hill enum MIPS16e_ops { 434cd574704SSteven J. Hill MIPS16e_jal_op = 003, 435cd574704SSteven J. Hill MIPS16e_ld_op = 007, 436cd574704SSteven J. Hill MIPS16e_i8_op = 014, 437cd574704SSteven J. Hill MIPS16e_sd_op = 017, 438cd574704SSteven J. Hill MIPS16e_lb_op = 020, 439cd574704SSteven J. Hill MIPS16e_lh_op = 021, 440cd574704SSteven J. Hill MIPS16e_lwsp_op = 022, 441cd574704SSteven J. Hill MIPS16e_lw_op = 023, 442cd574704SSteven J. Hill MIPS16e_lbu_op = 024, 443cd574704SSteven J. Hill MIPS16e_lhu_op = 025, 444cd574704SSteven J. Hill MIPS16e_lwpc_op = 026, 445cd574704SSteven J. Hill MIPS16e_lwu_op = 027, 446cd574704SSteven J. Hill MIPS16e_sb_op = 030, 447cd574704SSteven J. Hill MIPS16e_sh_op = 031, 448cd574704SSteven J. Hill MIPS16e_swsp_op = 032, 449cd574704SSteven J. Hill MIPS16e_sw_op = 033, 450cd574704SSteven J. Hill MIPS16e_rr_op = 035, 451cd574704SSteven J. Hill MIPS16e_extend_op = 036, 452cd574704SSteven J. Hill MIPS16e_i64_op = 037, 453cd574704SSteven J. Hill }; 454cd574704SSteven J. Hill 455cd574704SSteven J. Hill enum MIPS16e_i64_func { 456cd574704SSteven J. Hill MIPS16e_ldsp_func, 457cd574704SSteven J. Hill MIPS16e_sdsp_func, 458cd574704SSteven J. Hill MIPS16e_sdrasp_func, 459cd574704SSteven J. Hill MIPS16e_dadjsp_func, 460cd574704SSteven J. Hill MIPS16e_ldpc_func, 461cd574704SSteven J. Hill }; 462cd574704SSteven J. Hill 463cd574704SSteven J. Hill enum MIPS16e_rr_func { 464cd574704SSteven J. Hill MIPS16e_jr_func, 465cd574704SSteven J. Hill }; 466cd574704SSteven J. Hill 467cd574704SSteven J. Hill enum MIPS6e_i8_func { 468cd574704SSteven J. Hill MIPS16e_swrasp_func = 02, 469cd574704SSteven J. Hill }; 470cd574704SSteven J. Hill 471cd574704SSteven J. Hill /* 472102cedc3SLeonid Yegoshin * (microMIPS & MIPS16e) NOP instruction. 473102cedc3SLeonid Yegoshin */ 474102cedc3SLeonid Yegoshin #define MM_NOP16 0x0c00 475102cedc3SLeonid Yegoshin 476102cedc3SLeonid Yegoshin /* 47790e8cacdSRalf Baechle * Damn ... bitfields depend from byteorder :-( 47890e8cacdSRalf Baechle */ 47990e8cacdSRalf Baechle #ifdef __MIPSEB__ 48085dfaf08SRalf Baechle #define BITFIELD_FIELD(field, more) \ 48185dfaf08SRalf Baechle field; \ 48285dfaf08SRalf Baechle more 48390e8cacdSRalf Baechle 48490e8cacdSRalf Baechle #elif defined(__MIPSEL__) 48590e8cacdSRalf Baechle 48685dfaf08SRalf Baechle #define BITFIELD_FIELD(field, more) \ 48785dfaf08SRalf Baechle more \ 48885dfaf08SRalf Baechle field; 48990e8cacdSRalf Baechle 49090e8cacdSRalf Baechle #else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */ 49190e8cacdSRalf Baechle #error "MIPS but neither __MIPSEL__ nor __MIPSEB__?" 49290e8cacdSRalf Baechle #endif 49390e8cacdSRalf Baechle 49485dfaf08SRalf Baechle struct j_format { 49585dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ 49685dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int target : 26, 49785dfaf08SRalf Baechle ;)) 49885dfaf08SRalf Baechle }; 49985dfaf08SRalf Baechle 50085dfaf08SRalf Baechle struct i_format { /* signed immediate format */ 50185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 50285dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rs : 5, 50385dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rt : 5, 50485dfaf08SRalf Baechle BITFIELD_FIELD(signed int simmediate : 16, 50585dfaf08SRalf Baechle ;)))) 50685dfaf08SRalf Baechle }; 50785dfaf08SRalf Baechle 50885dfaf08SRalf Baechle struct u_format { /* unsigned immediate format */ 50985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 51085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rs : 5, 51185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rt : 5, 51285dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int uimmediate : 16, 51385dfaf08SRalf Baechle ;)))) 51485dfaf08SRalf Baechle }; 51585dfaf08SRalf Baechle 51685dfaf08SRalf Baechle struct c_format { /* Cache (>= R6000) format */ 51785dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 51885dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rs : 5, 51985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int c_op : 3, 52085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int cache : 2, 52185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int simmediate : 16, 52285dfaf08SRalf Baechle ;))))) 52385dfaf08SRalf Baechle }; 52485dfaf08SRalf Baechle 52585dfaf08SRalf Baechle struct r_format { /* Register format */ 52685dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 52785dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rs : 5, 52885dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rt : 5, 52985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rd : 5, 53085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int re : 5, 53185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int func : 6, 53285dfaf08SRalf Baechle ;)))))) 53385dfaf08SRalf Baechle }; 53485dfaf08SRalf Baechle 53585dfaf08SRalf Baechle struct p_format { /* Performance counter format (R10000) */ 53685dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 53785dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rs : 5, 53885dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rt : 5, 53985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rd : 5, 54085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int re : 5, 54185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int func : 6, 54285dfaf08SRalf Baechle ;)))))) 54385dfaf08SRalf Baechle }; 54485dfaf08SRalf Baechle 54585dfaf08SRalf Baechle struct f_format { /* FPU register format */ 54685dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 54785dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int : 1, 54885dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int fmt : 4, 54985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rt : 5, 55085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int rd : 5, 55185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int re : 5, 55285dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int func : 6, 55385dfaf08SRalf Baechle ;))))))) 55485dfaf08SRalf Baechle }; 55585dfaf08SRalf Baechle 55685dfaf08SRalf Baechle struct ma_format { /* FPU multiply and add format (MIPS IV) */ 55785dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 55885dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int fr : 5, 55985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int ft : 5, 56085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int fs : 5, 56185dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int fd : 5, 56285dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int func : 4, 56385dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int fmt : 2, 56485dfaf08SRalf Baechle ;))))))) 56585dfaf08SRalf Baechle }; 56685dfaf08SRalf Baechle 56785dfaf08SRalf Baechle struct b_format { /* BREAK and SYSCALL */ 56885dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 56985dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int code : 20, 57085dfaf08SRalf Baechle BITFIELD_FIELD(unsigned int func : 6, 57185dfaf08SRalf Baechle ;))) 57285dfaf08SRalf Baechle }; 57385dfaf08SRalf Baechle 5748fba1e58SRalf Baechle struct ps_format { /* MIPS-3D / paired single format */ 5758fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 5768fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int rs : 5, 5778fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int ft : 5, 5788fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int fs : 5, 5798fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int fd : 5, 5808fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int func : 6, 5818fba1e58SRalf Baechle ;)))))) 5828fba1e58SRalf Baechle }; 5838fba1e58SRalf Baechle 5848fba1e58SRalf Baechle struct v_format { /* MDMX vector format */ 5858fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int opcode : 6, 5868fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int sel : 4, 5878fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int fmt : 1, 5888fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int vt : 5, 5898fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int vs : 5, 5908fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int vd : 5, 5918fba1e58SRalf Baechle BITFIELD_FIELD(unsigned int func : 6, 5928fba1e58SRalf Baechle ;))))))) 5938fba1e58SRalf Baechle }; 5948fba1e58SRalf Baechle 5952aa9fd06SSteven J. Hill /* 5962aa9fd06SSteven J. Hill * microMIPS instruction formats (32-bit length) 5972aa9fd06SSteven J. Hill * 5982aa9fd06SSteven J. Hill * NOTE: 5992aa9fd06SSteven J. Hill * Parenthesis denote whether the format is a microMIPS instruction or 6002aa9fd06SSteven J. Hill * if it is MIPS32 instruction re-encoded for use in the microMIPS ASE. 6012aa9fd06SSteven J. Hill */ 6022aa9fd06SSteven J. Hill struct fb_format { /* FPU branch format (MIPS32) */ 6032aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6042aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int bc : 5, 6052aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int cc : 3, 6062aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int flag : 2, 6072aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 16, 6082aa9fd06SSteven J. Hill ;))))) 6092aa9fd06SSteven J. Hill }; 6102aa9fd06SSteven J. Hill 6112aa9fd06SSteven J. Hill struct fp0_format { /* FPU multiply and add format (MIPS32) */ 6122aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6132aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fmt : 5, 6142aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int ft : 5, 6152aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6162aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 6172aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6182aa9fd06SSteven J. Hill ;)))))) 6192aa9fd06SSteven J. Hill }; 6202aa9fd06SSteven J. Hill 6212aa9fd06SSteven J. Hill struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */ 6222aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6232aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int ft : 5, 6242aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6252aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 6262aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fmt : 3, 6272aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int op : 2, 6282aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6292aa9fd06SSteven J. Hill ;))))))) 6302aa9fd06SSteven J. Hill }; 6312aa9fd06SSteven J. Hill 6322aa9fd06SSteven J. Hill struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */ 6332aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6342aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int op : 5, 6352aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 5, 6362aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6372aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 6382aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6392aa9fd06SSteven J. Hill ;)))))) 6402aa9fd06SSteven J. Hill }; 6412aa9fd06SSteven J. Hill 6422aa9fd06SSteven J. Hill struct mm_fp1_format { /* FPU mfc1 and cfc1 format (microMIPS) */ 6432aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6442aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 5, 6452aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6462aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fmt : 2, 6472aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int op : 8, 6482aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6492aa9fd06SSteven J. Hill ;)))))) 6502aa9fd06SSteven J. Hill }; 6512aa9fd06SSteven J. Hill 6522aa9fd06SSteven J. Hill struct mm_fp2_format { /* FPU movt and movf format (microMIPS) */ 6532aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6542aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 6552aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6562aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int cc : 3, 6572aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int zero : 2, 6582aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fmt : 2, 6592aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int op : 3, 6602aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6612aa9fd06SSteven J. Hill ;)))))))) 6622aa9fd06SSteven J. Hill }; 6632aa9fd06SSteven J. Hill 6642aa9fd06SSteven J. Hill struct mm_fp3_format { /* FPU abs and neg format (microMIPS) */ 6652aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6662aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 5, 6672aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6682aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fmt : 3, 6692aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int op : 7, 6702aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6712aa9fd06SSteven J. Hill ;)))))) 6722aa9fd06SSteven J. Hill }; 6732aa9fd06SSteven J. Hill 6742aa9fd06SSteven J. Hill struct mm_fp4_format { /* FPU c.cond format (microMIPS) */ 6752aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6762aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 5, 6772aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 6782aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int cc : 3, 6792aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fmt : 3, 6802aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int cond : 4, 6812aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6822aa9fd06SSteven J. Hill ;))))))) 6832aa9fd06SSteven J. Hill }; 6842aa9fd06SSteven J. Hill 6852aa9fd06SSteven J. Hill struct mm_fp5_format { /* FPU lwxc1 and swxc1 format (microMIPS) */ 6862aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6872aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int index : 5, 6882aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int base : 5, 6892aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 6902aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int op : 5, 6912aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 6922aa9fd06SSteven J. Hill ;)))))) 6932aa9fd06SSteven J. Hill }; 6942aa9fd06SSteven J. Hill 6952aa9fd06SSteven J. Hill struct fp6_format { /* FPU madd and msub format (MIPS IV) */ 6962aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 6972aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fr : 5, 6982aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int ft : 5, 6992aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 7002aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 7012aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 7022aa9fd06SSteven J. Hill ;)))))) 7032aa9fd06SSteven J. Hill }; 7042aa9fd06SSteven J. Hill 7052aa9fd06SSteven J. Hill struct mm_fp6_format { /* FPU madd and msub format (microMIPS) */ 7062aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7072aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int ft : 5, 7082aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fs : 5, 7092aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fd : 5, 7102aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int fr : 5, 7112aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 6, 7122aa9fd06SSteven J. Hill ;)))))) 7132aa9fd06SSteven J. Hill }; 7142aa9fd06SSteven J. Hill 7152aa9fd06SSteven J. Hill struct mm_i_format { /* Immediate format (microMIPS) */ 7162aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7172aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 5, 7182aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rs : 5, 7192aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 16, 7202aa9fd06SSteven J. Hill ;)))) 7212aa9fd06SSteven J. Hill }; 7222aa9fd06SSteven J. Hill 7232aa9fd06SSteven J. Hill struct mm_m_format { /* Multi-word load/store format (microMIPS) */ 7242aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7252aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rd : 5, 7262aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int base : 5, 7272aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 4, 7282aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 12, 7292aa9fd06SSteven J. Hill ;))))) 7302aa9fd06SSteven J. Hill }; 7312aa9fd06SSteven J. Hill 7322aa9fd06SSteven J. Hill struct mm_x_format { /* Scaled indexed load format (microMIPS) */ 7332aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7342aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int index : 5, 7352aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int base : 5, 7362aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rd : 5, 7372aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 11, 7382aa9fd06SSteven J. Hill ;))))) 7392aa9fd06SSteven J. Hill }; 7402aa9fd06SSteven J. Hill 7412aa9fd06SSteven J. Hill /* 7422aa9fd06SSteven J. Hill * microMIPS instruction formats (16-bit length) 7432aa9fd06SSteven J. Hill */ 7442aa9fd06SSteven J. Hill struct mm_b0_format { /* Unconditional branch format (microMIPS) */ 7452aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7462aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 10, 7472aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7482aa9fd06SSteven J. Hill ;))) 7492aa9fd06SSteven J. Hill }; 7502aa9fd06SSteven J. Hill 7512aa9fd06SSteven J. Hill struct mm_b1_format { /* Conditional branch format (microMIPS) */ 7522aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7532aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rs : 3, 7542aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 7, 7552aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7562aa9fd06SSteven J. Hill ;)))) 7572aa9fd06SSteven J. Hill }; 7582aa9fd06SSteven J. Hill 7592aa9fd06SSteven J. Hill struct mm16_m_format { /* Multi-word load/store format */ 7602aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7612aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int func : 4, 7622aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rlist : 2, 7632aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int imm : 4, 7642aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7652aa9fd06SSteven J. Hill ;))))) 7662aa9fd06SSteven J. Hill }; 7672aa9fd06SSteven J. Hill 7682aa9fd06SSteven J. Hill struct mm16_rb_format { /* Signed immediate format */ 7692aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7702aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 3, 7712aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int base : 3, 7722aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 4, 7732aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7742aa9fd06SSteven J. Hill ;))))) 7752aa9fd06SSteven J. Hill }; 7762aa9fd06SSteven J. Hill 7772aa9fd06SSteven J. Hill struct mm16_r3_format { /* Load from global pointer format */ 7782aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7792aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 3, 7802aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 7, 7812aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7822aa9fd06SSteven J. Hill ;)))) 7832aa9fd06SSteven J. Hill }; 7842aa9fd06SSteven J. Hill 7852aa9fd06SSteven J. Hill struct mm16_r5_format { /* Load/store from stack pointer format */ 7862aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 6, 7872aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int rt : 5, 7882aa9fd06SSteven J. Hill BITFIELD_FIELD(signed int simmediate : 5, 7892aa9fd06SSteven J. Hill BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 7902aa9fd06SSteven J. Hill ;)))) 7912aa9fd06SSteven J. Hill }; 7922aa9fd06SSteven J. Hill 793cd574704SSteven J. Hill /* 794cd574704SSteven J. Hill * MIPS16e instruction formats (16-bit length) 795cd574704SSteven J. Hill */ 796cd574704SSteven J. Hill struct m16e_rr { 797cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 798cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int rx : 3, 799cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int nd : 1, 800cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int l : 1, 801cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int ra : 1, 802cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int func : 5, 803cd574704SSteven J. Hill ;)))))) 804cd574704SSteven J. Hill }; 805cd574704SSteven J. Hill 806cd574704SSteven J. Hill struct m16e_jal { 807cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 808cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int x : 1, 809cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int imm20_16 : 5, 810cd574704SSteven J. Hill BITFIELD_FIELD(signed int imm25_21 : 5, 811cd574704SSteven J. Hill ;)))) 812cd574704SSteven J. Hill }; 813cd574704SSteven J. Hill 814cd574704SSteven J. Hill struct m16e_i64 { 815cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 816cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int func : 3, 817cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int imm : 8, 818cd574704SSteven J. Hill ;))) 819cd574704SSteven J. Hill }; 820cd574704SSteven J. Hill 821cd574704SSteven J. Hill struct m16e_ri64 { 822cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 823cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int func : 3, 824cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int ry : 3, 825cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int imm : 5, 826cd574704SSteven J. Hill ;)))) 827cd574704SSteven J. Hill }; 828cd574704SSteven J. Hill 829cd574704SSteven J. Hill struct m16e_ri { 830cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 831cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int rx : 3, 832cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int imm : 8, 833cd574704SSteven J. Hill ;))) 834cd574704SSteven J. Hill }; 835cd574704SSteven J. Hill 836cd574704SSteven J. Hill struct m16e_rri { 837cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 838cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int rx : 3, 839cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int ry : 3, 840cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int imm : 5, 841cd574704SSteven J. Hill ;)))) 842cd574704SSteven J. Hill }; 843cd574704SSteven J. Hill 844cd574704SSteven J. Hill struct m16e_i8 { 845cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int opcode : 5, 846cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int func : 3, 847cd574704SSteven J. Hill BITFIELD_FIELD(unsigned int imm : 8, 848cd574704SSteven J. Hill ;))) 849cd574704SSteven J. Hill }; 850cd574704SSteven J. Hill 85190e8cacdSRalf Baechle union mips_instruction { 85290e8cacdSRalf Baechle unsigned int word; 85390e8cacdSRalf Baechle unsigned short halfword[2]; 85490e8cacdSRalf Baechle unsigned char byte[4]; 85590e8cacdSRalf Baechle struct j_format j_format; 85690e8cacdSRalf Baechle struct i_format i_format; 85790e8cacdSRalf Baechle struct u_format u_format; 85890e8cacdSRalf Baechle struct c_format c_format; 85990e8cacdSRalf Baechle struct r_format r_format; 86090e8cacdSRalf Baechle struct p_format p_format; 86190e8cacdSRalf Baechle struct f_format f_format; 86290e8cacdSRalf Baechle struct ma_format ma_format; 86390e8cacdSRalf Baechle struct b_format b_format; 8648fba1e58SRalf Baechle struct ps_format ps_format; 8658fba1e58SRalf Baechle struct v_format v_format; 8662aa9fd06SSteven J. Hill struct fb_format fb_format; 8672aa9fd06SSteven J. Hill struct fp0_format fp0_format; 8682aa9fd06SSteven J. Hill struct mm_fp0_format mm_fp0_format; 8692aa9fd06SSteven J. Hill struct fp1_format fp1_format; 8702aa9fd06SSteven J. Hill struct mm_fp1_format mm_fp1_format; 8712aa9fd06SSteven J. Hill struct mm_fp2_format mm_fp2_format; 8722aa9fd06SSteven J. Hill struct mm_fp3_format mm_fp3_format; 8732aa9fd06SSteven J. Hill struct mm_fp4_format mm_fp4_format; 8742aa9fd06SSteven J. Hill struct mm_fp5_format mm_fp5_format; 8752aa9fd06SSteven J. Hill struct fp6_format fp6_format; 8762aa9fd06SSteven J. Hill struct mm_fp6_format mm_fp6_format; 8772aa9fd06SSteven J. Hill struct mm_i_format mm_i_format; 8782aa9fd06SSteven J. Hill struct mm_m_format mm_m_format; 8792aa9fd06SSteven J. Hill struct mm_x_format mm_x_format; 8802aa9fd06SSteven J. Hill struct mm_b0_format mm_b0_format; 8812aa9fd06SSteven J. Hill struct mm_b1_format mm_b1_format; 8822aa9fd06SSteven J. Hill struct mm16_m_format mm16_m_format ; 8832aa9fd06SSteven J. Hill struct mm16_rb_format mm16_rb_format; 8842aa9fd06SSteven J. Hill struct mm16_r3_format mm16_r3_format; 8852aa9fd06SSteven J. Hill struct mm16_r5_format mm16_r5_format; 88690e8cacdSRalf Baechle }; 88790e8cacdSRalf Baechle 888cd574704SSteven J. Hill union mips16e_instruction { 889cd574704SSteven J. Hill unsigned int full : 16; 890cd574704SSteven J. Hill struct m16e_rr rr; 891cd574704SSteven J. Hill struct m16e_jal jal; 892cd574704SSteven J. Hill struct m16e_i64 i64; 893cd574704SSteven J. Hill struct m16e_ri64 ri64; 894cd574704SSteven J. Hill struct m16e_ri ri; 895cd574704SSteven J. Hill struct m16e_rri rri; 896cd574704SSteven J. Hill struct m16e_i8 i8; 897cd574704SSteven J. Hill }; 898cd574704SSteven J. Hill 89990e8cacdSRalf Baechle #endif /* _UAPI_ASM_INST_H */ 900