xref: /openbmc/linux/arch/mips/include/uapi/asm/inst.h (revision 2aa9fd06e221da4e69693dc1b5c6c6bc84c76f32) 
190e8cacdSRalf Baechle /*
290e8cacdSRalf Baechle  * Format of an instruction in memory.
390e8cacdSRalf Baechle  *
490e8cacdSRalf Baechle  * This file is subject to the terms and conditions of the GNU General Public
590e8cacdSRalf Baechle  * License.  See the file "COPYING" in the main directory of this archive
690e8cacdSRalf Baechle  * for more details.
790e8cacdSRalf Baechle  *
890e8cacdSRalf Baechle  * Copyright (C) 1996, 2000 by Ralf Baechle
990e8cacdSRalf Baechle  * Copyright (C) 2006 by Thiemo Seufer
10*2aa9fd06SSteven J. Hill  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
1190e8cacdSRalf Baechle  */
1290e8cacdSRalf Baechle #ifndef _UAPI_ASM_INST_H
1390e8cacdSRalf Baechle #define _UAPI_ASM_INST_H
1490e8cacdSRalf Baechle 
1590e8cacdSRalf Baechle /*
1690e8cacdSRalf Baechle  * Major opcodes; before MIPS IV cop1x was called cop3.
1790e8cacdSRalf Baechle  */
1890e8cacdSRalf Baechle enum major_op {
1990e8cacdSRalf Baechle 	spec_op, bcond_op, j_op, jal_op,
2090e8cacdSRalf Baechle 	beq_op, bne_op, blez_op, bgtz_op,
2190e8cacdSRalf Baechle 	addi_op, addiu_op, slti_op, sltiu_op,
2290e8cacdSRalf Baechle 	andi_op, ori_op, xori_op, lui_op,
2390e8cacdSRalf Baechle 	cop0_op, cop1_op, cop2_op, cop1x_op,
2490e8cacdSRalf Baechle 	beql_op, bnel_op, blezl_op, bgtzl_op,
2590e8cacdSRalf Baechle 	daddi_op, daddiu_op, ldl_op, ldr_op,
2690e8cacdSRalf Baechle 	spec2_op, jalx_op, mdmx_op, spec3_op,
2790e8cacdSRalf Baechle 	lb_op, lh_op, lwl_op, lw_op,
2890e8cacdSRalf Baechle 	lbu_op, lhu_op, lwr_op, lwu_op,
2990e8cacdSRalf Baechle 	sb_op, sh_op, swl_op, sw_op,
3090e8cacdSRalf Baechle 	sdl_op, sdr_op, swr_op, cache_op,
3190e8cacdSRalf Baechle 	ll_op, lwc1_op, lwc2_op, pref_op,
3290e8cacdSRalf Baechle 	lld_op, ldc1_op, ldc2_op, ld_op,
3390e8cacdSRalf Baechle 	sc_op, swc1_op, swc2_op, major_3b_op,
3490e8cacdSRalf Baechle 	scd_op, sdc1_op, sdc2_op, sd_op
3590e8cacdSRalf Baechle };
3690e8cacdSRalf Baechle 
3790e8cacdSRalf Baechle /*
3890e8cacdSRalf Baechle  * func field of spec opcode.
3990e8cacdSRalf Baechle  */
4090e8cacdSRalf Baechle enum spec_op {
4190e8cacdSRalf Baechle 	sll_op, movc_op, srl_op, sra_op,
4290e8cacdSRalf Baechle 	sllv_op, pmon_op, srlv_op, srav_op,
4390e8cacdSRalf Baechle 	jr_op, jalr_op, movz_op, movn_op,
4490e8cacdSRalf Baechle 	syscall_op, break_op, spim_op, sync_op,
4590e8cacdSRalf Baechle 	mfhi_op, mthi_op, mflo_op, mtlo_op,
4690e8cacdSRalf Baechle 	dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op,
4790e8cacdSRalf Baechle 	mult_op, multu_op, div_op, divu_op,
4890e8cacdSRalf Baechle 	dmult_op, dmultu_op, ddiv_op, ddivu_op,
4990e8cacdSRalf Baechle 	add_op, addu_op, sub_op, subu_op,
5090e8cacdSRalf Baechle 	and_op, or_op, xor_op, nor_op,
5190e8cacdSRalf Baechle 	spec3_unused_op, spec4_unused_op, slt_op, sltu_op,
5290e8cacdSRalf Baechle 	dadd_op, daddu_op, dsub_op, dsubu_op,
5390e8cacdSRalf Baechle 	tge_op, tgeu_op, tlt_op, tltu_op,
5490e8cacdSRalf Baechle 	teq_op, spec5_unused_op, tne_op, spec6_unused_op,
5590e8cacdSRalf Baechle 	dsll_op, spec7_unused_op, dsrl_op, dsra_op,
5690e8cacdSRalf Baechle 	dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op
5790e8cacdSRalf Baechle };
5890e8cacdSRalf Baechle 
5990e8cacdSRalf Baechle /*
6090e8cacdSRalf Baechle  * func field of spec2 opcode.
6190e8cacdSRalf Baechle  */
6290e8cacdSRalf Baechle enum spec2_op {
6390e8cacdSRalf Baechle 	madd_op, maddu_op, mul_op, spec2_3_unused_op,
6490e8cacdSRalf Baechle 	msub_op, msubu_op, /* more unused ops */
6590e8cacdSRalf Baechle 	clz_op = 0x20, clo_op,
6690e8cacdSRalf Baechle 	dclz_op = 0x24, dclo_op,
6790e8cacdSRalf Baechle 	sdbpp_op = 0x3f
6890e8cacdSRalf Baechle };
6990e8cacdSRalf Baechle 
7090e8cacdSRalf Baechle /*
7190e8cacdSRalf Baechle  * func field of spec3 opcode.
7290e8cacdSRalf Baechle  */
7390e8cacdSRalf Baechle enum spec3_op {
7490e8cacdSRalf Baechle 	ext_op, dextm_op, dextu_op, dext_op,
7590e8cacdSRalf Baechle 	ins_op, dinsm_op, dinsu_op, dins_op,
7690e8cacdSRalf Baechle 	lx_op = 0x0a,
7790e8cacdSRalf Baechle 	bshfl_op = 0x20,
7890e8cacdSRalf Baechle 	dbshfl_op = 0x24,
7990e8cacdSRalf Baechle 	rdhwr_op = 0x3b
8090e8cacdSRalf Baechle };
8190e8cacdSRalf Baechle 
8290e8cacdSRalf Baechle /*
8390e8cacdSRalf Baechle  * rt field of bcond opcodes.
8490e8cacdSRalf Baechle  */
8590e8cacdSRalf Baechle enum rt_op {
8690e8cacdSRalf Baechle 	bltz_op, bgez_op, bltzl_op, bgezl_op,
8790e8cacdSRalf Baechle 	spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
8890e8cacdSRalf Baechle 	tgei_op, tgeiu_op, tlti_op, tltiu_op,
8990e8cacdSRalf Baechle 	teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
9090e8cacdSRalf Baechle 	bltzal_op, bgezal_op, bltzall_op, bgezall_op,
9190e8cacdSRalf Baechle 	rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17,
9290e8cacdSRalf Baechle 	rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b,
9390e8cacdSRalf Baechle 	bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f
9490e8cacdSRalf Baechle };
9590e8cacdSRalf Baechle 
9690e8cacdSRalf Baechle /*
9790e8cacdSRalf Baechle  * rs field of cop opcodes.
9890e8cacdSRalf Baechle  */
9990e8cacdSRalf Baechle enum cop_op {
10090e8cacdSRalf Baechle 	mfc_op	      = 0x00, dmfc_op	    = 0x01,
10190e8cacdSRalf Baechle 	cfc_op	      = 0x02, mtc_op	    = 0x04,
10290e8cacdSRalf Baechle 	dmtc_op	      = 0x05, ctc_op	    = 0x06,
10390e8cacdSRalf Baechle 	bc_op	      = 0x08, cop_op	    = 0x10,
10490e8cacdSRalf Baechle 	copm_op	      = 0x18
10590e8cacdSRalf Baechle };
10690e8cacdSRalf Baechle 
10790e8cacdSRalf Baechle /*
10890e8cacdSRalf Baechle  * rt field of cop.bc_op opcodes
10990e8cacdSRalf Baechle  */
11090e8cacdSRalf Baechle enum bcop_op {
11190e8cacdSRalf Baechle 	bcf_op, bct_op, bcfl_op, bctl_op
11290e8cacdSRalf Baechle };
11390e8cacdSRalf Baechle 
11490e8cacdSRalf Baechle /*
11590e8cacdSRalf Baechle  * func field of cop0 coi opcodes.
11690e8cacdSRalf Baechle  */
11790e8cacdSRalf Baechle enum cop0_coi_func {
11890e8cacdSRalf Baechle 	tlbr_op	      = 0x01, tlbwi_op	    = 0x02,
11990e8cacdSRalf Baechle 	tlbwr_op      = 0x06, tlbp_op	    = 0x08,
12090e8cacdSRalf Baechle 	rfe_op	      = 0x10, eret_op	    = 0x18
12190e8cacdSRalf Baechle };
12290e8cacdSRalf Baechle 
12390e8cacdSRalf Baechle /*
12490e8cacdSRalf Baechle  * func field of cop0 com opcodes.
12590e8cacdSRalf Baechle  */
12690e8cacdSRalf Baechle enum cop0_com_func {
12790e8cacdSRalf Baechle 	tlbr1_op      = 0x01, tlbw_op	    = 0x02,
12890e8cacdSRalf Baechle 	tlbp1_op      = 0x08, dctr_op	    = 0x09,
12990e8cacdSRalf Baechle 	dctw_op	      = 0x0a
13090e8cacdSRalf Baechle };
13190e8cacdSRalf Baechle 
13290e8cacdSRalf Baechle /*
13390e8cacdSRalf Baechle  * fmt field of cop1 opcodes.
13490e8cacdSRalf Baechle  */
13590e8cacdSRalf Baechle enum cop1_fmt {
13690e8cacdSRalf Baechle 	s_fmt, d_fmt, e_fmt, q_fmt,
13790e8cacdSRalf Baechle 	w_fmt, l_fmt
13890e8cacdSRalf Baechle };
13990e8cacdSRalf Baechle 
14090e8cacdSRalf Baechle /*
14190e8cacdSRalf Baechle  * func field of cop1 instructions using d, s or w format.
14290e8cacdSRalf Baechle  */
14390e8cacdSRalf Baechle enum cop1_sdw_func {
14490e8cacdSRalf Baechle 	fadd_op	     =	0x00, fsub_op	   =  0x01,
14590e8cacdSRalf Baechle 	fmul_op	     =	0x02, fdiv_op	   =  0x03,
14690e8cacdSRalf Baechle 	fsqrt_op     =	0x04, fabs_op	   =  0x05,
14790e8cacdSRalf Baechle 	fmov_op	     =	0x06, fneg_op	   =  0x07,
14890e8cacdSRalf Baechle 	froundl_op   =	0x08, ftruncl_op   =  0x09,
14990e8cacdSRalf Baechle 	fceill_op    =	0x0a, ffloorl_op   =  0x0b,
15090e8cacdSRalf Baechle 	fround_op    =	0x0c, ftrunc_op	   =  0x0d,
15190e8cacdSRalf Baechle 	fceil_op     =	0x0e, ffloor_op	   =  0x0f,
15290e8cacdSRalf Baechle 	fmovc_op     =	0x11, fmovz_op	   =  0x12,
15390e8cacdSRalf Baechle 	fmovn_op     =	0x13, frecip_op	   =  0x15,
15490e8cacdSRalf Baechle 	frsqrt_op    =	0x16, fcvts_op	   =  0x20,
15590e8cacdSRalf Baechle 	fcvtd_op     =	0x21, fcvte_op	   =  0x22,
15690e8cacdSRalf Baechle 	fcvtw_op     =	0x24, fcvtl_op	   =  0x25,
15790e8cacdSRalf Baechle 	fcmp_op	     =	0x30
15890e8cacdSRalf Baechle };
15990e8cacdSRalf Baechle 
16090e8cacdSRalf Baechle /*
16190e8cacdSRalf Baechle  * func field of cop1x opcodes (MIPS IV).
16290e8cacdSRalf Baechle  */
16390e8cacdSRalf Baechle enum cop1x_func {
16490e8cacdSRalf Baechle 	lwxc1_op     =	0x00, ldxc1_op	   =  0x01,
16590e8cacdSRalf Baechle 	pfetch_op    =	0x07, swxc1_op	   =  0x08,
16690e8cacdSRalf Baechle 	sdxc1_op     =	0x09, madd_s_op	   =  0x20,
16790e8cacdSRalf Baechle 	madd_d_op    =	0x21, madd_e_op	   =  0x22,
16890e8cacdSRalf Baechle 	msub_s_op    =	0x28, msub_d_op	   =  0x29,
16990e8cacdSRalf Baechle 	msub_e_op    =	0x2a, nmadd_s_op   =  0x30,
17090e8cacdSRalf Baechle 	nmadd_d_op   =	0x31, nmadd_e_op   =  0x32,
17190e8cacdSRalf Baechle 	nmsub_s_op   =	0x38, nmsub_d_op   =  0x39,
17290e8cacdSRalf Baechle 	nmsub_e_op   =	0x3a
17390e8cacdSRalf Baechle };
17490e8cacdSRalf Baechle 
17590e8cacdSRalf Baechle /*
17690e8cacdSRalf Baechle  * func field for mad opcodes (MIPS IV).
17790e8cacdSRalf Baechle  */
17890e8cacdSRalf Baechle enum mad_func {
17990e8cacdSRalf Baechle 	madd_fp_op	= 0x08, msub_fp_op	= 0x0a,
18090e8cacdSRalf Baechle 	nmadd_fp_op	= 0x0c, nmsub_fp_op	= 0x0e
18190e8cacdSRalf Baechle };
18290e8cacdSRalf Baechle 
18390e8cacdSRalf Baechle /*
18490e8cacdSRalf Baechle  * func field for special3 lx opcodes (Cavium Octeon).
18590e8cacdSRalf Baechle  */
18690e8cacdSRalf Baechle enum lx_func {
18790e8cacdSRalf Baechle 	lwx_op	= 0x00,
18890e8cacdSRalf Baechle 	lhx_op	= 0x04,
18990e8cacdSRalf Baechle 	lbux_op = 0x06,
19090e8cacdSRalf Baechle 	ldx_op	= 0x08,
19190e8cacdSRalf Baechle 	lwux_op = 0x10,
19290e8cacdSRalf Baechle 	lhux_op = 0x14,
19390e8cacdSRalf Baechle 	lbx_op	= 0x16,
19490e8cacdSRalf Baechle };
19590e8cacdSRalf Baechle 
19690e8cacdSRalf Baechle /*
197*2aa9fd06SSteven J. Hill  * (microMIPS) Major opcodes.
198*2aa9fd06SSteven J. Hill  */
199*2aa9fd06SSteven J. Hill enum mm_major_op {
200*2aa9fd06SSteven J. Hill 	mm_pool32a_op, mm_pool16a_op, mm_lbu16_op, mm_move16_op,
201*2aa9fd06SSteven J. Hill 	mm_addi32_op, mm_lbu32_op, mm_sb32_op, mm_lb32_op,
202*2aa9fd06SSteven J. Hill 	mm_pool32b_op, mm_pool16b_op, mm_lhu16_op, mm_andi16_op,
203*2aa9fd06SSteven J. Hill 	mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op,
204*2aa9fd06SSteven J. Hill 	mm_pool32i_op, mm_pool16c_op, mm_lwsp16_op, mm_pool16d_op,
205*2aa9fd06SSteven J. Hill 	mm_ori32_op, mm_pool32f_op, mm_reserved1_op, mm_reserved2_op,
206*2aa9fd06SSteven J. Hill 	mm_pool32c_op, mm_lwgp16_op, mm_lw16_op, mm_pool16e_op,
207*2aa9fd06SSteven J. Hill 	mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op,
208*2aa9fd06SSteven J. Hill 	mm_reserved4_op, mm_pool16f_op, mm_sb16_op, mm_beqz16_op,
209*2aa9fd06SSteven J. Hill 	mm_slti32_op, mm_beq32_op, mm_swc132_op, mm_lwc132_op,
210*2aa9fd06SSteven J. Hill 	mm_reserved5_op, mm_reserved6_op, mm_sh16_op, mm_bnez16_op,
211*2aa9fd06SSteven J. Hill 	mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op,
212*2aa9fd06SSteven J. Hill 	mm_reserved7_op, mm_reserved8_op, mm_swsp16_op, mm_b16_op,
213*2aa9fd06SSteven J. Hill 	mm_andi32_op, mm_j32_op, mm_sd32_op, mm_ld32_op,
214*2aa9fd06SSteven J. Hill 	mm_reserved11_op, mm_reserved12_op, mm_sw16_op, mm_li16_op,
215*2aa9fd06SSteven J. Hill 	mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op,
216*2aa9fd06SSteven J. Hill };
217*2aa9fd06SSteven J. Hill 
218*2aa9fd06SSteven J. Hill /*
219*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32I minor opcodes.
220*2aa9fd06SSteven J. Hill  */
221*2aa9fd06SSteven J. Hill enum mm_32i_minor_op {
222*2aa9fd06SSteven J. Hill 	mm_bltz_op, mm_bltzal_op, mm_bgez_op, mm_bgezal_op,
223*2aa9fd06SSteven J. Hill 	mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op,
224*2aa9fd06SSteven J. Hill 	mm_tlti_op, mm_tgei_op, mm_tltiu_op, mm_tgeiu_op,
225*2aa9fd06SSteven J. Hill 	mm_tnei_op, mm_lui_op, mm_teqi_op, mm_reserved13_op,
226*2aa9fd06SSteven J. Hill 	mm_synci_op, mm_bltzals_op, mm_reserved14_op, mm_bgezals_op,
227*2aa9fd06SSteven J. Hill 	mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op,
228*2aa9fd06SSteven J. Hill 	mm_reserved17_op, mm_reserved18_op, mm_bposge64_op, mm_bposge32_op,
229*2aa9fd06SSteven J. Hill 	mm_bc1f_op, mm_bc1t_op, mm_reserved19_op, mm_reserved20_op,
230*2aa9fd06SSteven J. Hill 	mm_bc1any2f_op, mm_bc1any2t_op, mm_bc1any4f_op, mm_bc1any4t_op,
231*2aa9fd06SSteven J. Hill };
232*2aa9fd06SSteven J. Hill 
233*2aa9fd06SSteven J. Hill /*
234*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32A minor opcodes.
235*2aa9fd06SSteven J. Hill  */
236*2aa9fd06SSteven J. Hill enum mm_32a_minor_op {
237*2aa9fd06SSteven J. Hill 	mm_sll32_op = 0x000,
238*2aa9fd06SSteven J. Hill 	mm_ins_op = 0x00c,
239*2aa9fd06SSteven J. Hill 	mm_ext_op = 0x02c,
240*2aa9fd06SSteven J. Hill 	mm_pool32axf_op = 0x03c,
241*2aa9fd06SSteven J. Hill 	mm_srl32_op = 0x040,
242*2aa9fd06SSteven J. Hill 	mm_sra_op = 0x080,
243*2aa9fd06SSteven J. Hill 	mm_rotr_op = 0x0c0,
244*2aa9fd06SSteven J. Hill 	mm_lwxs_op = 0x118,
245*2aa9fd06SSteven J. Hill 	mm_addu32_op = 0x150,
246*2aa9fd06SSteven J. Hill 	mm_subu32_op = 0x1d0,
247*2aa9fd06SSteven J. Hill 	mm_and_op = 0x250,
248*2aa9fd06SSteven J. Hill 	mm_or32_op = 0x290,
249*2aa9fd06SSteven J. Hill 	mm_xor32_op = 0x310,
250*2aa9fd06SSteven J. Hill };
251*2aa9fd06SSteven J. Hill 
252*2aa9fd06SSteven J. Hill /*
253*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32B functions.
254*2aa9fd06SSteven J. Hill  */
255*2aa9fd06SSteven J. Hill enum mm_32b_func {
256*2aa9fd06SSteven J. Hill 	mm_lwc2_func = 0x0,
257*2aa9fd06SSteven J. Hill 	mm_lwp_func = 0x1,
258*2aa9fd06SSteven J. Hill 	mm_ldc2_func = 0x2,
259*2aa9fd06SSteven J. Hill 	mm_ldp_func = 0x4,
260*2aa9fd06SSteven J. Hill 	mm_lwm32_func = 0x5,
261*2aa9fd06SSteven J. Hill 	mm_cache_func = 0x6,
262*2aa9fd06SSteven J. Hill 	mm_ldm_func = 0x7,
263*2aa9fd06SSteven J. Hill 	mm_swc2_func = 0x8,
264*2aa9fd06SSteven J. Hill 	mm_swp_func = 0x9,
265*2aa9fd06SSteven J. Hill 	mm_sdc2_func = 0xa,
266*2aa9fd06SSteven J. Hill 	mm_sdp_func = 0xc,
267*2aa9fd06SSteven J. Hill 	mm_swm32_func = 0xd,
268*2aa9fd06SSteven J. Hill 	mm_sdm_func = 0xf,
269*2aa9fd06SSteven J. Hill };
270*2aa9fd06SSteven J. Hill 
271*2aa9fd06SSteven J. Hill /*
272*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32C functions.
273*2aa9fd06SSteven J. Hill  */
274*2aa9fd06SSteven J. Hill enum mm_32c_func {
275*2aa9fd06SSteven J. Hill 	mm_pref_func = 0x2,
276*2aa9fd06SSteven J. Hill 	mm_ll_func = 0x3,
277*2aa9fd06SSteven J. Hill 	mm_swr_func = 0x9,
278*2aa9fd06SSteven J. Hill 	mm_sc_func = 0xb,
279*2aa9fd06SSteven J. Hill 	mm_lwu_func = 0xe,
280*2aa9fd06SSteven J. Hill };
281*2aa9fd06SSteven J. Hill 
282*2aa9fd06SSteven J. Hill /*
283*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32AXF minor opcodes.
284*2aa9fd06SSteven J. Hill  */
285*2aa9fd06SSteven J. Hill enum mm_32axf_minor_op {
286*2aa9fd06SSteven J. Hill 	mm_mfc0_op = 0x003,
287*2aa9fd06SSteven J. Hill 	mm_mtc0_op = 0x00b,
288*2aa9fd06SSteven J. Hill 	mm_tlbp_op = 0x00d,
289*2aa9fd06SSteven J. Hill 	mm_jalr_op = 0x03c,
290*2aa9fd06SSteven J. Hill 	mm_tlbr_op = 0x04d,
291*2aa9fd06SSteven J. Hill 	mm_jalrhb_op = 0x07c,
292*2aa9fd06SSteven J. Hill 	mm_tlbwi_op = 0x08d,
293*2aa9fd06SSteven J. Hill 	mm_tlbwr_op = 0x0cd,
294*2aa9fd06SSteven J. Hill 	mm_jalrs_op = 0x13c,
295*2aa9fd06SSteven J. Hill 	mm_jalrshb_op = 0x17c,
296*2aa9fd06SSteven J. Hill 	mm_syscall_op = 0x22d,
297*2aa9fd06SSteven J. Hill 	mm_eret_op = 0x3cd,
298*2aa9fd06SSteven J. Hill };
299*2aa9fd06SSteven J. Hill 
300*2aa9fd06SSteven J. Hill /*
301*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32F minor opcodes.
302*2aa9fd06SSteven J. Hill  */
303*2aa9fd06SSteven J. Hill enum mm_32f_minor_op {
304*2aa9fd06SSteven J. Hill 	mm_32f_00_op = 0x00,
305*2aa9fd06SSteven J. Hill 	mm_32f_01_op = 0x01,
306*2aa9fd06SSteven J. Hill 	mm_32f_02_op = 0x02,
307*2aa9fd06SSteven J. Hill 	mm_32f_10_op = 0x08,
308*2aa9fd06SSteven J. Hill 	mm_32f_11_op = 0x09,
309*2aa9fd06SSteven J. Hill 	mm_32f_12_op = 0x0a,
310*2aa9fd06SSteven J. Hill 	mm_32f_20_op = 0x10,
311*2aa9fd06SSteven J. Hill 	mm_32f_30_op = 0x18,
312*2aa9fd06SSteven J. Hill 	mm_32f_40_op = 0x20,
313*2aa9fd06SSteven J. Hill 	mm_32f_41_op = 0x21,
314*2aa9fd06SSteven J. Hill 	mm_32f_42_op = 0x22,
315*2aa9fd06SSteven J. Hill 	mm_32f_50_op = 0x28,
316*2aa9fd06SSteven J. Hill 	mm_32f_51_op = 0x29,
317*2aa9fd06SSteven J. Hill 	mm_32f_52_op = 0x2a,
318*2aa9fd06SSteven J. Hill 	mm_32f_60_op = 0x30,
319*2aa9fd06SSteven J. Hill 	mm_32f_70_op = 0x38,
320*2aa9fd06SSteven J. Hill 	mm_32f_73_op = 0x3b,
321*2aa9fd06SSteven J. Hill 	mm_32f_74_op = 0x3c,
322*2aa9fd06SSteven J. Hill };
323*2aa9fd06SSteven J. Hill 
324*2aa9fd06SSteven J. Hill /*
325*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
326*2aa9fd06SSteven J. Hill  */
327*2aa9fd06SSteven J. Hill enum mm_32f_10_minor_op {
328*2aa9fd06SSteven J. Hill 	mm_lwxc1_op = 0x1,
329*2aa9fd06SSteven J. Hill 	mm_swxc1_op,
330*2aa9fd06SSteven J. Hill 	mm_ldxc1_op,
331*2aa9fd06SSteven J. Hill 	mm_sdxc1_op,
332*2aa9fd06SSteven J. Hill 	mm_luxc1_op,
333*2aa9fd06SSteven J. Hill 	mm_suxc1_op,
334*2aa9fd06SSteven J. Hill };
335*2aa9fd06SSteven J. Hill 
336*2aa9fd06SSteven J. Hill enum mm_32f_func {
337*2aa9fd06SSteven J. Hill 	mm_lwxc1_func = 0x048,
338*2aa9fd06SSteven J. Hill 	mm_swxc1_func = 0x088,
339*2aa9fd06SSteven J. Hill 	mm_ldxc1_func = 0x0c8,
340*2aa9fd06SSteven J. Hill 	mm_sdxc1_func = 0x108,
341*2aa9fd06SSteven J. Hill };
342*2aa9fd06SSteven J. Hill 
343*2aa9fd06SSteven J. Hill /*
344*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
345*2aa9fd06SSteven J. Hill  */
346*2aa9fd06SSteven J. Hill enum mm_32f_40_minor_op {
347*2aa9fd06SSteven J. Hill 	mm_fmovf_op,
348*2aa9fd06SSteven J. Hill 	mm_fmovt_op,
349*2aa9fd06SSteven J. Hill };
350*2aa9fd06SSteven J. Hill 
351*2aa9fd06SSteven J. Hill /*
352*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
353*2aa9fd06SSteven J. Hill  */
354*2aa9fd06SSteven J. Hill enum mm_32f_60_minor_op {
355*2aa9fd06SSteven J. Hill 	mm_fadd_op,
356*2aa9fd06SSteven J. Hill 	mm_fsub_op,
357*2aa9fd06SSteven J. Hill 	mm_fmul_op,
358*2aa9fd06SSteven J. Hill 	mm_fdiv_op,
359*2aa9fd06SSteven J. Hill };
360*2aa9fd06SSteven J. Hill 
361*2aa9fd06SSteven J. Hill /*
362*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32F secondary minor opcodes.
363*2aa9fd06SSteven J. Hill  */
364*2aa9fd06SSteven J. Hill enum mm_32f_70_minor_op {
365*2aa9fd06SSteven J. Hill 	mm_fmovn_op,
366*2aa9fd06SSteven J. Hill 	mm_fmovz_op,
367*2aa9fd06SSteven J. Hill };
368*2aa9fd06SSteven J. Hill 
369*2aa9fd06SSteven J. Hill /*
370*2aa9fd06SSteven J. Hill  * (microMIPS) POOL32FXF secondary minor opcodes for POOL32F.
371*2aa9fd06SSteven J. Hill  */
372*2aa9fd06SSteven J. Hill enum mm_32f_73_minor_op {
373*2aa9fd06SSteven J. Hill 	mm_fmov0_op = 0x01,
374*2aa9fd06SSteven J. Hill 	mm_fcvtl_op = 0x04,
375*2aa9fd06SSteven J. Hill 	mm_movf0_op = 0x05,
376*2aa9fd06SSteven J. Hill 	mm_frsqrt_op = 0x08,
377*2aa9fd06SSteven J. Hill 	mm_ffloorl_op = 0x0c,
378*2aa9fd06SSteven J. Hill 	mm_fabs0_op = 0x0d,
379*2aa9fd06SSteven J. Hill 	mm_fcvtw_op = 0x24,
380*2aa9fd06SSteven J. Hill 	mm_movt0_op = 0x25,
381*2aa9fd06SSteven J. Hill 	mm_fsqrt_op = 0x28,
382*2aa9fd06SSteven J. Hill 	mm_ffloorw_op = 0x2c,
383*2aa9fd06SSteven J. Hill 	mm_fneg0_op = 0x2d,
384*2aa9fd06SSteven J. Hill 	mm_cfc1_op = 0x40,
385*2aa9fd06SSteven J. Hill 	mm_frecip_op = 0x48,
386*2aa9fd06SSteven J. Hill 	mm_fceill_op = 0x4c,
387*2aa9fd06SSteven J. Hill 	mm_fcvtd0_op = 0x4d,
388*2aa9fd06SSteven J. Hill 	mm_ctc1_op = 0x60,
389*2aa9fd06SSteven J. Hill 	mm_fceilw_op = 0x6c,
390*2aa9fd06SSteven J. Hill 	mm_fcvts0_op = 0x6d,
391*2aa9fd06SSteven J. Hill 	mm_mfc1_op = 0x80,
392*2aa9fd06SSteven J. Hill 	mm_fmov1_op = 0x81,
393*2aa9fd06SSteven J. Hill 	mm_movf1_op = 0x85,
394*2aa9fd06SSteven J. Hill 	mm_ftruncl_op = 0x8c,
395*2aa9fd06SSteven J. Hill 	mm_fabs1_op = 0x8d,
396*2aa9fd06SSteven J. Hill 	mm_mtc1_op = 0xa0,
397*2aa9fd06SSteven J. Hill 	mm_movt1_op = 0xa5,
398*2aa9fd06SSteven J. Hill 	mm_ftruncw_op = 0xac,
399*2aa9fd06SSteven J. Hill 	mm_fneg1_op = 0xad,
400*2aa9fd06SSteven J. Hill 	mm_froundl_op = 0xcc,
401*2aa9fd06SSteven J. Hill 	mm_fcvtd1_op = 0xcd,
402*2aa9fd06SSteven J. Hill 	mm_froundw_op = 0xec,
403*2aa9fd06SSteven J. Hill 	mm_fcvts1_op = 0xed,
404*2aa9fd06SSteven J. Hill };
405*2aa9fd06SSteven J. Hill 
406*2aa9fd06SSteven J. Hill /*
407*2aa9fd06SSteven J. Hill  * (microMIPS) POOL16C minor opcodes.
408*2aa9fd06SSteven J. Hill  */
409*2aa9fd06SSteven J. Hill enum mm_16c_minor_op {
410*2aa9fd06SSteven J. Hill 	mm_lwm16_op = 0x04,
411*2aa9fd06SSteven J. Hill 	mm_swm16_op = 0x05,
412*2aa9fd06SSteven J. Hill 	mm_jr16_op = 0x18,
413*2aa9fd06SSteven J. Hill 	mm_jrc_op = 0x1a,
414*2aa9fd06SSteven J. Hill 	mm_jalr16_op = 0x1c,
415*2aa9fd06SSteven J. Hill 	mm_jalrs16_op = 0x1e,
416*2aa9fd06SSteven J. Hill };
417*2aa9fd06SSteven J. Hill 
418*2aa9fd06SSteven J. Hill /*
419*2aa9fd06SSteven J. Hill  * (microMIPS) POOL16D minor opcodes.
420*2aa9fd06SSteven J. Hill  */
421*2aa9fd06SSteven J. Hill enum mm_16d_minor_op {
422*2aa9fd06SSteven J. Hill 	mm_addius5_func,
423*2aa9fd06SSteven J. Hill 	mm_addiusp_func,
424*2aa9fd06SSteven J. Hill };
425*2aa9fd06SSteven J. Hill 
426*2aa9fd06SSteven J. Hill /*
42790e8cacdSRalf Baechle  * Damn ...  bitfields depend from byteorder :-(
42890e8cacdSRalf Baechle  */
42990e8cacdSRalf Baechle #ifdef __MIPSEB__
43085dfaf08SRalf Baechle #define BITFIELD_FIELD(field, more)					\
43185dfaf08SRalf Baechle 	field;								\
43285dfaf08SRalf Baechle 	more
43390e8cacdSRalf Baechle 
43490e8cacdSRalf Baechle #elif defined(__MIPSEL__)
43590e8cacdSRalf Baechle 
43685dfaf08SRalf Baechle #define BITFIELD_FIELD(field, more)					\
43785dfaf08SRalf Baechle 	more								\
43885dfaf08SRalf Baechle 	field;
43990e8cacdSRalf Baechle 
44090e8cacdSRalf Baechle #else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
44190e8cacdSRalf Baechle #error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
44290e8cacdSRalf Baechle #endif
44390e8cacdSRalf Baechle 
44485dfaf08SRalf Baechle struct j_format {
44585dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
44685dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int target : 26,
44785dfaf08SRalf Baechle 	;))
44885dfaf08SRalf Baechle };
44985dfaf08SRalf Baechle 
45085dfaf08SRalf Baechle struct i_format {			/* signed immediate format */
45185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
45285dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rs : 5,
45385dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rt : 5,
45485dfaf08SRalf Baechle 	BITFIELD_FIELD(signed int simmediate : 16,
45585dfaf08SRalf Baechle 	;))))
45685dfaf08SRalf Baechle };
45785dfaf08SRalf Baechle 
45885dfaf08SRalf Baechle struct u_format {			/* unsigned immediate format */
45985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
46085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rs : 5,
46185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rt : 5,
46285dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int uimmediate : 16,
46385dfaf08SRalf Baechle 	;))))
46485dfaf08SRalf Baechle };
46585dfaf08SRalf Baechle 
46685dfaf08SRalf Baechle struct c_format {			/* Cache (>= R6000) format */
46785dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
46885dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rs : 5,
46985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int c_op : 3,
47085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int cache : 2,
47185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int simmediate : 16,
47285dfaf08SRalf Baechle 	;)))))
47385dfaf08SRalf Baechle };
47485dfaf08SRalf Baechle 
47585dfaf08SRalf Baechle struct r_format {			/* Register format */
47685dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
47785dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rs : 5,
47885dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rt : 5,
47985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rd : 5,
48085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int re : 5,
48185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 6,
48285dfaf08SRalf Baechle 	;))))))
48385dfaf08SRalf Baechle };
48485dfaf08SRalf Baechle 
48585dfaf08SRalf Baechle struct p_format {		/* Performance counter format (R10000) */
48685dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
48785dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rs : 5,
48885dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rt : 5,
48985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rd : 5,
49085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int re : 5,
49185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 6,
49285dfaf08SRalf Baechle 	;))))))
49385dfaf08SRalf Baechle };
49485dfaf08SRalf Baechle 
49585dfaf08SRalf Baechle struct f_format {			/* FPU register format */
49685dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
49785dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int : 1,
49885dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int fmt : 4,
49985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rt : 5,
50085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int rd : 5,
50185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int re : 5,
50285dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 6,
50385dfaf08SRalf Baechle 	;)))))))
50485dfaf08SRalf Baechle };
50585dfaf08SRalf Baechle 
50685dfaf08SRalf Baechle struct ma_format {		/* FPU multiply and add format (MIPS IV) */
50785dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
50885dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int fr : 5,
50985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int ft : 5,
51085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int fs : 5,
51185dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int fd : 5,
51285dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 4,
51385dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int fmt : 2,
51485dfaf08SRalf Baechle 	;)))))))
51585dfaf08SRalf Baechle };
51685dfaf08SRalf Baechle 
51785dfaf08SRalf Baechle struct b_format {			/* BREAK and SYSCALL */
51885dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
51985dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int code : 20,
52085dfaf08SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 6,
52185dfaf08SRalf Baechle 	;)))
52285dfaf08SRalf Baechle };
52385dfaf08SRalf Baechle 
5248fba1e58SRalf Baechle struct ps_format {			/* MIPS-3D / paired single format */
5258fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
5268fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int rs : 5,
5278fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int ft : 5,
5288fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int fs : 5,
5298fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int fd : 5,
5308fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 6,
5318fba1e58SRalf Baechle 	;))))))
5328fba1e58SRalf Baechle };
5338fba1e58SRalf Baechle 
5348fba1e58SRalf Baechle struct v_format {				/* MDMX vector format */
5358fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int opcode : 6,
5368fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int sel : 4,
5378fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int fmt : 1,
5388fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int vt : 5,
5398fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int vs : 5,
5408fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int vd : 5,
5418fba1e58SRalf Baechle 	BITFIELD_FIELD(unsigned int func : 6,
5428fba1e58SRalf Baechle 	;)))))))
5438fba1e58SRalf Baechle };
5448fba1e58SRalf Baechle 
545*2aa9fd06SSteven J. Hill /*
546*2aa9fd06SSteven J. Hill  * microMIPS instruction formats (32-bit length)
547*2aa9fd06SSteven J. Hill  *
548*2aa9fd06SSteven J. Hill  * NOTE:
549*2aa9fd06SSteven J. Hill  *	Parenthesis denote whether the format is a microMIPS instruction or
550*2aa9fd06SSteven J. Hill  *	if it is MIPS32 instruction re-encoded for use in the microMIPS ASE.
551*2aa9fd06SSteven J. Hill  */
552*2aa9fd06SSteven J. Hill struct fb_format {		/* FPU branch format (MIPS32) */
553*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
554*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int bc : 5,
555*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int cc : 3,
556*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int flag : 2,
557*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 16,
558*2aa9fd06SSteven J. Hill 	;)))))
559*2aa9fd06SSteven J. Hill };
560*2aa9fd06SSteven J. Hill 
561*2aa9fd06SSteven J. Hill struct fp0_format {		/* FPU multiply and add format (MIPS32) */
562*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
563*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fmt : 5,
564*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int ft : 5,
565*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
566*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
567*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
568*2aa9fd06SSteven J. Hill 	;))))))
569*2aa9fd06SSteven J. Hill };
570*2aa9fd06SSteven J. Hill 
571*2aa9fd06SSteven J. Hill struct mm_fp0_format {		/* FPU multipy and add format (microMIPS) */
572*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
573*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int ft : 5,
574*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
575*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
576*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fmt : 3,
577*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int op : 2,
578*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
579*2aa9fd06SSteven J. Hill 	;)))))))
580*2aa9fd06SSteven J. Hill };
581*2aa9fd06SSteven J. Hill 
582*2aa9fd06SSteven J. Hill struct fp1_format {		/* FPU mfc1 and cfc1 format (MIPS32) */
583*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
584*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int op : 5,
585*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 5,
586*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
587*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
588*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
589*2aa9fd06SSteven J. Hill 	;))))))
590*2aa9fd06SSteven J. Hill };
591*2aa9fd06SSteven J. Hill 
592*2aa9fd06SSteven J. Hill struct mm_fp1_format {		/* FPU mfc1 and cfc1 format (microMIPS) */
593*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
594*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 5,
595*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
596*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fmt : 2,
597*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int op : 8,
598*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
599*2aa9fd06SSteven J. Hill 	;))))))
600*2aa9fd06SSteven J. Hill };
601*2aa9fd06SSteven J. Hill 
602*2aa9fd06SSteven J. Hill struct mm_fp2_format {		/* FPU movt and movf format (microMIPS) */
603*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
604*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
605*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
606*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int cc : 3,
607*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int zero : 2,
608*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fmt : 2,
609*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int op : 3,
610*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
611*2aa9fd06SSteven J. Hill 	;))))))))
612*2aa9fd06SSteven J. Hill };
613*2aa9fd06SSteven J. Hill 
614*2aa9fd06SSteven J. Hill struct mm_fp3_format {		/* FPU abs and neg format (microMIPS) */
615*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
616*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 5,
617*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
618*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fmt : 3,
619*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int op : 7,
620*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
621*2aa9fd06SSteven J. Hill 	;))))))
622*2aa9fd06SSteven J. Hill };
623*2aa9fd06SSteven J. Hill 
624*2aa9fd06SSteven J. Hill struct mm_fp4_format {		/* FPU c.cond format (microMIPS) */
625*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
626*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 5,
627*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
628*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int cc : 3,
629*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fmt : 3,
630*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int cond : 4,
631*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
632*2aa9fd06SSteven J. Hill 	;)))))))
633*2aa9fd06SSteven J. Hill };
634*2aa9fd06SSteven J. Hill 
635*2aa9fd06SSteven J. Hill struct mm_fp5_format {		/* FPU lwxc1 and swxc1 format (microMIPS) */
636*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
637*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int index : 5,
638*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int base : 5,
639*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
640*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int op : 5,
641*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
642*2aa9fd06SSteven J. Hill 	;))))))
643*2aa9fd06SSteven J. Hill };
644*2aa9fd06SSteven J. Hill 
645*2aa9fd06SSteven J. Hill struct fp6_format {		/* FPU madd and msub format (MIPS IV) */
646*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
647*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fr : 5,
648*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int ft : 5,
649*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
650*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
651*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
652*2aa9fd06SSteven J. Hill 	;))))))
653*2aa9fd06SSteven J. Hill };
654*2aa9fd06SSteven J. Hill 
655*2aa9fd06SSteven J. Hill struct mm_fp6_format {		/* FPU madd and msub format (microMIPS) */
656*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
657*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int ft : 5,
658*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fs : 5,
659*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fd : 5,
660*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int fr : 5,
661*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 6,
662*2aa9fd06SSteven J. Hill 	;))))))
663*2aa9fd06SSteven J. Hill };
664*2aa9fd06SSteven J. Hill 
665*2aa9fd06SSteven J. Hill struct mm_i_format {		/* Immediate format (microMIPS) */
666*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
667*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 5,
668*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rs : 5,
669*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 16,
670*2aa9fd06SSteven J. Hill 	;))))
671*2aa9fd06SSteven J. Hill };
672*2aa9fd06SSteven J. Hill 
673*2aa9fd06SSteven J. Hill struct mm_m_format {		/* Multi-word load/store format (microMIPS) */
674*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
675*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rd : 5,
676*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int base : 5,
677*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 4,
678*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 12,
679*2aa9fd06SSteven J. Hill 	;)))))
680*2aa9fd06SSteven J. Hill };
681*2aa9fd06SSteven J. Hill 
682*2aa9fd06SSteven J. Hill struct mm_x_format {		/* Scaled indexed load format (microMIPS) */
683*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
684*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int index : 5,
685*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int base : 5,
686*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rd : 5,
687*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 11,
688*2aa9fd06SSteven J. Hill 	;)))))
689*2aa9fd06SSteven J. Hill };
690*2aa9fd06SSteven J. Hill 
691*2aa9fd06SSteven J. Hill /*
692*2aa9fd06SSteven J. Hill  * microMIPS instruction formats (16-bit length)
693*2aa9fd06SSteven J. Hill  */
694*2aa9fd06SSteven J. Hill struct mm_b0_format {		/* Unconditional branch format (microMIPS) */
695*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
696*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 10,
697*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int : 16, /* Ignored */
698*2aa9fd06SSteven J. Hill 	;)))
699*2aa9fd06SSteven J. Hill };
700*2aa9fd06SSteven J. Hill 
701*2aa9fd06SSteven J. Hill struct mm_b1_format {		/* Conditional branch format (microMIPS) */
702*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
703*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rs : 3,
704*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 7,
705*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int : 16, /* Ignored */
706*2aa9fd06SSteven J. Hill 	;))))
707*2aa9fd06SSteven J. Hill };
708*2aa9fd06SSteven J. Hill 
709*2aa9fd06SSteven J. Hill struct mm16_m_format {		/* Multi-word load/store format */
710*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
711*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int func : 4,
712*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rlist : 2,
713*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int imm : 4,
714*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int : 16, /* Ignored */
715*2aa9fd06SSteven J. Hill 	;)))))
716*2aa9fd06SSteven J. Hill };
717*2aa9fd06SSteven J. Hill 
718*2aa9fd06SSteven J. Hill struct mm16_rb_format {		/* Signed immediate format */
719*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
720*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 3,
721*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int base : 3,
722*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 4,
723*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int : 16, /* Ignored */
724*2aa9fd06SSteven J. Hill 	;)))))
725*2aa9fd06SSteven J. Hill };
726*2aa9fd06SSteven J. Hill 
727*2aa9fd06SSteven J. Hill struct mm16_r3_format {		/* Load from global pointer format */
728*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
729*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 3,
730*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 7,
731*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int : 16, /* Ignored */
732*2aa9fd06SSteven J. Hill 	;))))
733*2aa9fd06SSteven J. Hill };
734*2aa9fd06SSteven J. Hill 
735*2aa9fd06SSteven J. Hill struct mm16_r5_format {		/* Load/store from stack pointer format */
736*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int opcode : 6,
737*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int rt : 5,
738*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(signed int simmediate : 5,
739*2aa9fd06SSteven J. Hill 	BITFIELD_FIELD(unsigned int : 16, /* Ignored */
740*2aa9fd06SSteven J. Hill 	;))))
741*2aa9fd06SSteven J. Hill };
742*2aa9fd06SSteven J. Hill 
74390e8cacdSRalf Baechle union mips_instruction {
74490e8cacdSRalf Baechle 	unsigned int word;
74590e8cacdSRalf Baechle 	unsigned short halfword[2];
74690e8cacdSRalf Baechle 	unsigned char byte[4];
74790e8cacdSRalf Baechle 	struct j_format j_format;
74890e8cacdSRalf Baechle 	struct i_format i_format;
74990e8cacdSRalf Baechle 	struct u_format u_format;
75090e8cacdSRalf Baechle 	struct c_format c_format;
75190e8cacdSRalf Baechle 	struct r_format r_format;
75290e8cacdSRalf Baechle 	struct p_format p_format;
75390e8cacdSRalf Baechle 	struct f_format f_format;
75490e8cacdSRalf Baechle 	struct ma_format ma_format;
75590e8cacdSRalf Baechle 	struct b_format b_format;
7568fba1e58SRalf Baechle 	struct ps_format ps_format;
7578fba1e58SRalf Baechle 	struct v_format v_format;
758*2aa9fd06SSteven J. Hill 	struct fb_format fb_format;
759*2aa9fd06SSteven J. Hill 	struct fp0_format fp0_format;
760*2aa9fd06SSteven J. Hill 	struct mm_fp0_format mm_fp0_format;
761*2aa9fd06SSteven J. Hill 	struct fp1_format fp1_format;
762*2aa9fd06SSteven J. Hill 	struct mm_fp1_format mm_fp1_format;
763*2aa9fd06SSteven J. Hill 	struct mm_fp2_format mm_fp2_format;
764*2aa9fd06SSteven J. Hill 	struct mm_fp3_format mm_fp3_format;
765*2aa9fd06SSteven J. Hill 	struct mm_fp4_format mm_fp4_format;
766*2aa9fd06SSteven J. Hill 	struct mm_fp5_format mm_fp5_format;
767*2aa9fd06SSteven J. Hill 	struct fp6_format fp6_format;
768*2aa9fd06SSteven J. Hill 	struct mm_fp6_format mm_fp6_format;
769*2aa9fd06SSteven J. Hill 	struct mm_i_format mm_i_format;
770*2aa9fd06SSteven J. Hill 	struct mm_m_format mm_m_format;
771*2aa9fd06SSteven J. Hill 	struct mm_x_format mm_x_format;
772*2aa9fd06SSteven J. Hill 	struct mm_b0_format mm_b0_format;
773*2aa9fd06SSteven J. Hill 	struct mm_b1_format mm_b1_format;
774*2aa9fd06SSteven J. Hill 	struct mm16_m_format mm16_m_format ;
775*2aa9fd06SSteven J. Hill 	struct mm16_rb_format mm16_rb_format;
776*2aa9fd06SSteven J. Hill 	struct mm16_r3_format mm16_r3_format;
777*2aa9fd06SSteven J. Hill 	struct mm16_r5_format mm16_r5_format;
77890e8cacdSRalf Baechle };
77990e8cacdSRalf Baechle 
78090e8cacdSRalf Baechle #endif /* _UAPI_ASM_INST_H */
781