1*384740dcSRalf Baechle /* 2*384740dcSRalf Baechle * Interface for smsc fdc48m81x Super IO chip 3*384740dcSRalf Baechle * 4*384740dcSRalf Baechle * Author: MontaVista Software, Inc. source@mvista.com 5*384740dcSRalf Baechle * 6*384740dcSRalf Baechle * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under 7*384740dcSRalf Baechle * the terms of the GNU General Public License version 2. This program 8*384740dcSRalf Baechle * is licensed "as is" without any warranty of any kind, whether express 9*384740dcSRalf Baechle * or implied. 10*384740dcSRalf Baechle * 11*384740dcSRalf Baechle * Copyright (C) 2004 MontaVista Software Inc. 12*384740dcSRalf Baechle * Manish Lachwani, mlachwani@mvista.com 13*384740dcSRalf Baechle */ 14*384740dcSRalf Baechle 15*384740dcSRalf Baechle #ifndef _SMSC_FDC37M81X_H_ 16*384740dcSRalf Baechle #define _SMSC_FDC37M81X_H_ 17*384740dcSRalf Baechle 18*384740dcSRalf Baechle /* Common Registers */ 19*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_INDEX 0x00 20*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_DATA 0x01 21*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONF 0x02 22*384740dcSRalf Baechle #define SMSC_FDC37M81X_INDEX 0x03 23*384740dcSRalf Baechle #define SMSC_FDC37M81X_DNUM 0x07 24*384740dcSRalf Baechle #define SMSC_FDC37M81X_DID 0x20 25*384740dcSRalf Baechle #define SMSC_FDC37M81X_DREV 0x21 26*384740dcSRalf Baechle #define SMSC_FDC37M81X_PCNT 0x22 27*384740dcSRalf Baechle #define SMSC_FDC37M81X_PMGT 0x23 28*384740dcSRalf Baechle #define SMSC_FDC37M81X_OSC 0x24 29*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFPA0 0x26 30*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFPA1 0x27 31*384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST4 0x2B 32*384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST5 0x2C 33*384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST1 0x2D 34*384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST2 0x2E 35*384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST3 0x2F 36*384740dcSRalf Baechle 37*384740dcSRalf Baechle /* Logical device numbers */ 38*384740dcSRalf Baechle #define SMSC_FDC37M81X_FDD 0x00 39*384740dcSRalf Baechle #define SMSC_FDC37M81X_PARALLEL 0x03 40*384740dcSRalf Baechle #define SMSC_FDC37M81X_SERIAL1 0x04 41*384740dcSRalf Baechle #define SMSC_FDC37M81X_SERIAL2 0x05 42*384740dcSRalf Baechle #define SMSC_FDC37M81X_KBD 0x07 43*384740dcSRalf Baechle #define SMSC_FDC37M81X_AUXIO 0x08 44*384740dcSRalf Baechle #define SMSC_FDC37M81X_NONE 0xff 45*384740dcSRalf Baechle 46*384740dcSRalf Baechle /* Logical device Config Registers */ 47*384740dcSRalf Baechle #define SMSC_FDC37M81X_ACTIVE 0x30 48*384740dcSRalf Baechle #define SMSC_FDC37M81X_BASEADDR0 0x60 49*384740dcSRalf Baechle #define SMSC_FDC37M81X_BASEADDR1 0x61 50*384740dcSRalf Baechle #define SMSC_FDC37M81X_INT 0x70 51*384740dcSRalf Baechle #define SMSC_FDC37M81X_INT2 0x72 52*384740dcSRalf Baechle #define SMSC_FDC37M81X_LDCR_F0 0xF0 53*384740dcSRalf Baechle 54*384740dcSRalf Baechle /* Chip Config Values */ 55*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_ENTER 0x55 56*384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa 57*384740dcSRalf Baechle #define SMSC_FDC37M81X_CHIP_ID 0x4d 58*384740dcSRalf Baechle 59*384740dcSRalf Baechle unsigned long smsc_fdc37m81x_init(unsigned long port); 60*384740dcSRalf Baechle 61*384740dcSRalf Baechle void smsc_fdc37m81x_config_beg(void); 62*384740dcSRalf Baechle 63*384740dcSRalf Baechle void smsc_fdc37m81x_config_end(void); 64*384740dcSRalf Baechle 65*384740dcSRalf Baechle u8 smsc_fdc37m81x_config_get(u8 reg); 66*384740dcSRalf Baechle void smsc_fdc37m81x_config_set(u8 reg, u8 val); 67*384740dcSRalf Baechle 68*384740dcSRalf Baechle #endif 69