1*3179d37eSPaul Burton /* 2*3179d37eSPaul Burton * Copyright (C) 2014 Imagination Technologies 3*3179d37eSPaul Burton * Author: Paul Burton <paul.burton@imgtec.com> 4*3179d37eSPaul Burton * 5*3179d37eSPaul Burton * This program is free software; you can redistribute it and/or modify it 6*3179d37eSPaul Burton * under the terms of the GNU General Public License as published by the 7*3179d37eSPaul Burton * Free Software Foundation; either version 2 of the License, or (at your 8*3179d37eSPaul Burton * option) any later version. 9*3179d37eSPaul Burton */ 10*3179d37eSPaul Burton 11*3179d37eSPaul Burton #ifndef __MIPS_ASM_PM_CPS_H__ 12*3179d37eSPaul Burton #define __MIPS_ASM_PM_CPS_H__ 13*3179d37eSPaul Burton 14*3179d37eSPaul Burton /* 15*3179d37eSPaul Burton * The CM & CPC can only handle coherence & power control on a per-core basis, 16*3179d37eSPaul Burton * thus in an MT system the VPEs within each core are coupled and can only 17*3179d37eSPaul Burton * enter or exit states requiring CM or CPC assistance in unison. 18*3179d37eSPaul Burton */ 19*3179d37eSPaul Burton #ifdef CONFIG_MIPS_MT 20*3179d37eSPaul Burton # define coupled_coherence cpu_has_mipsmt 21*3179d37eSPaul Burton #else 22*3179d37eSPaul Burton # define coupled_coherence 0 23*3179d37eSPaul Burton #endif 24*3179d37eSPaul Burton 25*3179d37eSPaul Burton /* Enumeration of possible PM states */ 26*3179d37eSPaul Burton enum cps_pm_state { 27*3179d37eSPaul Burton CPS_PM_NC_WAIT, /* MIPS wait instruction, non-coherent */ 28*3179d37eSPaul Burton CPS_PM_CLOCK_GATED, /* Core clock gated */ 29*3179d37eSPaul Burton CPS_PM_POWER_GATED, /* Core power gated */ 30*3179d37eSPaul Burton CPS_PM_STATE_COUNT, 31*3179d37eSPaul Burton }; 32*3179d37eSPaul Burton 33*3179d37eSPaul Burton /** 34*3179d37eSPaul Burton * cps_pm_support_state - determine whether the system supports a PM state 35*3179d37eSPaul Burton * @state: the state to test for support 36*3179d37eSPaul Burton * 37*3179d37eSPaul Burton * Returns true if the system supports the given state, otherwise false. 38*3179d37eSPaul Burton */ 39*3179d37eSPaul Burton extern bool cps_pm_support_state(enum cps_pm_state state); 40*3179d37eSPaul Burton 41*3179d37eSPaul Burton /** 42*3179d37eSPaul Burton * cps_pm_enter_state - enter a PM state 43*3179d37eSPaul Burton * @state: the state to enter 44*3179d37eSPaul Burton * 45*3179d37eSPaul Burton * Enter the given PM state. If coupled_coherence is non-zero then it is 46*3179d37eSPaul Burton * expected that this function be called at approximately the same time on 47*3179d37eSPaul Burton * each coupled CPU. Returns 0 on successful entry & exit, otherwise -errno. 48*3179d37eSPaul Burton */ 49*3179d37eSPaul Burton extern int cps_pm_enter_state(enum cps_pm_state state); 50*3179d37eSPaul Burton 51*3179d37eSPaul Burton #endif /* __MIPS_ASM_PM_CPS_H__ */ 52